This user guide from Microsemi details the MIPI CSI-2 Receiver Decoder IP core, designed for integration with PolarFire FPGAs. It provides comprehensive information on the core's features, hardware implementation, configuration parameters, and usage.
The guide covers support for various data types, including Raw-8, Raw-10, Raw-12, Raw-14, Raw-16, and RGB-888, across multiple lane configurations (1, 2, 4, and 8 lanes).
Engineers will find detailed insights into pinouts, timing diagrams, and resource utilization, essential for leveraging this IP in advanced image processing applications.
For further details on Microsemi's semiconductor solutions, visit microsemi.com.