Arora V Hardened MIPI D-PHY User Guide

Introduction to Arora V Hardened MIPI D-PHY

This document serves as a comprehensive user guide for the Arora V Hardened MIPI D-PHY. It is designed to help users quickly understand the features and usage of this advanced component. The guide provides detailed introductions to its functions, ports, and configuration options.

The Arora V devices integrate the hardcore MIPI D-PHY RX and MIPI D-PHY TX, adhering to the MIPI Alliance Standard for D-PHY Specification V1.2. The dedicated D-PHY core supports MIPI DSI and CSI-2 mobile video interfaces, crucial for camera and display applications.

Key Features and Specifications

The main features of the MIPI D-PHY include:

Compliance with MIPI D-PHY Specification version 1.2.
Support for RX/TX Combo-PHY in 15K/25K/60K devices, configurable based on user requirements.
High-speed (HS) unidirectional mode operating at up to 2.5 Gbps per lane and 10 Gbps per quad (4 data lanes), with a total of up to 20 Gbps supported per chip (8 data lanes).
Support for two MIPI D-PHY quads, each with up to 4 data lanes and one clock lane.
Bidirectional Low-power (LP) mode with a bit rate of 10Mbps.
Integrated HS Sync, bit alignment, and lane alignment features.
MIPI D-PHY RX supports 1:8 and 1:16 modes.
MIPI D-PHY TX supports 8:1 and 16:1 modes.
Compatibility with MIPI DSI and MIPI CSI-2 link layers.
A dedicated MIPI Bank for the hardcore MIPI D-PHY.

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Arora V Hardened MIPI D-PHY User Guide

Introduction to Arora V Hardened MIPI D-PHY

Key Features and Specifications

Related Documents and Support

References

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