An 872 Katin Haɗawa Mai Shiryewa tare da Intel Arria 10 GX FPGA

Gabatarwa

Game da wannan Takardun

Wannan takaddar tana ba da hanyoyin ƙididdigewa da tabbatar da ƙarfi da aikin zafi na ƙirar AFU ɗinku ta amfani da Intel® Programmable Acceleration Card tare da Intel Arria® 10 GX FPGA a cikin dandamalin uwar garken manufa.

Bayanin iko

Mai sarrafa hukumar yana sa ido da sarrafa abubuwan zafi da wutar lantarki akan Intel FPGA PAC. Lokacin da hukumar ko FPGA ke yin zafi fiye da kima ko zana halin yanzu da ya wuce kima, mai sarrafa hukumar yana rufe ikon FPGA don kariya. Daga baya, yana kuma saukar da hanyar haɗin PCIe wanda zai iya haifar da haɗarin tsarin da ba a zata ba. Komawa Auto-Rufe don ƙarin cikakkun bayanai game da sharuɗɗan da ke haifar da rufe allo. A cikin al'amuran al'ada, zafin jiki na FPGA da ƙarfi sune babban dalilin rufewa. Don rage raguwar lokaci da tabbatar da kwanciyar hankali na tsarin, Intel yana ba da shawarar cewa jimlar wutar lantarki ba ta wuce 66 W ba kuma ikon FPGA bai wuce 45 W ba. Abubuwan da aka haɗa daban-daban da kuma majalisai na hukumar suna da ƙarfin wutar lantarki. Sabili da haka, ƙididdiga masu ƙima sun fi ƙayyadaddun iyaka don tabbatar da cewa hukumar ba ta fuskanci kashewa ba a cikin tsarin da ke da nauyin aiki daban-daban da yanayin shiga.

Bayanin iko

Tsari	Jimlar Wutar Wuta (watts)	FPGA Power (watts)
Tsari tare da Manajan Interface na FPGA (FIM) da AFU wanda ke gudana tare da mafi munin yanayin aiki mai ɗaukar nauyi na mafi ƙarancin mintuna 15 a ainihin zafin jiki na 95°C.	66	45

Jimlar ikon hukumar ya bambanta dangane da ƙirar Accelerator Functional Unit (AFU) ɗinku (adadi da mitar jujjuya dabaru), zazzabi mai shiga, zafin tsarin da kwararar iska na ramin manufa don Intel FPGA PAC. Don sarrafa wannan sauye-sauye, Intel yana ba da shawarar ku cika wannan ƙayyadaddun wutar lantarki don hana rufewar wutar lantarki ta Mai Kula da Gudanarwar Hukumar.

Bayanai masu alaƙa

Rufewa ta atomatik.

Abubuwan da ake bukata

Mai kera kayan aiki na asali na uwar garken (OEM) dole ne ya tabbatar da cewa kowane Intel FPGA PAC mai shiga tsakani zuwa ramin PCIe a cikin dandamalin uwar garken da aka yi niyya zai iya kasancewa cikin iyakokin zafin jiki koda lokacin da hukumar ta cinye iyakar ikon da aka yarda (66 W). Don ƙarin bayani, koma zuwa Intel PAC tare da Intel Arria 10 GX FPGA Sharuɗɗan cancantar Platform(1).

Bukatun kayan aiki

Dole ne ku sami waɗannan kayan aikin don ƙididdigewa da kimanta ƙarfin aiki da yanayin zafi.

• Software:
  • Intel Acceleration Stack don Ci gaba
  • BWtoolkit
  • AFU Design (2)
  • Rubutun Tcl (zazzagewa) - Ana buƙatar tsara shirye-shiryen file domin bincike
  • Ƙimar Ƙarfin Farko don na'urorin Intel Arria 10
  • Intel FPGA PAC Ƙimar Ƙimar Ƙimar Ƙimar (zazzagewa)
• Hardware:
  • Farashin Intel FPGA PAC
  • Kebul na USB (3)
  • Sabar Target don Intel FPGA PAC(4)

Intel yana ba ku shawarar ku bi Jagoran Farawa Mai Saurin Farawa na Intel Acceleration Stack don Intel Programmable Acceleration Card tare da Intel Arria 10 GX FPGA don shigar da software.

Bayanai masu alaƙa

Intel Acceleration Stack Quick Start Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA.

1. Tuntuɓi wakilin tallafi na Intel don samun damar wannan takaddar.
2. An ƙirƙiri littafin directory_synth bayan kun haɗa AFU ɗin ku.
3. A cikin Acceleration Stack 1.2, ana yin sa ido kan hukumar akan PCIe.
4. Tabbatar cewa OEM ɗin ku sun inganta ramin (s) na PCIe da aka yi niyya daidai da ka'idodin cancantar Platform don Intel FPGA PAC ɗin ku.

Amfani da Gudanarwar Gudanarwa na Board

Rufewa ta atomatik

Mai kula da Gudanar da Hukumar yana sa ido da sarrafa sake saiti, hanyoyin wutar lantarki daban-daban, FPGA da yanayin allo. Lokacin da Mai Kula da Gudanarwa na Hukumar ya fahimci yanayin da zai iya lalata hukumar, ta atomatik yana rufe ikon hukumar don kariya.

Lura: Lokacin da FPGA ya rasa iko, hanyar haɗin PCIe tsakanin Intel FPGA PAC da mai watsa shiri ta ƙare. A yawancin tsarin, hanyar haɗin PCIe na iya haifar da hadarin tsarin.

Ma'auni na Rufewa ta atomatik

Tebur mai zuwa yana lissafin ma'auni bayan abin da Ma'aikatar Gudanarwa ta Hukumar ke rufe ikon hukumar.

Siga	Ƙarfin Ƙofar
Ikon Ginin	66 W
12v Jirgin baya na Yanzu	6 A
12v Jirgin baya Voltage	14 V
1.2v a halin yanzu	16 A
1.2v Voltage	1.4 V
1.8v a halin yanzu	8 A
1.8v Voltage	2.04 V
3.3v a halin yanzu	8 A
3.3v Voltage	3.96 V
FPGA Core Voltage	1.08 V
FPGA Core Current	60 A
FPGA Core Zazzabi	100°C
Matsakaicin Supply Temperature	120°C
Zazzabi na allo	80°C
QSFP Zazzabi	90°C
QSFP Voltage	3.7 V

Murmurewa Bayan Kashewa ta atomatik

Mai kula da Gudanarwa na Hukumar yana riƙe da wuta har sai lokacin sake zagayowar wutar lantarki na gaba. Don haka, lokacin da aka kashe wutar katin Intel FPGA PAC, dole ne ku sake zagayowar sabar don dawo da wutar lantarki zuwa Intel FPGA PAC.

Dalili na gama-gari na kashe wutar lantarki shine zafin FPGA (lokacin da ainihin zafin jiki ya wuce 100°C), ko kuma FPGA yana zana halin yanzu da ya wuce kima. Wannan yawanci yana faruwa ne lokacin da ƙirar AFU ta zarce intel FPGA PAC da aka ayyana ambulan wuta ko kuma rashin isasshen iska. A wannan yanayin, dole ne ku rage amfani da wutar lantarki a cikin AFU ɗin ku.

Saka idanu kan Sensors ta amfani da OPAE

Yi amfani da shirin layin umarni fpgainfo don tara zafin jiki da bayanan firikwensin wuta daga Mai Kula da Gudanarwar Hukumar. Kuna iya amfani da wannan shirin tare da Acceleration Stack 1.2 da bayan haka. Don Tarin Haɗawa 1.1 ko fiye, yi amfani da kayan aikin BWMonitor kamar yadda aka bayyana a sashe na gaba.

Don tattara bayanan zafin jiki:

• bash-4.2$ fpgainfo temp

Sampda fitarwa

Don tattara bayanan wutar lantarki

• bash-4.2$ fpgainfo ikon

Sampda fitarwa

Saka idanu kan Sensors ta amfani da BWMonitor

• BWMonitor kayan aiki ne na BittWare wanda ke ba ku damar auna zafin FPGA/ allo, voltage, da kuma halin yanzu.

Abubuwan da ake bukata: Dole ne ku shigar da kebul na micro-USB tsakanin Intel FPGA PAC da uwar garken.

1. Shigar da BittWorks II Toolkit-Lite software, firmware, da bootloader masu dacewa.

OS-Masu jituwa BittWorks II ToolkitLite Version

Tsarin Aiki	Saki	BittWorks II Toolkit-Lite Version	Shigar da Umurni
CentOS 7.4/RHEL 7.4	2018.6 Enterprise Linux 7 (64-bit)	bw2tk- Lite-2018.6.el7.x86_64.rpm
			sudo yum shigar bw2tk-\lite-2018.6.el7.x86_64.rpm
Ubuntu 16.04	2018.6 Ubuntu 16.04 (64-bit)	bw2tk- Lite-2018.6.u1604.amd64.deb
			sudo dpkg -i bw2tk-\ 2018.6.u1604.amd64.deb

Koma Farawa webshafi don zazzage firmware da kayan aikin BMC

• BMC Firmware version: 26889
• BMC Bootloader version: 26879

Ajiye files zuwa wurin da aka sani akan na'ura mai watsa shiri. Rubutun da ke biyowa ya nuna wannan wurin.

Ƙara kayan aikin Bittware zuwa PATH:

• fitarwa PATH=/opt/bwtk/2018.6.0L/bin/:$PATH

Kuna iya ƙaddamar da BWMonitor ta amfani da

• /opt/bwtk/2018.6L/bin/bwmonitor-gui&

Sample Ma'auni

AFU Design Power Tabbatarwa

Gudun Ma'aunin Wuta

Don kimanta ƙarfin ƙirar AFU ɗin ku, ɗauki ma'auni masu zuwa:

• Jimlar wutar allo da zafin FPGA
  • (bayan gudanar da mafi munin yanayin bayanai akan ƙirar ku na mintuna 15)
• A tsaye Power da Zazzabi
  • (ta amfani da ƙirar ma'aunin wutar lantarki a tsaye)
• Mafi Munin Case Static Power
  • (ƙididdigar annabta ta amfani da Ƙimar Ƙarfin Farko don na'urorin Intel Arria 10)

Sa'an nan, yi amfani da Intel FPGA PAC Power Estimator Sheet (zazzagewa) tare da waɗannan ma'aunin ƙididdiga don tabbatar da idan ƙirar AFU ɗinku ta dace da ƙayyadaddun bayanai.

Auna Jimlar Ƙarfin allo

Bi waɗannan matakan

1. Shigar da Intel PAC tare da Intel Arria 10 GX FPGA a cikin ƙwararren PCIe a cikin uwar garken. Idan kana amfani da BWMonitor don aunawa, haɗa kebul na Micro-USB daga bayan katin zuwa kowane tashar USB na uwar garken.
2. Load da AFU ɗin ku kuma gudanar da iyakar ƙarfinsa.
   • Idan AFU yana amfani da Ethernet, to, tabbatar da cewa an shigar da kebul na cibiyar sadarwa ko module kuma an haɗa shi zuwa abokin haɗin gwiwa kuma an kunna zirga-zirgar hanyar sadarwa a cikin AFU.
   • Idan ya dace, gudanar da DMA ci gaba da motsa jiki a kan jirgin DDR4.
   • Gudanar da aikace-aikacen ku a kan mai watsa shiri don ciyar da AFU mafi munin zirga-zirga da kuma cikakken motsa jiki na FPGA. Tabbatar cewa kun jaddada FPGA tare da mafi yawan cunkoson bayanai. Gudun wannan matakin na tsawon mintuna 15 don ƙyale zafin zafin FPGA ya daidaita.
     • Lura: Yayin gwaji, saka idanu akan jimlar ƙarfin hukumar, ikon FPGA, da ƙimar zafin jiki na FPGA don tabbatar da cewa sun tsaya cikin ƙayyadaddun bayanai. Idan an kai iyakar 66 W, 45 W, ko 100°C, dakatar da gwajin nan da nan.
3. Bayan FPGA ainihin zafin jiki ya zama karko, yi amfani da shirin fpgainfo ko kayan aikin BWMonitor don yin rikodin jimillar ƙarfin allo da zafin jiki na FPGA. Shigar da waɗannan dabi'u a jere Mataki na 1: Jimlar ƙarfin wutar allo na Intel FPGA PAC Power Estimator Sheet.

Intel FPGA PAC Ƙimar Ƙimar Ƙimar Sheet Sample

Auna Madaidaicin Ƙarfin Ƙarfi

Leakage halin yanzu shine babban abin da ke haifar da bambancin amfani da wutar lantarki daga allo zuwa allo. Ma'aunin wutar lantarki daga sashin da ke sama ya haɗa da wutar lantarki saboda yayyo halin yanzu (a tsaye ikon) da kuma iko saboda ma'anar AFU (ƙarfin ƙarfi). A cikin wannan sashe, zaku auna madaidaicin ikon kwamitin-ƙarƙashin gwaji don fahimtar ƙarfin kuzari.

Kafin auna madaidaicin ikon FPGA, yi amfani da disable-gpio-input-bufferintelpac-arria10-gx.tcl rubutun (zazzagewa) don aiwatar da shirye-shiryen FPGA file, (*.saf file) wanda ya ƙunshi ƙirar FIM da AFU. Rubutun tcl yana kashe duk abubuwan shigar da FPGA don tabbatar da cewa babu juyawa a cikin FPGA (wanda ke nufin babu ƙarfi mai ƙarfi). Koma zuwa Mafi Karancin Ruwa Example don tarawa kamarampda AFU. An haifar * .sof file yana nan a:

• cd $ OPAE_PLATFORM_ROOT/hw/samples/ $ OPAE_PLATFORM_ROOT/hw/samples/ build_synth/build/fitarwa_files/ afu_*.sof

Dole ne ku adana disable-gpio-input-buffer-intel-pac-arria10-gx.tcl a cikin kundin adireshin da ke sama sannan ku gudanar da umarni mai zuwa

• # quartus_asm -t disable-gpio-input-buffer-intel-pac-arria10-gx.tclafu_*.sof

Sampda fitarwa

Bayani: *************************************** ************* Bayani:
Gudun Quartus Prime Assembler
Bayani: Shafin 17.1.1 Gina 273 12/19/2017 SJ Pro Edition
Bayani: Haƙƙin mallaka (C) 2017 Intel Corporation. An kiyaye duk haƙƙoƙi. Bayani: Amfanin ku
na kayan aikin ƙira na Kamfanin Intel Corporation, ayyukan dabaru Bayani: da sauran software da kayan aikin, da nata AMPBayanin dabaru na abokin tarayya: ayyuka, da kowane fitarwa files daga kowane bayanin da aka ambata: (ciki har da shirye-shiryen na'ura ko kwaikwaya files), da kowane Bayani: takaddun da ke da alaƙa ko bayanai suna magana ne kai tsaye Bayani: zuwa sharuɗɗa da sharuɗɗan Bayanin Lasisi na Shirin Intel: Yarjejeniyar Biyan Kuɗi, Yarjejeniyar Lasisi na Farko na Intel Quartus, Bayani:

Bayan nasarar aiwatar da rubutun tcl, afu_*.sof file an sabunta kuma a shirye don shirye-shiryen FPGA.

Bi waɗannan matakan don auna ainihin ƙarfin tsaye

1. Yi amfani da Intel Quartus® Prime Programmer don tsara * .sof file. Koma zuwa amfani da Intel Quartus Prime Programmer a shafi na 12 don cikakkun matakai.
2. Kula da ainihin zafin FPGA, voltage, da kuma halin yanzu ta amfani da kayan aikin BWMonitor. Shigar da waɗannan dabi'u a jere Mataki na 2: FPGA ainihin ma'aunin wutar lantarki na Intel FPGA PAC Power Estimator Sheet.

Bayanai masu alaƙa

• Intel Acceleration Stack Quick Start Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA
• Saka idanu kan Sensors ta amfani da BWMonitor.

Amfani da Intel Quartus Prime Programmer

Dole ne ku sami kebul ɗin micro USB da aka haɗa tsakanin Intel FPGA PAC da uwar garken don aiwatar da waɗannan matakan:

1. Nemo Tushen Port da Ƙarshen Katin Intel FPGA PAC: $ ​​lspci -tv | ku 09c4

Example fitarwa 1 yana nuna cewa Tushen Port shine d7: 0.0 kuma ƙarshen ƙarshen shine d8: 0.0

• -+-[0000:d7]-+-00.0-[d8]—-00.0 Intel Corporation Na'urar 09c4

ExampLe fitarwa 2 yana nuna cewa Tushen Port shine 0: 1.0 kuma ƙarshen ƙarshen shine 3: 0.0

• +-01.0-[03]—-00.0 Na'urar Kamfanin Kamfanin Intel 09c4

Example fitarwa 3 yana nuna cewa Tushen Port shine 85: 2.0 kuma ƙarshen ƙarshen shine 86: 0.0 kuma

• +-[0000:85]-+-02.0-[86]—-00.0 Intel Corporation Na'urar 09c4

Lura: Babu fitarwa da ke nuna gazawar ƙidayar na'urar PCIe* kuma ba a tsara wannan walƙiya ba.

• # Mask kurakurai da ba za a iya gyara su ba da kurakurai masu daidaitawa na FPGA
  • $ sudo setpci -s d8:0.0 ECAP_AER+0x08.L=0xFFFFFFFF
  • $ sudo setpci -s d8:0.0 ECAP_AER+0x14.L=0xFFFFFFFF
• # Mask kurakurai da ba za a iya gyara su ba da kuma Mask kurakurai masu daidaitawa na RP
  • $ sudo setpci -s d7:0.0 ECAP_AER+0x08.L=0xFFFFFFFF
  • $ sudo setpci -s d7:0.0 ECAP_AER+0x14.L=0xFFFFFFFF

Gudanar da umarnin Intel Quartus Prime Programmer mai zuwa:

• sudo $QUARTUS_HOME/bin/quartus_pgm -m JTAG -o 'pvbi;afu_*.sof'

1. Don warware kurakuran da ba za a iya gyara su ba da rufe kurakurai masu daidaitawa, gudanar da umarni masu zuwa
   • # Cire kurakuran da ba za a iya gyara su ba kuma rufe kurakurai masu gyara na FPGA
     • $ sudo setpci -s d8:0.0 ECAP_AER+0x08.L=0x00000000
     • $ sudo setpci -s d8:0.0 ECAP_AER+0x14.L=0x00000000
   • # Cire kurakuran da ba za a iya gyara su ba kuma rufe kurakurai masu gyara na RP:
     • $ sudo setpci -s d7:0.0 ECAP_AER+0x08.L=0x00000000
     • $ sudo setpci -s d7:0.0 ECAP_AER+0x14.L=0x00000000
2. Sake yi.

Bayanai masu alaƙa

Intel Acceleration Stack Quick Start Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA

Ƙididdiga Mafi Muni-Case Core Static Power

Bi waɗannan matakan don ƙididdige mafi munin yanayi a tsaye

1. Koma zuwa Mafi Karancin Ruwa Example don tarawa kamarample AFU dake:
   • /hw/samples/ /
2. A cikin Intel Quartus Prime Pro Edition software, danna File > Buɗe Project kuma zaɓi .qpf naka file don buɗe aikin haɗin AFU daga hanya mai zuwa:
   • /hw/samples/ /build_synth/build
3. Danna Project> Ƙirƙirar EPE File don ƙirƙirar .csv file.
   • Mataki na 2 Misali
4. Bude kayan aikin Ƙimar Ƙarfin Farko(5) kuma danna Shigo da alamar CSV. Zaɓi abin da aka samar a sama.csv file.
   • Lura: Kuna iya watsi da gargaɗin yayin shigo da .csv file.
5. Ana cika sigogin shigarwa ta atomatik.

• Canja ƙimar zuwa Mai amfani ya Shigar a cikin Junction Temp. filin TJ. Kuma saita Junction Temp. TJ (°C) filin zuwa 95
• Canja filin Halayen Wuta daga Na yau da kullun zuwa Mafi Girma.
• A cikin Kayan aikin EPE, PSTATIC shine jimillar ƙarfi a cikin Watts. Kuna iya ƙididdige mafi munin yanayi a tsaye a tsaye daga shafin Rahoton

Kayan aikin EPE Sampda fitarwa

Rahoton Tab

A cikin exampIdan aka nuna a sama, jimlar FPGA core static current shine jimillar duk tsayayyen halin yanzu da jiran aiki a 0.9V (VCC, VCCP, VCCERAM). Shigar da waɗannan ƙima a jere Mataki na 3: Mafi munin ƙarfi a tsaye daga EPE na Intel FPGA PAC Power Estimator Sheet. Lura da Lissafin fitarwa don iyakar ƙarfin AFU ɗin ku.

Tarihin Bita daftarin aiki don thermal da Jagororin Wuta don Intel PAC tare da Intel Arria 10 GX FPGA

Sigar Takardu	Canje-canje
2019.08.30	Sakin farko.

Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.

Ana iya da'awar wasu sunaye da alamun a matsayin mallakin wasu.

ISO

• 9001:2015
  Rajista

ID: 683795
Siga: 2019.08.30

Takardu / Albarkatu

intel AN 872 Programmable Acceleration Card with Intel Arria 10 GX FPGA [pdf] Jagorar mai amfani An 872 Katin Haɗawa Mai Shiryewa tare da Intel Arria 10 GX FPGA, AN 872, Katin Haɗawa Mai Shirye tare da Intel Arria 10 GX FPGA

Magana

• Manual mai amfani