IP Core Manuals & User Guides

Deinterlacer IP User Guide Introduction (Sign up or sign in) The Deinterlacer IP converts interlaced video streams to progressive video format using the BOB algorithm with line interpolation. This IP is designed for real-time video processing applications where interlaced content…

FPGA-IPUG-02043-1.6 FIR Filter IP Core Product Information: Specifications: The FIR Filter IP Core is designed for use with LatticeXP2, LatticeECP3, and LatticeECP5 FPGA devices. It offers configurations for different channels and taps, along with varying multipliers based on the device…

intel AN 496 Using the Internal Oscillator IP Core Using the Internal Oscillator IP Core The supported Intel® devices offer a unique internal oscillator feature. As shown in the design examples described in this application note, internal oscillators make an…

intel ALTERA_CORDIC IP Core ALTERA_CORDIC IP Core User Guide Use the ALTERA_CORDIC IP core to implement a set of fixed-point functions with the CORDIC algorithm. ALTERA_CORDIC IP Core Features on page 3 DSP IP Core Device Family Support on page…

intel UG-01166 Altera High-speed Reed-Solomon IP Core About the High-speed Reed-Solomon IP Core The Altera High-speed Reed-Solomon IP Core uses a highly parallel architecture for large applications that require throughput of 100 Gbps and greater. The IP core is suitable…