VISHAY IRF830AS Power MOSFET
OVERVIEW
| PRODUCT SUMMARY | ||
| VDS (V) | 500 | |
| RDS(on) max. (Ù) | VGS = 10 V | 1.40 |
| Qg max. (nC) | 24 | |
| Qgs (nC) | 6.3 | |
| Qgd (nC) | 11 | |
| Configuration | Single | |
FEATURES
- Low gate charge Qg results in simple drive requirement
- Improved gate, avalanche and dynamic dV/dt ruggedness
- Fully characterized capacitance and avalanche voltage and current
- Effective Coss specified
- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
Note
* This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details
APPLICATIONS
- Switch mode power supply (SMPS)
- Uninterruptible power supply
- High speed power switching
TYPICAL SMPS TOPOLOGIES
- Two transistor forward
- Half bridge and full bridge
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ORDERING INFORMATION |
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| Package | D2PAK (TO-263) | D2PAK (TO-263) | I2PAK (TO-262) |
| Lead (Pb)-free and Halogen-free | SiHF830AS-GE3 | SiHF830ASTRL-GE3 a | SiHF830AL-GE3 a |
| Lead (Pb)-free | IRF830ASPbF | IRF830ASTRLPbF a | IRF830ALPbF |
Note
- See device orientation
| ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) | |||||
| PARAMETER | SYMBOL | LIMIT | UNIT | ||
| Drain-Source Voltage | VDS | 500 | V | ||
| Gate-Source Voltage | VGS | ± 30 | |||
| Continuous Drain Current | VGS at 10 V | TC = 25 °C | ID | 5.0 | A |
| TC = 100 °C | 3.2 | ||||
| Pulsed Drain Current a, e | IDM | 20 | |||
| Linear Derating Factor | 0.59 | W/°C | |||
| Single Pulse Avalanche Energy b, e | EAS | 230 | mJ | ||
| Avalanche Currenta | IAR | 5.0 | A | ||
| Repetiitive Avalanche Energy a | EAR | 7.4 | mJ | ||
| Maximum Power Dissipation | TA = 25 °C | PD | 3.1 | W | |
| TC = 25 °C | 74 | ||||
| Peak Diode Recovery dV/dtc, e | dV/dt | 5.3 | V/ns | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 to +150 | °C | ||
| Soldering Recommendations (Peak temperature) d | for 10 s | 300 | |||
Notes
- a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
- b. Starting TJ = 25 °C, L = 18 mH, Rg = 25 Ω, IAS = 5.0 A (see fig. 12)
- c. ISD ≤ 5.0 A, dI/dt ≤ 370 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
- d. 1.6 mm from case
- e. Uses SiHF830A data and test conditions
| THERMAL RESISTANCE RATINGS | ||||
| PARAMETER | SYMBOL | TYP. | MAX. | UNIT |
| Maximum Junction-to-Ambient (PCB mounted, steady-state) a | RthJA | – | 40 | °C/W |
| Maximum Junction-to-Case (Drain) | RthJC | – | 1.7 | |
Note
- a. When mounted on 1″ square PCB (FR-4 or G-10 material)
| SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) | |||||||
| PARAMETER | SYMBOL | TEST CONDITIONS | MIN. | TYP. | MAX. | UNIT | |
| Static | |||||||
| Drain-Source Breakdown Voltage | VDS | VGS = 0, ID = 250 μA | 500 | – | – | V | |
| VDS Temperature Coefficient | ÄVDS/TJ | Reference to 25 °C, ID = 1 mA d | – | 0.60 | – | V/°C | |
| Gate-Source Threshold Voltage | VGS(th) | VDS = VGS, ID = 250 μA | 2.0 | – | 4.5 | V | |
| Gate-Source Leakage | IGSS | VGS = ± 30 V | – | – | ± 100 | nA | |
| Zero Gate Voltage Drain Current | IDSS | VDS = 500 V, VGS = 0 V | – | – | 25 | μA | |
| VDS = 400 V, VGS = 0 V, TJ = 125 °C | – | – | 250 | ||||
| Drain-Source On-State Resistance | RDS(on) | VGS = 10 V | ID = 3.0 A b | – | – | 1.4 | Ù |
| Forward Transconductance | gfs | VDS = 50 V, ID = 3.0 A d | 2.8 | – | – | S | |
| Dynamic | |||||||
| Input Capacitance | Ciss | VGS = 0 V, VDS = 25 V,
f = 1.0 MHz, see fig. 5 d |
– | 620 | – | pF | |
| Output Capacitance | Coss | – | 93 | – | |||
| Reverse Transfer Capacitance | Crss | – | 4.3 | – | |||
| Output Capacitance | Coss | VGS = 0 V | VDS = 1.0 V, f = 1.0 MHz | – | 886 | – | |
| VDS = 400 V, f = 1.0 MHz | – | 27 | – | ||||
| Effective Output Capacitance | Coss eff. | VDS = 0 V to 400 V c, d | – | 39 | – | ||
| Total Gate Charge | Qg | VGS = 10 V | ID = 5.0 A, VDS = 400 V, see fig. 6 and 13 b, d | – | – | 24 | nC |
| Gate-Source Charge | Qgs | – | – | 6.3 | |||
| Gate-Drain Charge | Qgd | – | – | 11 | |||
| Turn-On Delay Time | td(on) | VDD = 250 V, ID = 5.0 A, Rg = 14 Ù, RD = 49 Ù, see fig. 10 b, d |
– | 10 | – | ns | |
| Rise Time | tr | – | 21 | – | |||
| Turn-Off Delay Time | td(off) | – | 21 | – | |||
| Fall Time | tf | – | 15 | – | |||
| Gate Input Resistance | Rg | f = 1 MHz, open drain | 1.7 | – | 10.7 | Ù | |
| Drain-Source Body Diode Characteristics | |||||||
| Continuous Source-Drain Diode Current | IS | MOSFET symbol showing the integral reverse p – n junction diode |
– | – | 5.0 | A | |
| Pulsed Diode Forward Current a | ISM | – | – | 20 | |||
| Body Diode Voltage | VSD | TJ = 25 °C, IS = 5.0 A, VGS = 0 V b | – | – | 1.5 | V | |
| Body Diode Reverse Recovery Time | trr | TJ = 25 °C, IF = 5.0 A, dI/dt = 100 A/μs b, d | – | 430 | 650 | ns | |
| Body Diode Reverse Recovery Charge | Qrr | – | 2.0 | 3.0 | μC | ||
| Forward Turn-On Time | ton | Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) | |||||
Notes
- a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
- b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
- c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS
- d. Uses SiHF830A data and test conditions
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Peak Diode Recovery dV/dt Test Circuit
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91062.
TO-263AB (HIGH VOLTAGE)
| MILLIMETERS | INCHES | MILLIMETERS | INCHES | |||||||
| DIM. | MIN. | MAX. | MIN. | MAX. | DIM. | MIN. | MAX. | MIN. | MAX. | |
| A | 4.06 | 4.83 | 0.160 | 0.190 | D1 | 6.86 | – | 0.270 | – | |
| A1 | 0.00 | 0.25 | 0.000 | 0.010 | E | 9.65 | 10.67 | 0.380 | 0.420 | |
| b | 0.51 | 0.99 | 0.020 | 0.039 | E1 | 6.22 | – | 0.245 | – | |
| b1 | 0.51 | 0.89 | 0.020 | 0.035 | e | 2.54 BSC | 0.100 BSC | |||
| b2 | 1.14 | 1.78 | 0.045 | 0.070 | H | 14.61 | 15.88 | 0.575 | 0.625 | |
| b3 | 1.14 | 1.73 | 0.045 | 0.068 | L | 1.78 | 2.79 | 0.070 | 0.110 | |
| c | 0.38 | 0.74 | 0.015 | 0.029 | L1 | – | 1.65 | – | 0.066 | |
| c1 | 0.38 | 0.58 | 0.015 | 0.023 | L2 | – | 1.78 | – | 0.070 | |
| c2 | 1.14 | 1.65 | 0.045 | 0.065 | L3 | 0.25 BSC | 0.010 BSC | |||
| D | 8.38 | 9.65 | 0.330 | 0.380 | L4 | 4.78 | 5.28 | 0.188 | 0.208 | |
| ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 | ||||||||||
Notes
- Dimensioning and tolerancing per ASME Y14.5M-1994.
- Dimensions are shown in millimeters (inches).
- Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outmost extremes of the plastic body at datum A.
- Thermal PAD contour optional within dimension E, L1, D1 and E1.
- Dimension b1 and c1 apply to base metal only.
- Datum A and B to be determined at datum plane H.
- Outline conforms to JEDEC outline to TO-263AB.
I2PAK (TO-262) (HIGH VOLTAGE)
| MILLIMETERS | INCHES | MILLIMETERS | INCHES | |||||||
| DIM. | MIN. | MAX. | MIN. | MAX. | DIM. | MIN. | MAX. | MIN. | MAX. | |
| A | 4.06 | 4.83 | 0.160 | 0.190 | D | 8.38 | 9.65 | 0.330 | 0.380 | |
| A1 | 2.03 | 3.02 | 0.080 | 0.119 | D1 | 6.86 | – | 0.270 | – | |
| b | 0.51 | 0.99 | 0.020 | 0.039 | E | 9.65 | 10.67 | 0.380 | 0.420 | |
| b1 | 0.51 | 0.89 | 0.020 | 0.035 | E1 | 6.22 | – | 0.245 | – | |
| b2 | 1.14 | 1.78 | 0.045 | 0.070 | e | 2.54 BSC | 0.100 BSC | |||
| b3 | 1.14 | 1.73 | 0.045 | 0.068 | L | 13.46 | 14.10 | 0.530 | 0.555 | |
| c | 0.38 | 0.74 | 0.015 | 0.029 | L1 | – | 1.65 | – | 0.065 | |
| c1 | 0.38 | 0.58 | 0.015 | 0.023 | L2 | 3.56 | 3.71 | 0.140 | 0.146 | |
| c2 | 1.14 | 1.65 | 0.045 | 0.065 | ||||||
| ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977 | ||||||||||
Notes
- Dimensioning and tolerancing per ASME Y14.5M-1994.
- Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body.
- Thermal pad contour optional within dimension E, L1, D1, and E1.
- Dimension b1 and c1 apply to base metal only.
RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.635 (16.129)
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Documents / Resources
 |
VISHAY IRF830AS Power MOSFET [pdf] Owner's Manual IRF830AS Power MOSFET, IRF830AS, Power MOSFET, MOSFET |
 |
VISHAY IRF830AS Power MOSFET [pdf] Owner's Manual IRF830AS Power MOSFET, IRF830AS, Power MOSFET, MOSFET |
