MICROCHIP H.264 4K I-Frame Encoder IP Cores
Folasaga
O le H.264 o se tulaga fa'apipi'i vitiō lauiloa e fa'apipi'i ai se vitio fa'afuainumera. E lauiloa foi o le MPEG-4 Part10 poʻo le Advanced Video Coding (MPEG-4 AVC). O le H.264 e faʻaogaina le poloka-poto auala mo le faʻapipiʻiina o se vitio lea o loʻo faʻamatalaina ai le tele o poloka o le 16 x 16 ma o ia poloka e taʻua o le poloka macro. E lagolagoina e le tulaga fa'apipi'i le tele o profiles e faʻamatalaina le fua faʻapipiʻi ma le lavelave o le faʻatinoga. O fa'avaa vitiō e fa'apipi'i e fa'atatau i le I-Frame, P-Frame, ma le B-Frame. O le I-Frame ose fa'avaa i totonu ole fa'avaa lea e fa'apipi'iina ai le fa'aogaina o fa'amatalaga o lo'o i totonu ole fa'avaa. E leai se isi fa'avaa e mana'omia e fa'aliliu ai le I-Frame. O le P-Frame e fa'apipi'iina e ala i le fa'aogaina o suiga e fa'atatau i se fa'avaa muamua e mafai ona avea ma I-Frame po'o se P-Frame. O le fa'amalosi o le B-Frame e faia i le fa'aogaina o suiga o le lafo e fa'atatau i le fa'avaa muamua ma le fa'avaa o lo'o lumana'i. O le I-Frame compression process e fa stages— Va'aiga Intra, Suiga Integer, Quantization, ma Entropy encoding. E lagolagoina e le H.264 ituaiga e lua o coding—Context Adaptive Variable Length Coding (CAVLC) ma Context Adaptive Binary Arithmetic Coding (CABAC). O le fa'asologa o lo'o iai nei o le IP o lo'o fa'atinoina le Baseline profile ma fa'aoga le CAVLC mo le entropy encoding. E le gata i lea, e lagolagoina e le IP le faʻaogaina o naʻo I-Frames e oʻo atu i le 4K iugafono.
Vaega
H.264 I-Frame Encoder e lagolagoina le vaega autu nei:
- Fa'atino Compression i le YCbCr 420 Vitio Fua
- O lo'o fa'amoemoeina le fa'aofiina i le YCbCr 422 Vitio Fua
- Lagolago 8 bits mo Vaega Taʻitasi (Y, Cb, ma Cr)
- Lagolago le ITU-T H.264 Fa'aopoopo B Fa'amalieina NAL byte Stream Output
- Fa'atonuga Tuto'atasi, PPU, po'o le Fesoasoani Fa'agaioiga E le Manaomia
- Tagata Fa'aoga Fa'atonu Tulaga Lelei QP I le Taimi Ta'avale
- Fa'atatau ile fua ole 1 pika ile Uati
- Lagolagoina le Compression e o'o i le iuga o le 4K (3840 × 2160) 60 fps
- Laiti Latency (252 μs mo HD atoa pe 17 laina faalava)
- Lagolago 2 ma 4 fasi
Aiga Lagolago
O le H.264 4K I-Frame Encoder e lagolagoina aiga nei:
- PolarFire® SoC FPGA
- PolarFire FPGA
Fa'atinoga o Meafaigaluega
O le ata o loʻo i lalo o loʻo faʻaalia ai le H.264 4K I-Frame Encoder IP poloka ata.
Ata 1-1. H.264 4K I-Frame Encoder IP Block Ata
Ulufale ma Galuega Fa'atino
O le laulau o lo'o i lalo o lo'o lisiina ai ports o lo'o tu'uina atu ma fa'aulufale o le H.264 4K I-Frame Encoder IP.
Laulau 1-1. Ulufale ma Taulaga Fa'aulu o H.264 4K I-Frame Encoder IP
| Igoa Faailoga | Fa'atonuga | Lautele | Fa'amatalaga |
| TOESET_N | Ulufale | 1 | Active-low Asynchronous toe setiina faailoilo i le mamanu. |
| PIX_CLK_I | Ulufale | 1 | Uati fa'aofi fa'atasi ai ma pika o lo'o sau o samptaitaiina |
| DDR_CLK_I | Ulufale | 1 | Uati mai le DDR memory controller. |
| HRES_I | Ulufale | 16 | Fuafuaga faalava o le ata o loo i totonu. E tatau ona faatele i le 16. |
| VRES_I | Ulufale | 16 | Fa'ai'uga tu'usa'o ole ata fa'aofi. E tatau ona faatele i le 16. |
| QP_I | Ulufale | 6 | Tulaga lelei mo H.264 quantization. O le tau e amata mai le 0 i le 51 lea o le 0 o loʻo faʻatusalia ai le maualuga maualuga ma le pito sili ona maualalo ma le 51 o loʻo faʻatusalia ai le maualuga o le faʻamalosi. |
| FA'AMATALAGA0_O | Tuuina atu | 16 | H.264 Slice0 fa'ailoga fa'amaumauga o lo'o iai le iunite NAL, Slice header, SPS, PPS, ma fa'amaumauga fa'ailoga o poloka macro. |
| DATA_VALID0_O | Tuuina atu | 1 | Fa'ailoga fa'ailoga Slice0 fa'ailoga fa'amaumauga e aoga. |
| FA'AMATALAGA1_O | Tuuina atu | 16 | H.264 Slice1 fa'asologa o fa'amaumauga o lo'o i ai le ulutala Slice, ma fa'amaumauga fa'ailoga o poloka macro. |
| DATA_VALID1_O | Tuuina atu | 1 | Fa'ailoga fa'ailoga Slice1 fa'ailoga fa'amaumauga e aoga. |
| FA'AMATALAGA2_O | Tuuina atu | 16 | H.264 Slice2 fa'asologa o fa'amaumauga o lo'o i ai le ulutala Slice, ma fa'amaumauga fa'ailoga o poloka macro. |
| DATA_VALID2_O | Tuuina atu | 1 | Fa'ailoga fa'ailoga Slice2 fa'ailoga fa'amaumauga e aoga. |
| ………..faaauau | |||
| Igoa Faailoga | Fa'atonuga | Lautele | Fa'amatalaga |
| FA'AMATALAGA3_O | Tuuina atu | 16 | H.264 Slice3 fa'asologa o fa'amaumauga o lo'o i ai le ulutala Slice, ma fa'amaumauga fa'ailoga o poloka macro. |
| DATA_VALID3_O | Tuuina atu | 1 | Fa'ailoga fa'ailoga Slice3 fa'ailoga fa'amaumauga e aoga. |
| DDR_LINE_GAP_I | Ulufale | 16 | Laina va i le va o le fa'aogaina o ata fa'alava laina i le DDR memory. |
| FRAME_START_ADDR_I | Ulufale | 7/8 | DDR fa'avaa tuatusi fa'apolopolo. 7 bits pe a faʻatulagaina le va o le faʻavaa mo le 32 MB. 8 bits pe a faʻatulagaina le va o le faʻavaa mo le 16 MB. |
| FRAME_END_O | Tuuina atu | 1 | Fa'ai'uga o le H.264 bit stream mo se fa'avaa. |
| Faitau Auala 0 Arbiter Interface Ports | |||
| RDATA0_I | Ulufale | Fa'aaofia fa'amatalaga lautele | Faitau faʻamatalaga mai le arbiter |
| RVALID0_I | Ulufale | 1 | Faitau fa'amatalaga fa'amaonia mai le arbiter |
| UA FAIA0_I | Ulufale | 1 | Fa'ailoa a le au fa'amasinoga |
| BUSER0_I | Ulufale | 1 | Faitau mae'a |
| ARADDR0_O | Tuuina atu | 32 | tuatusi DDR mai le mea e tatau ona amata ai le faitau |
| ARVALID0_O | Tuuina atu | 1 | Faitau le talosaga i le faamasino |
| ARSIZE0_O | Tuuina atu | 8 | Faitau le tele o le pa |
| Faitau Auala 1 Arbiter Interface Ports | |||
| RDATA1_I | Ulufale | Fa'aaofia fa'amatalaga lautele | Faitau faʻamatalaga mai le arbiter |
| RVALID1_I | Ulufale | 1 | Faitau fa'amatalaga fa'amaonia mai le arbiter |
| UA FAIA1_I | Ulufale | 1 | Fa'ailoa a le au fa'amasinoga |
| BUSER1_I | Ulufale | 1 | Faitau mae'a |
| ARADDR1_O | Tuuina atu | 32 | tuatusi DDR mai le mea e tatau ona amata ai le faitau |
| ARVALID1_O | Tuuina atu | 1 | Faitau le talosaga i le faamasino |
| ARSIZE1_O | Tuuina atu | 8 | Faitau le tele o le pa |
| Faitau Auala 2 Arbiter Interface Ports | |||
| RDATA2_I | Ulufale | Fa'aaofia fa'amatalaga lautele | Faitau faʻamatalaga mai le arbiter |
| RVALID2_I | Ulufale | 1 | Faitau fa'amatalaga fa'amaonia mai le arbiter |
| UA FAIA2_I | Ulufale | 1 | Fa'ailoa a le au fa'amasinoga |
| BUSER2_I | Ulufale | 1 | Faitau mae'a |
| ARADDR2_O | Tuuina atu | 32 | tuatusi DDR mai le mea e tatau ona amata ai le faitau |
| ARVALID2_O | Tuuina atu | 1 | Faitau le talosaga i le faamasino |
| ARSIZE2_O | Tuuina atu | 8 | Faitau le tele o le pa |
| Faitau Auala 3 Arbiter Interface Ports | |||
| RDATA3_I | Ulufale | Fa'aaofia fa'amatalaga lautele | Faitau faʻamatalaga mai le arbiter |
| RVALID3_I | Ulufale | 1 | Faitau fa'amatalaga fa'amaonia mai le arbiter |
| ………..faaauau | |||
| Igoa Faailoga | Fa'atonuga | Lautele | Fa'amatalaga |
| UA FAIA3_I | Ulufale | 1 | Fa'ailoa a le au fa'amasinoga |
| BUSER3_I | Ulufale | 1 | Faitau mae'a |
| ARADDR3_O | Tuuina atu | 32 | tuatusi DDR mai le mea e tatau ona amata ai le faitau |
| ARVALID3_O | Tuuina atu | 1 | Faitau le talosaga i le faamasino |
| ARSIZE3_O | Tuuina atu | 8 | Faitau le tele o le pa |
Fa'atutuga Parata
O le laulau o loʻo i lalo o loʻo lisiina ai le faʻamatalaga o faʻasologa faʻasologa lautele o loʻo faʻaaogaina i le faʻaogaina o meafaigaluega a le H.264 4K I-Frame Encoder, lea e mafai ona fesuisuiaʻi e faʻatatau i manaʻoga talosaga.
Laulau 1-2. H.264 4K I-Frame Encoder Parameters Configuration
| Igoa | Fa'amatalaga |
| 16x16_DC_INTRA_PREDICTION | Filifiliga e mafai ai le 16 x 16 intra dc prediction faatasi ai ma le 4 x 4 intra dc prediction. |
| NUM_SLICES | Filifili 2 fasi pepa e lagolago ai le 4K ile 30 fps. Filifili 4 fasi pepa e lagolago ai le 4K ile 60 fps. |
| DDR_AXI_DATA_WIDTH | Filifili le lautele o DATA o le ala faitau, lea e tatau ona fesoʻotaʻi i le IP arbiter video. |
| FRAME_GAP | Filifili le tele o le fa'avaa fa'avaa. Mo le 4K filifili le 32 MB. |
IP Configurator
O le ata o loʻo i lalo o loʻo faʻaalia ai le H.264 4K I-Frame Encoder IP configurator.
Ata 1-2. Fa'atonuga IP
Meafaigaluega Fa'atinoga o le H.264 4K I-Frame Encoder IP
O le H.264 4K I-Frame Encoder IP e vaevaeina fa'avaa ta'itasi i fasipepa 2/4 ma fa'ailoga e fa'aaoga ai le fasi encoder. O le DDR faitau faʻatatau e faʻamoemoeina le faʻamatalaga faʻavaa i le DDR memory e pei o le YCbCr 422 format. Ole va ole laina ole va o laina faalava uma ole faavaa ile DDR memory e tatau ona fa'amaoti ile DDR_LINE_GAP_I fa'aoga. O le IP e faʻaogaina 422 faʻasologa e fai ma faʻaoga ma faʻaogaina le faʻamalosi i 420 faʻasologa. O lo'o iai fo'i i le Slice0 le ulutala SPS ma le PPS. E tu'u ese'ese uma fasi pa'u fasi vaitafe. O fasi vaitafe uma e tu'u fa'atasi e avea ma vaitafe mulimuli H.264 bit. O le ata o loʻo i lalo o loʻo faʻaalia ai le H.264 4K I-Frame encoder IP poloka ata.
Ata 1-3. H.264 4K I-Frame Encoder IP Block Ata
O le ata o lo'o i lalo o lo'o fa'aalia ai le ata poloka poloka encoder.
Ata 1-4. Slice Encoder Block Diagram
Design Description Slice Encoder
O lenei vaega o lo'o fa'amatalaina ai vaega eseese i totonu o le fasi encoder.
16 x 16 Matrix Framer
O lenei module ua fa'ava'a ai le 16 x 16 macro poloka mo le vaega Y e tusa ai ma fa'amatalaga H.264. E fa'aoga pa puipui laina e teu ai laina fa'ata'atia e 16 o ata fa'aoga, ma o le 16 x 16 matrix o lo'o fa'apipi'iina e fa'aoga ai sifi sifi.
8 x 8 Matrix Framer
O lenei module e fa'apipi'i ai le 8 x 8 macro poloka mo le vaega C e pei o le H.264 fa'amatalaga mo 420 formats. E fa'aogaina laina fa'apolopolo e teu ai laina fa'ata'atia e 8 o ata fa'aoga, ma o le 8 x 16 matrix o lo'o fa'apipi'iina e fa'aoga ai sifi sifi. Mai le 8 x 16 matrix, o le Cb ma le Cr vaega o lo'o tu'u'ese'ese e fa'avaa ta'itasi 8 x 8 matrix.
4 x 4 Matrix Framer
Ole suiga ole numera, fa'avasegaina, ma le fa'asologa o le CAVLC e fa'agaoioia ile 4 x 4 sub-poka i totonu ole macroblock. O le 4 x 4 matrix framer e fa'atupuina le 4 x 4 sub-block mai le 16 x 16 po'o le 8 x 8 macroblock. O lenei matrix generator e fa'asolo atu i vaega laiti uma o le macroblock a'o le'i alu i le isi macroblock.
Va'aiga Intra
O le H.264 e fa'aogaina auala eseese i totonu o valo'aga e fa'aitiitia ai fa'amatalaga ile poloka 4 x 4. Ole poloka vavalo i totonu ole IP e fa'aaogaina na'o le 4 x 4 po'o le 16 x 16 DC valo'aga. 16 x 16 fa'aoga mo tau QP e sili atu nai lo le 35 pe afai e mafai ona maua le 16 x 16 va'aiga i totonu o le IP configurator. O le vaega DC e fa'atatau mai le pito pito i luga ma tu'u 4 x 4 po'o le 16 x 16 poloka.
Suiga Integer
O le H.264 e fa'aoga ai le su'iga o le cosine discrete integer lea e fa'asoasoaina ai coefficients i le fa'aliliuga numera numera ma le matrix quantization ina ia leai se fa'atelega po'o se vaevaega i le su'ega numera. O le su'iga numera stage fa'atino le suiga e fa'aaoga ai le sifi ma fa'aopoopo galuega.
Quantization
O le quantization e fa'ateleina mea ta'itasi o le su'iga integer ma se tau fa'avasegaina fa'avasegaina e le QP fa'aoga fa'aoga tau. Ole tele ole tau ole QP e mai le 0 ile 51. So'o se tau e sili atu ile 51 ole clamped i le 51. O le tau maualalo o le QP o loʻo faʻaalia ai le faʻapipiʻi maualalo ma le maualuga maualuga ma le isi itu.
CAVLC
O le H.264 e fa'aaogaina ituaiga e lua o le entropy encoding—Context Adaptive Variable Length Coding (CAVLC) ma Context Adaptive Binary Arithmetic Coding (CABAC). O lo'o fa'aogaina e le IP le CAVLC mo le fa'avasegaina o le fa'asologa o galuega.
Fa'aulu ulu
O le fa'aulu fa'apolokalame fa'atupu fa'atupu fa'aulu fa'aulu, fasi ulutala, Fa'asologa o Parameter Set (SPS), Seti Parameter Ata (PPS), ma le Network Abstraction Layer (NAL) iunite e fa'atatau i le tulaga o le ata vitio.
H.264 Vaitafe Generator
O le H.264 stream generator poloka tuufaatasia le galuega faatino CAVLC faatasi ai ma ulutala e fatu ai le galuega faatino encoded e tusa ai ma le faatulagaga masani H.264.
Su'ega Su'ega
Ua saunia le Testbench e siaki ai galuega a le H.264 4K I-Frame Encoder IP.
Fa'ata'oto
O le faʻataʻitaʻiga e faʻaaogaina se ata 432 x 240 ile YCbCr422 faʻatusa o loʻo faʻatusalia e lua files, ta'itasi mo le Y ma le C e fai ma fa'aoga ma fa'atupuina se H.264 ma fasi pepa e 4 file fa'atulagaga e lua fa'avaa.
O laasaga nei o loʻo faʻamatalaina pe faʻafefea ona faʻataʻitaʻiina le autu e faʻaaoga ai le testbench:
- Alu ile Libero® SoC Catalog > View > Windows > Catalog, ona fa'alautele lea o Fofo-Vitio. Kiliki faalua H264_4K_Iframe_Encoder, ona kiliki lea o le OK. H264_4K_Iframe-Encoder IP fa'aalia ile tapoleni SmartDesign.
Ata 2-1. H.264 4K I-Frame Encoder IP Core i Libero® SoC Catalog
- Alu i le Files tab ma filifili faʻataʻitaʻiga> Faʻaulufale mai Files.
Ata 2-2. Fa'aulufale mai Files
- Auina mai le H264_sim_data_in_y.txt, H264_sim_data_in_c.txt, ma le H264_refOut.txt files mai le ala lea: ..\ \component\Microsemi\SolutionCore\ H264_4K_Iframe_Encoder\ \ Fa'aoso.
- E faaulufale mai se ese file, su'esu'e le fa'ailoga o lo'o iai mea mana'omia file, ma kiliki Tatala. Le faaulufale mai file o loʻo lisiina i lalo o faʻataʻitaʻiga, vaʻai i le ata o loʻo i lalo.
Ata 2-3. Fa'aulufale mai Files
- Alu i le Design Hierarchy tab ma kiliki taumatau ile H264_4K_Iframe_Enc_C0 ma filifili Set As Root. Ata 2-4. Seti E pei o Root
- Alu i le Stimulus Hierarchy tab ma filifili H264_4K_Iframe_Encoder_tb (H264_4K_Iframe_Encoder_tb. v) > Simulate Pre-Synth Design > Open Interactively. O le IP e fa'atusa mo fa'avaa se lua. Ata 2-5. Fa'ata'ita'i Fuafuaga Fa'amua'i Fa'asologa
- ModelSim tatala i le suʻega suʻega file e pei ona faaalia i le ata lea.
Ata 2-6. ModelSim Faʻamalama Faʻamalama
Taua: Afai e faʻalavelaveina le faʻataʻitaʻiga ona o le taimi faʻatapulaʻa o loʻo faʻamaonia i le .do file, faʻaaoga le taʻavale -all command e faʻamaeʻa ai le faʻataʻitaʻiga.
Laisene
- H.264 4K I-Frame Encoder IP e na'o le fa'ailoga fa'ailoga i lalo ole laisene.
- O le fa'ailoga fa'ailoga RTL ua loka laisene, e tatau ona fa'atau eseese. E mafai ona e faia faʻataʻitaʻiga, faʻasologa, faʻatulagaina, ma polokalame le Field Programmable Gate Array (FPGA) silicon e faʻaaoga ai le Libero design suite.
- E maua fua le laisene iloiloga e siaki ai foliga o le H.264 Encoder. Ole laisene su'esu'e e muta pe a uma le fa'aoga ile itula ile masini.
Fa'atonuga fa'apipi'i
- E tatau ona faʻapipiʻi le autu ile Libero SoC software. E faia otometi e ala i le galuega fa'afouina Catalog in
- Libero SoC software, poʻo le CPZ file e mafai ona fa'aopoopo ma le lima ile fa'aogaina ole Add Core catalog feature. A oʻo mai le CPZ file o loʻo faʻapipiʻiina i Libero, o le autu e mafai ona faʻapipiʻiina, faʻatupuina, ma faʻapipiʻiina i totonu o SmartDesign mo le faʻaofiina i totonu o le poloketi Libero.
- Mo nisi fa'atonuga ile fa'apipi'i autu, laisene, ma le fa'aoga lautele, va'ai Libero SoC Online Fesoasoani.
Ole siata o lo'o i lalo o lo'o lisiina ai le fa'aogaina o puna'oa o le asample H.264 4K I-Frame Encoder IP design na faia mo PolarFire FPGA (MPF300TS-1FCG1152I package) ma fa'atupuina fa'amaumauga fa'apipi'i e ala i le fa'aogaina o le 4:2:2 samplingo o fa'amaumauga tu'ufa'atasi.
Laulau 5-1. Fa'aaogāina Punaoa ole H.264 4K I-Frame Encoder IP
| Elemene | 4 fasi | 2 fasi |
| 4LUTs | 73588 | 37017 |
| DFFs | 67543 | 33839 |
| LSRAM | 592 | 296 |
| µSRAM | 84 | 42 |
| Math Blocks | 89 | 45 |
| Fa'afeso'ota'i 4-ulufale LUTs | 25524 | 12780 |
| Fa'aoga DFFs | 25524 | 12780 |
Toe Iloilo Tala'aga
O lo'o fa'amatala e le laulau o tala fa'asolopito suiga na fa'atinoina i totonu o le pepa. O suiga o lo'o lisiina e ala i toe iloiloga, amata i le lomiga aupito lata mai.
Laulau 6-1. Toe Iloilo Tala'aga
| Toe Iloiloga | Aso | Fa'amatalaga |
| A | 01/2023 | Uluai Fa'asalalauga. |
Microchip FPGA Lagolago
Microchip FPGA products group backs its products with various support services, including Customer Service, Customer Technical Support Center, a webnofoaga, ma ofisa faatau i le lalolagi atoa. E fautuaina tagata fa'atau e asiasi i Microchip i luga ole laiga a'o le'i fa'afeso'ota'i le lagolago ona e foliga mai ua uma ona tali a latou fesili. Fa'afeso'ota'i le Technical Support Center e ala ile webnofoaga i www.microchip.com/support. Ta'u le numera o le Vaega o Meafaitino FPGA, filifili le vaega o mataupu talafeagai, ma lafo i luga le mamanu files a'o faia se mataupu lagolago fa'apitoa. Fa'afeso'ota'i Auaunaga Fa'atau mo le lagolago o oloa e le fa'apitoa, e pei o le tau o oloa, fa'aleleia o oloa, fa'afouga fa'amatalaga, tulaga oka, ma le fa'atagaina.
- Mai Amerika i Matu, valaau 800.262.1060
- Mai le lalolagi atoa, valaau 650.318.4460
- Fax, mai so'o se mea i le lalolagi, 650.318.8044
Microchip Fa'amatalaga
Le Microchip Webnofoaga
Microchip e maua le lagolago i luga ole laiga e ala i la matou webnofoaga ile www.microchip.com/. Lenei web'upega tafa'ilagi e fa'aoga e fai ai files ma fa'amatalaga faigofie ona maua e tagata fa'atau. O nisi o mea e maua e aofia ai:
- Lagolago oloa - Pepa o faamatalaga ma mea sese, tusi talosaga ma samppolokalame, punaoa mamanu, ta'iala a le tagata fa'aoga ma pepa lagolago mo meafaigaluega, fa'asalalauga fou fa'akomepiuta ma polokalama fa'amaumauga
- Lagolago Fa'atekinisi Lautele - Fesili e Fai soo (FAQs), talosaga lagolago faʻapitoa, vaega faʻatalanoa i luga ole laiga, Microchip design partner programme list
- Pisinisi o Microchip – Filifilia oloa ma taʻiala faʻatonu, faʻasalalauga lata mai a le Microchip, le lisi o semina ma mea na tutupu, lisi o ofisa faʻatau Microchip, tufatufa, ma sui fale gaosi oloa
Au'aunaga Fa'asilasilaga Suiga o Mea
O le auaunaga fa'asilasilaga suiga o oloa a Microchip e fesoasoani e fa'amautu ai tagata fa'atau i oloa Microchip. O le a maua e le au fai saofaga le faʻamatalaga imeli i soʻo se taimi e iai suiga, faʻafouga, toe teuteuga, poʻo mea sese e fesoʻotaʻi ma se aiga o oloa faʻapitoa poʻo meafaigaluega faʻaleleia o tului.
Ina ia lesitala, alu i www.microchip.com/pcn. ma mulimuli i faatonuga o le resitalaina.
Lagolago Tagata Fa'atau
O tagata fa'aoga o oloa Microchip e mafai ona maua fesoasoani e ala i le tele o auala:
- Fa'asoa po'o le Sui
- Ofisa Fa'atauga Fa'alotoifale
- Embedded Solutions Engineer (ESE)
- Lagolago Fa'atekinisi
E tatau i tagata fa'atau ona fa'afeso'ota'i le latou tufatufaina, sui po'o le ESE mo le lagolago. O loʻo avanoa foʻi ofisa faʻatau i le lotoifale e fesoasoani i tagata faʻatau. O lo'o iai se lisi o ofisa fa'atau ma nofoaga i totonu o lenei pepa.
E maua le lagolago fa'apitoa e ala ile webnofoaga i: www.microchip.com/support.
Fa'ailoga Puipuiga o Fa'ailoga Fa'atonu a Microchip
Manatua faʻamatalaga o loʻo i lalo o le faʻaogaina o le puipuiga o tulafono i luga o oloa Microchip:
- O oloa Microchip e fetaui ma faʻamatalaga o loʻo i totonu o la latou Pepa Faʻamatalaga Microchip.
- E talitonu Microchip o lona aiga o oloa e saogalemu pe a faʻaaogaina i le auala faʻamoemoeina, i totonu o faʻamatalaga faʻaogaina, ma i lalo o tulaga masani.
- Microchip fa'atauaina ma puipuia fa'amalosi ana aia tatau tau meatotino. O taumafaiga e soli le tulafono o le puipuiga o le oloa Microchip e matua fa'asaina ma e ono solia ai le Digital Millennium Copyright Act.
- E le mafai e le Microchip poʻo se isi mea gaosi semiconductor ona faʻamaonia le saogalemu o lana tulafono. O le puipuiga o tulafono laiti e le o lona uiga o loʻo matou faʻamaonia le oloa e "le mafai ona motusia".
- O le puipuiga o tulafono laiti o lo'o fa'asolosolo pea. Microchip ua tuuto atu i le faʻaauauina pea o le faʻaleleia atili o uiga puipuia o tulafono a tatou oloa.
Faasilasilaga Faaletulafono
O lenei lomiga ma faʻamatalaga o loʻo i totonu e mafai ona faʻaaogaina naʻo oloa Microchip, e aofia ai le mamanu, suʻega, ma tuʻufaʻatasia oloa Microchip ma lau talosaga. O le fa'aogaina o nei fa'amatalaga i so'o se isi lava faiga e solia ai nei aiaiga. O fa'amatalaga e uiga i le fa'aogaina o masini e tu'uina atu mo na'o lou fa'amalieina ma e ono suia i fa'afouga. O lau matafaioi le faʻamautinoa o lau talosaga e fetaui ma au faʻamatalaga. Fa'afeso'ota'i lou ofisa fa'atau Microchip fa'apitonu'u mo se lagolago fa'aopoopo pe, maua se lagolago fa'aopoopo ile www.microchip.com/en-us/support/design-help/client-support-services. O LENEI FAʻAMATALAGA E TUUINA E MICROCHIP "AS IS". E LEAI FAIA e le MICROCHIP ni faʻataʻitaʻiga poʻo se faʻamaoniga o soʻo se ituaiga pe faʻaalia pe faʻaalia, tusitusi pe tautala, tulāfono poʻo se isi mea, e fesoʻotaʻi ma faʻamatalaga e aofia ai ae le tapulaʻa i soʻo se faʻamaoniaga faʻamaonia, faʻamaonia, faʻamaonia, faʻamaonia. POO WARRANTY E FAI I ONA TULAGA, TULAGA, POO LE FAIGALUEGA. E LEAI SE MEA E TATAU AI MICROCHIP MO SO'O SE FA'AMATALAGA, FA'AMATALAGA, FA'ASA'OGA, FA'AMATALAGA, PO'O LE FA'A'ALI'AGA MA'U'U, FA'AFIA, TAU, PO'O LE TU'U'UINA O SO'O SE I'UGA SO'O SE FA'AIGA I LE FA'AMATALAGA POO LONA FA'A'OGA, PE'O LE MEA NA FA'AUPUNA'I, E tusa lava pe fa'aletonu. FA'AFIO PO'O LE FA'AFIA E MAFAI ILOA. I LE AGATOGA FA'AALIGA E LE TULAFONO, O LE UMA AOFA'IGA A MICROCHIP I TOTOGI UMA I SO'O SE AUALA E FA'AIGA I LE FA'AMATALAGA POO LONA FA'A'OGA E LE'A LOLOA I LE TOTOGI O TOTOGI, AFAI E IAI, NA E TOTOGI SA'O I LE MICROCHIP MO LE FA'AMATALAGA. O le fa'aogaina o masini Microchip i le tausiga o le ola ma/po'o le saogalemu o lo'o i le tulaga lamatia o le tagata fa'atau, ma e malie le tagata fa'atau e puipuia, fa'aleaga ma taofia Microchip le afaina mai so'o se mea leaga, tagi, suti, po'o tupe alu e mafua mai i lea fa'aoga. E leai ni laisene e tu'uina atu, fa'aalia po'o se isi mea, i lalo o so'o se Microchip aia tatau tau le atamai se'i vagana ua ta'ua.
Fa'ailoga Fa'ailoga
Le igoa Microchip ma le logo, le Microchip logo, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, ma XMEGA o fa'ailoga fa'amaufa'ailoga a Microchip Technology Incorporated i Amerika ma isi atunu'u. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, ma ZL o faʻailoga faʻamaufaʻailoga a Microchip Technology Incorporated i le USA Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching , BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit SP Programme IN-Circuit Fa'atusa Fa'atamai, IntelliMOS, Feso'ota'iga Feso'ota'i, JitterBlocker, Knob-on-Display, KoD, maxCrypto, maxView, membrane, Mindi, MiWi, MPASM, MPF, MPLAB Faʻamaonia logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX , RTG4, SAM ICE, Serial Quad I/O, faafanua faigofie, SimpliPHY, SmartBuffer, SmartHLS, SMART-IS, storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Aofa'i Tumau, Taimi Fa'alagolago, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, ma ZENA o fa'ailoga fa'ailoga a Microchip Technology Incorporated i Amerika ma isi atunu'u. O le SQTP o se faailoga tautua a Microchip Technology Incorporated i Amerika O le logo Adaptec, Frequency on Demand, Silicon Storage Technology, ma Symmcom o faʻailoga faʻamaufaʻailoga a Microchip Technology Inc. i isi atunuu. GestIC ose fa'ailoga fa'amaufa'ailoga a Microchip Technology Germany II GmbH & Co. KG, ose lala o Microchip Technology Inc., i isi atunu'u. O isi fa'ailoga tau fefa'ataua'iga uma o lo'o ta'ua i inei o meatotino a latou kamupani. © 2023, Microchip Technology Incorporated ma ona lala. Ua Taofia Aia Tatau Uma. ISBN: 978-1-6683-1888-1
Faiga Fa'atonuga
Mo faʻamatalaga e uiga i Microchip's Quality Management Systems, faʻamolemole asiasi www.microchip.com/quality.
Fa'atauga ma Au'aunaga i le Lalolagi Atoa
AMERIKA
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