eCPRI Intel® FPGA IP Design
Example User Guide
Fa'afou mo Intel®
Quartus®
Prime Design Suite: 23.1
IP Version: 2.0.3
Taiala vave amata
Ole fa'aleleia ole Common Public Radio Interface (eCPRI) Intel® FPGA IP core o lo'o fa'atinoina le eCPRI fa'amatalaga 2.0. O le eCPRI Intel FPGA IP o loʻo tuʻuina atu se suʻega faʻataʻitaʻiga ma se faʻataʻitaʻiga meafaigaluegaampe lagolagoina le tu'ufa'atasiga ma su'ega meafaigaluega. A e gaosia le mamanu example, e otometi lava ona fatuina e le faatonu parameter le files mana'omia e fa'atusa, tu'ufa'atasi, ma fa'ata'ita'i le mamanu fa'aample i meafaigaluega.
Le fa'atulagaina o meafaigaluega fa'apitoa eampe tamoe i luga:
- Intel Agilex™ 7 I-Series FPGA Development Kit
- Intel Agilex 7 I-Series Transceiver-SoC Development Kit
- Intel Agilex 7 F-Series Transceiver-SoC Development Kit
- Intel Stratix® 10 GX Transceiver Signal Integrity Development Kit mo le H-tile design examples
- Intel Stratix 10 TX Transceiver Signal Integrity Development Kit mo le E-tile design examples
- Intel Arria® 10 GX Transceiver Signal Integrity Development Kit
Ua saunia e Intel se tu'ufa'atasi-na'o example poloketi e mafai ona e faʻaogaina e faʻatatau vave ai le vaega autu o le IP ma le taimi.
Le su'ega ma le mamanu example lagolagoina 25G ma 10G fua faatatau o faamatalaga mo Intel Stratix 10 H-tile po o le E-tile ma le Intel Agilex 7 E-tile po o F-tile masini fesuiaiga o le eCPRI IP.
Fa'aaliga: Le eCPRI IP mamanu example fa'atasi ai ma galuega fa'afeso'ota'i (IWF) e na'o avanoa mo le 9.8 Gbps CPRI laina fua fa'atatau i le fa'asalalauga o lo'o iai nei.
Fa'aaliga: Le eCPRI IP mamanu exampe le lagolagoina le toe fetuutuunai malosi mo le 10G faʻamaumauga i le Intel Arria 10 mamanu.
Le eCPRI Intel FPGA IP mamanu autu example lagolagoina vaega nei:
- TX i totonu i le RX faasologa loopback mode
- Ta'avale afi ma siaki
- Gafatia masani siaki siaki
- Malosiaga e fa'aoga ai le System Console e fa'atino ai le mamanu ma toe fa'atulaga le mamanu mo le toe su'ega
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel, ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie i ai i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel ina ia maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua. *O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
ISO 9001:2015 Resitala
Ata 1. Laasaga Atina'e mo le Design Example
Fa'amatalaga Fa'atatau
- eCPRI Intel FPGA IP Taiala Fa'aaogāina
- eCPRI Intel FPGA IP Fa'amatalaga Fa'amatalaga
1.1. Meafaigaluega ma Polokalama Manaoga
Ina ia tofotofoina le example mamanu, faʻaaoga meafaigaluega ma polokalama nei:
- Intel Quartus® Prime Pro Edition polokalame polokalame 23.1
- System Console
- Simulators Lagolago:
— Siemens* EDA QuestaSim*
— Synopsys* VCS*
— Synopsys VCS MX
— Aldec* Riviera-PRO*
— Cadence* Xcelium* - Pusa Atina'e:
— Intel Agilex 7 I-Series FPGA Development Kit
— Intel Agilex 7 I-Series Transceiver-SoC Development Kit
— Intel Agilex 7 F-Series Transceiver-SoC Development Kit
— Intel Stratix 10 GX Transceiver Signal Integrity Development Kit mo le H-tile device designation design example
- Intel Stratix 10 TX Transceiver Signal Integrity Atinae mo le E-tile masini fesuiaiga mamanu example
— Intel Arria 10 GX Transceiver Signal Integrity Development Kit
Fa'amatalaga Fa'atatau
- Intel Agilex 7 I-Series FPGA Development Kit Guide Guide
- Intel Agilex 7 I-Series Transceiver-SoC Development Kit Taiala mo Tagata
- Intel Agilex 7 F-Series Transceiver-SoC Development Kit Guide Guide
- Intel Stratix 10 GX Transceiver Signal Integrity Development Kit Guide Guide
- Intel Stratix 10 TX Transceiver Signal Integrity Development Kit Guide Guide
- Intel Arria 10 GX Transceiver Signal Integrity Development Kit Guide Guide
1.2. Fausiaina o le Fuafuaga
Manaomia muamua: A e mauaina le eCPRI web-autu IP, faasaoina le web-core installer i le eria i le lotoifale. Fa'aola le fa'apipi'i ile Windows/Linux. A fa'aosofia, fa'apipi'i le webautu i le nofoaga tutusa e pei o le Intel Quartus Prime folder.
Le eCPRI Intel FPGA IP ua aliali mai nei ile IP Catalog.
Afai e le'i i ai sau poloketi Intel Quartus Prime Pro Edition e tu'ufa'atasia ai lau eCPRI Intel FPGA IP core, e tatau ona e fatuina se tasi.
- I le polokalama Intel Quartus Prime Pro Edition, kiliki File ➤ New Project Wizard e fatu ai se poloketi fou Intel Quartus Prime, pe kiliki File ➤ Tatala Poloketi e tatala ai se poloketi Intel Quartus Prime. E fa'atonu oe e le wizard e fa'ailoa se masini.
- Fa'ailoa le aiga o masini ma se masini e fetaui ma tulaga mana'omia o le togi saoasaoa.
- Kiliki Fa'auma.
- I le IP Catalog, su'e ma kiliki-lua eCPRI Intel FPGA IP. O lo'o fa'aalia le fa'amalama New IP Variant.
Mulimuli i laasaga nei e gaosia ai le eCPRI IP hardware design example ma le testbench:
- I le IP Catalog, su'e ma kiliki-lua eCPRI Intel FPGA IP. O lo'o fa'aalia le fa'amalama New IP Variant.
- Kiliki OK. E aliali mai le fa'atonu fa'amaufa'ailoga.
Ata 2. Example Design Tab i le eCPRI Intel FPGA IP Parameter Editor
- Fa'ailoa se igoa pito i luga mo lau suiga masani IP. E fa'asaoina e le fa'atonu fa'amaufa'ailoga le fa'atulagaina o suiga o le IP ile a file igoa .ip.
- Kiliki OK. E aliali mai le fa'atonu fa'amaufa'ailoga.
- I luga o le General tab, faʻamaonia le faʻasologa mo lau fesuiaiga autu IP.
Fa'aaliga: • E tatau ona e kiina le parakalafa Streaming i le eCPRI IP fa'atonu fa'atonu pe a e fa'atupuina le mamanu fa'atasiample fa'atasi ai ma le Feso'ota'iga Fa'atino (IWF) Fa'asagaga lagolago ua mafai,
• E tatau ona e setiina le CPRI Line Bit Rate (Gbit/s) i Isi pe a faia le mamanu example fa'atasi ai ma Galuega Fa'afeso'ota'i (IWF) Fa'ataga lagolago ua mafai. - I le Example Design tab, filifili le filifiliga faʻataʻitaʻiga e faʻatupu ai le suʻega suʻega, filifili le filifiliga faʻapipiʻi e faʻatupuina ai meafaigaluega faʻapitoaample mamanu, ma filifili fa'asologa ma fa'ata'ita'iga filifiliga e fa'atupu uma ai le su'ega ma le meafaigaluega fa'ata'ita'igaample.
- Mo le Gagana mo fa'ata'ita'iga maualuga file, filifili Verilog po'o VHDL.
Fa'aaliga: E na'o le avanoa e maua ai le filifiliga lea pe a e filifilia le filifiliga Simulation mo lou exampmamanu. - Mo le Gagana mo le tu'ufa'atasiga maualuga file, filifili Verilog po'o VHDL.
Fa'aaliga: E na'o le avanoa e maua ai lenei filifiliga pe a e filifilia le filifiliga Synthesis mo lou exampmamanu. - Mo Numera o Auala, e mafai ona e fa'aofi le numera o alavai (1 i le 4) fa'amoemoe mo lau mamanu. O le tau masani o le 1.
- Kiliki Fausia Example Design. O le Filifilia Example fa'amalama o le Design Directory e aliali mai.
- Afai e te manaʻo e sui le mamanu example ala o le lisi poʻo le igoa mai faʻaletonu o loʻo faʻaalia (ecpri_0_testbench), suʻesuʻe i le ala fou ma lolomi le mamanu fou muamuaample igoa fa'atonu.
- Kiliki OK.
Fa'amatalaga Fa'atatau
eCPRI Intel FPGA IP Taiala Fa'aaogāina
1.3. Fa'atonuga Fa'atonu
Le eCPRI IP mamanu autu example file fa'atonuga o lo'o i ai mea nei na gaosia files mo le mamanu example.
Ata 3. Fa'atonuga Fa'atonu o le Fa'atupu Example Lisiina
Fa'aaliga:
- E na'o le Intel Arria 10 IP design example fesuiaiga .
- E na'o le Intel Stratix 10 (H-tile po'o le E-tile) IP design example fesuiaiga .
- E na'o le Intel Agilex E-tile IP design example fesuiaiga .
Laulau 1. eCPRI Intel FPGA IP Core Testbench File Fa'amatalaga
| File Igoa | Fa'amatalaga |
| Ki Testbench ma Fa'ata'ita'iga Files | |
| <design_example_dir>/simulation/testbench/ ecpri_tb.sv | Tulaga maualuga su'ega file. O le su'ega su'esu'e e vave fa'apipi'i le afifi DUT ma fa'atino galuega a le Verilog HDL e fa'atupu ma talia fa'aputu. |
| <design_example_dir>/simulation/testbench/ecpri_ed.sv | DUT afifi e vave faʻapipiʻi le DUT ma isi vaega suʻega. |
| <design_example_dir>/simulation/ed_fw/flow.c | C-code puna file. |
| Testbench Scripts | |
| <design_example_dir>/simulation/setup_scripts/mentor/run_vsim.do | Le Siemens EDA QuestaSim tusitusiga e faʻatautaia le suʻega suʻega. |
| <design_example_dir>/simulation/setup_scripts/synopsys/vcs/run_vcs.sh | Le Synopsys VCS script e faʻatautaia le suʻega suʻega. |
| <design_example_dir>/simulation/setup_scripts/synopsys/vcsmx/run_vcsmx.sh | Le Synopsys VCS MX script (tu'ufa'atasi Verilog HDL ma SystemVerilog ma VHDL) e faʻatautaia le suʻega suʻega. |
| <design_example_dir>/simulation/setup_scripts/aldec/run_rivierapro.tcl | Le Aldec * Riviera-PRO tusitusiga e faʻatautaia le suʻega suʻega. |
| <design_example_dir>/simulation/setup_scripts/xcelium/run_xcelium.sh | Le Cadence* Xcelium script e fa'atino ai le su'ega. |
Laulau 2. eCPRI Intel FPGA IP Core Hardware Design Example File Fa'amatalaga
| File Igoa | Fa'amatalaga |
| <design_example_dir>/synthesis/quartus/ecpri_ed.qpf | Poloketi Intel Quartus Prime file. |
| <design_example_dir>/synthesis/quartus/ecpri_ed.qsf | Fa'atulagaina o galuega faatino a le Intel Quartus Prime file. |
| <design_example_dir>/synthesis/quartus/ecpri_ed.sdc | Synopsys Design Constraints files. E mafai ona e kopiina ma suia nei mea filemo lau lava Intel Stratix 10 mamanu. |
| <design_example_dir>/synthesis/testbench/ecpri_ed_top.sv | Tulaga maualuga Verilog HDL mamanu example file. |
| <design_example_dir>/synthesis/testbench/ecpri_ed.sv | DUT afifi e vave faʻapipiʻi le DUT ma isi vaega suʻega. |
| <design_example_dir>/synthesis/quartus/ecpri_s10.tcl | Autu file mo le mauaina o le System Console (E maua i le Intel Stratix 10 H-tile ma le E-tile designs). |
| <design_example_dir>/synthesis/quartus/ecpri_a10.tcl | Autu file mo le mauaina o le System Console (E maua i le Intel Arria 10 mamanu). |
| <design_example_dir>/synthesis/quartus/ ecpri_agilex.tcl | Autu file mo le mauaina o le System Console (E maua i mamanu Intel Agilex 7). |
1.4. Fa'ata'ita'iina o le Fa'ata'ita'iga Example Testbench
Ata 4. Taualumaga
Mulimuli i laasaga nei e faʻataʻitaʻi ai le suʻega:
- I le faʻatonuga vave, sui i le suʻega faʻataʻitaʻiga directoryample_dir>/simulation/setup_scripts.
- Mo suiga ole masini Intel Agilex F-tile, mulimuli i laasaga nei:
a. Fa'asaga i leample_dir> / simulation / quartus directory ma faʻatautaia nei tulafono e lua i lalo: quartus_ipgenerate –run_default_mode_op ecpri_ed -c ecpri_ed quartus_tlg ecpri_ed
I le isi itu, e mafai ona e tatalaina le ecpri_ed.qpf poloketi i le Intel Quartus Prime Pro Edition ma faatino le tuufaatasiga seia oo i le Lagolago Logic Generation stage.
e. Fa'asaga i leample_dir>/simulation/setup_scripts directory.
i. Faʻatonu le poloaiga lenei: ip-setup-simulation -–quartus-project=../quartus/ecpri_ed.qpf - Fa'asolo le fa'asologa fa'ata'ita'iga mo le simulator lagolago o lau filifiliga. O le tusitusiga e tuufaatasia ma faʻatautaia le suʻega suʻega i le simulator. Va'ai i le laulau Laasaga e Fa'ata'ita'i ai le Testbench.
Fa'aaliga: Ole lagolago ole gagana VHDL mo fa'ata'ita'iga e na'o QuestaSim ma VCS MX simulators e maua. Ole Verilog gagana lagolago mo faʻataʻitaʻiga e avanoa mo simulators uma o loʻo lisiina ile Laulau: Laasaga e Faʻataʻitaʻi ai le Testbench. - Iloilo i'uga. O le suʻega suʻesuʻe manuia e lafo ma maua pepa, ma faʻaalia le "PASSED".
Laulau 3. Laasaga e Fa'ata'ita'i ai le Testbench
| Simulator | Faatonuga |
| QuestaSim | I le laina faʻatonu, faʻaoga vsim -do run_vsim.do Afai e te manaʻo e faʻataʻitaʻi e aunoa ma le aumaia o le QuestaSim GUI, faʻaoga vsim -c -do run_vsim.do |
| VCS | • I le laina fa'atonu, fa'aigoa sh run_vcs.sh • Fa'asaga i leample_dir>/simulation/setup_scripts/ synopsys/vcs ma faʻatautaia le poloaiga lenei: sh run_vcs.sh |
| VCS MX | I le laina faʻatonu, faʻaoga sh run_vcsmx.sh |
| Riviera-PRO | I le laina o le poloaiga, fa'aoga vsim -c -do run_rivierapro.tcl Fa'aaliga: Na'o le lagolagoina i le Intel Stratix 10 H-tile design variations. |
| Xcelium(1) | I le laina faʻatonu, faʻaoga sh run_xcelium.sh |
- E le lagolagoina lenei simulator mo le eCPRI Intel FPGA IP design example fa'atupuina fa'atasi ma le IWF fa'aogaina.
Sample Galuega Fa'atino: O sampo lo'o fa'aalia e le fa'atinoga o se su'ega fa'ata'ita'iga manuia o le eCPRI IP design exampe aunoa ma le IWF fa'aaliga e mafai ma Numera o Auala = 4:
# Faatalitali mo le RX alignment
# loka RX kesi
# RX laina laina loka loka
# Faatalitali mo so'oga fa'aletonu
# So'oga fa'aletonu
# MAC Source Address 0_0 Channel 0: 33445566
# MAC Source Address 0_1 Channel 0: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 0: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 0: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 0: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 0: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 0: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 0: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 0: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 0: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 0: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 0: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 0: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 0: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 0: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 0: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 0: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 0: 0000ddee
# eCPRI Auala Pule masani 0: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 0: 00000241
# eCPRI version Channel 0: 2
# MAC Source Address 0_0 Channel 1: 33445566
# MAC Source Address 0_1 Channel 1: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 1: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 1: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 1: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 1: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 1: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 1: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 1: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 1: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 1: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 1: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 1: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 1: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 1: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 1: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 1: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 1: 0000ddee
# eCPRI Auala Pule masani 1: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 1: 00000241
# eCPRI version Channel 1: 2
# MAC Source Address 0_0 Channel 2: 33445566
# MAC Source Address 0_1 Channel 2: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 2: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 2: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 2: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 2: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 2: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 2: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 2: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 2: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 2: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 2: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 2: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 2: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 2: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 2: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 2: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 2: 0000ddee
# eCPRI Auala Pule masani 2: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 2: 00000241
# eCPRI version Channel 2: 2
# MAC Source Address 0_0 Channel 3: 33445566
# MAC Source Address 0_1 Channel 3: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 3: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 3: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 3: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 3: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 3: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 3: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 3: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 3: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 3: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 3: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 3: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 3: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 3: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 3: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 3: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 3: 0000ddee
# eCPRI Auala Pule masani 3: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 3: 00000241
# eCPRI version Channel 3: 2
# ________________________________________________________
# INFO: Ua le toe setiina le tulaga
# ________________________________________________________
#
#
# Auala 0 eCPRI TX SOP numera : 0
# Auala 0 eCPRI TX EOPs faitau : 0
# Auala 0 eCPRI RX SOP numera : 0
# Auala 0 eCPRI RX EOPs faitau : 0
# Auala 0 Fa'atu fafo PTP TX SOP numera : 0
# Auala 0 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 0 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 0 I fafo MISC TX EOPs faitau : 0
# Auala 0 Fa'amatalaga RX SOP i fafo: 0
# Auala 0 Fa'a fafo RX EOP faitau : 0
# Auala 1 eCPRI TX SOP numera : 0
# Auala 1 eCPRI TX EOPs faitau : 0
# Auala 1 eCPRI RX SOP numera : 0
# Auala 1 eCPRI RX EOPs faitau : 0
# Auala 1 Fa'atu fafo PTP TX SOP numera : 0
# Auala 1 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 1 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 1 I fafo MISC TX EOPs faitau : 0
# Auala 1 Fa'amatalaga RX SOP i fafo: 0
# Auala 1 Fa'a fafo RX EOP faitau : 0
# Auala 2 eCPRI TX SOP numera : 0
# Auala 2 eCPRI TX EOPs faitau : 0
# Auala 2 eCPRI RX SOP numera : 0
# Auala 2 eCPRI RX EOPs faitau : 0
# Auala 2 Fa'atu fafo PTP TX SOP numera : 0
# Auala 2 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 2 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 2 I fafo MISC TX EOPs faitau : 0
# Auala 2 Fa'amatalaga RX SOP i fafo: 0
# Auala 2 Fa'a fafo RX EOP faitau : 0
# Auala 3 eCPRI TX SOP numera : 0
# Auala 3 eCPRI TX EOPs faitau : 0
# Auala 3 eCPRI RX SOP numera : 0
# Auala 3 eCPRI RX EOPs faitau : 0
# Auala 3 Fa'atu fafo PTP TX SOP numera : 0
# Auala 3 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 3 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 3 I fafo MISC TX EOPs faitau : 0
# Auala 3 Fa'amatalaga RX SOP i fafo: 0
# Auala 3 Fa'a fafo RX EOP faitau : 0
# ________________________________________________________
# INFO: Amata le lafoina o afifi
# ________________________________________________________
#
#
# INFO: Faatalitali mo le fesiitaiga o auala 0 eCPRI TX e maeʻa
# INFO: Auala 0 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 0 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 0 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 0 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 0 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le fesiitaiga o auala 1 eCPRI TX e maeʻa
# INFO: Auala 1 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 1 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 1 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 1 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 1 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le fesiitaiga o auala 2 eCPRI TX e maeʻa
# INFO: Auala 2 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 2 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 2 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 2 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 2 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le fesiitaiga o auala 3 eCPRI TX e maeʻa
# INFO: Auala 3 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 3 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 3 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 3 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 3 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# ________________________________________________________
# INFO: Taofi le lafoina o afifi
# ________________________________________________________
#
#
# ________________________________________________________
# INFO: Siaki fa'amaumauga o pepa
# ________________________________________________________
#
#
# Auala 0 eCPRI SOP na lafoina: 300
# Auala 0 eCPRI EOP na lafoina: 300
# Auala 0 eCPRI SOPs maua: 300
# Auala 0 eCPRI EOPs maua: 300
# Auala 0 eCPRI Sese lipotia: 0
# Auala 0 SOPs PTP i fafo na lafoina: 4
# Auala 0 PTP EOPs fafo ua lafoina: 4
# Auala 0 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 0 MISC EOPs fafo na lafoina: 128
# Auala 0 SOPs fafo na maua: 132
# Auala 0 EOP i fafo na maua: 132
# Auala 0 SOPs PTP i fafo na maua: 4
# Auala 0 PTP EOP i fafo na maua: 4
# Auala 0 Fa'amatalaga MISC i fafo na maua: 128
# Auala 0 MISC EOPs fafo na maua: 128
# Auala 0 Ua lipotia mai le Sese i fafo: 0
# Auala 0 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# Auala 1 eCPRI SOP na lafoina: 300
# Auala 1 eCPRI EOP na lafoina: 300
# Auala 1 eCPRI SOPs maua: 300
# Auala 1 eCPRI EOPs maua: 300
# Auala 1 eCPRI Sese lipotia: 0
# Auala 1 SOPs PTP i fafo na lafoina: 4
# Auala 1 PTP EOPs fafo ua lafoina: 4
# Auala 1 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 1 MISC EOPs fafo na lafoina: 128
# Auala 1 SOPs fafo na maua: 132
# Auala 1 EOP i fafo na maua: 132
# Auala 1 SOPs PTP i fafo na maua: 4
# Auala 1 PTP EOP i fafo na maua: 4
# Auala 1 Fa'amatalaga MISC i fafo na maua: 128
# Auala 1 MISC EOPs fafo na maua: 128
# Auala 1 Ua lipotia mai le Sese i fafo: 0
# Auala 1 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# Auala 2 eCPRI SOP na lafoina: 300
# Auala 2 eCPRI EOP na lafoina: 300
# Auala 2 eCPRI SOPs maua: 300
# Auala 2 eCPRI EOPs maua: 300
# Auala 2 eCPRI Sese lipotia: 0
# Auala 2 SOPs PTP i fafo na lafoina: 4
# Auala 2 PTP EOPs fafo ua lafoina: 4
# Auala 2 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 2 MISC EOPs fafo na lafoina: 128
# Auala 2 SOPs fafo na maua: 132
# Auala 2 EOP i fafo na maua: 132
# Auala 2 SOPs PTP i fafo na maua: 4
# Auala 2 PTP EOP i fafo na maua: 4
# Auala 2 Fa'amatalaga MISC i fafo na maua: 128
# Auala 2 MISC EOPs fafo na maua: 128
# Auala 2 Ua lipotia mai le Sese i fafo: 0
# Auala 2 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# Auala 3 eCPRI SOP na lafoina: 300
# Auala 3 eCPRI EOP na lafoina: 300
# Auala 3 eCPRI SOPs maua: 300
# Auala 3 eCPRI EOPs maua: 300
# Auala 3 eCPRI Sese lipotia: 0
# Auala 3 SOPs PTP i fafo na lafoina: 4
# Auala 3 PTP EOPs fafo ua lafoina: 4
# Auala 3 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 3 MISC EOPs fafo na lafoina: 128
# Auala 3 SOPs fafo na maua: 132
# Auala 3 EOP i fafo na maua: 132
# Auala 3 SOPs PTP i fafo na maua: 4
# Auala 3 PTP EOP i fafo na maua: 4
# Auala 3 Fa'amatalaga MISC i fafo na maua: 128
# Auala 3 MISC EOPs fafo na maua: 128
# Auala 3 Ua lipotia mai le Sese i fafo: 0
# Auala 3 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# ________________________________________________________
# INFO: SU'E PASI
#
# ________________________________________________________
Sample Galuega Fa'atino: O sampo lo'o fa'aalia e le fa'atinoga o se su'ega fa'ata'ita'iga manuia o le eCPRI IP design exampfa'atasi ai ma le fa'aaliga IWF ua mafai ma Numera o Auala = 4:
# Fa'agaoioi le CPRI TX
# CPRI Alaala 0 L1_CONFIG : 00000001
# CPRI Alaala 0 CPRI_CORE_CM_CONFIG : 00001ed4
# CPRI Alaala 1 L1_CONFIG : 00000001
# CPRI Alaala 1 CPRI_CORE_CM_CONFIG : 00001ed4
# CPRI Alaala 2 L1_CONFIG : 00000001
# CPRI Alaala 2 CPRI_CORE_CM_CONFIG : 00001ed4
# CPRI Alaala 3 L1_CONFIG : 00000001
# CPRI Alaala 3 CPRI_CORE_CM_CONFIG : 00001ed4
# Faatalitali mo le RX alignment
# loka RX kesi
# RX laina laina loka loka
# Faatalitali mo so'oga fa'aletonu
# So'oga fa'aletonu
# MAC Source Address 0_0 Channel 0: 33445566
# MAC Source Address 0_1 Channel 0: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 0: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 0: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 0: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 0: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 0: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 0: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 0: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 0: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 0: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 0: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 0: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 0: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 0: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 0: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 0: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 0: 0000ddee
# eCPRI Auala Pule masani 0: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 0: 00000241
# eCPRI version Channel 0: 2
# MAC Source Address 0_0 Channel 1: 33445566
# MAC Source Address 0_1 Channel 1: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 1: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 1: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 1: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 1: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 1: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 1: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 1: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 1: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 1: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 1: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 1: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 1: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 1: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 1: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 1: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 1: 0000ddee
# eCPRI Auala Pule masani 1: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 1: 00000241
# eCPRI version Channel 1: 2
# MAC Source Address 0_0 Channel 2: 33445566
# MAC Source Address 0_1 Channel 2: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 2: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 2: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 2: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 2: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 2: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 2: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 2: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 2: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 2: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 2: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 2: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 2: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 2: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 2: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 2: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 2: 0000ddee
# eCPRI Auala Pule masani 2: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 2: 00000241
# eCPRI version Channel 2: 2
# MAC Source Address 0_0 Channel 3: 33445566
# MAC Source Address 0_1 Channel 3: 00007788
# MAC Tulaga Taulaga 0_0 Alaala 3: 33445566
# MAC Tulaga Taulaga 0_1 Alaala 3: 00007788
# MAC Tulaga Taulaga 1_0 Alaala 3: 11223344
# MAC Tulaga Taulaga 1_1 Alaala 3: 00005566
# MAC Tulaga Taulaga 2_0 Alaala 3: 22334455
# MAC Tulaga Taulaga 2_1 Alaala 3: 00006677
# MAC Tulaga Taulaga 3_0 Alaala 3: 44556677
# MAC Tulaga Taulaga 3_1 Alaala 3: 00008899
# MAC Tulaga Taulaga 4_0 Alaala 3: 66778899
# MAC Tulaga Taulaga 4_1 Alaala 3: 0000aabb
# MAC Fa'asinomaga Tulaga 5_0 Alaala 3: 778899aa
# MAC Tulaga Taulaga 5_1 Alaala 3: 0000bbcc
# MAC Tulaga Taulaga 6_0 Alaala 3: 8899aabb
# MAC Tulaga Taulaga 6_1 Alaala 3: 0000ccdd
# MAC Fa'asinomaga Tulaga 7_0 Auala 3: 99aabbcc
# MAC Tulaga Taulaga 7_1 Alaala 3: 0000ddee
# eCPRI Auala Pule masani 3: 00000041
# Fa'afeso'ota'i le eCPRI Common Control Channel 3: 00000241
# eCPRI version Channel 3: 2
# Faatalitali mo le CPRI ausia le HSYNC so'otaga i luga
# CPRI Channel 0 HSYNC setete ua ausia
# CPRI Channel 1 HSYNC setete ua ausia
# CPRI Channel 2 HSYNC setete ua ausia
# CPRI Channel 3 HSYNC setete ua ausia
# 11100250000 Tusi le 1 i le nego_bitrate_complete
# 11100650000 Palota PROT_VER Alaala 0
# ________________________________________________________
# 11100850000 Resitala palota: a0000010
# ________________________________________________________
# 13105050000 Palota PROT_VER Alaala 1
# ________________________________________________________
# 13105250000 Resitala palota: a0800010
# ________________________________________________________
# 13105950000 Palota PROT_VER Alaala 2
# ________________________________________________________
# 13106150000 Resitala palota: a1000010
# ________________________________________________________
# 13106850000 Palota PROT_VER Alaala 3
# ________________________________________________________
# 13107050000 Resitala palota: a1800010
# ________________________________________________________
# 13107750000 Tusi le 1 i le nego_protol_complete
# 13108150000 Palota CM_STATUS.rx_fast_cm_ptr_valid Auala 0
# ________________________________________________________
# 13108350000 Resitala palota: a0000020
# ________________________________________________________
# 14272050000 Palota CM_STATUS.rx_fast_cm_ptr_valid Auala 1
# ________________________________________________________
# 14272250000 Resitala palota: a0800020
# ________________________________________________________
# 14272950000 Palota CM_STATUS.rx_fast_cm_ptr_valid Auala 2
# ________________________________________________________
# 14273150000 Resitala palota: a1000020
# ________________________________________________________
# 14273850000 Palota CM_STATUS.rx_fast_cm_ptr_valid Auala 3
# ________________________________________________________
# 14274050000 Resitala palota: a1800020
# ________________________________________________________
# 14274750000 Tusi le 1 ia nego_cm_complete
# 14275150000 Tusi le 1 i nego_vss_complete
# Faatalitali mo le CPRI Channel 0 ausia HSYNC & fa'asologa amata FSM STATE_F
# CPRI Channel 0 HSYNC & fa'asologa amata FSM STATE_F ausia
# Faatalitali mo le CPRI Channel 1 ausia HSYNC & fa'asologa amata FSM STATE_F
# CPRI Channel 1 HSYNC & fa'asologa amata FSM STATE_F ausia
# Faatalitali mo le CPRI Channel 2 ausia HSYNC & fa'asologa amata FSM STATE_F
# CPRI Channel 2 HSYNC & fa'asologa amata FSM STATE_F ausia
# Faatalitali mo le CPRI Channel 3 ausia HSYNC & fa'asologa amata FSM STATE_F
# CPRI Channel 3 HSYNC & fa'asologa amata FSM STATE_F ausia
# ________________________________________________________
# INFO: Ua le toe setiina le tulaga
# ________________________________________________________
#
#
# Auala 0 eCPRI TX SOP numera : 0
# Auala 0 eCPRI TX EOPs faitau : 0
# Auala 0 eCPRI RX SOP numera : 0
# Auala 0 eCPRI RX EOPs faitau : 0
# Auala 0 Fa'atu fafo PTP TX SOP numera : 0
# Auala 0 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 0 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 0 I fafo MISC TX EOPs faitau : 0
# Auala 0 Fa'amatalaga RX SOP i fafo: 0
# Auala 0 Fa'a fafo RX EOP faitau : 0
# Auala 1 eCPRI TX SOP numera : 0
# Auala 1 eCPRI TX EOPs faitau : 0
# Auala 1 eCPRI RX SOP numera : 0
# Auala 1 eCPRI RX EOPs faitau : 0
# Auala 1 Fa'atu fafo PTP TX SOP numera : 0
# Auala 1 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 1 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 1 I fafo MISC TX EOPs faitau : 0
# Auala 1 Fa'amatalaga RX SOP i fafo: 0
# Auala 1 Fa'a fafo RX EOP faitau : 0
# Auala 2 eCPRI TX SOP numera : 0
# Auala 2 eCPRI TX EOPs faitau : 0
# Auala 2 eCPRI RX SOP numera : 0
# Auala 2 eCPRI RX EOPs faitau : 0
# Auala 2 Fa'atu fafo PTP TX SOP numera : 0
# Auala 2 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 2 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 2 I fafo MISC TX EOPs faitau : 0
# Auala 2 Fa'amatalaga RX SOP i fafo: 0
# Auala 2 Fa'a fafo RX EOP faitau : 0
# Auala 3 eCPRI TX SOP numera : 0
# Auala 3 eCPRI TX EOPs faitau : 0
# Auala 3 eCPRI RX SOP numera : 0
# Auala 3 eCPRI RX EOPs faitau : 0
# Auala 3 Fa'atu fafo PTP TX SOP numera : 0
# Auala 3 Fa'atu fafo PTP TX EOPs faitau : 0
# Auala 3 Fa'atu i fafo MISC TX SOP numera : 0
# Auala 3 I fafo MISC TX EOPs faitau : 0
# Auala 3 Fa'amatalaga RX SOP i fafo: 0
# Auala 3 Fa'a fafo RX EOP faitau : 0
# ________________________________________________________
# INFO: Amata le lafoina o afifi
# ________________________________________________________
#
#
# INFO: Faatalitali mo le fesiitaiga o auala 0 eCPRI TX e maeʻa
# INFO: Auala 0 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 0 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 0 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 0 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 0 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le fesiitaiga o auala 1 eCPRI TX e maeʻa
# INFO: Auala 1 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 1 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 1 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 1 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 1 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le fesiitaiga o auala 2 eCPRI TX e maeʻa
# INFO: Auala 2 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 2 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 2 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 2 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 2 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le fesiitaiga o auala 3 eCPRI TX e maeʻa
# INFO: Auala 3 eCPRI TX felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 3 eCPRI fafo TX PTP felauaiga fe'avea'i i
mae'a
# INFO: Auala 3 eCPRI fafo TX PTP felauaiga fe'avea'i ua mae'a
# INFO: Faatalitali mo le Alatele 3 eCPRI fafo TX Misc felauaiga felauaiga i
mae'a
# INFO: Auala 3 eCPRI fafo TX Misc felauaiga fe'avea'i ua mae'a
# ________________________________________________________
# INFO: Taofi le lafoina o afifi
# ________________________________________________________
#
#
# ________________________________________________________
# INFO: Siaki fa'amaumauga o pepa
# ________________________________________________________
#
#
# Auala 0 eCPRI SOP na lafoina: 50
# Auala 0 eCPRI EOP na lafoina: 50
# Auala 0 eCPRI SOPs maua: 50
# Auala 0 eCPRI EOPs maua: 50
# Auala 0 eCPRI Sese lipotia: 0
# Auala 0 SOPs PTP i fafo na lafoina: 4
# Auala 0 PTP EOPs fafo ua lafoina: 4
# Auala 0 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 0 MISC EOPs fafo na lafoina: 128
# Auala 0 SOPs fafo na maua: 132
# Auala 0 EOP i fafo na maua: 132
# Auala 0 SOPs PTP i fafo na maua: 4
# Auala 0 PTP EOP i fafo na maua: 4
# Auala 0 Fa'amatalaga MISC i fafo na maua: 128
# Auala 0 MISC EOPs fafo na maua: 128
# Auala 0 Ua lipotia mai le Sese i fafo: 0
# Auala 0 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# Auala 1 eCPRI SOP na lafoina: 50
# Auala 1 eCPRI EOP na lafoina: 50
# Auala 1 eCPRI SOPs maua: 50
# Auala 1 eCPRI EOPs maua: 50
# Auala 1 eCPRI Sese lipotia: 0
# Auala 1 SOPs PTP i fafo na lafoina: 4
# Auala 1 PTP EOPs fafo ua lafoina: 4
# Auala 1 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 1 MISC EOPs fafo na lafoina: 128
# Auala 1 SOPs fafo na maua: 132
# Auala 1 EOP i fafo na maua: 132
# Auala 1 SOPs PTP i fafo na maua: 4
# Auala 1 PTP EOP i fafo na maua: 4
# Auala 1 Fa'amatalaga MISC i fafo na maua: 128
# Auala 1 MISC EOPs fafo na maua: 128
# Auala 1 Ua lipotia mai le Sese i fafo: 0
# Auala 1 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# Auala 2 eCPRI SOP na lafoina: 50
# Auala 2 eCPRI EOP na lafoina: 50
# Auala 2 eCPRI SOPs maua: 50
# Auala 2 eCPRI EOPs maua: 50
# Auala 2 eCPRI Sese lipotia: 0
# Auala 2 SOPs PTP i fafo na lafoina: 4
# Auala 2 PTP EOPs fafo ua lafoina: 4
# Auala 2 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 2 MISC EOPs fafo na lafoina: 128
# Auala 2 SOPs fafo na maua: 132
# Auala 2 EOP i fafo na maua: 132
# Auala 2 SOPs PTP i fafo na maua: 4
# Auala 2 PTP EOP i fafo na maua: 4
# Auala 2 Fa'amatalaga MISC i fafo na maua: 128
# Auala 2 MISC EOPs fafo na maua: 128
# Auala 2 Ua lipotia mai le Sese i fafo: 0
# Auala 2 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# Auala 3 eCPRI SOP na lafoina: 50
# Auala 3 eCPRI EOP na lafoina: 50
# Auala 3 eCPRI SOPs maua: 50
# Auala 3 eCPRI EOPs maua: 50
# Auala 3 eCPRI Sese lipotia: 0
# Auala 3 SOPs PTP i fafo na lafoina: 4
# Auala 3 PTP EOPs fafo ua lafoina: 4
# Auala 3 Fa'amatalaga MISC i fafo na lafoina: 128
# Auala 3 MISC EOPs fafo na lafoina: 128
# Auala 3 SOPs fafo na maua: 132
# Auala 3 EOP i fafo na maua: 132
# Auala 3 SOPs PTP i fafo na maua: 4
# Auala 3 PTP EOP i fafo na maua: 4
# Auala 3 Fa'amatalaga MISC i fafo na maua: 128
# Auala 3 MISC EOPs fafo na maua: 128
# Auala 3 Ua lipotia mai le Sese i fafo: 0
# Auala 3 Taimi i fafoamp Ua lipotia mai le Sese Tamatamailima: 0
# ________________________________________________________
# INFO: SU'E PASI
#
# ________________________________________________________
1.4.1. Fa'agaoioi le Dynamic Reconfiguration i le Ethernet IP
Ona o le faaletonu, ua le atoatoa le toe fetuutuunaiga malosi i le eCPRI IP design example ma e na'o le Intel Stratix 10 (E-tile ma le H-tile) ma le Intel Agilex 7 (E-tile) design examples.
- Vaavaai mo le laina lea i le test_wrapper.sv mai le mea na gaosiaample_dir>/simulation/testbench directory: parameter ETHERNET_DR_EN = 0
- Suia le tau mai le 0 i le 1: parakalafa ETHERNET_DR_EN = 1
- Toe fa'asolo le fa'ata'ita'iga e fa'aaoga ai le fa'atupu tutusaample tusi mamanu.
1.5. Tu'ufa'atasia o le Poloketi Fa'atasi-Na'o
Ia tuufaatasia le tuufaatasiga-na'o example poloketi, mulimuli i laasaga nei:
- Ia mautinoa le tuufaatasia o le mamanu exampua maea le tupulaga.
- I le polokalama Intel Quartus Prime Pro Edition, tatala le poloketi Intel Quartus Prime Pro Editionample_dir>/synthesis/quartus/ ecpri_ed.qpf.
- I luga o le Processing menu, kiliki Amata Compilation.
- A mae'a fa'aputuga manuia, o lo'o maua lipoti mo le taimi ma le fa'aogaina o puna'oa i lau vasega Intel Quartus Prime Pro Edition. Alu ile Processing ➤ Compilation Report to view le lipoti auiliili o le tuufaatasia.
Fa'amatalaga Fa'atatau
Fuafuaga Fa'avae Poloka
1.6. Tu'ufa'atasia ma Fa'atulaga le Fa'ata'ita'iga Example i Meafaigaluega
Ina ia tuufaatasia le mamanu meafaigaluega exampma faʻapipiʻi i luga o lau masini Intel, mulimuli i laasaga nei:
- Fa'amautinoa le fa'atulagaina o meafaigaluega e iaiampua maea le tupulaga.
- I le polokalama Intel Quartus Prime Pro Edition, tatala le poloketi Intel Quartus Primeample_dir>/synthesis/quartus/ecpri_ed.qpf.
- I luga o le Processing menu, kiliki Amata Compilation.
- A mae'a le fa'aputuga manuia, a .sof file e maua i totonuample_dir>/ synthesis/quartus/output_files directory. Mulimuli i la'asaga nei e fa'apolokalame ai le fa'atulagaina o meafaigaluega fa'apeaampi luga ole masini Intel FPGA:
a. Fa'afeso'ota'i le Pusa Atina'e i le komepiuta talimalo.
e. Tatala le talosaga Pulea Uati, o se vaega o le pusa atinae, ma seti laina fou mo le mamanu example. O lo'o i lalo le fa'atulagaina o taimi i le talosaga Pulea Uati:
• Afai o lo'o e tulimata'i lau mamanu ile Intel Stratix 10 GX SI Development Kit:
— U5, OUT8- 100 MHz
— U6, OUT3- 322.265625 MHz
— U6, OUT4 ma OUT5- 307.2 MHz
• Afai o lo'o e tulimata'ia lau mamanu ile Intel Stratix 10 TX SI Development Kit:
— U1, CLK4- 322.265625 MHz (Mo le 25G fa'amaumauga)
— U6- 156.25 MHz (Mo le 10G fa'amaumauga)
— U3, OUT3- 100 MHz
— U3, OUT8- 153.6 MHz
• Afai o lo'o e tulimata'i lau mamanu ile Intel Agilex 7 F-Series Transceiver-SoC Development Kit:
— U37, CLK1A- 100 MHz
— U34, CLK0P- 156.25 MHz
— U38, OUT2_P- 153.6 MHz
• Afai o lo'o e tulimata'i lau mamanu ile Intel Arria 10 GX SI Development Kit:
— U52, CLK0- 156.25 MHz
— U52, CLK1- 250 MHz
— U52, CLK3- 125 MHz
— Y5- 307.2 MHz
— Y6- 322.265625 MHz
i. I luga o le Meafaigaluega lisi, kiliki Programmer.
o. I le Polokalama, kiliki Hardware Setup.
u. Filifili se masini polokalame.
f. Filifili ma fa'aopoopo le Atina'e Kit e mafai ona fa'afeso'ota'i ai lau vasega Intel Quartus Prime Pro Edition.
g. Ia mautinoa ua setiina le Faiga i le JTAG.
h. Filifili le masini ma kiliki Add Device. E fa'aalia e le Polokalama se poloka poloka o feso'ota'iga i le va o masini i luga o lau laupapa.
i. Uta le .sof file i lau masini Intel FPGA.
j. U'u le fa'atulagaina ma le Feso'ota'i (.elf) file i lau Intel Stratix 10 poʻo
Intel Agilex 7 masini pe afai e te fuafua e faia le suiga malosi (DR) e fesuiaʻi ai le fuainumera o faʻamaumauga i le va o le 25G ma le 10G. Mulimuli i faʻatonuga mai le Faʻatupuina ma le Siiina o le Faʻatonuina ma le Faʻapipiʻi Faʻatonu (.elf) Polokalama File i le itulau e 38 e gaosia ai le .elf file.
k. I le laina ma lau .sof, siaki le Polokalama/Configure pusa mo le .sof file.
l. Kiliki Amata.
Fa'amatalaga Fa'atatau
- Fuafuaga Fa'avae Poloka
- Intel Quartus Prime Programmer User Guide
- Iloiloga ma Debugging Designs ma System Console
- Intel Agilex 7 F-Series Transceiver-SoC Development Kit Guide Guide
- Intel Stratix 10 GX Transceiver Signal Integrity Development Kit Guide Guide
- Intel Stratix 10 TX Transceiver Signal Integrity Development Kit Guide Guide
- Intel Arria 10 GX Transceiver Signal Integrity Development Kit Guide Guide
1.7. Su'ega ole eCPRI Intel FPGA IP Design Example
A uma ona e tuufaatasia le eCPRI Intel FPGA IP mamanu autu exampma fa'apipi'i i lau masini Intel FPGA, e mafai ona e fa'aogaina le System Console e fa'apolokalame ai le IP core ma ana fa'amaufa'ailoga a le Native PHY IP.
Ia ki le System Console ma fa'ata'ita'i le mamanu o meafaigaluega fa'aample, mulimuli i laasaga nei:
- Ina ua uma le mamanu meafaigaluega example ua configured i luga o le masini Intel, i le polokalama Intel Quartus Prime Pro Edition, i luga o le Meafaigaluega lisi, kiliki System Debugging Tools ➤ System Console.
- I le Tcl Console pane, sui le lisi iample_dir>/ synthesis/quartus/hardware_test ma lolomi le poloaiga lenei e tatala ai se sootaga i le JTAG matai ma amata le suega:
• puna ecpri_agilex.tcl mo Intel Agilex 7 mamanu
• puna ecpri_s10.tcl mo Intel Stratix 10 mamanu
• puna ecpri_a10.tcl mo Intel Arria 10 mamanu - Mo lau Intel Stratix 10 poʻo le Intel Agilex 7 E-tile masini fesuiaiga, e tatau ona e faia se faʻatonuga i totonu poʻo fafo i tua pe a uma ona e faʻapipiʻiina le .sof. file:
a. Suia TEST_MODE fesuiaiga i le tafe.c file e filifili ai le faiga fa'amulimuli:TEST_MODE Gaioiga 0 Fa'asologa fa'asolosolo fa'aagaaga mo na'o fa'ata'ita'iga 1 Fa'asolo fa'asologa fa'asologa mo na'o meafaigaluega 2 Serial loopback ma le fa'avasegaina 3 Na'o le fa'avasegaina E tatau ona e toe tu'ufa'atasia ma toe fa'afouina le polokalame NIOS II i so'o se taimi e te suia ai le tafe.c file.
e. Toe fa'afouina le .elf file ma toe fa'apolokalame i le laupapa ma toe fa'apolokalame le .sof file. - Fa'ata'ita'i le fa'agaioiga o mamanu e ala i fa'atonuga o lo'o lagolagoina i le fa'asologa o fa'amafanafanaga. O lo'o tu'uina atu e le fa'atonuga fa'atonuga ni fa'atonuga aoga mo le faitauina o fa'amaumauga ma mea e mafai ai i le mamanu.
Laulau 4. Poloaiga Fa'atonu Fa'atonu Fa'atonu
| Poloaiga | Fa'amatalaga |
| loop_on | Fa'aagaoioi le TX i le RX i totonu fa'asolo fa'asologa fa'asologa. Fa'aoga mo na'o masini Intel Stratix 10 H-tile ma Intel Arria 10. |
| tapuni_off | Fa'aleaogaina le TX i le RX i totonu fa'asolo fa'asologa. Fa'aoga mo na'o masini Intel Stratix 10 H-tile ma Intel Arria 10. |
| sootaga _ init _ int _1pbk | Fa'aagaoioi le TX i le RX fa'alotoifale fa'asolo fa'asologa i totonu o le transceiver ma fa'atino le fa'asologa o le transceiver. Fa'atatau ile Intel Stratix 10 E-tile ma le Intel Agilex 7 E-tile designs. |
| sootaga _ init _ ext _1pbk | Fa'aagaoioi le TX i le RX pito i tua ma fa'atino le fa'asologa o le transceiver. Fa'atatau ile Intel Stratix 10 E-tile ma le Intel Agilex 7 E-tile designs. |
| traffic gen disable | Fa'agata le afi afi ma siaki. |
| chkmac fuainumera | Fa'aali fuainumera mo le Ethernet MAC. |
| faitau_ suega_ fuainumera | Fa'aali fuainumera fa'aletonu mo afi afi ma siaki. |
| ext _ faaauau _ mode _en | Toe setiina le faiga atoa o le mamanu, ma mafai ai e le afi afi ona fa'atupuina fa'asolo fa'asolo. |
| dr _ 25g _ to _ lOg _etile | Suia le fuainumera o faʻamatalaga o le Ethernet MAC mai le 25G i le 10G. Fa'aoga mo na'o masini Intel Stratix 10 E-tile ma Intel Agilex 7 E-tile. |
| dr_25g_to_10g_htile | Suia le fuainumera o faʻamatalaga o le Ethernet MAC mai le 25G i le 10G. Fa'aoga mo na'o masini H-tile |
| dr_10g_to_25g_etile | Suia le fuainumera o faʻamatalaga o le Ethernet MAC mai le 10G i le 25G. Fa'aoga mo na'o masini Intel Stratix 10 E-tile ma Intel Agilex 7 E-tile. |
| dr _ 25g _ to _ lOg _htile | Suia le fuainumera o faʻamatalaga o le Ethernet MAC mai le 10G i le 25G. Fa'aoga mo na'o masini H-tile. |
O sampO le fa'atinoga o lo'o fa'aalia ai se su'ega manuia:
Lomiga o le System Console (Numera o Ala = 1)
Auala 0 EXT PTP TX SOP Faitau: 256
Auala 0 EXT PTP TX EOP Faitau: 256
Auala 0 EXT MISC TX SOP Faitau: 36328972
Auala 0 EXT MISC TX EOP Faitau: 36369511
Auala 0 EXT RX SOP Faitau: 36410364
Auala 0 EXT RX EOP Faitau: 36449971
Auala 0 EXT Checker Mea sese: 0
Auala 0 EXT Checker Mea Sese Faitauina: 0
Auala 0 EXT PTP Fingerprint Mease: 0
Auala 0 EXT PTP Fingerprint Sese Faitauina: 0
Auala 0 TX SOP Faitau: 1337760
Auala 0 TX EOP Faitau: 1339229
Auala 0 RX SOP Faitau: 1340728
Auala 0 RX EOP Faitau: 1342555
Auala 0 Siaki Sese: 0
Auala 0 Su'e Fa'ailoga Sese: 0
===========================================
=============
ETHERNET MAC FA'AMATALAGA MO Auala 0 (Rx)
===========================================
=============
Vaevae Vaevae: 0
Fa'avaa Fa'asao : 0
Sa'o Tele ma FCS Err Frames : 0
Fa'amatalaga fa'ateletele Fa'avaa Sese : 0
Fa'amatalaga Fa'asalalauga Fa'aSēse Fua : 0
Fa'amatalaga Unicast Err Frames : 0
64 Paita Laupapa : 3641342
65 – 127 Paita Laupapa : 0
128 – 255 Paita Laupapa : 37404809
256 – 511 Paita Laupapa : 29128650
512 – 1023 Paita Laupapa : 0
1024 – 1518 Paita Laupapa : 0
1519 – MAX Byte Frames : 0
> MAX Byte Fa'avaa : 0
Fa'amatalaga tele fa'asalalau OK Fua : 70174801
Fa'asalalauga fa'amatalaga OK Fua : 0
Fa'amatalaga tu'ufa'atasi OK Frames : 0
Va'a Pulea Telecast : 0
Fa'asalalauga Fa'asalalauga: 0
Fa'avaa Pulea Unicast : 0
Taofi Pusa Pulea : 0
Totogi Oketi Lelei : 11505935812
Fa'avaa Octets Ua lelei : 12918701444
Rx Maualuluga Umi Fa'avaa: 1518
So'o se Tele ma FCS Err Frame: 0
Fa'atonuga fa'ateletele Err Frame: 0
Fa'asalalauga Fa'asalalauga Err Frame: 0
Fa'atonuga fa'atasi Fa'atonu Fa'avaa Sese : 0
Taofi le fa'atonuga Fa'avaa Sese : 0
Rx Frame Amata : 70174801
O le sampLe gaioiga mo le su'ega 25G i le 10G DR:
Lomitusi Fa'atonu Fa'atonu (25G i le 10G DR E-tile)
Amata le Dynamic Reconfiguration mo Ethernet 25G -> 10G
DR Manuia 25G -> 10G
Avanoa mo le Resitala RX PHY: Siakiga o Auala Uati (KHz)
TXCLK:16114 (KHZ)
RXCLK:16113 (KHZ)
RX PHY Tulaga Palota
Rx Fa'asologa Loka Tulaga 0x0000000f
Uati Mac ile Tulaga lelei? 0x00000001
Rx Frame Sese ? 0x00000000
Rx PHY Fa'aoga atoatoa? 0x00000001
Palota RX PHY Alaala 0
RX PHY Channel 0 o lo'o fa'agasolo!
Lomitusi Fa'amaufa'ailoga a le System (25G i le 10G DR H-tile)
Amata le Dynamic Reconfiguration mo Ethernet 25G -> 10G
DR Manuia 25G -> 10G
Avanoa mo le Resitala RX PHY: Siakiga o Auala Uati (KHz)
TXCLK:15625 (KHZ)
RXCLK:15625 (KHZ)
RX PHY Tulaga Palota
Rx Fa'asao Loka Tulaga 0x00000001
Uati Mac ile Tulaga lelei? 0x00000007
Rx Frame Sese ? 0x00000000
Rx PHY Fa'aoga atoatoa? 0x00000001
Palota RX PHY Alaala 0
RX PHY Channel 0 o lo'o fa'agasolo!
Lomitusi Fa'atonu Fa'atonu (10G i le 25G DR E-tile)
Amata le Dynamic Reconfiguration mo Ethernet 10G -> 25G
DR Manuia 10G -> 25G
Avanoa mo le Resitala RX PHY: Siakiga o Auala Uati (KHz)
TXCLK:40283 (KHZ)
RXCLK:40283 (KHZ)
RX PHY Tulaga Palota
Rx Fa'asologa Loka Tulaga 0x0000000f
Uati Mac ile Tulaga lelei? 0x00000001
Rx Frame Sese ? 0x00000000
Rx PHY Fa'aoga atoatoa? 0x00000001
Palota RX PHY Alaala 0
RX PHY Channel 0 o lo'o fa'agasolo!
Lomitusi Fa'amaufa'ailoga a le System (10G i le 25G DR H-tile)
Amata le Dynamic Reconfiguration mo Ethernet 10G -> 25G
DR Manuia 10G -> 25G
Avanoa mo le Resitala RX PHY: Siakiga o Auala Uati (KHz)
TXCLK:39061 (KHZ)
RXCLK:39063 (KHZ)
RX PHY Tulaga Palota
Rx Fa'asao Loka Tulaga 0x00000001
Uati Mac ile Tulaga lelei? 0x00000007
Rx Frame Sese ? 0x00000000
Rx PHY Fa'aoga atoatoa? 0x00000001
Palota RX PHY Alaala 0
RX PHY Channel 0 o lo'o fa'agasolo!
Design Example Faʻamatalaga
Le mamanu example fa'aalia le fa'atinoga autu o le eCPRI IP autu. E mafai ona e fatuina le mamanu mai le Example Design tab i le eCPRI IP fa'atonu fa'atonu.
2.1. Vaega
- I totonu TX ma RX faasologa loopback mode
- Otometi ona fa'atupu fa'aputu lapopo'a
- Gafatia masani siaki siaki
- Malosiaga e fa'aoga ai le System Console e fa'ata'ita'i ai le mamanu ma toe fa'atulaga le mamanu mo le toe su'ega
2.2. Fuafuaga Meafaigaluega Example
Ata 5. Ata poloka mo Intel Agilex 7 F-tile Designs
Intel Corporation. Ua taofia aia tatau uma. Intel, le Intel logo, ma isi fa'ailoga Intel o fa'ailoga fa'ailoga a le Intel Corporation po'o ona lala. E fa'amaonia e Intel le fa'atinoina o ana oloa FPGA ma semiconductor i fa'amatalaga o lo'o iai nei e tusa ai ma le fa'atonuga masani a Intel, ae fa'asaoina le aia tatau e fai ai suiga i so'o se oloa ma auaunaga i so'o se taimi e aunoa ma se fa'aaliga. E leai se tiute po'o se noataga e afua mai i le talosaga po'o le fa'aogaina o so'o se fa'amatalaga, oloa, po'o se auaunaga o lo'o fa'amatalaina i i'i se'i vagana ua malilie i ai i se faiga tusitusia e Intel. Ua fautuaina tagata fa'atau Intel ina ia maua le fa'amatalaga lata mai o fa'amatalaga masini a'o le'i fa'alagolago i so'o se fa'amatalaga fa'asalalau ma a'o le'i tu'uina atu oka mo oloa po'o tautua. *O isi igoa ma fa'ailoga e mafai ona ta'ua o se meatotino a isi.
Ata 6. Ata poloka mo Intel Agilex 7 E-tile Designs
Ata 7. Ata poloka mo Intel Stratix 10 Designs
Ata 8. Ata poloka mo Intel Arria 10 Designs
O le eCPRI Intel FPGA IP fa'asologa o meafaigaluega fa'apitoaample aofia ai vaega nei:
eCPRI Intel FPGA IP
Talia faʻamatalaga mai le faʻauluina o fefaʻatauaiga na faʻapipiʻiina i totonu o le afifi suʻega ma faʻamuamua faʻamaumauga mo le tuʻuina atu i le Ethernet IP.
Ethernet IP
- F-tile Ethernet Intel FPGA Hard IP (Intel Agilex 7 F-tile designs)
- E-tile Hard IP mo Ethernet (Intel Stratix 10 poʻo le Intel Agilex 7 E-tile designs)
- 25G Ethernet Intel Stratix 10 IP (Intel Stratix 10 H-tile designs)
- Maualalo Latency Ethernet 10G MAC IP ma 1G/10GbE ma 10GBASE-KR PHY IP (Intel Arria 10 mamanu)
Polokalama Taimi Sa'o (PTP) IO PLL
Mo le Intel Stratix 10 H-tile designs—Fa'atotonuina e fa'atupuina ai le uati fa'asinomaga fa'aoga mo le Ethernet IP ma le s.ampuati ling mo Taimi o le Aso (TOD) subsystem. Mo le 25G Ethernet Intel Stratix 10 FPGA IP faʻatasi ma le IEEE 1588v2 faʻaaliga, ua fautuaina oe e Intel e seti le taimi o lenei uati i le 156.25 MHz. Va'ai ile 25G Ethernet Intel Stratix 10 FPGA IP User Guide ma le Intel Stratix 10 H-tile Transceiver PHY User Guide mo nisi fa'amatalaga. O le PTP IOPLL e fa'atupuina fo'i le uati fa'asino mo le eCPRI IO PLL i le auala fa'asolosolo.
Mo le Intel Arria 10 mamanu-Fa'atosina e gaosia le 312.5 MHz ma le 156.25 MHz fa'aoga uati mo le Low Latency Ethernet 10G MAC IP ma 1G/10GbE, 10GBASE-KR PHY IP, ma eCPRI IP.
eCPRI IO PLL
E fa'atupuina le uati autu o le 390.625 MHz mo le ala TX ma le RX o le eCPRI IP, ma vaega o fefa'atauaiga.
Fa'aaliga: O lenei poloka e na'o le mamanu e iaiampLe gaosia mo Intel Stratix 10 ma Intel Agilex 7 masini.
Fa'aaliga: O le lomiga o loʻo iai nei o le eCPRI Intel FPGA IP e naʻo le lagolagoina o le IWF ituaiga 0. Mo Intel Agilex 7 F-tile masini, o le mamanu exampe le lagolagoina le fa'aogaina ile IWF.
A e gaosia le mamanu example fa'atasi ai ma Galuega Fa'afeso'ota'i (IWF) Fa'amuta le lagolago ua tape, e tafe sa'o mai le fa'ailoga afifi o le su'ega i le Avalon-ST fa'apogai/gogo ma fa'apogai fafo/gogo fa'aoga o le eCPRI IP.
A e gaosia le mamanu example fa'atasi ai ma Galuega Fa'afeso'ota'i (IWF) Fa'asagaga lagolago ua ki, o le fe'avea'i o fe'avea'i e tafe atu i le IWF Avalon-ST fa'agogo fa'aulu mai le su'ega fa'apipi'i module muamua, ma sau i fafo mai le IWF Avalon-ST fa'apogai puna i le eCPRI Avalon-ST puna / goto feso'ota'iga.
CPRI MAC
Tuuina atu le vaega CPRI o le layer 1 ma le vaega atoa 2 protocols mo le fesiitaiga o le vaalele, C&M, ma faʻamatalaga faʻatasi i le va o REC ma RE faʻapea foʻi ma le va o RE e lua,
CPRI PHY
Tuuina atu le vaega o totoe o le CPRI layer 1 protocol mo laina laina, faʻasaʻo sese / suʻesuʻeina, ma isi.
Fa'aaliga: O le CPRI MAC ma le CPRI PHY IP na faʻaalia i lenei mamanu exampO lo'o fa'atulagaina e tamo'e i le laina tasi CPRI fua faatatau 9.8 Gbps na'o. Le mamanu exampE le lagolagoina e le laina laina fua faatatau-auto-faatalanoaga i le tatalaina nei.
Su'ega afifi
E aofia ai afi afi ma siaki e fa'atupuina seti eseese o fa'amaumauga i feso'ota'iga Avalon Streaming (Avalon-ST) o le eCPRI IP e pei ona i lalo:
- pepa eCPRI i le Avalon-ST puna / fa'agogo feso'ota'iga (fa'ailoga IWF fa'aletonu):
— Na'o le lagolagoina o le ituaiga fe'au 2.
— Fa'asolo i tua fa'atupu fa'atasi ma fa'atupu fa'atupu fa'asologa fa'aopoopo ma le tele o uta e 72 paita mo pepa ta'itasi.
- Configurable e ala i le CSR e tamoʻe i le le faʻaauau pe faʻaauau faiga.
— TX/RX packet statistic status avanoa e maua e ala ile CSR. - pepa eCPRI i le Avalon-ST puna'o / fa'agogo feso'ota'iga (fa'ailoga IWF ua mafai):
— Na'o le lagolagoina o le ituaiga fe'au 0 i le fa'asalalauga nei.
- Fa'atupuina faiga fa'atupu fa'aopoopo fa'atasi ai ma va'aiga va'a va'ava'a ma le tele o uta e 240 paita mo pepa ta'itasi.
- Configurable e ala i le CSR e tamoʻe i le le faʻaauau pe faʻaauau faiga.
— TX/RX packet statistic status avanoa e maua e ala ile CSR. - Sa'o Taimi Protocol (1588 PTP) taga ma isi mea e le o PTP i le fa'apogai i fafo/gogo:
— Static Ethernet fa'auluulu fa'atupu fa'atasi ai ma fa'amaufa'ailoga muamua: Ethertype0x88F7, Fe'au ituaiga- Opcode 0 (Sync), ma le PTP version-0.
- Fa'ata'ita'iga fa'ata'ita'iga fa'ata'ita'iga fa'atupu fa'atasi ma va o va'aiga va'aiga e 2 ta'amilosaga ma le tele o uta e 57 paita mo pepa ta'itasi.
— 128 afifi e gaosia i le vaitaimi o le tasi sekone.
- Configurable e ala i le CSR e tamoʻe i le le faʻaauau pe faʻaauau faiga.
— TX/RX packet statistic status avanoa e maua e ala ile CSR. - Pepa ese'ese e le o PTP fafo:
— Static Ethernet Header fa'atupuina fa'atasi ai ma le fa'amaufa'ailoga muamua, Ethertype- 0x8100 (le-PTP).
— PRBS fa'asologa faiga fa'atupu fa'atasi ai ma va o va'aiga va'ava'a e 2 ta'amilosaga ma le tele o uta e 128 paita mo pepa ta'itasi.
- Configurable e ala i le CSR e tamoʻe i le le faʻaauau pe faʻaauau faiga.
— TX/RX packet statistic status avanoa e maua e ala ile CSR.
Taimi o le Aso (TOD) subsystem
O lo'o i ai lua IEEE 1588 TOD modules mo TX ma RX, ma le tasi IEEE 1588 TOD Synchronizer module na gaosia e le Intel Quartus Prime software.
Nios® II Subsystem
E aofia ai Avalon-MM alalaupapa lea e mafai ai e Avalon-MM faʻamatalaga faʻamatalaga i le va o le Nios II processor, suʻega afifi, ma Avalon® -MM poloka decoder tuatusi.
O le Nios II o lo'o nafa ma le fa'atinoina o suiga o fuainumera fa'amaumauga e fa'atatau i mea na maua mai le tau o le resitara o le su'ega afifi_switch. O le poloka lea e fa'apolokalameina ai le resitara talafeagai pe a maua mai le fa'atonuga mai le afifi su'ega.
Manatua: O lenei poloka e le o iai i le mamanu example gaosia mo Intel Arria 10 ma Intel Agilex 7 F-tile masini.
System Console
Tu'uina atu se fa'aoga fa'aoga-fa'aoga mo oe e fai ai le fa'avasegaina o le tulaga muamua ma mata'ituina le tulaga o le IP, ma fa'aola afi ma siaki.
Fa'atonu Pule
O lenei module e aofia ai le toe setiina o le synchronizer modules, ma In-system Source and Probe (ISSP) modules mo le faʻaogaina o le faʻaogaina o le faʻaogaina ma le faʻagasologa amata.
Fa'amatalaga Fa'atatau
- 25G Ethernet Intel Stratix 10 FPGA IP Fa'aoga Taiala
- E-tile Hard IP User Guide
- eCPRI Intel FPGA IP Taiala Fa'aaogāina
- 25G Ethernet Intel Stratix 10 FPGA IP Design Example User Guide
- E-tile Hard IP mo Intel Stratix 10 Design Examples Guide Guide
- Intel Stratix 10 L- ma le H-Tile Transceiver PHY Taiala mo Tagata Fa'aoga
- E-Tile Transceiver PHY User Guide
- Intel Stratix 10 10GBASE-KR PHY IP Taiala mo Tagata Fa'aoga
- E-tile Hard IP Intel Agilex Design Example User Guide
2.3. Fa'atusa Fa'ata'ita'iga Example
Le mamanu eCPRI example fa'atupuina se su'ega fa'ata'ita'iga ma fa'ata'ita'iga files e fa'apena vave le eCPRI Intel FPGA IP autu pe a e filifilia le filifiliga Fa'ata'ita'iga po'o Fa'asologa & Fa'atusa.
Ata 9. eCPRI Intel FPGA IP Simulation Block Diagram
Fa'aaliga: Le Nios II Subsystem poloka e le o iai i le mamanu example gaosia mo Intel Arria 10 ma Intel Agilex 7 F-tile masini.
I lenei mamanu example, o le simulation testbench e maua ai galuega faʻavae e pei o le amataga ma faʻatali mo loka, faʻasalalau ma maua pepa.
O le su'ega manuia o lo'o fa'aalia ai galuega e fa'amaonia ai amioga nei:
- O le manatu o tagata o tausia e toe setiina le IP core.
- O lo'o fa'atali le manatu o le kalani mo le fa'aogaina o alafa'amatalaga RX.
- O le manatu o tagata o tausia e fa'asalalau atu pepa i luga o le Avalon-ST fa'aoga.
- Maua ma siaki le mea o lo'o i totonu ma le sa'o o afifi.
- Fa'aali le fe'au "Su'ega PASSED".
2.4. Fa'ailoga Fa'afeso'ota'i
Laulau 5. Fuafuaga Example Fa'ailoga Fa'amatalaga
| Fa'ailoga | Fa'atonuga | Fa'amatalaga |
| clk_ref | Ulufale | Uati fa'asino mo le Ethernet MAC. • Mo le Intel Stratix 10 E-tile, Intel Agilex 7 E-tile ma F-tile mamanu, 156.25 MHz uati ulufale mo le E-tile Ethernet Hard IP autu po o F-tile Ethernet Hard IP autu. Feso'ota'i ile i_clk_ref[0] ile Ethernet Hard IP. • Mo le Intel Stratix 10 H-tile designs, o le 322.2625 MHz uati ulufale mo le Transceiver ATX PLL ma 25G Ethernet IP. Feso'ota'i ile pll_refclk0[0] ile Transceiver ATX PLL ma clk_ref[0] ile 25G Ethernet IP. • Mo le Intel Arria 10 mamanu, se 322.265625 MHz uati ulufale mo le Transceiver ATX PLL ma 1G / 10GbE ma 10GBase-KR PHY IP. Feso'ota'i ile pll_refclk0[0] ile Transceiver ATX PLL ma rx_cdr_ref_clk_10g[0] ile 1G/ 10GbE ma le 10G BASE-KR PHY IP. |
| tod_sync_sampling_clk | Ulufale | Mo le Intel Arria 10 mamanu, o le 250 MHz uati fa'aoga mo le TOD subsystem. |
| clk100 | Ulufale | Uati pulega. O lenei uati e fa'aogaina e fa'atupu ai le latency_clk mo le PTP. Aveta i le 100 MHz. |
| mgmt_reset_n | Ulufale | Toe seti le faailo mo le Nios II faiga. |
| tx_serial | Tuuina atu | TX fa'amaumauga fa'asologa. Lagolago e oo atu i le 4 auala. |
| rx_serial | Ulufale | RX fa'amaumauga fa'asologa. Lagolago e oo atu i le 4 auala. |
| iwf_cpri_ehip_ref_clk | Ulufale | E-tile CPRI PHY fa'aoga uati fa'asinomaga. O lenei uati e na'o le Intel Stratix 10 E-tile ma le Intel Agilex 7 E-tile designs. Ave taavale ile 153.6 MHz mo le 9.8 Gbps CPRI laina laina. |
| iwf_cpri_pll_refclk0 | Tuuina atu | CPRI TX PLL uati faasinomaga. • Mo le Intel Stratix 10 H-tile designs: Ave i le 307.2 MHz mo le CPRI fa'amaumauga 9.8 Gbps. • Mo le Intel Stratix 10 E-tile ma le Intel Agilex 7 E-tile designs: Ave i le 156.25 MHz mo le CPRI fa'amaumauga 9.8 Gbps. |
| iwf_cpri_xcvr_cdr_refclk | Tuuina atu | CPRI talia CDR faasinoupu uati. O lenei uati e na'o le Intel Stratix 10 H-tile designs. Ave taavale ile 307.2 MHz mo le 9.8 Gbps CPRI laina laina. |
| iwf_cpri_xcvr_txdataout | Tuuina atu | CPRI fa'asalalau fa'amaumauga fa'asologa. Lagolago e oo atu i le 4 auala. |
| iwf_cpri_xcvr_rxdatain | Tuuina atu | CPRI fa'amaumauga fa'asologa. Lagolago e oo atu i le 4 auala. |
| cpri_gmii_clk | Ulufale | CPRI GMII 125 MHz fa'aoga uati. |
Fa'amatalaga Fa'atatau
PHY Interface Signals
Lisi fa'ailoga fa'aoga PHY o le 25G Ethernet Intel FPGA IP.
2.5. Fuafuaga Example Resitala Faafanua
O lo'o i lalo le fa'afanua resitala mo le eCPRI IP core design exampLe:
Laulau 6. eCPRI Intel FPGA IP Design Example Resitala Faafanua
| tuatusi | Resitala |
| 0x20100000 – 0x201FFFFF(2) | IOPLL Re-configuration Register. |
| 0x20200000 – 0x203FFFFF | Ethernet MAC Avalon-MM Resitala |
| 0x20400000 – 0x205FFFFF | Ethernet MAC Native PHY Avalon-MM Resitala |
| 0x20600000 – 0x207FFFFF(2) | Fa'amauina PHY RS-FEC Avalon-MM Resitala. |
| 0x40000000 – 0x5FFFFFFFF | eCPRI IP Avalon-MM Resitala |
| 0x80000000 – 0x9FFFFFFFF | Ethernet Design Test Generator/Verifier Avalon-MM Resitala |
Laulau 7. Nios II Resitala Faafanua
O tusi resitala o lo'o i lalo o le laulau e na'o le mamanu e mauaample gaosia mo Intel Stratix 10 poʻo le Intel Agilex 7 E-tile masini.
| tuatusi | Resitala |
| 0x00100000 – 0x001FFFFF | IOPLL Re-configuration Register |
| 0x00200000 – 0x003FFFFF | Ethernet MAC Avalon-MM Resitala |
| 0x00400000 – 0x005FFFFF | Ethernet MAC Native PHY Avalon-MM Resitala |
| 0x00600000 – 0x007FFFFF | Fa'amauina PHY RS-FEC Avalon-MM Resitala |
Fa'aaliga: E mafai ona e mauaina le Ethernet MAC ma le Ethernet MAC Native PHY AVMM resitara e fa'aoga ai le upu offset nai lo le byte offset.
Mo fa'amatalaga au'ili'ili ile Ethernet MAC, Ethernet MAC Native PHY, ma le eCPRI IP fa'afanua autu resitala, va'ai i ta'iala fa'aoga ta'itasi.
(2) Na'o avanoa i le mamanu example gaosia mo Intel Stratix 10 ma Intel Agilex 7 E-tile masini.
Fuafuaga 8. eCPRI Intel FPGA IP Mea Fa'atonu Fa'atonu Example Resitala Faafanua
| Upu Offset | Ituaiga Resitala | Tau Fa'atonu | Ituaiga Avanoa |
| 0x0 | Amata Lafo Faamatalaga: • Bit 1: PTP, le ituaiga PTP • Bit 0: ituaiga eCPRI |
0x0 | RW |
| 0x1 | Fa'aauau Packet Enable | 0x0 | RW |
| 0x2 | Fa'amanino Sese | 0x0 | RW |
| 0x3 (3) | Suiga tau: • Bit [7]- Fa'ailoa ai le ta'ele: — 1'b0: H-tile — 1'b1: E-tile • Bit [6:4]- Fa'ailoa ai le suiga o fa'amaumauga a Ethernet: — 3'b000: 25G i le 10G — 3'b001: 10G i le 25G • Bit [0]- Fa'aola fua fua. E mana'omia le setiina o le bit 0 ma le palota se'ia manino le bit 0 mo le fesuiaiga o fua faatatau. Manatua: E le o avanoa lenei resitala mo Intel Agilex 7 F-tile ma Intel Arria 10 mamanu. |
• E-tile: 0x80 • H-tile: 0x0 |
RW |
| 0x4 (3) | Fua Faatatau ua Maea: • Bit [1] o lo'o fa'ailoa mai ai le suiga ole fua ua mae'a. |
0x0 | RO |
| 0x5 (4) | Tulaga Fa'atonu Fa'atonu: • Bit [31]: Ua saunia le faiga • Bit [30]: IWF_EN • Bit [29]: STARTUP_SEQ_EN • Bit [28:4]: Faasao • Bit [3]: EXT_PACKET_EN • Bit [2:0]: Faasao |
0x0 | RO |
| 0x6 (4) | Maea Feutanaiga a le CPRI: • Bit [3:0]: Fa'ato'a mae'a • Bit [19:16]: Ua mae'a le Polokalama |
0x0 | RW |
| 0x7 (4) | Maea Feutanaiga a le CPRI: • Bit [3:0]: Fa'ato'a vave C&M • Bit [19:16]: VSS anapogi ua mae'a |
0x0 | RW |
| 0x8 – 0x1F | Fa'apolopolo. | ||
| 0x20 | Fa'alavelave eCPRI: • Bit [0] e fa'ailoa ai le fa'alavelave. |
0x0 | RO |
| 0x21 | Sese Paketi fafo | 0x0 | RO |
| 0x22 | Fa'ato'a PTP Pa'u TX Amata o le Peke (SOP) Faitau | 0x0 | RO |
| 0x23 | Fa'ailoga PTP i fafo TX Fa'ai'uga o le Peke (EOP) Faitau | 0x0 | RO |
| 0x24 | Peseti Eseese i fafo TX Faitauga SOP | 0x0 | RO |
| 0x25 | Paketi Eseese i fafo TX EOP Faitau | 0x0 | RO |
| 0x26 | Faitauga SOP Paketi RX fafo | 0x0 | RO |
| 0x27 | Fa'ailoga EOP Paketi RX fafo | 0x0 | RO |
| 0x28 | Fa'ailoga Sese o Paketi fafo | 0x0 | RO |
| 0x29 – 0x2C | Fa'apolopolo. | ||
| 0x2D | Taimi PTP fafoamp Faitauga Sese Tamatamailima | 0x0 | RO |
| 0x2E | Taimi PTP fafoamp Sese Tamatamailima | 0x0 | RO |
| 0x2F | Tulaga Sese Rx fafo | 0x0 | RO |
| 0x30 – 0x47 | Fa'apolopolo. | ||
| 0x48 | eCPRI Pakets Sese | RO | |
| 0x49 | eCPRI TX SOP Faitau | RO | |
| 0x4A | eCPRI TX EOP Faitau | RO | |
| 0x4B | eCPRI RX SOP Faitau | RO | |
| 0x4c | eCPRI RX EOP Faitau | RO | |
| 0x4D | ECPRI Paketi Fa'ailoga Sese | RO | |
Fa'amatalaga Fa'atatau
- Puleaina, Tulaga, ma Fa'amatalaga Resitala Fa'amaumauga
Resitala faʻamatalaga mo le 25G Ethernet Stratix 10 FPGA IP - Toe fetuunaiga ma le Resitala Tulaga
Fa'amatalaga Tusia fa'amatalaga mo le E-tile Hard IP mo Ethernet - Tusitala
Resitala faʻamatalaga mo le eCPRI Intel FPGA IP
eCPRI Intel FPGA IP Design Example User Guide Archives
Mo lomiga lata mai ma muamua o lenei taiala fa'aoga, tagai ile eCPRI Intel FPGA IP Design Example User Guide HTML version. Filifili le lomiga ma kiliki le Download. Afai e le o lisiina se IP po'o se polokalama faakomepiuta, e fa'aoga le ta'iala mo le IP muamua po'o le polokalama faakomepiuta.
Tala Fa'asolopito o Fa'amaumauga mo le eCPRI Intel FPGA IP Design Example User Guide
| Fa'amatalaga Fa'amaumauga | Intel Quartus Prime Version |
IP Version | Suiga |
| 2023.05.19 | 23.1 | 2.0.3 | • Fa'afouina le Simulating the Design Example vaega Testbench i le mataupu Quick Start Guide. • Fa'afouina le igoa ole aiga ole oloa ile "Intel Agilex 7". |
| 2022.11.15 | 22.3 | 2.0.1 | Fa'afou fa'atonuga mo le VCS simulator i le vaega: Fa'ata'ita'i o le Fa'ata'ita'iga Example Testbench. |
| 2022.07.01 | 22.1 | 1.4.1 | • Fa'aopoopoina le fa'ailoga meafaigaluega e iaiample lagolago mo le Intel Agilex 7 F-tile masini fesuiaiga. • Fa'aopoopoina le lagolago mo pusa atina'e nei: — Intel Agilex 7 I-Series FPGA Development Kit — Intel Agilex 7 I-Series Transceiver-SoC Development Kit • Faaopoopo le lagolago mo QuestaSim simulator. • Aveesea le lagolago mo ModelSim * SE simulator. |
| 2021.10.01 | 21.2 | 1.3.1 | • Fa'aopoopoina le lagolago mo masini Intel Agilex 7 F-tile. • Fa'aopoopoina le lagolago mo fa'asologa o auala e tele. • Fa'afou Laulau: eCPRI Intel FPGA IP Mea Fa'ameamea Fa'ailoga Example Resitala Faafanua. • Aveesea le lagolago mo NCSim simulator. |
| 2021.02.26 | 20.4 | 1.3.0 | • Fa'aopoopoina le lagolago mo masini Intel Agilex 7 E-tile. |
| 2021.01.08 | 20.3 | 1.2.0 | • Suia le igoa o le pepa mai le eCPRI Intel Stratix 10 FPGA IP Design Example User Guide to eCPRI Intel FPGA IP Design Example User Guide. • Faaopoopo le lagolago mo Intel Arria 10 mamanu. • Le mamanu IP eCPRI exampua avanoa nei ma galuega fa'afeso'ota'i (IWF) fa'apitoa lagolago. • Fa'aopoopoina se fa'amatalaga e fa'amanino ai le eCPRI mamanu fa'atasiample fa'atusa IWF e na'o avanoa mo le 9.8 Gbps CPRI fua o laina. • Fa'aopoopo aiaiga i le vaega Fa'atupuina o le Fuafuaga pe a fa'atupuina le fa'ata'ita'igaample ma Galuega Fa'afeso'ota'i (IWF) Fa'ataga lagolago ua mafai. • Faaopoopo sample fa'ata'ita'iga fa'ata'ita'iga fa'ata'ita'iga fa'atasi ma le IWF e mafai ona fa'aogaina i le vaega Fa'ata'ita'i le Design Example Testbench. • Fa'aopoopo le vaega fou Fa'aagaoioi le Dynamic Reconfiguration i le Ethernet IP. • Fa'afouina su'ega meafaigaluega sample gaosiga i le vaega Su'ega ole eCPRI Intel FPGA IP Design Example. |
| 2020.06.15 | 20.1 | 1.1.0 | • Fa'aopoopo le lagolago mo le 10G fa'amaumauga. • tafe.c file o lo'o avanoa nei ile mamanu fa'atasiample tupulaga e filifili le loopback mode. • Suia le sample galuega faatino mo su'ega fa'ata'ita'iga fa'atautaia i le vaega Fa'ata'ita'i o le Fa'atusa Fa'atusaample Testbench. • Fa'aopoopo le tau o taimi mo le fa'atinoina o le 10G fa'asologa o fa'amaumauga i le vaega Fa'aopoopo ma Fa'atulagaina le Design Example i Meafaigaluega. • Faia ina ua mae'a suiga ile vaega Su'ega ole eCPRI Intel FPGA IP Design ExampLe: - Faʻaopoopo tulafono e fesuiaʻi fua faʻamaumauga i le va o le 10G ma le 25G — Faaopoopo sample gaosiga mo le fesuiaiga o fua faatatau o faamatalaga - Faʻaopoopo TEST_MODE faʻamatalaga fesuisuiai e filifili ai le loopback i suiga ole masini E-tile. • Suia eCPRI Intel FPGA IP Hardware Design Examples High Level Block Diagram e aofia ai mea fou poloka. • Laupapa Fa'afouina: Design Example Interface Signals e aofia ai faailo fou. • Fa'afouina Fuafuaga Example Resitala Faafanua vaega. • Fa'aopoopoina le vaega fou o fa'aopoopoga: Fa'atupu ma Si'itia le Fa'atonu Fa'atino ma Fa'apipi'i (.elf) Polokalama File . |
| 2020.04.13 | 19.4 | 1.1.0 | Fa'asalalauga muamua. |
A. Fausiaina ma Si'itia le Fa'atonu Fa'atino ma Feso'ota'iga Fa'apolokalame (.elf). File
O lenei vaega o loʻo faʻamatalaina pe faʻapefea ona gaosia ma sii mai le .elf file i le laupapa:
- Suia le lisi iample_dir>/synthesis/quatus.
- I le polokalama Intel Quartus Prime Pro Edition, kiliki Open Project ma tatalaample_dir>/synthesis/quartus/epri_ed.qpf. Filifili nei Tools ➤ Nios II Software Build Tools for Eclipse.
Ata 10. Nios II Software Fausia Meafaigaluega mo Eclipse
- O lo'o fa'aalia le fa'amalama fa'amalama o le Laulaua Galuega. I le Workspace faʻamaonia le ala e pei oample_dir>/synthesis/quatus e teu ai lau poloketi Eclipse. Ua aliali mai le faamalama fou o le Nios II - Eclipse.
Fa'ata 11. Fa'amalama Fa'ata'ita'i o Galuega
- I le Nios II - Eclipse window, kiliki-matau i lalo o le Project Explorer tab, ma filifili New ➤ Nios II Board Support Package. Ua aliali mai le faamalama fou.
Ata 12. Project Explorer Tab
- I le faamalama o le Nios II Board Support Package:
• I le Igoa o le Poloketi parakalafa, fa'amaoti lou igoa o le poloketi.
• I le SOPC Information File igoa parakalafa, su'esu'e i le nofoaga oample_dir>/synthesis/ip_components/nios_system/ nios_system.sopcinfo file. Kiliki Faauma.
Ata 13. Nios II Komiti Fa'atonu Lagolago Fa'amalama
- O le poloketi fou ua fa'aalia i lalo ole Project Explorer tab ile fa'amalama o le Nios II Eclipse. Kiliki taumatau i lalo ole Project Explorer tab, ma filifili Nios II ➤ Nios II Command Shell.
Ata 14. Project Explorer- Nios II Command Shell
- I totonu o le Nios II Command Shell, fa'aoga tulafono nei e tolu: nios2-bsp hal bsp ../../nios_system/nios_system.sopcinfo nios2-app-generate-makefile –app-dir app –bsp-dir bsp –elf-name\ nios_system.elf –src-dir ../../../ed_fw fai –directory=app
- O le .elf file e gaosia i le nofoaga nei:ample_dir>/ synthesis/ip_components/software/ /app.
- Tusi le poloaiga lenei i le Nios II Command Shell e sii mai ai le .elf i le laupapa:
• Mo Intel Stratix 10: nios2-download -g -r -c 1 -d 2 –accept-bad-sysid app/nios_system.elf
• Mo Intel Agilex 7: nios2-download -g -r -c 1 -d 1 –accept-bad-sysid app/nios_system.elf
Faʻasinomaga Faʻainitaneti
Lauina Manatu
UG-20278
683837
2023.05.19
eCPRI Intel® FPGA IP Design Example User Guide
Pepa / Punaoa
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Intel eCPRI Intel FPGA IP Design [pdf] Taiala mo Tagata Fa'aoga eCPRI Intel FPGA IP Design, eCPRI, Intel FPGA IP Design, FPGA IP Design, IP Design, Design |