User Guide for u-blox models including: LARA-R2 R6 Migration Guide, LARA-R2 R6, Migration Guide, Guide

LARA-R2/R6 migration guide

Application note

u-blox AG

LARA-R2/R6 migration guide - U-blox

May 5, 2022 — Product name. Ordering code. Product status. LARA-R202. LARA-R202-02B. End of life. LARA-R202-82B. End of life. LARA-R202-03B. End of life. LARA-R203.

2022-05-05 — Product name. Ordering code. Product status. LARA-R202. LARA-R202-02B. End of life. LARA-R202-82B. End of life. LARA-R202-03B. End of life. LARA-R203.

LARA / LENA HW migration

guidelines are available in LARA-R6/L6 series system integration manual [6], and the supported AT ... Universal Mobile Telecommunications System.


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LARA-R2-R6 Migration AppNote UBX-21010015
LARA-R2/R6 migration guide
HW guidelines to migrate from LARA-R2 to LARA-R6
Application note
Abstract
This document provides hardware guidelines to migrate from u-blox LARA-R2 series region-specific LTE Cat 1 / 3G / 2G modules to LARA-R6 series global and multi-region LTE Cat 1 / 3G / 2G modules, all which are designed in the compact LARA form factor.

UBX-21010015 - R02 C1-Public

www.u-blox.com

LARA-R2/R6 migration guide - Application note

Document information

Title Subtitle Document type Document number Revision and date Disclosure restriction

LARA-R2/R6 migration guide

HW guidelines to migrate from LARA-R2 to LARA-R6

Application note

UBX-21010015

R02

05-May-2022

C1-Public

Product status
Functional sample

Corresponding content status

Draft

For functional testing. Revised and supplementary data will be published later.

In development / Prototype
Engineering sample

Objective specification Advance information

Target values. Revised and supplementary data will be published later. Data based on early testing. Revised and supplementary data will be published later.

Initial production

Early production information Data from product verification. Revised and supplementary data may be published later.

Mass production / End of life

Production information

Document contains the final product specification.

This document applies to the following products:

Product name LARA-R202
LARA-R203
LARA-R204 LARA-R211
LARA-R220 LARA-R280 LARA-R281 LARA-R6001 LARA-R6001D LARA-R6401 LARA-R6401D LARA-R6801

Ordering code LARA-R202-02B LARA-R202-82B LARA-R202-03B LARA-R203-02B LARA-R203-03B LARA-R204-02B LARA-R211-02B LARA-R211-03B LARA-R220-62B LARA-R280-02B LARA-R281-02B LARA-R6001-00B LARA-R6001D-00B LARA-R6401-00B LARA-R6401D-00B LARA-R6801-00B

Product status End of life End of life End of life End of life End of life End of life End of life End of life End of life End of life End of life Prototype Initial production Prototype Engineering sample Functional sample

u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the express written permission of u-blox. The information contained herein is provided "as is" and u-blox assumes no liability for its use. No warranty, either express or implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and fitness for a particular purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents, visit www.u-blox.com. Copyright © u-blox AG.

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Document information

Page 2 of 25

LARA-R2/R6 migration guide - Application note
Contents
Document information ................................................................................................................................ 2 Contents .......................................................................................................................................................... 3 1 LARA-R2 / LARA-R6 modules description .................................................................................... 4 2 Migration between LARA modules .................................................................................................. 7
2.1 Overview ........................................................................................................................................................ 7 2.2 Pin-out comparison between LARA modules........................................................................................ 9 2.3 Interfaces comparison between LARA modules ................................................................................15
2.3.1 VCC module supply input ................................................................................................................15 2.3.2 V_INT 1.8 V supply output ..............................................................................................................15 2.3.3 V_BCKP RTC supply input/output.................................................................................................16 2.3.4 Cellular RF interfaces.......................................................................................................................16 2.3.5 System control interfaces ..............................................................................................................16 2.3.6 SIM interface .....................................................................................................................................17 2.3.7 UART interfaces................................................................................................................................17 2.3.8 USB interface.....................................................................................................................................18 2.3.9 I2C interface.......................................................................................................................................18 2.3.10 Digital audio interface......................................................................................................................19 2.3.11 Clock output.......................................................................................................................................19 2.3.12 GPIOs ...................................................................................................................................................19 2.3.13 Antenna dynamic tuning .................................................................................................................19 2.3.14 Reserved pins ....................................................................................................................................19 2.3.15 Other considerations and test points ..........................................................................................20 2.4 Schematic for LARA modules integration ...........................................................................................21
Appendix ....................................................................................................................................................... 22 A Glossary ................................................................................................................................................. 22 Related documents ................................................................................................................................... 24 Revision history .......................................................................................................................................... 24 Contact.......................................................................................................................................................... 25

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LARA-R2/R6 migration guide - Application note

1 LARA-R2 / LARA-R6 modules description

The u-blox LARA-R2 series comprises single-mode and multi-mode modules supporting LTE Cat 1 in FDD multi-band, 3G UMTS/HSPA in FDD multi-band, 2G GSM/GPRS/EGPRS in dual-band, providing the ideal solution for region-specific coverage.
The u-blox LARA-R6 series comprises single-mode and multi-mode modules supporting LTE Cat 1 in FDD / TDD multi-band, 3G UMTS/HSPA in FDD multi-band, 2G GSM/GPRS/EGPRS in quad-band, providing the ideal solution for global and multi-regional coverage.
All the LARA-R2 and LARA-R6 series modules are available in the same small LARA LGA form-factor (26.0 x 24.0 mm, 100-pin), easy to integrate in compact designs.
LARA series modules are form-factor compatible with the u-blox SARA, LISA and TOBY cellular module families, facilitating a seamless drop-in migration from other u-blox LPWA, GSM/GPRS, CDMA, UMTS/HSPA and LTE modules.
Table 1 summarizes the main features and interfaces of LARA-R2 and LARA-R6 series modules. Some features are not supported by older product versions of the corresponding LARA-R2 series product variant. For more details, see LARA-R2 series data sheet [1].

Model

Region Radio Access Technology Positioning Interfaces

Features

Grade

LTE FDD bands LTE TDD bands UMTS/HSPA FDD bands GSM/GPRS/EGPRS bands Integrated GNSS receiver External GNSS control AssistNow Software CellLocate® UART USB 2.0 I2C GPIOs Digital audio VoLTE CSFB Rx Diversity Dual stack IPv4 / IPv6 TCPIP, UDP/IP, HTTP/FTP TSL/DTLS MQTT LwM2M FOAT / FOTA / uFOTA Device and Data Security 3GPP Power Saving Mode eDRX Last gasp Network indication Antenna and SIM detection Antenna dynamic tuning Jamming detection Standard Professional Automotive

LARA-R202

North America

LARA-R203

North America

LARA-R204

North America

2,4,5,12 2,4,12 4,13

LARA-R211 EMEA

3,7,20

2,5

   2119 



   2119  



1 1 1 9

   



Dual

   2119 



 



 



 



 



LARA-R220 Japan

1,19

   1119

   



 



LARA-R280 APAC

3,8,28

1

   1119 



 



LARA-R281 EMEA

1,3,8 20,28

1

   1119 



 



LARA-R6001

Global

1,2,3,4,5,7,8 12,13,18,19
20,26,28

38,39 40,41

1,2 5,8

Quad

   2119 





LARA-R6001D Global

1,2,3,4,5,7,8 12,13,18,19
20,26,28

38,39 40,41

1,2 5,8

Quad

   2119

  

LARA-R6401

North 2,4,5,12,13,14

America

66,71

   2119   

LARA-R6401D

North America

2,4,5,12,13,14 66,71

   2119

 

LARA-R6801

Multi 1,2,3,4,5,7,8 Region 18,19,20,26,28

1,2 5,8

Quad

   2119 





Table 1: LARA-R2 and LARA-R6 series main features summary ( = supported,  = planned)

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LARA-R2/R6 migration guide - Application note

· LARA-R2 series region-specific LTE Cat 1 / 3G / 2G modules:
o LARA-R202, designed mainly for operation in America, supporting four LTE Cat 1 FDD bands plus two 3G bands
o LARA-R203, designed for operation in North America, supporting three LTE Cat 1 FDD bands o LARA-R204, designed for operation in USA, supporting two Verizon LTE Cat 1 FDD bands o LARA-R211, designed mainly for operation in EMEA, supporting three LTE Cat 1 FDD bands
plus two 2G bands o LARA-R220, designed for operation in Japan, supporting two DoCoMo LTE Cat 1 FDD bands o LARA-R280, designed mainly for operation in APAC, supporting three LTE Cat 1 FDD bands
plus one 3G band o LARA-R281, designed mainly for operation in EMEA, supporting five LTE Cat 1 FDD bands plus
one 3G band
· LARA-R6 series global and multi-region LTE Cat 1 / 3G / 2G modules:
o LARA-R6001, designed for world-wide operation, supporting eighteen LTE Cat 1 FDD / TDD bands plus four 3G bands and four 2G bands for global coverage
o LARA-R6001D, data-only variant of LARA-R6001. Designed for world-wide operation, supporting eighteen LTE Cat 1 FDD / TDD bands plus four 3G bands and four 2G bands for global coverage
o LARA-R6401, designed mainly for operation in America, supporting eight LTE Cat 1 FDD bands o LARA-R6401D, data-only varaint of LARA-R6401. Designed mainly for operation in America,
supporting eight LTE Cat 1 FDD bands o LARA-R6801, designed for multi-regional operation, in EMEA, APAC, Japan and Latin America,
supporting twelve LTE Cat 1 FDD bands plus four 3G bands and four 2G bands

Table 2 summarizes the LTE, 3G and 2G characteristics of LARA-R2 and LARA-R6 modules.

4G LTE

3G UMTS/HSDPA/HSUPA 1

2G GSM/GPRS/EDGE 2

Long Term Evolution (LTE) Evolved UTRA (E-UTRA) Frequency Division Duplex (FDD) Time Division Duplex (TDD)3 DL Rx diversity

High Speed Packet Access (HSPA) UMTS Terrestrial Radio Access (UTRA) Frequency Division Duplex (FDD) DL Rx diversity

Enhanced Data rate GSM Evolution (EDGE) GSM EGPRS Radio Access (GERA) Time Division Multiple Access (TDMA) DL Advanced Rx Performance Phase 1

LTE Power Class · Power Class 3 (23 dBm)
Data rate · LTE category 1:
up to 10.3 Mbit/s DL, up to 5.2 Mbit/s UL

UMTS/HSDPA/HSUPA Power Class · Class 3 (24 dBm)
Data rate · HSDPA category 8:
up to 7.2 Mbit/s DL · HSUPA category 6:
up to 5.76 Mbit/s UL

GSM/GPRS (GMSK) Power Class · Class 4 (33 dBm) for 850/900 band · Class 1 (30 dBm) for 1800/1900 band
EDGE (8-PSK) Power Class · Class E2 (27 dBm) for 850/900 band · Class E2 (26 dBm) for 1800/1900 band
Data rate · GPRS multi-slot class 33, CS1-CS4,
up to 107 kbit/s DL, 85.6 kbit/s UL · EDGE multi-slot class 33, MCS1-MCS9,
up to 296 kbit/s DL, 236.8 kbit/s UL

Table 2: LARA-R2 and LARA-R6 modules LTE, 3G and 2G characteristics summary

1 3G RAT is not supported by LARA-R203, LARA-R204, LARA-R211, LARA-R220, LARA-R6401 or LARA-R6401D modules. 2 2G RAT is not supported by LARA-R202, LARA-R203, LARA-R204, LARA-R220, LARA-R280, LARA-R281, LARA-R6401 or
LARA-R6401D modules. 3 LTE TDD radio access technology is not supported by LARA-R2 series, LARA-R6401, or LARA-R6801 modules.

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LARA-R2/R6 migration guide - Application note

Table 3 summarizes LARA-R2, and LARA-R6 series modules cellular RF bands.

Module LARA-R202

Region North America

LARA-R203 North America

LTE FDD bands
12 (700 MHz) 5 (850 MHz) 4 (1700 MHz) 2 (1900 MHz)
12 (700 MHz) 4 (1700 MHz) 2 (1900 MHz)

LTE TDD bands

LARA-R204 North America

13 (700 MHz) 4 (1700 MHz)

LARA-R211 Europe, Middle East, Africa

20 (800 MHz) 3 (1800 MHz) 7 (2600 MHz)

LARA-R220 Japan

19 (800 MHz) 1 (2100 MHz)

LARA-R280 Asia-Pacific

28 (700 MHz) 8 (900 MHz) 3 (1800 MHz)

LARA-R281 Europe, Middle East, Africa
LARA-R6001 Global LARA-R6001D

28 (700 MHz) 20 (800 MHz) 8 (900 MHz) 3 (1800 MHz) 1 (2100 MHz)
12 (700 MHz) 28 (700 MHz) 13 (700 MHz) 20 (800 MHz) 18 (800 MHz) 19 (800 MHz) 26 (850 MHz) 5 (850 MHz) 8 (900 MHz) 4 (1700 MHz) 3 (1800 MHz) 2 (1900 MHz) 1 (2100 MHz) 7 (2600 MHz)

39 (1900 MHz) 40 (2300 MHz) 41 (2600 MHz) 38 (2600 MHz)

LARA-R6401 North America LARA-R6401D

71 (600 MHz) 12 (700 MHz) 13 (700 MHz) 14 (700 MHz) 5 (850 MHz) 4 (1700 MHz) 66 (1700 MHz) 2 (1900 MHz)

LARA-R6801

Europe, Middle East, Africa Asia-Pacific Japan Latin America

28 (750 MHz) 20 (800 MHz) 18 (800 MHz) 19 (800 MHz) 26 (850 MHz) 5 (850 MHz) 8 (900 MHz) 4 (1700 MHz) 3 (1800 MHz) 2 (1900 MHz) 1 (2100 MHz) 7 (2600 MHz)

Table 3: LARA-R2 and LARA-R6 series modules cellular RF bands summary

3G bands 5 (850 MHz) 2 (1900 MHz)
1 (2100 MHz) 1 (2100 MHz)
5 (850 MHz) 8 (900 MHz) 2 (1900 MHz) 1 (2100 MHz)
5 (850 MHz) 8 (900 MHz) 2 (1900 MHz) 1 (2100 MHz)

2G bands
GSM 850 DCS 1800
GSM 850 E-GSM 900 DCS 1800 PCS 1900
GSM 850 E-GSM 900 DCS 1800 PCS 1900

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2 Migration between LARA modules
2.1 Overview
The u-blox LARA form factor (26.0 x 24.0 mm, 100-pin LGA) includes the following series of modules, with compatible pin assignments as described in Figure 1, so that the modules can be alternatively mounted on a single application PCB using exactly the same copper, solder resist and paste mask.

GND GND ANT2 GND GND ANT_DET GND GND ANT1 GND GND

GND GND ANT2 GND GND ANT_DET GND GND ANT1 GND GND

GND 1 V_BCKP 2

64 63 62 61 60 59 58 57 56 55 54

65

66

67

68

69

70

53 VCC 52 VCC

GND 3 71

72

73

74

75

76 51 VCC

V_INT 4

50 GND

GND 5 77

97

98

78 49 SDIO_D1

RSVD RSVD

DSR 6

48 SDIO_D3

RI 7

47 SDIO_D0

DCD 8 79

80 46 SDIO_CMD

DTR 9 RTS 10

LARA-R2

45 SDIO_CLK 44 SDIO_D2

CTS 11

Top view

43 GND

TXD 12

Pin 65-96: GND

42 GPIO5

RXD 13 GND 14 81

41 VSIM 82 40 SIM_RST

HSIC_DATA HSIC_STRB

PWR_ON 15

39 SIM_IO

GPIO1 16

38 SIM_CLK

VUSB_DET 17 83

99 100

84 37 I2S_RXD

RESET_N 18

36 I2S_CLK

GPIO6 19 85

86

87

88

89

90 35 I2S_TXD

GND 20 HOST_SELECT 21

91

92

93

94

95

96

22 23 24 25 26 27 28 29 30 31 32

34 I2S_WA 33 RSVD

GND 1 RSVD 2

64 63 62 61 60 59 58 57 56 55 54

53 VCC

65

66

67

68

69

70 52 VCC

GND 3 71

72

73

74

75

76 51 VCC

V_INT 4

50 GND

GND 5 77

97

98

78 49 RSVD

RFCTL1 or RSVD RFCTL2 or RSVD

DSR 6

48 RSVD

RI 7

47 RSVD

DCD 8 79

80 46 RSVD

DTR 9 RTS 10

LARA-R6

45 RSVD 44 RSVD

CTS 11 TXD 12 RXD 13 GND 14 81

Top view
Pin 65-96: GND

43 GND 42 GPIO5 41 VSIM 82 40 SIM_RST

RSVD RSVD

PWR_ON 15

39 SIM_IO

GPIO1 16

38 SIM_CLK

VUSB_DET 17 83

99 100

84 37 I2S_RXD

RESET_N 18

36 I2S_CLK

GPIO6 19 85

86

87

88

89

90 35 I2S_TXD

GND 20 91

92

93

94

95

96 34 I2S_WA

GND 21

33 RSVD

22 23 24 25 26 27 28 29 30 31 32

GND GPIO2 GPIO3 GPIO4
SDA SCL USB_DUSB_D+ GND RSVD GND

GND GPIO2 GPIO3 GPIO4
SDA SCL USB_DUSB_D+ GND RSVD GND

Figure 1: LARA-R2 and LARA-R6 series modules' layout and pinout
Table 4 summarizes the interfaces supported by LARA series modules:

VCC module supply input V_INT 1.8V supply output V_BCKP RTC supply input/output ANT1 main RF input/output ANT2 RF Rx diversity input ANT_DET antenna detection input Antenna dynamic tuning (RFCTL1 / RFCTL2) PWR_ON input RESET_N input SIM interface SIM detection Main primary 8-wire UART Auxiliary secondary 4-wire UART Auxiliary secondary 2-wire UART

LARA-R2 series      
    


4 LARA-R6401 and LARA-R6401D only

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LARA-R6 series  
    4      
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LARA-R2/R6 migration guide - Application note

LARA-R2 series

USB High-Speed Interface



I2C interface



Digital Audio Interface



Clock output



GPIOs



Table 4: Summary of interfaces supported by LARA-R2/R6 migration guide modules

LARA-R6 series    5  5 

The LARA modules are also form-factor compatible with the u-blox SARA, LISA, and TOBY cellular module families: although each has a different form factor, the footprints for the TOBY, LISA, LARA, and SARA modules have been developed to ensure layout compatibility.

With the u-blox "nested design" solution, any TOBY, LISA, SARA, or LARA module can be alternatively mounted on the same space of a single "nested" application board as described in Figure 2, enabling straightforward development of products supporting different cellular radio access technologies.

46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30

47 152
48

151 150 149 148 147 146

29 145
28

49

144 143 142 141 140 139

27

50

26

51

138

137

25

52

24

53

23

54

22

55

21

56

136 135 134 133 132 131

20

57

130 129 128 127 126 125

19

58

18

59

124

123

17

60 61

TOBY

16 15

62

Top view

14

63

122

121

13

64

12

65

120 119 118 117 116 115

11

66

114 113 112 111 110 109

10

67

9

68

8

69

7

70

6

71

108

107

5

72

4

73

106 105 104 103 102 101

3

74 100
75

99 98 97 96 95 94

2 93
1

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

TOBY LARA SARA

32 31 30 29 28 27 26 25 24 23 22

33

21

34 96 95 94 93 92 91 20

35 90 89 88 87 86 85 19

36

18

37 84

100 99

83 17

38

16

39

15

40 82 41

81 14 13

42 43 44 45 46 80

LARA
Top View

12 11 10 9 79 8

47

7

48

6

49 78

9 97

77 5

50

4

51 76 75 74 73 72 71 3

52 70 69 68 67 66 65 2

53

1

54 55 56 57 58 59 60 61 62 63 64

32 31 30 29 28 27 26 25 24 23 22

33

21

34 96 95 94 93 92 91 20

35 90 89 88 87 86 85 19

36

18

37 84

83 17

38

16

39

15

40 82 41

81 14 13

42 43

SARA

12 11

44
45 46 80

Top View

10
9 79 8

47

7

48

6

49 78

77 5

50

4

51 76 75 74 73 72 71 3

52 70 69 68 67 66 65 2

53

1

54 55 56 57 58 59 60 61 62 63 64

Figure 2: Cellular modules layout compatibility: all modules can be mounted on the same nested footprint

In details, as described in Figure 3, a different top-side stencil (paste mask) is needed for each u-blox module form factor (TOBY, LISA, SARA and LARA) to be alternatively mounted on the same space of a single "nested" application board.

ANT pad
TOBY

ANT pad
LISA

ANT pad
SARA

ANT pad
LARA

TOBY mounting option with TOBY paste mask

LISA mounting option with LISA paste mask

SARA mounting option with SARA paste mask

LARA mounting option with LARA paste mask

Figure 3: Top-side stencil (paste mask) designs to alternatively mount SARA, LARA, LISA, TOBY modules on the same PCB

5 LARA-R6001, LARA-R6401 and LARA-R6801 only.

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Detailed guidelines to implement a nested application board, a comprehensive description of the u-blox reference nested design and detailed comparisons between the u-blox SARA, LARA, LISA, and TOBY modules are provided in the Nested design application note [3].

2.2 Pin-out comparison between LARA modules

Table 5 shows a pin-out comparison between LARA-R2 and LARA-R6 series modules.

No LARA-R2 series

LARA-R6 series

1 GND

GND

Ground

Ground

2 V_BCKP

RSVD

RTC supply I/O

Reserved for future use. Internally not connected.

3 GND

GND

Ground

Ground

4 V_INT

V_INT

1.8 V (typical) supply output

1.8 V (typical) supply output

Generated by internal DC/DC step-down regulator, when the module is turned on. Test point recommended

Generated by internal LDO linear regulator, when the module is turned on. Test point recommended

5 GND

GND

Ground

Ground

6 DSR

DSR

Main primary UART Data Set Ready output (push-pull, idle high, active low)

Main primary UART Data Set Ready output (push-pull, idle high, active low)

Alternative function: Second auxiliary UART HW flow control input (idle high, active low, with internal active pull-up enabled).

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Output driver strength: 6 mA Internal active pull-up strength: ~7.5 k

Output driver strength: 2 mA Internal active pull-up strength: ~100 k

7 RI

RI

Main primary UART Ring Indicator output (push-pull, idle high, active low)

Main primary UART Ring Indicator output (push-pull, idle high, active low)

Alternative function: Second auxiliary UART HW flow control output (push-pull, idle high, active low).

V_INT voltage supply domain (1.8 V)

V_INT level (1.8 V)

Output driver strength: 6 mA

Output driver strength: 2 mA

8 DCD

DCD

Main primary UART Data Carrier Detect output (push-pull, idle high, active low)

Main primary UART Data Carrier Detect output (push-pull, idle high, active low)

Alternative function: Second auxiliary UART data output (push-pull, idle high, active low).

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Output driver strength: 6 mA

Output driver strength: 2 mA

9 DTR

DTR

Main primary UART Data Terminal Ready input (idle high, active low, with internal active pull-up enabled) to be set low to activate the greeting text.

Main primary UART Data Terminal Ready input (idle high, active low, with internal active pull-up enabled) to be set low to activate the greeting text.

Alternative function: Second auxiliary UART data input (idle high, active low, with internal active pull-up enabled).

V_INT voltage supply domain (1.8 V) Internal active pull-up strength: ~7.5 k

V_INT voltage supply domain (1.8 V) Internal active pull-up strength: ~100 k

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No LARA-R2 series

LARA-R6 series

10 RTS

RTS

Main primary UART HW flow control input

Main primary UART HW flow control input

(idle high, active low, with internal active pull-up enabled) (idle high, active low, with internal active pull-up enabled)

V_INT voltage supply domain (1.8 V) Internal active pull-up strength: ~7.5 k

V_INT voltage supply domain (1.8 V) Internal active pull-up strength: ~100 k

11 CTS

CTS

Main primary UART HW flow control output (push-pull, idle high, active low).

Main primary UART HW flow control output (push-pull, idle high, active low).

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Output driver strength: 6 mA

Output driver strength: 2 mA

12 TXD

TXD

Main primary UART data input (idle high, active low, with internal active pull-up enabled). V_INT voltage supply domain (1.8 V) Internal active pull-up strength: ~7.5 k

Main primary UART data input (idle high, active low, with internal active pull-up enabled). V_INT voltage supply domain (1.8 V) Internal active pull-up strength: ~100 k

13 RXD

RXD

Main primary UART data output (push-pull, idle high, active low). V_INT voltage supply domain (1.8 V) Output driver strength: 6 mA

Main primary UART data output (push-pull, idle high, active low). V_INT voltage supply domain (1.8 V) Output driver strength: 2 mA

14 GND

GND

Ground

Ground

15 PWR_ON

PWR_ON

Power-on/off input (idle high, active low, with 10 k internal pull-up). V_BCKP voltage supply domain (1.8 V) L-level: -0.30 ÷ 0.54 V L-level pulse time to trigger switch on:
50 µs min L-level pulse time to trigger graceful switch off:
1.0 s min

Power-on/off input (idle high, active low, with ~200 k internal pull-up). Internal voltage supply domain (~0.8 V at the pin in idle) L-level: -0.30 ÷ 0.35 V L-level pulse time to trigger switch on:
0.15 s min ÷ 3.2 s max L-level pulse time to trigger graceful switch off:
1.5 s min

No external pull-up to be connected Test point recommended

No external pull-up to be connected Test point recommended

16 GPIO1

GPIO1

GPIO configurable as Input, Output, Network status indication, external GNSS supply enable.

GPIO configurable as Input, Output, Network status indication, external GNSS supply enable.

Default: tri-stated with internal pull-down enabled.

Default: tri-stated with internal pull-down enabled.

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Push-pull output type.
Output driver strength: 6 mAInternal active pull-up strength: ~17 k

Push-pull output type. Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k

17 VUSB_DET

VUSB_DET

5 V sense input to detect USB host and enable the USB. H-level: 1.5 ÷ 5.25 V Test point highly recommended

5 V sense input to detect USB host and enable the USB H-level: 1.5 ÷ 5.25 V Test point highly recommended

18 RESET_N

RESET_N

Abrupt emergency reset shutdown input (idle high, active low, with 10 k internal pull-up). V_BCKP voltage supply domain (1.8 V) L-level: -0.30 ÷ 0.54 V L-level time to trigger abrupt PMU and module reboot:
50 ms min Test point recommended

Abrupt emergency reset shutdown input (idle high, active low, with ~37 k internal active pull-up). Internal voltage supply domain (~1.8 V at the pin in idle) L-level: -0.30 ÷ 0.63 V L-level time to trigger graceful module reboot:
50 ms min ÷ 6 s max L-level time to trigger abrupt module switch off:
10 s min

Test point recommended

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No LARA-R2 series

LARA-R6 series

19 GPIO6

GPIO6

13 or 26 MHz clock output enabled by AT command.

12.288 MHz clock output enabled by AT command 6.

Default: tri-stated with internal pull-down enabled.

Default: tri-stated with internal pull-down enabled.

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Push-pull output type.

Push-pull output type.

Driver strength: 4 mA Internal active pull-up/down strength: ~7.5 k

Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k

20 GND

GND

Ground

Ground

21 HOST_SELECT

GND

Selection of module / host processor configuration function not supported by current FW version.

Ground

Default: tri-stated with internal pull-down enabled.

V_INT voltage supply domain (1.8 V) Internal active pull-up/down strength: ~7.5 k

22 GND

GND

Ground

Ground

23 GPIO2

GPIO2

GPIO configurable as Input, Output, Network status indication output, external GNSS supply enable output.

GPIO configurable as Input, Output, Network status indication output, external GNSS supply enable output.

Default: output for external GNSS supply enable control Default: output for external GNSS supply enable control

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Push-pull output type.

Push-pull output type.

Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k

Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k

24 GPIO3

GPIO3

GPIO configurable as Input, Output, Network status indication output, external GNSS supply enable output, external GNSS data ready input.

GPIO configurable as Input, Output, Network status indication output, external GNSS supply enable output, external GNSS data ready input, Last gasp trigger input, Faster and safe power-off trigger input.

Default: input for external GNSS Tx data ready

Default: input for external GNSS Tx data ready

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Push-pull output type.

Push-pull output type.

Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k

Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k

25 GPIO4

GPIO4

GPIO configurable as Input, Output, Network status indication output, external GNSS supply enable output. Default: output / low

GPIO configurable as Input, Output, Network status indication output, external GNSS supply enable output. Default: output / low

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

Push-pull output type.

Push-pull output type.

Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k

Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k

26 SDA

SDA

I2C data (open drain, idle high, active low, no internal pull-up).

I2C data (open drain, idle high, active low, 2.2 k internal pull-up).

Alternative function: Second auxiliary UART data input (idle high, active low, with internal active pull-up enabled).

V_INT voltage supply domain (1.8 V)

V_INT voltage supply domain (1.8 V)

6 LARA-R6001, LARA-R6401 and LARA-R6801 only.

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No LARA-R2 series
27 SCL I2C clock (open drain, idle high, active low, no internal pull-up). Alternative function: Second auxiliary UART data output (push-pull, idle high, active low). V_INT voltage supply domain (1.8 V)
28 USB_DUSB data I/O (D-) High-speed USB 2.0 Test point highly recommended
29 USB_D+ USB data I/O (D+) High-speed USB 2.0 Test point highly recommended
30 GND Ground
31 RSVD Reserved for future use Internally not connected
32 GND Ground
33 RSVD Reserved use It must be connected to ground
34 I2S_WA I2S Word Alignment, alternatively configurable GPIO. Default: I2S Word Alignment V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k
35 I2S_TXD I2S data output, alternatively configurable GPIO. Default: I2S data output V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k
36 I2S_CLK I2S clock, alternatively configurable GPIO. Default: I2S clock V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k
37 I2S_RXD I2S data input, alternatively configurable GPIO. Default: I2S data input V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k

LARA-R6 series SCL I2C clock (open drain, idle high, active low, 2.2 k internal pull-up).
V_INT voltage supply domain (1.8 V) USB_DUSB data I/O (D-) High-speed USB 2.0 Test point highly recommended USB_D+ USB data I/O (D+) High-speed USB 2.0 Test point highly recommended GND Ground RSVD Reserved for future use Internally not connected GND Ground RSVD Reserved use Test point highly recommended I2S_WA 7 I2S Word Alignment, alternatively configurable GPIO. Default: I2S Word Alignment V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 2 mA Internal active pull-up/down strength: ~7.5 k I2S_TXD 7 I2S data output, alternatively configurable GPIO. Default: I2S data output V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k I2S_CLK 7 I2S clock, alternatively configurable GPIO. Default: I2S clock V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k I2S_RXD 7 I2S input, alternatively configurable GPIO. Default: I2S data input V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k

7 LARA-R6001, LARA-R6401 and LARA-R6801 only.

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No LARA-R2 series 38 SIM_CLK
Clock output for external 1.8 V / 3 V SIM card/chip 39 SIM_IO
I/O data line for external 1.8 V / 3 V SIM card/chip Internal pull-up: 4.7 k 40 SIM_RST Reset output for external 1.8 V / 3 V SIM card/chip 41 VSIM Supply output for external 1.8 V / 3 V SIM card/chip 42 GPIO5 GPIO configurable as Input, Output, SIM detection input. Default: SIM detection input V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 6 mA Internal active pull-up/down strength: ~7.5 k 43 GND Ground 44 SDIO_D2 SDIO serial data [2], not supported by current FW Default: tri-stated with internal pull-down enabled. 45 SDIO_CLK SDIO serial clock, not supported by current FW Default: tri-stated with internal pull-down enabled. 46 SDIO_CMD SDIO command, not supported by current FW Default: tri-stated with internal pull-down enabled. 47 SDIO_D0 SDIO serial data [0], not supported by current FW Default: tri-stated with internal pull-down enabled. 48 SDIO_D3 SDIO serial data [3], not supported by current FW Default: tri-stated with internal pull-down enabled. 49 SDIO_D1 SDIO serial data [1], not supported by current FW Default: tri-stated with internal pull-down enabled. 50 GND Ground 51 VCC Supply input for the whole module Normal operating range: 3.3 ÷ 4.4 V Extended operating range: 3.0 ÷ 4.5 V LARA-R211:
Supply input for baseband PMU part 52 VCC
Supply input for the whole module Normal operating range: 3.3 ÷ 4.4 V Extended operating range: 3.0 ÷ 4.5 V LARA-R211:
Supply for RF Power Amplifiers part

LARA-R6 series SIM_CLK Clock output for external 1.8 V / 3 V SIM card/chip SIM_IO I/O data line for external 1.8 V / 3 V SIM card/chip Internal pull-up: 4.7 k SIM_RST Reset output for external 1.8 V / 3 V SIM card/chip VSIM Supply output for external 1.8 V / 3 V SIM card/chip GPIO5 GPIO configurable as Input, Output, SIM detection input. Default: SIM detection input V_INT voltage supply domain (1.8 V) Push-pull output type. Output driver strength: 2 mA Internal active pull-up/down strength: ~100 k GND Ground RSVD Reserved for future use
RSVD Reserved for future use
RSVD Reserved for future use
RSVD Reserved for future use
RSVD Reserved for future use
RSVD Reserved for future use
GND Ground VCC Supply input for baseband PMU part Normal operating range: 3.3 ÷ 4.5 V Extended operating range: 3.1 ÷ 4.5 V
VCC Supply for RF Power Amplifiers part. Normal operating range: 3.3 ÷ 4.5 V Extended operating range: 2.8 ÷ 4.5 V

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No LARA-R2 series 53 VCC
Supply input for the whole module Normal operating range: 3.3 ÷ 4.4 V Extended operating range: 3.0 ÷ 4.5 V LARA-R211:
Supply for RF Power Amplifiers part 54 GND
Ground 55 GND
Ground 56 ANT1
RF pin for main Tx / Rx cellular antenna 50  nominal characteristic impedance. 57 GND Ground 58 GND Ground 59 ANT_DET Input pin for antenna detection (optional function) 60 GND Ground 61 GND Ground 62 ANT2 RF pin for secondary Rx diversity cellular antenna 50  nominal characteristic impedance. 63 GND Ground ... All pins from 63 to 96 are Ground pins 96 GND Ground 97 RSVD Reserved for future use. Internally not connected.
98 RSVD Reserved for future use. Internally not connected.
99 HSIC_DATA HSIC USB not supported by current FW.
100 HSIC_STRB HSIC USB not supported by current FW.

LARA-R6 series VCC Supply for RF Power Amplifiers part Normal operating range: 3.3 ÷ 4.5 V Extended operating range: 2.8 ÷ 4.5 V
GND Ground GND Ground ANT1 RF pin for main Tx / Rx cellular antenna 50  nominal characteristic impedance. GND Ground GND Ground ANT_DET Input pin for antenna detection (optional function) GND Ground GND Ground ANT2 RF pin for secondary Rx diversity cellular antenna 50  nominal characteristic impedance. GND Ground All pins from 63 to 96 are Ground pins GND Ground RSVD 8 Reserved for future use RFCTL1 9 1.8 V push-pull output to control an antenna tuning IC. RSVD 8 Reserved for future use RFCTL2 9 1.8 V push-pull output to control antenna tuning IC. RSVD Reserved for future use RSVD Reserved for future use

Table 5: LARA-R2 and LARA-R6 series modules pin assignment and description, with remarks for migration

 For further details regarding characteristics, capabilities, usage or settings applicable for each
interface of the LARA-R2 and LARA-R6 series cellular modules, see the related data sheet [1] [4], the related integration manual [2] [5], the related AT commands manual [6] [7], and the nested
design application note [3].

8 LARA-R6001, LARA-R6001D, LARA-R6801 only 9 LARA-R6401, LARA-R6401D only

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2.3 Interfaces comparison between LARA modules

2.3.1 VCC module supply input

As the LARA-R2 and LARA-R6 series modules have compatible power requirements, there are only minor differences in their VCC input voltage ranges and current consumption figures. The same compatible external VCC supply circuit can be implemented for all the LARA modules, as for example the one described in Figure 4.

The nominal voltage provided at the VCC input pins must be within the related normal operating range limits, and the actual voltage during module operations has to be held above the minimum limit of the extended operating range to avoid the undervoltage switch-off of the module. For the detailed values of VCC input voltage ranges, see Table 5, or the related module's data sheet [1] and [4].

The time-division RF transmission of 2G radio access technology can be up to ~2 W, whereas in 3G or LTE radio access technology it is only up to ~0.25 W. Therefore, the pulse current profile in radio connected mode when a data/voice call is enabled may be significantly higher for cellular modules supporting the 2G radio access technology than for modules that do not have 2G fallback.

While selecting and designing the supply source for LARA cellular modules, consider with adequate safe margin the maximum current consumption of the LARA cellular module specifically selected, considering the radio access technologies supported by the module.

For the detailed module's current consumption figures, see the related module's data sheet [1] [4]. For additional specific design guidelines, see the related system integration manual [2] [5].

12V

OFF ON

15k

22k

10µF 680pF 22pF

10nF

LT3972 VIN

RUN

BD

VC

BOOST

RT

SW

PG

SYNC

FB

GND

470nF

10µH 390k

100k

C  100 µF for modules with 2G and/or LTE TDD (C ~10 µF otherwise)

C = 8.2 pF 0402 for modules with ~2.6 GHz bands, as B7 (not needed otherwise)

For possible VCC noise suppression (0R otherwise)

10µF

Ferrite Bead
BLM18EG221SN1
330µF 100nF 10nF 82pF 15pF 8.2pF

Close to the regulator

Close to the module

LARA-R2 / LARA-R6
VCC VCC VCC
GND

Figure 4: Example of compatible VCC supply application circuit using a high reliability step-down regulator

The VCC supply circuit illustrated in Figure 4 includes capacitors with Self-Resonant Frequency in the supported RF cellular bands, intended to be placed close to the VCC pins of the module, narrowing the VCC line down to the pad of the capacitors, to adequately filter EMI in the supported RF cellular bands. Additionally, a ferrite bead specifically designed to suppress EMI in the GHz band is placed very close to the VCC pins of the module to suppress possible noise from the VCC line.

Note that the switch-on sequence of LARA-R2 series can be triggered by applying a valid VCC supply, starting a voltage value of less than 2.1 V, and with a fast-rising slope (from 2.3 V to 2.8 V in less than 4 ms) up to the nominal VCC voltage within the normal operating range.

Instead, LARA-R6 series modules continue to be switched off even after a valid VCC supply has been applied: the PWR_ON input line must be properly toggled low, with valid VCC supply present, to trigger the switch-on sequence of these modules.

2.3.2 V_INT 1.8 V supply output

LARA-R2 and LARA-R6 series modules provide a 1.8 V supply output at the V_INT pin, which is internally generated when the module is switched on.
The same voltage domain is used internally to supply the generic digital interfaces of the modules (as the UARTs, I2C, I2S, GPIOs), and therefore it is recommended to use the V_INT supply output to supply the module side of external voltage translators connected to these interfaces of the modules.

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It is recommended to sense the status of the V_INT output to define when the module is switched on, and it is recommended to provide a test point for diagnostic.

2.3.3 V_BCKP RTC supply input/output

LARA-R2 series modules provide the RTC supply input/output at the V_BCKP pin, which is not available on LARA-R6 series modules, having the same pin internally not connected.

2.3.4 Cellular RF interfaces

LARA-R2 and LARA-R6 series modules provide the primary RF input/output line at the ANT1 pin, which must be connected to a suitable antenna to transmit and receive cellular RF signals, and they provide the secondary RF input line at the ANT2 pin, which is intended to be connected to an antenna to receive cellular RF signals in LTE and 3G radio access technologies implementing the Rx diversity function.

The same optional antenna detection circuit can be implemented for LARA-R2 and LARA-R6 series modules using the available optional ANT_DET input pin.

While selecting the antenna for LARA cellular modules, consider the frequency range supported by each LARA module, as illustrated in Figure 5.

12 12

5

5

LARA-R202

V

V

600 650 700 750 800 850 900 950

699

894

LARA-R203

12 12

600 650 700 750 800 850 900 950

699 746

LARA-R204

13

13

600 650 700 750 800 850 900 950

746 787

20

20

LARA-R211

900

900

600 650 700 750 800 850 900 950

791

960

LARA-R220

19

19

600 650 700 750 800 850 900 950

830 890

28

28

8

8

LARA-R280

600 650 700 750 800 850 900 950

703

960

LARA-R281

20

20

28

28

8

8

600 650 700 750 800 850 900 950

703

960

LARA-R6001 LARA-R6001D

28 13
12 12

20

20

8

28

26

26

13

18 19 18 19

5

5

VIII

V

V

900

850

850

600 650 700 750 800 850 900 699

LARA-R6401

71

71

12

LARA-R6401D600 650 700 617

13

13

12 14

14

750 800

5 850

5
900 894

LARA-R6801

20

20

8

28

28

26

26

18 19 18 19

5

5

VIII

V

V

900

850

850

600 650 700 750 800 850 900 703

8
VIII 900 950
960
950 8
VIII 900 950
960

4
1700 1750 1710

1800

2 II
1850 1900

2 II
1950

2000

2050

4
2100 2150 2200 2155

2250

2300

2350

2400

2450

2500

2550

LEGENDA = LTE bands = 3G bands = 2G bands
2600 2650 2700

4
1700 1750 1710

1800

2 1850 1900

2 1950

2000

2050

4
2100 2150 2200 2155

2250

2300

2350

2400

2450

2500

2550

2600

2650

2700

4
1700 1750 1710
3 1800
1700 1750 1710

1800 1850 1900
3 1800 1800 1850 1900
1880

1950 1950

2000 2000

2050 2050

4 2100 2150 2200
2155
2100 2150 2200

2250 2250

2300 2300

2350 2350

2400 2400

2450 2500 2550
7
2450 2500 2550 2500

2600 2600

2650 2700
7
2650 2700 2690

1

1

1700 1750 1800 1850 1900 1950 2000 2050 2100 2150 2200 2250 2300 2350 2400 2450 2500 2550 2600 2650 2700

1920

2170

3

3

I

I

1700 1750 1800 1850 1900 1950 2000 2050 2100 2150 2200 2250 2300 2350 2400 2450 2500 2550 2600 2650 2700

1710

2170

3
1700 1750 1710

1800

3 1850

1900

1 I
1950

2000

2050

2100

1 I
2150 2200 2170

2250

2300

2350

2400

2450

2500

2550

2600

2650

2700

3 4
1800
1700 1750 1710 66 4
1700 1750 1710

39 3
2

1800

II 1900

1800 1850 1900

2 1800 1850 1900

1 2
I II
1900 1950 2000
2 1950 2000

2050 2050

1 4
I
2100 2150 2200 2250 2170 66
4 2100 2150 2200 2250
2200

40
2300 2350 2300 2300 2350

2400 2400

2450 2450

2500 2500

7 2550 2550

41 38
2600
2600

7
2650 2700 2690
2650 2700

3 4
1800
1700 1750 1710

3 2

1800

II 1900

1800 1850 1900

1 2
I II
1900
1950 2000

2050

1 4
I
2100 2150 2200 2170

2250

2300

2350

2400

7
2450 2500 2550 2500

2600

7
2650 2700 2690

Figure 5: Summary of operating frequency bands supported by LARA modules

2.3.5 System control interfaces

The PWR_ON and the RESET_N input lines have internal pull-up resistors on LARA-R2 and LARA-R6 series modules, and both lines are intended to be driven by external open drain drivers: same compatible external circuits can be implemented for all the LARA modules.
The switch-on sequence of LARA-R2 series modules can be triggered by applying a valid VCC power supply (see section 2.3.1), while LARA-R6 series modules remain switched off after a valid VCC power

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LARA-R2/R6 migration guide - Application note
supply is applied to the modules: the PWR_ON input line must be properly toggled low, with valid VCC supply present, to trigger the switch-on sequence of the modules.
The PWR_ON input line can be used to trigger the graceful switch-off procedure of the LARA-R2 and LARA-R6 series modules, as an alternative to using the +CPWROFF AT command. Afterwards, the switch-on sequence of modules can be triggered again by properly toggling low PWR_ON input line.
The assertion or toggling of the RESET_N input line causes different actions:
· the RESET_N line of LARA-R2 series modules triggers an unconditional reboot of the module when toggled, with internal PMU shutdown when set low.
· the RESET_N line of LARA-R6 series modules triggers an unconditional graceful reboot of the module when set low for a short time period.
· the RESET_N line of LARA-R6 series modules triggers an unconditional shutdown of the module when set low for a long time period.
The timings for proper control of the PWR_ON and RESET_N input lines of LARA-R2 and LARA-R6 series modules are reported in the related data sheet [1] and [4].
It is recommended to provide test points on the PWR_ON and RESET_N input lines of LARA-R2 and LARA-R6 series modules, to trigger the FW update procedure, and for diagnostic purpose.
2.3.6 SIM interface
The same compatible external SIM circuit can be implemented for all LARA modules: external 1.8 V and 3.0 V SIM card / IC are supported over the available standardized SIM interface (VSIM, SIM_IO, SIM_CLK, SIM_RST pins).
The same optional SIM detection circuit can be implemented for LARA series modules using the available GPIO5 pin.
2.3.7 UART interfaces
Main primary UART interface
LARA-R2 and LARA-R6 modules provide a compatible main 8-wire 1.8 V UART interface including:
· data lines (RXD output, TXD input), · hardware flow control lines (CTS output, RTS input), · modem status and control lines (DTR input, DSR output, DCD output, RI output)
The main primary UART interface supports AT commands and data communication, multiplexer functionality including virtual channel for GNSS tunneling, and FW update by means of FOAT on all the LARA modules.
Additionally, LARA-R2 series modules support the FW update by means of the u-blox EasyFlash tool, and the diagnostic trace logging functions over the main primary UART interface.
It is recommended to provide test points on RXD and TXD pins of LARA series modules, for FW update and diagnostic, in particular if the USB interface is connected to the external host processor.
The primary UART interfaces of LARA series modules are electrically compatible, so that the same compatible external circuit can be used. It is recommended to use the V_INT output to supply the module side of external voltage translators connected to the UART interfaces.

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The baud rates and configurations available and supported by LARA-R2 and LARA-R6 series modules for the main primary UART interface may slightly differ:
· LARA-R2 series modules have the automatic baud rate and frame format detection available by default, and they support high-speed UART data rates up to 6.5 Mbit/s.
· LARA-R6 series modules have the 115200 bit/s baud rate and the 8N1 frame format available by default, and they support high-speed UART data rates up to 3.0 Mbit/s.
For more details about configurations of UART interfaces, see the u-blox AT commands manual [6], +IPR, +ICF, +IFC, &K, \Q, +UPSV, +CMUX, +USIO, +UUSBCONF AT commands, where supported).
Auxiliary UART interface
LARA-R202, LARA-R203 and LARA-R211 modules provide an auxiliary secondary 2-wire 1.8 V UART serial interface, as alternative function of the I2C interface (SCL and SDA pins) including:
· data lines (SCL pin as AUX UART data output, SDA pin as AUX UART data input)
LARA-R6 series modules provide an auxiliary secondary 4-wire 1.8 V UART serial interface, as alternative function of the main UART interface DTR, DSR, DCD and RI pins, including:
· data lines (DCD pin as AUX UART data output, DTR pin as AUX UART data input) · HW flow control lines (RI as AUX UART flow control output, DSR as AUX UART flow control input)
The data lines of the auxiliary UART interfaces of LARA series modules are electrically compatible, so that the same compatible external circuit can be used. However, the AUX UART data input and output functions are available on different pins comparing LARA-R2 and LARA-R6 series modules. It is recommended to use the V_INT output to supply the module side of external voltage translators connected to the AUX UART.
The baud rates and configurations available and supported by LARA-R2 and LARA-R6 series modules for the auxiliary UART interface may slightly differ: see the u-blox AT commands manual [6] (+IPR, +ICF, +IFC, &K, \Q, +USIO, +UUSBCONF AT commands, where supported).
2.3.8 USB interface
LARA-R2 and LARA-R6 series modules provide a compatible USB 2.0 High-Speed interface including:
· VUSB_DET input pin to detect the presence of an external USB host, and enable the USB interface of the module by applying an external valid USB VBUS voltage (1.5 V minimum, 5.0 V typical),
· USB_D+ and USB_D- data and signaling lines according to the USB 2.0 standard.
The USB interface supports AT commands and data communication, GNSS tunneling, the FW update by means of FOAT, the FW update by means of the u-blox EasyFlash tool, and the diagnostic trace logging functions on all the LARA-R2 and LARA-R6 series modules.
It is highly recommended to provide accessible test points on VUSB_DET, USB_D+ and USB_D- pins of LARA-R2 and LARA-R6 series modules, for FW update and diagnostic.
The configurations available and supported by LARA-R2 and LARA-R6 series modules for the USB interface may slightly differ: see the related data sheet of the modules [1] [4], and the u-blox AT commands manual [6] (+USIO, +UUSBCONF AT commands, where supported).
 The USB interface of the LARA-R6 series modules is enabled only if an external voltage detectable
as High logic level is applied at the VUSB_DET input during the switch-on boot sequence of the module.
2.3.9 I2C interface
LARA-R2 and LARA-R6 series modules provide a compatible 1.8 V I2C interface (SDA, SCL pins) available to communicate with external u-blox GNSS chips / modules, and with external compatible

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I2C devices as for example an audio codec: the module acts as an I2C host which can communicate with I2C devices in accordance with the I2C bus specifications.
LARA-R2 modules do not integrate pull-up resistors on SDA and SCL lines: external pull-up resistors have to be provided accordingly if the I2C interface is used in applications with LARA-R2 modules. Instead, LARA-R6 series modules have internal pull-up resistors on SDA and SCL lines, so there is no necessity of external pull-up resistors.
It is recommended to use the V_INT output to supply the module side of external voltage translators connected to the I2C interface.
2.3.10 Digital audio interface
LARA-R2 and LARA-R6 series modules provide a compatible 1.8 V digital audio interface over the I2S_TXD, I2S_RXD, I2S_CLK, I2S_WA pins, that can be configured by AT command to transfer digital audio data to/from an external device as an audio codec.
The configurations available and supported by LARA-R2 and LARA-R6 series modules for the digital audio interface may slightly differ: see the Audio sections in the u-blox AT commands manual [6].
 LARA-R6001D / LARA-R6401D data-only product versions do not support voice / audio feature.
2.3.11 Clock output
LARA-R2 and LARA-R6 series modules provide a compatible 1.8 V digital clock output on the GPIO6 pin. This is mainly designed to feed the clock input of an external audio codec, as it can be configured in "Audio dependent" mode (generated only when the audio is active), or in "Continuous" mode.
 LARA-R6001D / LARA-R6401D data-only product versions do not support GPIO6 clock output.
2.3.12 GPIOs
LARA series modules provide nine compatible 1.8 V GPIO pins (GPIO1-GPIO5, I2S_TXD, I2S_RXD, I2S_CLK, I2S_WA) that can be configured as General Purpose Input/Output or to provide custom functions (for further details, see the related data sheet of the modules [1] [4], and the GPIO chapter in the u-blox AT commands manual [6]).
2.3.13 Antenna dynamic tuning
LARA-R6401 and LARA-R6401D series modules support a wide range of frequencies, from 600 MHz to 2200 MHz. For such modules, to provide more efficient antenna designs over a wide bandwidth, RFCTL1 and RFCTL2 pins can be configured to change their output value in real time according to the operating LTE band in use by the module.
These pins, paired with an external antenna tuner IC or RF switch, can be used to:
· tune antenna impedance to reduce power losses due to mismatch · tune antenna aperture to improve total antenna radiation efficiency · select the optimal antenna for each operating band
2.3.14 Reserved pins
LARA series modules include pins reserved for future use, marked as RSVD, which can all be left unconnected on the application board, except the RSVD #33 pin:
· It is recommended to connect to ground the RSVD #33 pin of LARA-R2 modules · It is suggested to connect an accessible test point to the RSVD #33 pin of LARA-R6 modules

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2.3.15 Other considerations and test points

Table 6 lists the interfaces dedicated for special purposes, as the firmware update by means of u-blox EasyFlash tool and/or for diagnostic by means of u-blox m-center tool, on LARA modules.

Module LARA-R2
LARA-R6

FW update by means of u-blox EasyFlash tool USB UART (2-wire data input/output)
USB

Diagnostic by means of u-blox m-center tool
USB UART (2-wire data input/output) AUX UART (2-wire data input/output) HSIC
USB

Table 6: Interfaces for FW update and/or diagnostic purposes on LARA modules

It is highly recommended to provide test points directly connected to the pins with FW update and/or diagnostic functions available (as in particular the VUSB_DET, USB_D+ and USB_D- pins), depending also on which interface of the module is connected to external host application processor (as the RXD and TXD lines of the UART interface also have to be considered).

Additionally, it is recommended to provide test points directly connected to the following pins of the modules for diagnostic purposes:

· V_INT · PWR_ON · RESET_N · RSVD #33 of LARA-R6 series modules

All LARA-R2 and LARA-R6 series GND pins are intended to be externally connected to ground.
 For additional specific design-in guidelines, see the modules' system integration manual [2] [5].

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2.4 Schematic for LARA modules integration

Figure 6 shows an example of a schematic diagram where a LARA-R2 or a LARA-R6 series module can be integrated into the same application board, using all the available interfaces and functions of the modules. The different mounting options for the external parts are noted herein according to the functions supported by each module.

LARA-R2 / LARA-R6

3V8

BLM18EG221SN1 or 0

+ 330µF 100nF 10nF 82pF 15pF 8.2pF

51 VCC 52 VCC 53 VCC
GND

ANT1 56 ANT2 62

Mount for modules supporting 2G / TDD LTE
(~10µF otherwise)

Mount for modules supporting 2.6 GHz bands

RTC back-up

100µF

Optional for LARA-R2

Application Processor

V_INT

GPIO

TP
Open Drain Output
TP
Open Drain Output

2 V_BCKP / RSVD

ANT_DET 59

GND

RSVD / RFCTL1 97 RSVD / RFCTL2 98

15 PWR_ON 18 RESET_N

V_INT 4 GPIO5 42 VSIM 41
SIM_IO 39 SIM_CLK 38 SIM_RST 40

15pF

Optional, 0 otherwise

33pF

39nH

Optional, DNI otherwise 33pF

ESD

10k

27pF

Connector

82nH

Connector

82nH

ESD

Primary Cellular Antenna
Secondary Cellular Antenna

V_INT TP 1k

470k

47pF 47pF 47pF 47pF100nF ESD ESD ESD ESD ESD ESD

SIM Card Holder
SW1 SW2 VCC (C1) VPP/SWP (C6) IO (C7) CLK (C3) RST (C2) GND (C5)

1.8V DTE TXD RXD RTS CTS DTR DSR RI DCD GND
USB 2.0 Host VBUS
D+ D-
GND

0 TP 0 TP

12 TXD 13 RXD 10 RTS 11 CTS 9 DTR 6 DSR 7 RI 8 DCD
GND

0 TP 0 TP 0 TP
100nF

17 VUSB_DET 29 USB_D+ 28 USB_D­
GND

GPIO2 23

V_INT 4.7k 4.7k

Not supported by LARA-R204-02B prouct version

3V8 LDO Regulator

IN

OUT

SHDNn GND

47k
TCA9406DCUR I2C Voltage Translator

3V0 100nF

u-blox GNSS 3.0 V receiver
VCC

100nF

VCCA OE SDA_A

VCCB SDA_B

100nF 4.7k

4.7k

SDA2

SCL_A GND SCL_B

SCL2

GPIO3 24 GPIO4 25

SN74LVC1T45 V_INT Voltage Translator

100nF

VCCB B

VCCA DIR A

OEn GND

3V0 100nF

TxD1

Mount for

0

LARA-R6

3V8
Network Indicator

TP

Mount for

0

LARA-R2

99 HSIC_DATA / RSVD 100 HSIC_STRB / RSVD 21 HOST_SELECT / GND

44 SDIO_D2 / RSVD 45 SDIO_CLK / RSVD 46 SDIO_CMD / RSVD 47 SDIO_D0 / RSVD 48 SDIO_D3 / RSVD 49 SDIO_D1 / RSVD
16 GPIO1
RSVD 33 RSVD

SDA 26 SCL 27 I2S_TXD 35 I2S_RXD 37 I2S_CLK 36 I2S_WA 34
GPIO6 19

GND

GND

Not supported by LARA-R204-02B, LARA-R220-62B and data-only product versions

Audio Codec V_INT MAX9860

V_INT

10k IRQn

VDD

MICBIAS

SDA

1µF 2.2k

100nF 1µF 10µF

SCL MICLP
SDIN MICLN
SDOUT MICGND
BCLK

1µF

EMI

MIC

1µF

EMI

2.2k

10nF 10nF 27pF 27pF ESD ESD

LRCLK

EMI

OUTP

MCLK

EMI

OUTN

SPK

10nF 10nF 27pF 27pF ESD ESD

Figure 6: Example schematic diagram to integrate LARA-R2 / LARA-R6 series modules on the same application board

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Appendix

A Glossary

Abbreviation 2G 3G 3GPP 8-PSK APAC AT AUX Cat CDMA CS CSFB CTS DCD DCS DL DSR DTLS DTR EDGE eDRX EGPRS E-GSM EMEA EMI ESD E-UTRA FDD FOAT FOTA FTPS FW GMSK GND GNSS GPIO GPRS GPS GSM HSDPA HSIC HSPA

Definition 2nd Generation Cellular Technology (GSM, GPRS, EGPRS) 3rd Generation Cellular Technology (UMTS, HSDPA, HSUPA) 3rd Generation Partnership Project 8 Phase-Shift Keying modulation Asia-Pacific AT Command Interpreter Software Subsystem, or attention Auxiliary Category Code Division Multiple Access Coding Scheme Circuit-Switched-Fall-Back Clear To Send Data Carrier Detect Digital Cellular System Down-Link (Reception) Data Set Ready Datagram Transport Layer Security Data Terminal Ready Enhanced Data rates for GSM Evolution (EGPRS) Extended Discontinuous Reception Enhanced General Packet Radio Service (EDGE) Extended GSM Europe, the Middle East and Africa Electro-Magnetic Interference Electro-Static Discharge Evolved Universal Terrestrial Radio Access Frequency Division Duplex Firmware update Over AT commands Firmware update Over The Air File Transfer Protocol Secure Firmware Gaussian Minimum-Shift Keying modulation Ground Global Navigation Satellite System General Purpose Input Output General Packet Radio Service Global Positioning System Global System for Mobile communication High Speed Downlink Packet Access High-Speed Inter-Chip USB interface High-Speed Packet Access

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Abbreviation Definition

HSUPA

High Speed Uplink Packet Access

HTTPS

HyperText Transfer Protocol Secure

I/O

Input/Output

I2C

Inter-Integrated Circuit interface

I2S

Inter IC Sound interface

IP

Internet Protocol

LED

Light Emitting Diode

LGA

Land Grid Array

LNA

Low Noise Amplifier

LPWA

Low Power Wide Area

LTE

Long Term Evolution

LwM2M

Open Mobile Alliance Lightweight Machine-to-Machine protocol

MCS

Modulation and Coding Scheme

MQTT

Message Queuing Telemetry Transport

PA

Power Amplifier

PCS

Personal Communications Service

PMU

Power Management Unit

PSM

Power Saving Mode

N.A.

Not Available / Not Applicable

RAT

Radio Access Technology

RF

Radio Frequency

RI

Ring Indication

Rx

Receiver

RTC

Real Time Clock

RTS

Request To Send

SAW

Surface Acoustic Wave

SDIO

Secure Digital Input Output

SIM

Subscriber Identification Module

SMS

Short Message Service

SPI

Serial Peripheral Interface

TCP

Transmission Control Protocol

TDD

Time Division Duplex

TLS

Transport Layer Security

TP

Test Point

Tx

Transmitter

UART

Universal Asynchronous Receiver-Transmitter

uCSP

u-blox Common Services Platform

UDP

User Datagram Protocol

uFOTA

u-blox Firmware update Over The Air

UL

Up-Link (Transmission)

UMTS

Universal Mobile Telecommunications System

URC

Unsolicited Result Code

USB

Universal Serial Bus

VoLTE

Voice over LTE

Table 7: Explanation of the abbreviations and terms used

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Related documents
[1] u-blox LARA-R2 series data sheet, UBX-16005783 [2] u-blox LARA-R2 series system integration manual, UBX-16010573 [3] u-blox nested design application note, UBX-16007243 [4] u-blox LARA-R6 series data sheet, UBX-21004391 [5] u-blox LARA-R6 series system integration manual, UBX-21010011 [6] u-blox AT commands manual, UBX-13002752 [7] u-blox LARA-R6 series AT commands manual, UBX-21046719
 For regular updates to u-blox documentation and to receive product change notifications, register
on our homepage (www.u-blox.com).

Revision history

Revision R01 R02

Date 29-Apr-2021 05-May-2022

Name sses psca / sses

Comments
Initial release Added LARA-R6001D and LARA-R6401D. Some corrections and clarifications.

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Contact

For complete contact information, visit us at www.u-blox.com.

u-blox Offices
North, Central and South America
u-blox America, Inc. Phone: +1 703 483 3180 Email: info_us@u-blox.com
Regional Office West Coast: Phone: +1 408 573 3640 Email: info_us@u-blox.com
Technical Support: Phone: +1 703 483 3185 Email: support_us@u-blox.com

Headquarters Europe, Middle East, Africa
u-blox AG Phone: +41 44 722 74 44 Email: info@u-blox.com Support: support@u-blox.com

Asia, Australia, Pacific
u-blox Singapore Pte. Ltd. Phone: +65 6734 3811 Email: info_ap@u-blox.com Support: support_ap@u-blox.com
Regional Office Australia: Phone: +61 3 9566 7255 Email: info_anz@u-blox.com Support: support_ap@u-blox.com
Regional Office China (Beijing): Phone: +86 10 68 133 545 Email: info_cn@u-blox.com Support: support_cn@u-blox.com
Regional Office China (Chongqing): Phone: +86 23 6815 1588 Email: info_cn@u-blox.com Support: support_cn@u-blox.com
Regional Office China (Shanghai): Phone: +86 21 6090 4832 Email: info_cn@u-blox.com Support: support_cn@u-blox.com
Regional Office China (Shenzhen): Phone: +86 755 8627 1083 Email: info_cn@u-blox.com Support: support_cn@u-blox.com
Regional Office India: Phone: +91 80 405 092 00 Email: info_in@u-blox.com Support: support_in@u-blox.com
Regional Office Japan (Osaka): Phone: +81 6 6941 3660 Email: info_jp@u-blox.com Support: support_jp@u-blox.com
Regional Office Japan (Tokyo): Phone: +81 3 5775 3850 Email: info_jp@u-blox.com Support: support_jp@u-blox.com
Regional Office Korea: Phone: +82 2 542 0861 Email: info_kr@u-blox.com Support: support_kr@u-blox.com
Regional Office Taiwan: Phone: +886 2 2657 1090 Email: info_tw@u-blox.com Support: support_tw@u-blox.com

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References

Microsoft Word for Microsoft 365