TAS2563YBGEVM-DC Evaluation Module User's Guide

Document Revision: SLAU800 - January 2019

Introduction

This user's guide describes the TAS2563 evaluation module (TAS2563YBGEVM-DC). The TAS2563YBGEVM-DC allows for evaluation of the TAS2563 device with end products.

Contents

  • Export Control Notice
  • Description
  • Specifications
  • Software
  • Device Configuration
  • Digital Audio Interfaces
  • EVM Schematics
  • EVM Layer Plots
  • Bill of Materials

List of Figures

  • Figure 1: Requesting PPC3 Access
  • Figure 2: Default Jumper Settings
  • Figure 3: Mono Setup
  • Figure 4: Windows Playback Devices
  • Figure 5: Texas Instruments USB Audio Device Control Panel
  • Figure 6: Windows Playback device Sample Rate
  • Figure 7: Stereo Setup
  • Figure 8: Windows Playback Devices
  • Figure 9: Texas Instruments USB Audio Device Control Panel
  • Figure 10: Windows Playback device Sample Rate
  • Figure 11: Mother Board Connections
  • Figure 12: Channel 1
  • Figure 13: Channel 2
  • Figure 14: TAS2563YBGEVM-DC Top Assembly
  • Figure 15: TAS2563YBGEVM-DC Top Silk Screen
  • Figure 16: TAS2563YBGEVM-DC Top Solder Mask
  • Figure 17: TAS2563YBGEVM-DC Top Copper
  • Figure 18: TAS2563YBGEVM-DC Copper Layer 2
  • Figure 19: TAS2563YBGEVM-DC Copper Layer 3
  • Figure 20: TAS2563YBGEVM-DC Copper Layer 4
  • Figure 21: TAS2563YBGEVM-DC Copper Layer 5
  • Figure 22: TAS2563YBGEVM-DC Bottom Copper
  • Figure 23: TAS2563YBGEVM-DC Bottom Solder
  • Figure 24: TAS2563YBGEVM-DC Bottom Silk Screen
  • Figure 25: TAS2563YBGEVM-DC Bottom Assembly

List of Tables

  • Table 1: Specifications
  • Table 2: Default Jumper Settings
  • Table 3: TAS2563YBGEVM-DC Bill of Materials

1. Export Control Notice

Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled product restricted by other applicable national regulations, received from disclosing party under nondisclosure obligations (if any), or any direct product of such technology, to any destination to which such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S. Department of Commerce and other competent Government authorities to the extent required by those laws.

Trademarks

PurePath is a trademark of Texas Instruments. Microsoft, Windows are registered trademarks of Microsoft Corporation. All other trademarks are the property of their respective owners.

2. Description

The TAS2563YBGEVM-DC is designed to demonstrate the performance of the TAS2563 in a stereo configuration. It utilizes the PPC3-EVM-MB hardware to provide an interface and supply voltages to the EVM. The TAS2563 is a mono, digital-input, Class-D audio amplifier optimized for efficiently driving high peak power into small loudspeaker applications. The Class-D amplifier is capable of delivering 6W of peak power into a 4 Ω load at a battery voltage of 4.2 V. Integrated speaker voltage and current sense provides real-time monitoring of loudspeakers. Up to four devices can share a common bus via I2S/TDM + I2C interfaces. The TAS2563 also allows the user to generate speaker tuning profiles to achieve optimal sound while actively providing protection against over temperature and over excursion events.

The TAS2563YBGEVM-DC, used in conjunction with the PPC3-EVM-MB, supports evaluation and development with the TAS2563 device through the following interfaces:

  • USB Interface
  • Software control via PurePath™ Console 3 (PPC 3) GUI, USB-HID
  • USB-class audio device, compatible with Microsoft® Windows® 7+
  • External 100-mil headers
  • I2S/TDM interface
  • I2C interface
  • Hardware Shutdown Control
  • Interrupt Output

Note: Please refer to the PPC3-EVM-MB User's Guide (SLEU120) for detailed configuration details.

3. Specifications

Table 1 lists the supply, input, and output requirements for the TAS2563YBG.

Parameter Value
Supply Voltage - VBAT 2.7 to 5.5 V
Supply Voltage - VDD 1.65 to 1.95 V
Supply Voltage - PVDD (external mode only) VBAT to 16 V
Input Logic VDD
Output Power 6 W
Interface (USB) Micro-USB

4. Software

The TAS2563 can be easily configured with PPC3 running the TAS2563 plug-in. To request access to the software, first request a myTI.com account here.

After creating an account, navigate to the TAS2563 product page and follow the link in the information box to request access to the software.

Figure 1. Requesting PPC3 Access: Shows a screenshot of the myTI.com website, highlighting the path to request access to the TAS2563 software and design resources.

Note: PPC3-EVM-MB supports a VBAT range from 4.5 to 26 V. To apply a VBAT supply in the range of 2.7 to 4.5 V, it is highly recommended to remove Jumpers J1 and J10 and to apply this voltage directly to pin 2 of the respective header while simultaneously powering PPC3-EVM-MB with 5 V. Otherwise, it is possible that on-board supplies may collapse.

5. Device Configuration

The default configuration for the TAS2563 is described below in Table 2 and Figure 2.

5.1 Default Jumper Settings

Jumper Setting Description
J3RemoveOutput 2 Sense
J11RemoveOutput 1 Sense
J16InsertEEPROM Write Protect
J18I2CControl Select
J170x9ACh 2 Address Select
J4InsertVDD 2
J5InsertIOVDD 2
J1InsertVBAT 2
J9 - DataRemovePDM Data 2
J9 - CLKRemovePDM Clock 2
J8 - 2InsertGPIO Select 2
J190x98Ch 1 Address Select
J12InsertVDD 1
J13InsertIOVDD 1
J10InsertVBAT 1
J15 - DataRemovePDM Data 1
J15 - CLKRemovePDM Clock 1
J8 - 1InsertGPIO Select 1
Figure 2. Default Jumper Settings: A top-down view of the TAS2563YBGEVM-DC evaluation module PCB, indicating the location of various jumpers and their default settings.

5.2 Mono Setup

Use the following instructions to complete a mono setup:

  1. Install PPC3 with the TAS2563 plug-in.
  2. Connect a speaker to J14 on the TAS2563YBGEVM-DC.
  3. Remove the jumpers at J1, J4, and J5 as shown in Figure 3.
Figure 3. Mono Setup: A top-down view of the TAS2563YBGEVM-DC evaluation module PCB, highlighting specific jumpers (J1, J4, J5) that should be removed for a mono setup.

4. Set the jumper at J19 to the desired I²C address as shown in the figures.

5. Configure PPC3-EVM-MB as described in SLEU120 (PPC3-EVM-MB User's Guide), selecting one of the following:

  • USB control for I2C
  • USB control for I2S
  • 3.3 V I2C
  • 3.3 V I2S
  • 1.8 V IOVDD

6. Connect a 5V supply to connector J12 or J11 on PPC3-EVM-MB.

7. Connect a Micro USB Cable from PC to PPC3-EVM-MB.

8. Verify that TI USB Audio UAC2.0 is the default playback device by opening the sound dialog from the Windows Control Panel.

Figure 4. Windows Playback Devices: A screenshot of the Windows Sound control panel, showing the "Playback" tab with "TI USB Audio UAC2.0" selected as the default playback device.

9. Set the maximum bit depth using the Texas Instruments USB Audio Device Control Panel found in the system tray.

Figure 5. Texas Instruments USB Audio Device Control Panel: A screenshot of the Texas Instruments USB Audio Device Control Panel, showing the "Status" tab with input and output channel and bit depth settings.

10. Set the sampling rate:

  • Right-click TI USB Audio UAC2.0.
  • Select Properties.
  • Click the Advanced tab.
  • Select Rate.
Figure 6. Windows Playback device Sample Rate: A screenshot of the Windows "Speakers Properties" dialog, specifically the "Advanced" tab, where the sample rate and bit depth can be selected.

11. Configure the device using the TAS2563 PPC3 Plug-in.

5.3 Stereo Setup

Use the following instructions to complete a stereo setup:

  1. Install PPC3 with the TAS2563 plug-in.
  2. Connect a speaker to both J14 and J6 on the TAS2563YBGEVM-DC.
  3. Set the jumpers at J19 and J17 to the unique I²C address as shown in the figures.
Figure 7. Stereo Setup: A top-down view of the TAS2563YBGEVM-DC evaluation module PCB, indicating specific jumpers (J19, J17) that should be set for a stereo setup.

4. Configure PPC3-EVM-MB as described in SLEU120 (PPC3-EVM-MB User's Guide), selecting one of the following:

  • USB control for I2C
  • USB control for I2S
  • 3.3 V I2C
  • 3.3 V I2S
  • 1.8 V IOVDD

5. Connect a 5V supply to connector J12 or J11 on PPC3-EVM-MB.

6. Connect a Micro USB Cable from PC to PPC3-EVM-MB.

7. Verify that TI USB Audio UAC2.0 is the default playback device by opening the sound dialog from the Windows Control Panel.

Figure 8. Windows Playback Devices: A screenshot of the Windows Sound control panel, showing the "Playback" tab with "TI USB Audio UAC2.0" selected as the default playback device.

8. Set the maximum bit depth using the Texas Instruments USB Audio Device Control Panel found in the system tray.

Figure 9. Texas Instruments USB Audio Device Control Panel: A screenshot of the Texas Instruments USB Audio Device Control Panel, showing the "Status" tab with input and output channel and bit depth settings.

9. Set the sampling rate:

  • Right-click TI USB Audio UAC2.0.
  • Select Properties.
  • Click the Advanced tab.
  • Select Rate.
Figure 10. Windows Playback device Sample Rate: A screenshot of the Windows "Speakers Properties" dialog, specifically the "Advanced" tab, where the sample rate and bit depth can be selected.

10. Configure the device using the TAS2563 PPC3 Plug-in.

6. Digital Audio Interfaces

Select the various digital audio interfaces on the TAS2563YBGEVM-DC through hardware settings and software settings. Several headers on PPC3-EVM-MB allow access to the following digital audio signals:

  • I2S Data out (SDOUT) from the TAS2563 (for example, current and voltage sense data)
  • I2S Data in (SDIN) to the TAS2563
  • I2S Word clock or frame sync (FSYNC)
  • I2S Bit clock (SBCLK)
  • I2C Clock (SCLK)
  • I2C Data (SDA)

The selection between USB (internal) and external inputs is set using the control header on PPC3-EVM-MB. Please refer to the PPC3-EVM-MB User's Guide for detailed configuration settings.

7. EVM Schematics

The following figures illustrate the schematics and board connections for the evaluation module.

Figure 11. Mother Board Connections: A block diagram illustrating the mother board connections for the evaluation module, showing interfaces like I2C, SPI, USB, and connections to various ICs.
Figure 12. Channel 1: A schematic diagram showing the signal routing and connections for Channel 1 of the TAS2563YBGEVM-DC.
Figure 13. Channel 2: A schematic diagram showing the signal routing and connections for Channel 2 of the TAS2563YBGEVM-DC.

8. EVM Layer Plots

The following figures show the different layers of the Printed Circuit Board (PCB) for the TAS2563YBGEVM-DC.

Figure 14. TAS2563YBGEVM-DC Top Assembly: An illustration of the top assembly of the TAS2563YBGEVM-DC PCB, showing component placement.
Figure 15. TAS2563YBGEVM-DC Top Silk Screen: An illustration of the top silk screen layer of the TAS2563YBGEVM-DC PCB.
Figure 16. TAS2563YBGEVM-DC Top Solder Mask: An illustration of the top solder mask layer of the TAS2563YBGEVM-DC PCB.
Figure 17. TAS2563YBGEVM-DC Top Copper: An illustration of the top copper layer of the TAS2563YBGEVM-DC PCB.
Figure 18. TAS2563YBGEVM-DC Copper Layer 2: An illustration of the second copper layer (Copper Layer 2) of the TAS2563YBGEVM-DC PCB.
Figure 19. TAS2563YBGEVM-DC Copper Layer 3: An illustration of the third copper layer (Copper Layer 3) of the TAS2563YBGEVM-DC PCB.
Figure 20. TAS2563YBGEVM-DC Copper Layer 4: An illustration of the fourth copper layer (Copper Layer 4) of the TAS2563YBGEVM-DC PCB.
Figure 21. TAS2563YBGEVM-DC Copper Layer 5: An illustration of the fifth copper layer (Copper Layer 5) of the TAS2563YBGEVM-DC PCB.
Figure 22. TAS2563YBGEVM-DC Bottom Copper: An illustration of the bottom copper layer of the TAS2563YBGEVM-DC PCB.
Figure 23. TAS2563YBGEVM-DC Bottom Solder: An illustration of the bottom solder mask layer of the TAS2563YBGEVM-DC PCB.
Figure 24. TAS2563YBGEVM-DC Bottom Silk Screen: An illustration of the bottom silk screen layer of the TAS2563YBGEVM-DC PCB.
Figure 25. TAS2563YBGEVM-DC Bottom Assembly: An illustration of the bottom assembly of the TAS2563YBGEVM-DC PCB, showing component placement.

9. Bill of Materials

Table 3 lists the components used in the TAS2563YBGEVM-DC evaluation module.

Table 3. TAS2563YBGEVM-DC Bill of Materials

Designator Quantity Value Description Package Reference Part Number Manufacturer Alternate Part Number (1) Alternate Manufacturer (1)
!PCB11Printed Circuit Board3.2x1.7 mmAMPS063Any
C2, C3, C13, C18, C19, C28610μFCAP, TA, 10 μF, 25 V, ±10%, 2 ohm, SMD3.2x1.7 mmF951E106KAAAQ2AVX
C4, C15, C16, C30, C31, C32, C33, C34, C35, C36, C37, C38, C39, C40, C41, C42, C43170.1μFCAP, CERM, 0.1 μF, 25 V, ±10%, X7R, AEC-Q200 Grade 1, 04020402CGA2B3X7R1E10 4K050BBTDK
C8, C2324.7μFCAP, CERM, 4.7 uF, 10 V, ±10%, X5R, 06030603CGB3B1X5R1A47 5K055ACTDK
C10, C14, C25, C2941μFCAP, CERM, 1 μF, 16 V, ±20%, X7R, 06030603CL10B105MO8 NNWCSamsung
C11, C2621μFCAP, CERM, 1 μF, 16 V, ±20%, X5R, 04020402CL05A105MO5 NNNCSamsung Electro-Mechanics
J1, J3, J4, J5, J10, J11, J12, J13, J169Header, 100 mil, 2x1, Gold, THSullins 100 mil, 1x2, 230 mil above insulatorPBC02 SAANSullins Connector Solutions
J2, J72Receptacle, 2.54 mm, 20x2, Gold, THReceptacle, 2.54 mm, 20x2, THSSQ-120-23-G-DSamtec
J6, J142Conn Term Block, 2POS, 3.81 mm, TH2POS Terminal Block1727010Phoenix Contact
J8, J9, J153Header, 2.54 mm, 2x2, Gold, THHeader, 2.54 mm, 2x2, THPBC02DAANSullins Connector Solutions
J17, J192Header, 100 mil, 4x2, Tin, THHeader, 4x2, 100 mil, TinPEC04DAANSullins Connector Solutions
J181Header, 100 mil, 3x1, Gold, THPBC03 SAANPBC03 SAANSullins Connector Solutions
L1, L221μHInductor, Shielded, Metal Composite, 1 μH, 3.3 A, 0.04 Ω, SMD2.5x1.2x2 mmDFE252012F-1R0M = P2MuRata Toko
LS1, LS22Dynamic Speaker 24x24 mm24x24 mmSPS0916B-J-01AAC Technologies
R1, R7, R13, R14, R15, R16, R17710.0kΩRES, 10.0 k, 1%, 0.063 W, AEC-Q200 Grade 0, 04020402RMCF0402FT10K0Stackpole Electronics Inc
R3, R4, R9, R1040RES, 0, 5%, 0.125 W, 08050805RC0805 JR-070RLYageo America
R5, R6, R11, R1240RES, 0, 5%, 0.063 W, 04020402ERJ-2 GE0R00XPanasonic
R8, R18, R19, R20, R2150RES, 0, 5%, 0.1 W, 06030603ERJ-3 GEY0R00VPanasonic
SH-J1, SH-J2, SH-J3, SH-J4, SH-J5, SH-J6, SH-J7, SH-J8, SH-J9, SH-J10, SH-J11, SH-J12121x2Shunt, 100 mil, Gold plated, BlackShuntSNT-100-BK-GSamtec969102-0000-DA3M
TP1, TP62Test Point, Compact, Red, THRed Compact Testpoint5005Keystone
TP2, TP3, TP4, TP54Test Point, Miniature, Black, THBlack Miniature Testpoint5001Keystone
U1, U226 W BOOSTED CLASS-D AMPLIFIER WITH IV-SENSE, WCSP-42WCSP 0.4 mm PitchTAS2563YBGTexas InstrumentsTexas Instruments
U31512K I2C Serial EEPROM, TSSOPTSSOP-824FC512-I/STMicrochip
U41Single Bus Buffer Gate With 3-State Outputs, DCK0005A, LARGE T&RDCK0005ASN74 LVC1 G125DCKRTexas Instruments
U5, U6, U7, U8, U9, U10, U11, U12, U13, U14, U15, U1712Low-Voltage Single FET Bus Switch, DCK0005A, LARGE T&RDCK0005ASN74CBTLV1 G125DCKRTexas InstrumentsSN74 LVC1 G14DCKTTexas Instruments
U161Single Schmitt-Trigger Inverter, DCK0005A (SOT-SC70-5)DCK0005ASN74 LVC1 G14DCKRTexas Instruments
C1, C1700.1μFCAP, CERM, 0.1 μF, 25 V, ±10%, X7R, AEC-Q200 Grade 1, 04020402CGA2B3X7R1E10 4K050BBTDK
C5, C6, C20, C21, C46, C47, C48, C49, C50, C5101μFCAP, CERM, 1 μF, 16 V, ±20%, X7R, 06030603CL10B105MO8 NNWCSamsung
C7, C9, C22, C24, C44, C4500.01μFCAP, CERM, 0.01 µF, 25 V, ±10%, X7R, 04020402GCM155R71E103 KA37DMuRata
C12, C27010μFCAP, TA, 10 μF, 25 V, ±10%, 2 Ω, SMD3.2x1.7 mmF951E106KAAAQ2AVX
D105.6 VDiode, Zener, 5.6 V, 5 W, SMBSMBSMBJ5339B-TPMicro Commercial Components
FID1, FID2, FID3, FID4, FID5, FID60Fiducial mark. There is nothing to buy or mount.N/AN/AN/A
R2, R22, R23, R2400RES, 0, 5%, 0.1 W, AEC-Q200 Grade 0, 06030603ERJ-3 GEY0R00VPanasonic
R250100kΩRES, 100 k, 5%, 0.1 W, AEC-Q200 Grade 0, 04020402ERJ-2 GEJ104XPanasonic

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