Vishay Intertechnology: Passives & Discrete Semiconductorsvishay.com/doc?91000vishay.com/doc?99912
Owner's Manual for VISHAY models including: IRFP460B, SiHG460B, D Series Power MOSFET, D Series, Power MOSFET, MOSFET
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DocumentDocumentwww.vishay.com IRFP460B, SiHG460B Vishay Siliconix D Series Power MOSFET PRODUCT SUMMARY VDS (V) at TJ max. RDS(on) max. at 25 °C () Qg max. (nC) Qgs (nC) Qgd (nC) Configuration 550 VGS = 10 V 170 14 28 Single 0.25 D TO-247AC G S D G S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free Lead (Pb)-free and Halogen-free FEATURES · Optimal Design - Low Area Specific On-Resistance - Low Input Capacitance (Ciss) - Reduced Capacitive Switching Losses - High Body Diode Ruggedness - Avalanche Energy Rated (UIS) · Optimal Efficiency and Operation - Low Cost - Simple Gate Drive Circuitry - Low Figure-of-Merit (FOM): Ron x Qg - Fast Switching · Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 Note * Lead (Pb)-containing terminations are not RoHS-compliant. Exemptions may apply. APPLICATIONS · Consumer Electronics - Displays (LCD or Plasma TV) · Server and Telecom Power Supplies - SMPS · Industrial - Welding - Induction Heating - Motor Drives · Battery Chargers · SMPS - Power Factor Correction (PFC) TO-247AC IRFP460BPbF SiHG460B-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-Source Voltage VDS Gate-Source Voltage Gate-Source Voltage AC (f > 1 Hz) VGS Continuous Drain Current (TJ = 150 °C) Pulsed Drain Currenta Linear Derating Factor VGS at 10 V TC = 25 °C TC = 100 °C ID IDM Single Pulse Avalanche Energyb Maximum Power Dissipation Operating Junction and Storage Temperature Range Drain-Source Voltage Slope Reverse Diode dV/dtd TJ = 125 °C EAS PD TJ, Tstg dV/dt Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 10 mH, Rg = 25 , IAS = 7.5 A. c. 1.6 mm from case. d. ISD ID, starting TJ = 25 °C. LIMIT 500 ± 20 30 20 13 62 2.2 281 278 - 55 to + 150 24 0.36 300c UNIT V A W/°C mJ W °C V/ns °C S12-0812-Rev. B, 16-Apr-12 1 Document Number: 91502 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com IRFP460B, SiHG460B Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL Maximum Junction-to-Ambient Maximum Junction-to-Case (Drain) RthJA RthJC TYP. - MAX. 40 0.45 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) Gate-Source Leakage VDS VDS/TJ VGS(th) IGSS Zero Gate Voltage Drain Current IDSS Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective output capacitance, energy relateda Effective output capacitance, time relatedb Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Input Resistance Drain-Source Body Diode Characteristics RDS(on) gfs Ciss Coss Crss Co(er) Co(tr) Qg Qgs Qgd td(on) tr td(off) tf Rg Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM VGS = 0 V, ID = 250 A Reference to 25 °C, ID = 250 A VDS = VGS, ID = 250 A VGS = ± 20 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 10 A VDS = 50 V, ID = 10 A 500 - - 0.56 2 - - - - - - - - 0.2 - 12 VGS = 0 V, VDS = 100 V, f = 1 MHz - 3094 - 152 - 13 VGS = 0 V, VDS = 0 V to 400 V - 131 - 189 - 85 VGS = 10 V ID = 10 A, VDS = 400 V - 14 - 28 - 24 VDD = 400 V, ID = 10 A, VGS = 10 V, Rg = 9.1 - 31 - 117 - 56 f = 1 MHz, open drain - 1.8 MOSFET symbol showing the integral reverse p - n junction diode D G S - - - - Diode Forward Voltage VSD TJ = 25 °C, IS = 10 A, VGS = 0 V - - Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current trr Qrr IRRM TJ = 25 °C, IF = IS = 10 A, dI/dt = 100 A/s, VR = 20 V - 437 - 5.9 - 25 Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS. MAX. UNIT 4 ± 100 1 10 0.25 - V V/°C V nA A S - - pF - - 170 - nC - 50 62 ns 176 112 - 20 A 80 1.2 V - ns - C - A S12-0812-Rev. B, 16-Apr-12 2 Document Number: 91502 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) IRFP460B, SiHG460B Vishay Siliconix ID, Drain-to-Source Current (A) 80 TOP 15 V 14 V 13 V 12 V 1111 VV 60 10 V 9 V 8 V 7 V 6 V BOTTOM 5 V 40 TJ = 25 °C 20 0 0 5 10 15 20 25 30 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics 40 TOP 15 V 14 V 13 V 12 V 1111 VV 30 10 V 9 V 8 V 7 V 6 V BOTTOM 5 V 20 TJ = 150 °C 10 0 0 5 10 15 20 25 30 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) 3 2.5 ID = 10 A 2 1.5 1 VGS = 10 V 0.5 0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature Capacitance (pF) 10 000 1000 Ciss 100 Coss VGS = 0 V, f = 1 MHz Ciss Crss = = Cgs Cgd + Cgd, Cds Shorted Coss = Cds + Cgd 10 Crss 1 0 100 200 300 400 500 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage ID, Drain-to-Source Current (A) VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A) 80 TJ = 25 °C 60 TJ = 150 °C 40 24 VDS = 400 V 20 VDS = 250 V VDS = 100 V 16 12 8 20 4 0 0 5 10 15 20 25 VGS, Gate-to-Source Voltage (V) 0 0 30 60 90 120 150 180 Qg, Total Gate Charge (nC) Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S12-0812-Rev. B, 16-Apr-12 3 Document Number: 91502 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. ISD, Reverse Drain Current (A) ID, Drain Current (A) www.vishay.com IRFP460B, SiHG460B Vishay Siliconix 100 TJ = 150 °C 10 TJ = 25 °C 1 0.1 0.2 VGS = 0 V 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-Drain Voltage (V) Fig. 7 - Typical Source-Drain Diode Forward Voltage 1000 100 Operation in this area limited by RDS(on) 10 100 s Limited by RDS(on)* 1 TC = 25 °C TJ = 150 °C Single Pulse 0.1 1 ms BVDSS Limited 10 ms 1 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 8 - Maximum Safe Operating Area VDS, Drain-to-Source Brakdown Voltage (V) 20 16 ID, Drain Current (A) 12 8 4 0 25 50 75 100 125 150 TJ, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature 625 600 575 550 525 500 475 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 10 - Temperature vs. Drain-to-Source Voltage Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.02 0.05 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case S12-0812-Rev. B, 16-Apr-12 4 Document Number: 91502 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com VDS VGS RG RD D.U.T. 10 V Pulse width 1 µs Duty factor 0.1 % +- VDD Fig. 12 - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 13 - Switching Time Waveforms VDS Vary tp to obtain required IAS RG 10 V tp L D.U.T IAS 0.01 + - VDD Fig. 14 - Unclamped Inductive Test Circuit VDS VDS tp VDD IAS Fig. 15 - Unclamped Inductive Waveforms IRFP460B, SiHG460B Vishay Siliconix 10 V QGS VG QG QGD Charge Fig. 16 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. 12 V 50 k 0.2 µF 0.3 µF + D.U.T. - VDS VGS 3 mA IG ID Current sampling resistors Fig. 17 - Gate Charge Test Circuit S12-0812-Rev. B, 16-Apr-12 5 Document Number: 91502 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com IRFP460B, SiHG460B Vishay Siliconix D.U.T. + - Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations · Low stray inductance · Ground plane · Low leakage inductance current transformer - - + Rg · dV/dt controlled by Rg + · Driver same type as D.U.T. · ISD controlled by duty factor "D" - VDD · D.U.T. - device under test Driver gate drive P.W. Period D = P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Body diode forward drop Inductor current Ripple 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 18 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91502. S12-0812-Rev. B, 16-Apr-12 6 Document Number: 91502 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com Package Information Vishay Siliconix TO-247AC (High Voltage) VERSION 1: FACILITY CODE = 9 DIM. A A1 A2 b b1 b2 b3 b4 b5 c c1 D MILLIMETERS MIN. NOM. 4.83 5.02 2.29 2.41 1.17 1.27 1.12 1.20 1.12 1.20 1.91 2.00 1.91 2.00 2.87 3.00 2.87 3.00 0.40 0.50 0.40 0.50 20.40 20.55 MAX. 5.21 2.55 1.37 1.33 1.28 2.39 2.34 3.22 3.18 0.60 0.56 20.70 NOTES 6 6, 8 6 4 DIM. D1 D2 E E1 E2 e L L1 Ø P Ø P1 Q S MIN. 16.46 0.56 15.50 13.46 4.52 14.90 3.96 3.56 5.31 MILLIMETERS NOM. 16.76 0.66 15.70 14.02 4.91 5.46 BSC 15.15 4.06 3.61 7.19 ref. 5.50 5.51 BSC MAX. 17.06 0.76 15.87 14.16 5.49 15.40 4.16 3.65 5.69 NOTES 5 4 5 3 6 7 Notes (1) Package reference: JEDEC® TO247, variation AC (2) All dimensions are in mm (3) Slot required, notch may be rounded (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outermost extremes of the plastic body (5) Thermal pad contour optional with dimensions D1 and E1 (6) Lead finish uncontrolled in L1 (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4 dimension at maximum material condition Revision: 31-Oct-2022 1 Document Number: 91360 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com VERSION 2: FACILITY CODE = Y B 3 R/2 Q 4 E E/2 S 2 x R (2) D 12 3 5 L1 C L 2 x b2 3 x b 2x e b4 0.10 M C A M Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain See view B Package Information Vishay Siliconix A A2 A 4 D A 7 ØP Ø k M DBM D2 (Datum B) ØP1 4 D1 4 Thermal pad A C A1 D DE E CC View B Planting 4 E1 0.01 M D B M View A - A (b1, b3, b5) Base metal (c) c1 (b, b2, b4) (4) Section C - C, D - D, E - E DIM. A A1 A2 b b1 b2 b3 b4 b5 c c1 D D1 MILLIMETERS MIN. MAX. 4.58 5.31 2.21 2.59 1.17 2.49 0.99 1.40 0.99 1.35 1.53 2.39 1.65 2.37 2.42 3.43 2.59 3.38 0.38 0.86 0.38 0.76 19.71 20.82 13.08 - NOTES DIM. D2 E E1 e Ø k L L1 Ø P Ø P1 Q R S MILLIMETERS MIN. MAX. 0.51 1.30 15.29 15.87 13.72 - 5.46 BSC 0.254 14.20 16.25 3.71 4.29 3.51 3.66 - 7.39 5.31 5.69 4.52 5.49 5.51 BSC NOTES Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c Revision: 31-Oct-2022 2 Document Number: 91360 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com VERSION 3: FACILITY CODE = N B R/2 E N Q R S D Package Information Vishay Siliconix D2 A A P1 P A2 D c1 D1 K M DBM L1 C b2 b b4 e 0.10 M C A M L C A1 Base metal E1 0.01 M D B M b1, b3, b5 c Plating b, b2, b4 MILLIMETERS MILLIMETERS DIM. MIN. A 4.65 A1 2.21 A2 1.17 b 0.99 b1 0.99 b2 1.65 b3 1.65 b4 2.59 b5 2.59 c 0.38 c1 0.38 D 19.71 D1 13.08 ECN: E22-0452-Rev. G, 31-Oct-2022 DWG: 5971 MAX. 5.31 2.59 1.37 1.40 1.35 2.39 2.34 3.43 3.38 0.89 0.84 20.70 - DIM. D2 E E1 e k L L1 N P P1 Q R S MIN. 0.51 15.29 13.46 14.20 3.71 3.56 - 5.31 4.52 5.46 BSC 0.254 7.62 BSC 5.51 BSC MAX. 1.35 15.87 - 16.10 4.29 3.66 7.39 5.69 5.49 Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") Revision: 31-Oct-2022 3 Document Number: 91360 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com Disclaimer Legal Disclaimer Notice Vishay ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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