1. Overview1. Overview1. About the Nios® V Embedded Processor1. About the Nios® V Embedded Processor1. Overview of Nios® V Embedded Processor Development1. Overview of Nios® V Embedded Processor Development
User Guide for intel models including: Nios V Processor FPGA IP, Processor FPGA IP, FPGA IP
2.1. Nios V/m Processor Intel FPGA IP v22.4.0
4.1.1. Nios V Processor Reference Manual Archives
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DocumentDocumentNios® V Processor Intel® FPGA IP Release Notes Updated for Intel® Quartus® Prime Design Suite: 22.4 Online Version Send Feedback ID: 683098 Version: 2022.12.19 Contents Contents 1. Nios® V Processor Intel® FPGA IP Release Notes............................................................ 3 2. Nios® V/m Processor Intel FPGA IP (Intel Quartus Prime Pro Edition) Release Notes.... 4 2.1. Nios® V/m Processor Intel FPGA IP v22.4.0...............................................................4 2.2. Nios V/m Processor Intel FPGA IP v22.3.0.................................................................4 2.3. Nios V/m Processor Intel FPGA IP v21.3.0.................................................................4 2.4. Nios V/m Processor Intel FPGA IP v21.2.0.................................................................5 2.5. Nios V/m Processor Intel FPGA IP v21.1.1.................................................................5 2.6. Nios V/m Processor Intel FPGA IP v21.1.0.................................................................5 3. Nios V/m Processor Intel FPGA IP (Intel Quartus Prime Standard Edition) Release Notes......................................................................................................................... 6 3.1. Nios V/m Processor Intel FPGA IP v1.0.0...................................................................6 4. Archives.......................................................................................................................... 7 4.1. Intel Quartus Prime Pro Edition................................................................................7 4.1.1. Nios V Processor Reference Manual Archives..................................................7 4.1.2. Nios V Embedded Processor Design Handbook Archives.................................. 7 4.1.3. Nios V Processor Software Developer Handbook Archives................................ 7 4.2. Intel Quartus Prime Standard Edition....................................................................... 7 Nios® V Processor Intel® FPGA IP Release Notes 2 Send Feedback 683098 | 2022.12.19 Send Feedback 1. Nios® V Processor Intel® FPGA IP Release Notes The Intel® FPGA IP version (X.Y.Z) number can change with each Intel Quartus® Prime software version. A change in: · X indicates a major revision of the IP. If you update the Intel Quartus Prime software, you must regenerate the IP. · Y indicates the IP includes new features. Regenerate your IP to include these new features. · Z indicates the IP includes minor changes. Regenerate your IP to include these changes. Related Information · Nios V Processor Reference Manual Provides information about the Nios V processor performance benchmarks, processor architecture, the programming model, and the core implementation (Intel Quartus Prime Pro Edition User Guide). · Nios II and Embedded IP Release Notes · Nios V Embedded Processor Design Handbook Describes how to most effectively use the tools, recommends design styles, and practices for developing, debugging, and optimizing embedded systems using the Nios® V processor and Intel-provided tools (Intel Quartus Prime Pro Edition User Guide). · Nios® V Processor Software Developer Handbook Describes the Nios® V processor software development environment, the tools that are available, and the process to build software to run on Nios® V processor (Intel Quartus Prime Pro Edition User Guide). Intel Corporation. All rights reserved. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Intel warrants performance of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. *Other names and brands may be claimed as the property of others. ISO 9001:2015 Registered 683098 | 2022.12.19 Send Feedback 2. Nios® V/m Processor Intel FPGA IP (Intel Quartus Prime Pro Edition) Release Notes 2.1. Nios® V/m Processor Intel FPGA IP v22.4.0 Table 1. v22.4.0 2022.12.19 Intel Quartus Prime Version Description 22.4 · Migrated the Nios® V processor example designs to the Intel FPGA - Design Store. · Enabled Zephyr RTOS in the Nios V/m processor. Impact 2.2. Nios V/m Processor Intel FPGA IP v22.3.0 Table 2. v22.3.0 2022.09.26 Intel Quartus Prime Version Description Impact 22.3 · Enhanced prefetch logic. Updated the following performance and - benchmark numbers: -- FMAX -- Area -- Dhrystone -- CoreMark · Remove exceptionOffset and exceptionAgent parameters from _hw.tcl. Note: Only impacted BSP generation. No impact on RTL or circuit. · Changed debug reset: -- Added ndm_reset_in port -- Renamed dbg_reset to dbg_reset_out. 2.3. Nios V/m Processor Intel FPGA IP v21.3.0 Table 3. v21.3.0 2022.06.21 Intel Quartus Prime Version Description 22.2 · Added a reset request interface - · Removed unused signals that caused a latch interface · Fixed debug reset issue: -- Updated the routing of ndmreset to prevent the debug module from resetting. Impact Intel Corporation. All rights reserved. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Intel warrants performance of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. *Other names and brands may be claimed as the property of others. ISO 9001:2015 Registered 2. Nios® V/m Processor Intel FPGA IP (Intel Quartus Prime Pro Edition) Release Notes 683098 | 2022.12.19 2.4. Nios V/m Processor Intel FPGA IP v21.2.0 Table 4. v21.2.0 2022.04.04 Intel Quartus Prime Version Description 22.1 · Added new design examples in the Nios V/m Processor Intel - FPGA IP core parameter editor: -- uC/TCP-IP IPerf Example Design -- uC/TCP-IP Simple Socket Server Example Design · Bug Fix: - -- Addressed issues causing unreliable accesses to the MARCHID, MIMPID, and MVENDORID CSRs. -- Enabled reset capability from the debug module to allow the core to be reset through a debugger. -- Enabled support for trigger. The Nios V processor core supports 1 trigger. -- Addressed reported synthesis warnings and lint issues. -- Addressed an issue from the debug ROM that caused a corruption in the return vector. -- Fixed an issue which prevented access to GPR 31 from the debug module. Impact 2.5. Nios V/m Processor Intel FPGA IP v21.1.1 Table 5. v21.1.1 2021.12.13 Intel Quartus Prime Version Description Impact 21.4 · Bug Fix: Illegal instruction exception -- Trigger registers accessible but triggers were not supported prompted when accessing issue fixed. trigger registers. · Added new Design Example in the Nios V/m Processor Intel - FPGA IP core parameter editor. -- GSFI Bootloader Example Design -- SDM Bootloader Example Design 2.6. Nios V/m Processor Intel FPGA IP v21.1.0 Table 6. v21.1.0 2021.10.04 Intel Quartus Prime Version Description 21.3 Initial Release - Impact Send Feedback Nios® V Processor Intel® FPGA IP Release Notes 5 683098 | 2022.12.19 Send Feedback 3. Nios V/m Processor Intel FPGA IP (Intel Quartus Prime Standard Edition) Release Notes 3.1. Nios V/m Processor Intel FPGA IP v1.0.0 Table 7. v1.0.0 2022.10.31 Intel Quartus Prime Version 22.1std Initial release. Description Impact - Intel Corporation. All rights reserved. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Intel warrants performance of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. *Other names and brands may be claimed as the property of others. ISO 9001:2015 Registered 683098 | 2022.12.19 Send Feedback 4. Archives 4.1. Intel Quartus Prime Pro Edition 4.1.1. Nios V Processor Reference Manual Archives For the latest and previous versions of this user guide, refer to Nios® V Processor Reference Manual. If an IP or software version is not listed, the user guide for the previous IP or software version applies. IP versions are the same as the Intel Quartus Prime Design Suite software versions up to v19.1. From Intel Quartus Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme. 4.1.2. Nios V Embedded Processor Design Handbook Archives For the latest and previous versions of this user guide, refer to Nios® V Embedded Processor Design Handbook. If an IP or software version is not listed, the user guide for the previous IP or software version applies. IP versions are the same as the Intel Quartus Prime Design Suite software versions up to v19.1. From Intel Quartus Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme. 4.1.3. Nios V Processor Software Developer Handbook Archives For the latest and previous versions of this user guide, refer to Nios® V Processor Software Developer Handbook. If an IP or software version is not listed, the user guide for the previous IP or software version applies. IP versions are the same as the Intel Quartus Prime Design Suite software versions up to v19.1. From Intel Quartus Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme. 4.2. Intel Quartus Prime Standard Edition Refer to the following user guides for information about the Nios V processor for the Intel Quartus Prime Standard Edition. Related Information · Nios® V Embedded Processor Design Handbook Describes how to most effectively use the tools, recommends design styles, and practices for developing, debugging, and optimizing embedded systems using the Nios® V processor and Intel-provided tools (Intel Quartus Prime Standard Edition User Guide). Intel Corporation. All rights reserved. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Intel warrants performance of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. *Other names and brands may be claimed as the property of others. ISO 9001:2015 Registered 4. Archives 683098 | 2022.12.19 · Nios® V Processor Reference Manual Provides information about the Nios V processor performance benchmarks, processor architecture, the programming model, and the core implementation (Intel Quartus Prime Standard Edition User Guide). · Nios® V Processor Software Developer Handbook Describes the Nios® V processor software development environment, the tools that are available, and the process to build software to run on Nios® V processor (Intel Quartus Prime Standard Edition User Guide). Nios® V Processor Intel® FPGA IP Release Notes 8 Send Feedback