Overview
The CMT2300A is an ultra-low power, high-performance RF transceiver designed for applications operating from 140 to 1020 MHz. It supports OOK, (G)FSK, and (G)MSK modulation and is part of the CMOSTEK NextGenRF™ family. With high integration, it simplifies system design. The device offers +20 dBm transmit power and -121 dBm sensitivity, supporting various packet formats and coding schemes. It operates from 1.8 V to 3.6 V, consuming as little as 8.5 mA in ultra-low power receive mode at -121 dBm sensitivity, and 23 mA for 13 dBm transmit power.
Features
- Frequency Range: 140 to 1020 MHz
- Modulation: OOK, (G)FSK, and (G)MSK
- Data Rate: 0.5 to 300 kbps
- Sensitivity: -121 dBm at 2.0kbps (FRF = 433.92 MHz), -111 dBm at 50kbps (FRF = 433.92 MHz)
- Operating Voltage: 1.8 to 3.6 V
- Transmit Current: 23 mA @ 13 dBm (FSK, 433.92 MHz), 72 mA @ 20 dBm (FSK, 433.92 MHz)
- Receive Current: 8.5 mA @ 433.92 MHz (FSK, High Power), 7.2 mA @ 433.92 MHz (FSK, Low Power)
- Ultra-Low Power Receive Mode
- Sleep Current: 300 nA (DutyCycle = OFF), 800 nA (DutyCycle = ON)
- 4-wire SPI Interface
- Supports Direct and Packet Modes
- Configurable Packet Handler and 64-Byte FIFO
- NRZ, Manchester, Data Whitening Decoding
- Forward Error Correction (FEC)
- 16-pin QFN3x3 Package
Applications
- Automatic Meter Reading
- Home Security and Building Automation
- ISM Band Data Communication
- Industrial Monitoring and Control
- Remote Control and Security Systems
- Remote Keyless Entry
- Wireless Sensor Nodes
- Tag Readers
Electrical Characteristics
Recommended Operating Conditions
Parameter | Symbol | Condition | Min | Typical | Max | Unit |
---|---|---|---|---|---|---|
Operating Supply Voltage | VDD | 1.8 | 3.6 | V | ||
Operating Temperature | TOP | -40 | 85 | °C | ||
Supply Voltage Slew Rate | 1 | mV/us |
Absolute Maximum Ratings
Parameter | Symbol | Condition | Min | Max | Unit |
---|---|---|---|---|---|
Supply Voltage | VDD | -0.3 | 3.6 | V | |
Interface Voltage | VIN | -0.3 | 3.6 | V | |
Junction Temperature | TJ | -40 | 125 | °C | |
Storage Temperature | TSTG | -50 | 150 | °C | |
Soldering Temperature | TSDR | Duration at least 30s | 255 | °C | |
ESD Rating (HBM) | Human Body Model | -2 | 2 | kV | |
Latch-up Current | @ 85 °C | -100 | 100 | mA |
Note: Exceeding absolute maximum ratings may cause permanent damage. ESD sensitive device: Handle with appropriate ESD protection measures.
Power Consumption
Power consumption specifications for various operating modes are detailed in Table 3.
Parameter | Symbol | Condition | Typical | Unit |
---|---|---|---|---|
Sleep Current | ISLEEP | Sleep Mode, Sleep Timer Disabled | 300 | nA |
Sleep Current | ISLEEP | Sleep Mode, Sleep Timer Enabled | 800 | nA |
Standby Current | IStandby | Crystal Oscillator Enabled | 1.45 | mA |
RFS Current | IRFS | 433 MHz | 5.7 | mA |
TFS Current | ITFS | 433 MHz | 5.6 | mA |
RX Current (High Power) | IRx-HP | FSK, 433 MHz, 10 kbps, 10 kHz FDEV | 8.5 | mA |
RX Current (Low Power) | IRx-LP | FSK, 433 MHz, 10 kbps, 10 kHz FDEV | 7.2 | mA |
TX Current | ITx | FSK, 433 MHz, +13 dBm (Direct) | 23 | mA |
TX Current | ITx | FSK, 433 MHz, +20 dBm (Direct) | 72 | mA |
Full power consumption details are available in Table 3 of the document.
Receiver Specifications
Key receiver specifications are detailed in Table 4.
Parameter | Symbol | Condition | Typical | Unit |
---|---|---|---|---|
Data Rate | DR | OOK | 40 | kbps |
Data Rate | DR | FSK and GFSK | 300 | kbps |
Frequency Deviation | FDEV | FSK and GFSK | 200 | kHz |
Sensitivity @ 433 MHz | S433-HP | DR = 2.0 kbps, FDEV = 10 kHz | -121 | dBm |
Sensitivity @ 868 MHz | S868-HP | DR = 10 kbps, FDEV = 10 kHz (Low Power) | -111 | dBm |
Sensitivity @ 915 MHz | S915-HP | DR = 20 kbps, FDEV = 20 kHz (Low Power) | -109 | dBm |
Image Rejection | IMR | FRF=433 MHz | 35 | dBc |
IF Bandwidth | BW | 500 | kHz |
Refer to Table 4 for detailed receiver specifications.
Transmitter Specifications
Key transmitter specifications are detailed in Table 5.
Parameter | Symbol | Condition | Min | Typical | Max | Unit |
---|---|---|---|---|---|---|
Output Power | POUT | -20 | +20 | dBm | ||
Output Power Step | PSTEP | 1 | dB | |||
GFSK Gaussian Filter Coefficient | BT | 0.3 | 0.5 | 1.0 | ||
Output Power Variation with Temperature | POUT-TOP | 1 | dB | |||
Spurious Emissions | 1 GHz to 12.75 GHz, including harmonics | -42 | -36 | dBm | ||
Harmonics @ 433 MHz | H2433 | 2nd Harmonic, +20 dBm POUT | -46 | dBm | ||
Harmonics @ 868 MHz | H2868 | 2nd Harmonic, +20 dBm POUT | -43 | dBm | ||
Harmonics @ 915 MHz | H2868 | 2nd Harmonic, +20 dBm POUT | -48 | dBm |
Refer to Table 5 for detailed transmitter specifications, including harmonics at different power levels.
Pin Description
The CMT2300A is available in a 16-pin QFN package. The pinout is shown in Figure 1 and described in Table 12.
The diagram shows a top view of the 16-pin QFN package. Pins are numbered 1 to 17. Pin functions include RFIP, RFIN, PA, AVDD, AGND, DGND, DVDD, GPIO3, SCLK, SDIO, CSB, FCSB, XI, XO, GPIO2, GPIO1, and GND.
Pin No. | Name | I/O | Function Description |
---|---|---|---|
1 | RFIP | I | RF Signal Input P |
2 | RFIN | I | RF Signal Input N |
3 | PA | O | PA Output |
4 | AVDD | IO | Analog VDD |
5 | AGND | IO | Analog GND |
6 | DGND | IO | Digital GND |
7 | DVDD | IO | Digital VDD |
8 | GPIO3 | IO | Configurable as: CLKO, DOUT/DIN, INT2, DCLK (TX/RX) |
9 | SCLK | I | SPI Clock |
10 | SDIO | IO | SPI Data Input/Output |
11 | CSB | I | SPI Chip Select (Register) |
12 | FCSB | I | SPI Chip Select (FIFO) |
13 | XI | I | Crystal Input |
14 | XO | O | Crystal Output |
15 | GPIO2 | IO | Configurable as: INT1, INT2, DOUT/DIN, DCLK (TX/RX), RF_SWT |
16 | GPIO1 | IO | Configurable as: DOUT/DIN, INT1, INT2, DCLK (TX/RX), RF_SWT |
17 | GND | I | Analog GND, must be connected |
Note [1]: INT1 and INT2 are interrupts; DOUT is demodulated output; DIN is modulated input; DCLK is the clock for modulation or demodulation data rate synchronization, which automatically switches during TX/RX mode changes.
Typical Application Schematics
Two typical application schematics are provided: Direct Tie and RF Switch (Switch Type).
Direct (Direct Tie) Schematic
This circuit diagram shows the CMT2300A integrated circuit connected to external passive components (capacitors C1-C11, inductors L1-L8), a 26 MHz crystal oscillator (Y1), and an RF output connector (P1, SMA). It represents a basic RF front-end configuration.
Bill of Materials (13 dBm Direct Tie)
Table 13 lists the components for the 13 dBm Direct Tie configuration.
Component | Description | 433 MHz (+13 dBm) | 868 MHz (+13dBm) | 915 MHz (+13dBm) | Unit | Supplier |
---|---|---|---|---|---|---|
C1 | ±5%, 0603 NP0, 50 V | 15 | 22 | 22 | pF | |
C2 | ±5%, 0603 NP0, 50 V | 5.6 | 6.2 | 6.2 | pF | |
C3 | ±5%, 0603 NP0, 50 V | 7.5 | 3.6 | 3.3 | pF | |
C4 | ±5%, 0603 NP0, 50 V | 24 | 24 | 24 | pF | |
C5 | ±5%, 0603 NP0, 50 V | 24 | 24 | 24 | pF | |
C6 | ±5%, 0603 NP0, 50 V | 4.7 | 2.2 | 2.2 | pF | |
C7 | ±5%, 0603 NP0, 50 V | 4.7 | 2.2 | 2.2 | pF | |
C8 | ±5%, 0603 NP0, 50 V | 4.7 | uF | |||
C9 | ±5%, 0603 NP0, 50 V | 470 | pF | |||
C10 | ±5%, 0603 NP0, 50 V | 0.1 | uF | |||
C11 | ±5%, 0603 NP0, 50 V | 0.1 | uF | |||
L1 | ±5%, 0603叠层贴片电感 | 180 | 100 | 100 | nH | Sunlord SDCL |
L2 | ±5%, 0603叠层贴片电感 | 56 | 10 | 8.2 | nH | Sunlord SDCL |
L3 | ±5%, 0603叠层贴片电感 | 39 | 8.2 | 6.8 | nH | Sunlord SDCL |
L4 | ±5%, 0603叠层贴片电感 | 18 | 10 | 8.2 | nH | Sunlord SDCL |
L5 | ±5%, 0603叠层贴片电感 | 18 | 10 | 8.2 | nH | Sunlord SDCL |
L6 | ±5%, 0603叠层贴片电感 | 27 | 15 | 12 | nH | Sunlord SDCL |
L7 | ±5%, 0603叠层贴片电感 | 27 | 15 | 12 | nH | Sunlord SDCL |
L8 | ±5%, 0603叠层贴片电感 | 68 | 12 | 12 | nH | Sunlord SDCL |
Y1 | ±10 ppm, SMD32*25 mm | 26 | MHz | EPSON | ||
U1 | CMT2300A,Ultra-Low Power Sub-1GHz RF Transceiver | - | - | - | - | CMOSTEK |
Bill of Materials (20 dBm Direct Tie)
Table 14 lists the components for the 20 dBm Direct Tie configuration.
Component | Description | 433 MHz (+20 dBm) | 868 MHz (+20 dBm) | 915 MHz (+20 dBm) | Unit | Supplier |
---|---|---|---|---|---|---|
C1 | ±5%, 0603 NP0, 50 V | 15 | 18 | 18 | pF | |
C2 | ±5%, 0603 NP0, 50 V | 3.0 | 3.6 | 3.6 | pF | |
C3 | ±5%, 0603 NP0, 50 V | 6.2 | 3.3 | 3.3 | pF | |
C4 | ±5%, 0603 NP0, 50 V | 24 | 24 | 24 | pF | |
C5 | ±5%, 0603 NP0, 50 V | 24 | 24 | 24 | pF | |
C6 | ±5%, 0603 NP0, 50 V | 4.7 | 2 | 1.8 | pF | |
C7 | ±5%, 0603 NP0, 50 V | 4.7 | 2 | 1.8 | pF | |
C8 | ±5%, 0603 NP0, 50 V | 4.7 | uF | |||
C9 | ±5%, 0603 NP0, 50 V | 470 | pF | |||
C10 | ±5%, 0603 NP0, 50 V | 0.1 | uF | |||
C11 | ±5%, 0603 NP0, 50 V | 0.1 | uF | |||
L1 | ±5%, 0603叠层贴片电感 | 180 | 100 | 100 | nH | Sunlord SDCL |
L2 | ±5%, 0603叠层贴片电感 | 22 | 12 | 12 | nH | Sunlord SDCL |
L3 | ±5%, 0603叠层贴片电感 | 15pF | 15 | 15 | nH | Sunlord SDCL |
L4 | ±5%, 0603叠层贴片电感 | 33 | 6.2 | 6.2 | nH | Sunlord SDCL |
L5 | ±5%, 0603叠层贴片电感 | 33 | 6.2 | 6.2 | nH | Sunlord SDCL |
L6 | ±5%, 0603叠层贴片电感 | 27 | 15 | 15 | nH | Sunlord SDCL |
L7 | ±5%, 0603叠层贴片电感 | 27 | 15 | 15 | nH | Sunlord SDCL |
L8 | ±5%, 0603叠层贴片电感 | 68 | 12 | 12 | nH | Sunlord SDCL |
Y1 | ±10 ppm, SMD32*25 mm | 26 | MHz | EPSON | ||
U1 | CMT2300A,Ultra-Low Power Sub-1GHz RF Transceiver | - | - | - | - | CMOSTEK |
RF Switch (Switch Type) Schematic
This circuit diagram shows the CMT2300A integrated circuit connected to an RF switch IC (U2 AS179) and other external components, including capacitors (C1-C22), inductors (L1-L8), a crystal oscillator (Y1), resistors (R1-R2), and RF connectors. It depicts a more complex RF front-end configuration utilizing an external switch.
Bill of Materials (RF Switch Type)
Table 15 lists the components for the RF Switch Type configuration.
Component | Description | 434 MHz (+20 dBm) | 868/915 MHz (+20 dBm) | Unit | Supplier | |
---|---|---|---|---|---|---|
C1 | ±5%, 0402 NP0, 50 V | 15 | 15 | pF | ||
C2 | ±5%, 0402 NP0, 50 V | 10 | 3.9 | pF | ||
C3 | ±5%, 0402 NP0, 50 V | 8.2 | 2.7 | pF | ||
C4 | ±5%, 0402 NP0, 50 V | 8.2 | 2.7 | pF | ||
C5 | ±5%, 0402 NP0, 50 V | 18 nH | 220 | pF | ||
C6 | ±5%, 0402 NP0, 50 V | 4.7 | 2 | pF | ||
C7 | ±5%, 0402 NP0, 50 V | 4.7 | 2 | pF | ||
C8 | ±5%, 0402 NP0, 50 V | 220 | 220 | uF | ||
C9 | ±5%, 0402 NP0, 50 V | 220 | 220 | pF | ||
C10 | ±5%, 0402 NP0, 50 V | 0.1 | uF | |||
C11 | ±5%, 0402 NP0, 50 V | 0.1 | uF | |||
C12 | ±5%, 0402 NP0, 50 V | 470 | pF | |||
C13 | ±5%, 0402 NP0, 50 V | 2200 | pF | |||
C14 | ±5%, 0402 NP0, 50 V | 4.7 | uF | |||
C15 | ±5%, 0402 NP0, 50 V | 24 | 24 | pF | ||
C16 | ±5%, 0402 NP0, 50 V | 24 | 24 | pF | ||
C17 | ±5%, 0402 NP0, 50 V | 10 | 10 | pF | ||
C18 | ±5%, 0402 NP0, 50 V | 10 | 10 | pF | ||
C19 | ±5%, 0402 NP0, 50 V | 27 | pF | |||
C20 | ±5%, 0402 NP0, 50 V | 27 | pF | |||
C21 | ±5%, 0402 NP0, 50 V | 27 | pF | |||
C22 | ±5%, 0402 NP0, 50 V | 27 | pF | |||
L1 | ±5%, 0603叠层贴片电感 | 180 | 100 | nH | Sunlord SDCL | |
L2 | ±5%, 0402叠层贴片电感 | 27 | 6.8 | nH | Sunlord SDCL | |
L3 | ±5%, 0402叠层贴片电感 | 18 | 12 | nH | Sunlord SDCL | |
L4 | ±5%, 0402叠层贴片电感 | 33 | 22 | nH | Sunlord SDCL | |
L5 | ±5%, 0402叠层贴片电感 | 15 | 10 | nH | Sunlord SDCL | |
L6 | ±5%, 0402叠层贴片电感 | 27 | 12 | nH | Sunlord SDCL | |
L7 | ±5%, 0402叠层贴片电感 | 27 | 12 | nH | Sunlord SDCL | |
L8 | ±5%, 0402叠层贴片电感 | 68 | 18 | nH | Sunlord SDCL | |
Y1 | ±10 ppm, SMD32*25 mm | 26 | MHz | EPSON | ||
U1 | CMT2300A,Ultra-Low Power Sub-1GHz RF Transceiver | - | - | - | - | CMOSTEK |
U2 | AS179, PHEMT GaAs IC SPDT Switch | - | - | - | - | SKYWORKS |
R1 | ±5%, 0402 | 2.2 | kΩ | |||
R2 | ±5%, 0402 | 2.2 | kΩ |
Functional Description
The CMT2300A is a high-performance, ultra-low power RF transceiver supporting OOK, (G)FSK, and (G)MSK modulation for applications from 140 to 1020 MHz.
The system block diagram illustrates the main functional blocks of the CMT2300A, including the Radio Controller, MODEM, Packet Handler, EEPROM, SPI/FIFO Interface, LNA, Mixer, IFFilter, Limiter, PLL, PA, ADC, and RSSI. It shows signal paths for both receive (RX) and transmit (TX) operations, along with control and power signals like VDD, GND, SCLK, SDA, CSB, FCSB, and GPIOs.
Transmitter
The CMT2300A transmitter is a direct-synthesis transmitter. It uses a low-noise fractional-N frequency synthesizer for carrier generation. The output power can be configured from -20 dBm to +20 dBm in 1 dB steps via registers. A built-in PA ramping mechanism minimizes transient spectral components during rapid power changes.
Receiver
The receiver features a high-performance, ultra-low power, low-IF architecture supporting OOK and FSK modulation. It includes an LNA, quadrature mixer, IF filter, limiter, and digital demodulator for I/Q signal processing. The RSSI is converted to an 8-bit digital signal. The receiver can operate in Direct or Packet modes.
Auxiliary Modules
Crystal Oscillator
The crystal oscillator provides the reference clock for the PLL and system clock for digital modules. It requires an external crystal and load capacitors (C9, C10) to achieve accurate oscillation at 26 MHz.
Sleep Timer
An integrated 32 kHz low-power oscillator (LPOSC) drives the sleep timer. This feature allows the chip to wake up periodically, enabling duty-cycled operation for power saving. The sleep duration is configurable.
Low Voltage Detection
The chip includes a low voltage detection (LBD) function. If the supply voltage drops below a preset threshold, the chip can enter a low power state and await an MCU command via SPI to resume operation.
Received Signal Strength Indicator (RSSI)
The RSSI module measures the signal strength in the tuned channel. It provides an 8-bit digital output representing the signal level, which can be read via registers.
Phase Jump Detector (PJD)
PJD is used during FSK demodulation to distinguish between noise and valid signals by counting phase transitions. The number of transitions to detect is configurable.
This diagram illustrates signal transitions over time, showing how phase jumps are detected. It depicts a sequence of symbols and highlights the concept of phase transitions.
Fast Manual Frequency Hopping
For multi-channel applications, users can configure frequency hopping using dedicated registers (FH_OFFSET and FH_CHANNEL) without needing to reconfigure the entire frequency synthesizer each time.
Chip Operation
SPI Interface
The CMT2300A communicates with an MCU via a 4-wire SPI interface. CSB and FCSB are active-low chip select signals for registers and FIFO, respectively. SCLK is the serial clock. Data is transmitted MSB first.
This diagram shows the timing sequence for reading data from the CMT2300A's registers via the SPI interface, detailing the roles of CSB, FCSB, SCLK, and SDIO signals.
This diagram illustrates the timing sequence for writing data to the CMT2300A's registers via the SPI interface, detailing the roles of CSB, FCSB, SCLK, and SDIO signals.
FIFO
The FIFO buffer is used to store received data (Rx) or data to be transmitted (Tx). It can be configured as separate 32-byte Rx and Tx FIFOs or merged into a single 64-byte FIFO. FIFO operations are controlled via SPI.
This diagram shows the timing sequence for reading data from the CMT2300A's FIFO buffer via the SPI interface.
This diagram illustrates the timing sequence for writing data to the CMT2300A's FIFO buffer via the SPI interface.
Operating States, Timing, and Power Consumption
Power-up Sequence
Upon power-on, the chip goes through a power-up sequence including POR release, crystal stabilization, and block calibrations before entering the SLEEP state. The sequence is illustrated in Figure 12.
This diagram illustrates the sequence of events from power-on to the chip entering the SLEEP state, including POR release, XTAL stabilization, block calibrations, and customer initialization readiness.
Operating States
The CMT2300A has seven operating states: IDLE, SLEEP, STBY, RFS, RX, TFS, and TX. The SLEEP state offers the lowest power consumption. The STBY state allows FIFO operation and shorter transition times to active states. RFS and TFS are intermediate states for RX and TX transitions, respectively. RX and TX are the active receive and transmit states.
This diagram visually represents the seven operating states (IDLE, SLEEP, STBY, RFS, RX, TFS, TX) and the possible transitions between them, triggered by specific commands.
GPIO and Interrupts
The CMT2300A features three configurable GPIO pins and two interrupt outputs. These can be configured for various functions, including data I/O, interrupts, and clock outputs.
Pin No. | Name | I/O | Function |
---|---|---|---|
16 | GPIO1 | IO | Configurable as: DOUT/DIN, INT1, INT2, DCLK (TX/RX), RF_SWT |
15 | GPIO2 | IO | Configurable as: INT1, INT2, DOUT/DIN, DCLK (TX/RX), RF_SWT |
8 | GPIO3 | IO | Configurable as: CLKO, DOUT/DIN, INT2, DCLK (TX/RX) |
Interrupt mapping details are provided in Table 18 and Figure 14.
Data Packet and Packet Handler
Data Packet Format
The CMT2300A supports flexible packet formats, including variable length (length before or after Node ID) and fixed length packets. These formats include Preamble, Sync Word, Node ID, Length, Data, and CRC fields.
Diagram showing packet structure with Length field preceding Node ID, including Preamble, Sync Word, Length, Node ID, Data, and CRC.
Diagram showing packet structure with Length field following Node ID, including Preamble, Sync Word, Node ID, Length, Data, and CRC.
Diagram showing the structure of a fixed-length data packet, including Preamble, Sync Word, Node ID, Data, and CRC.
Data Modes
The CMT2300A supports two data modes for MCU interaction:
- Direct Mode: Supports only preamble and sync word detection; FIFO is not used.
- Packet Mode: Supports all packet format configurations and utilizes the FIFO buffer.
Illustrates data flow for Direct Mode RX and TX, showing data routing via DOUT and DIN.
Illustrates data flow for Packet Mode, involving the Packet Handler and FIFO.
Low Power Operation
Duty Cycle Operation Mode
The CMT2300A allows for power saving through duty-cycled Tx and Rx operations. Various modes are available for Rx (5 types) and Tx (3 types) to optimize power consumption based on application needs.
Ultra-Low Power (SLP) Receive Mode
This mode helps achieve ultra-low power consumption during receive operations. The core principle is to minimize Rx time when no signal is present and appropriately extend it when a signal is detected. The device supports a basic scheme and 13 extended low-power solutions.
Illustrates a fundamental approach to low-power operation, showing periodic TX bursts and RX listening periods within an IDLE state, interspersed with SLEEP periods.
Table 19 details various low-power receive modes.
User Registers
The CMT2300A features a comprehensive set of user-configurable registers organized into banks for various functions. These include System Bank, Frequency Bank, Data Rate Bank, Baseband Bank, TX Bank, and Control Banks. Refer to AN146 for detailed register usage.
CMT Bank (0x00-0x0B)
Contains internal parameters exported from RFPDK. Not recommended for direct modification.
System Bank (0x0C-0x17)
Configures parameters related to timers, Duty Cycle, and low-power modes.
Frequency Bank (0x18-0x1F)
Stores registers for frequency tuning.
Data Rate Bank (0x20-0x37)
Contains registers related to data rates, FSK, and OOK configurations.
Baseband Bank (0x38-0x54)
Stores registers for packet format settings, including preamble, sync word, Node ID, length, data whitening, FEC, CRC, and Manchester encoding.
Transmit Bank (0x55-0x5F)
Contains registers for transmit power, frequency deviation, and related settings.
Control 1 Bank (0x60-0x6A)
Includes registers for enabling and configuring various functional modules, such as chip mode, GPIO selection, interrupt control, and FIFO settings.
Control 2 Bank (0x6B-0x71)
Contains registers related to status flags, RSSI, and LBD. Note: These registers are not accessible in SLEEP state.
Ordering Information
Table 29 provides ordering details for the CMT2300A.
Model | Description | Package | Packaging Option | Operating Conditions | Min Order Quantity |
---|---|---|---|---|---|
CMT2300A-EQR[1] | CMT2300A, Ultra-Low Power Sub-1GHz RF Transceiver | QFN16 (3x3) | Tape & Reel | 1.8 to 3.6V, -40 to 85°C | 5,000 |
Notes:
[1] 'E' denotes Extended Industrial Grade with a temperature range of -40 to +85°C. 'Q' denotes the QFN16 package type. 'R' denotes Tape & Reel packaging, with a Minimum Order Quantity (MOQ) of 5,000 pieces.
For more product information, visit www.cmostek.com. For purchasing or pricing inquiries, contact sales@cmostek.com or your local sales representative.
Package Information
The CMT2300A is supplied in a 16-pin QFN (3x3) package. Figure 21 shows the package outline, and Table 30 provides the package dimensions.
Diagrams showing the top, bottom, and side views of the 16-pin QFN 3x3 package, with dimensions labeled.
Symbol | Dimension (mm) - Min | Dimension (mm) - Max |
---|---|---|
A | 0.7 | 0.8 |
A1 | 0.05 | |
b | 0.18 | 0.30 |
c | 0.18 | 0.25 |
D | 2.90 | 3.10 |
D2 | 1.55 | 1.75 |
e | 0.50 BSC | |
E | 2.90 | 3.10 |
E2 | 1.55 | 1.75 |
L | 0.35 | 0.45 |
Top Mark
Figure 22 shows the top mark details for the CMT2300A package, and Table 31 explains the markings.
Diagram showing the top marking of the CMT2300A package: '300A' on the first line, pin 1 indicator, and 'YWW' for date code.
Marking Type | Description |
---|---|
Laser Marking | |
Pin 1 Indicator | Circle diameter = 0.3 mm |
Font Size | 0.5 mm, right-aligned |
Line 1 Marking | 300A, representing model CMT2300A |
Line 2 Marking | Internal tracking code (①②③④) |
Line 3 Marking | Date code: Y (last digit of year), WW (work week) |
Other Documents
Table 32 lists related application notes and user guides for the CMT2300A.
Document Number | Document Title | Description |
---|---|---|
AN141 | CMT2300A Schematic and PCB Layout Design Guideline | Provides guidelines for CMT2300A PCB layout, RF matching network design, and other related design considerations. |
AN142 | CMT2300A Configuration Guideline | Introduces how to configure the CMT2300A using RFPDK. |
AN143 | CMT2300A Dual-Way RF Link Development Kits User's Guide | User guide for CMT2300A development kits, including RF-EB evaluation boards, EM modules, USB Programmer, and RFPDK. |
AN146 | CMT2300A User Manual | Detailed functional usage and configuration guide for the CMT2300A. |
Document Revision History
Table 33 details the revision history of this document.
Version | Chapter/Section | Change Description | Date |
---|---|---|---|
Preliminary | All | Preliminary version for internal verification | 2015-06-09 |
Preliminary 0.2 | 5.14.1 | Update 1st paragraph | 2015-06-10 |
Preliminary 0.2 | 5.14.2 | Update Table 34 | 2015-06-10 |
0.6 | All | Split Chapter 5 and 6 from Chapter 4 | 2015-08-06 |
0.7 | All | Initial release version for mass production chip | 2017-02-27 |
Contact Information
CMOSTEK Microelectronics Co., Ltd. Shenzhen Branch
Address: Room 203, Honghai Building, Qianhai Road, Nanshan District, Shenzhen, Guangdong Province, China
Postal Code: 518000
Phone: +86-755-83235017
Fax: +86-755-82761326
Sales: sales@cmostek.com
Technical Support: support@cmostek.com
Website: www.cmostek.com