Owner's Manual for VISHAY models including: SIHB055N60EF, EF Series Power MOSFET With Fast Body Diode, EF Series, Power MOSFET With Fast Body Diode, MOSFET With Fast Body Diode, Fast Body Diode, Body Diode, Diode
SIHB055N60EF-GE3 Vishay Siliconix - РКС Компоненти - РАДІОМАГ
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DocumentDocumentwww.vishay.com SiHB055N60EF Vishay Siliconix EF Series Power MOSFET With Fast Body Diode D2PAK (TO-263) D G GD S S N-Channel MOSFET PRODUCT SUMMARY VDS (V) at TJ max. RDS(on) typ. () at 25 °C Qg max. (nC) Qgs (nC) Qgd (nC) Configuration 650 VGS = 10 V 95 29 15 Single 0.048 FEATURES · 4th generation E series technology · Low figure-of-merit (FOM) Ron x Qg · Low effective capacitance (Co(er)) · Reduced switching and conduction losses · Avalanche energy rated (UIS) · Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS · Server and telecom power supplies · Switch mode power supplies (SMPS) · Power factor correction power supplies (PFC) · Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting · Industrial - Welding - Motor drives - Battery chargers - Solar (PV inverters) ORDERING INFORMATION Package Lead (Pb)-free and halogen-free D2PAK (TO-263) SIHB055N60EF-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-source voltage Gate-source voltage Continuous drain current (TJ = 150 °C) Pulsed drain current a Linear derating factor VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C ID IDM Single pulse avalanche energy b Maximum power dissipation Operating junction and storage temperature range Drain-source voltage slope Reverse diode dV/dt d TJ = 125 °C EAS PD TJ, Tstg dV/dt Soldering recommendations (peak temperature) c For 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 4.5 A c. 1.6 mm from case d. ISD ID, dI/dt = 390 A/s, starting TJ = 25 °C LIMIT 600 ± 30 46 29 123 2.2 286 278 -55 to +150 100 150 260 UNIT V A W/°C mJ W °C V/ns °C S21-1035-Rev. A, 25-Oct-2021 1 Document Number: 92420 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com SiHB055N60EF Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum junction-to-ambient Maximum junction-to-case (drain) SYMBOL RthJA RthJC TYP. - MAX. 62 0.45 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage (N) Gate-source leakage Zero gate voltage drain current Drain-source on-state resistance Forward transconductance Dynamic VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 A Reference to 25 °C, ID = 30 mA VDS = VGS, ID = 250 A VGS = ± 20 V VGS = ± 30 V VDS = 480 V, VGS = 0 V VDS = 480 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 26.5 A VDS = 10 V, ID = 26.5 A Input capacitance Output capacitance Reverse transfer capacitance Effective output capacitance, energy related a Effective output capacitance, time related b Ciss Coss Crss Co(er) Co(tr) VGS = 0 V, VDS = 100 V, f = 1 MHz VDS = 0 V to 480 V, VGS = 0 V Total gate charge Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off delay time Fall time Gate input resistance Drain-Source Body Diode Characteristics Qg Qgs Qgd td(on) tr td(off) tf Rg VGS = 10 V ID = 26.5 A, VDS = 480 V VDD = 480 V, ID = 26.5 A, VGS = 10 V, Rg = 9.1 f = 1 MHz, open drain MIN. 600 3 - - - - 0.4 TYP. 0.55 0.048 23 3707 145 5 110 680 63 29 15 39 89 56 7 0.8 Continuous source-drain diode current Pulsed diode forward current IS MOSFET symbol showing the D - - integral reverse G ISM p - n junction diode - - S Diode forward voltage Reverse recovery time Reverse recovery charge Reverse recovery current VSD trr Qrr IRRM TJ = 25 °C, IS = 26.5 A, VGS = 0 V TJ = 25 °C, IF = IS = 26.5 A, di/dt = 100 A/s, VR = 400 V - - - 156 - 1.1 - 13 Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS MAX. 5 ± 100 ± 1 1 2 0.055 - - 95 78 134 84 14 1.6 46 123 1.2 312 2.2 - UNIT V V/°C V nA A A mA S pF nC ns A V ns C A S21-1035-Rev. A, 25-Oct-2021 2 Document Number: 92420 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) SiHB055N60EF Vishay Siliconix 1st line 2nd line 2nd line ID - Drain-to-Source Current (A) 1st line 2nd line 2nd line ID - Drain-to-Source Current (A) Axis Title 150 15 V 14 V 120 13 V 12 V 11 V 10 V 90 10000 9 V 8 V 1000 60 30 TJ = 25 °C 7 V 100 6 V 0 5 V 10 0 5 10 15 20 VDS - Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics Axis Title 100 15 V 14 V TJ = 150 °C 10000 13 V 80 12 V 11 V 8 V 10 V 1000 60 7 V 40 6 V 100 20 5 V 0 10 0 5 10 15 20 VDS - Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Axis Title 160 TJ = 25 °C 120 80 40 TJ = 150 °C 10000 1000 100 VDS = 26.2 V 0 10 0 5 10 15 20 VGS - Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 1st line 2nd line Coss - Outpu2tnCdalipnaecitance (pF) 1st line 2nd line 2nd line C - Capacitance (pF) 1st line 2nd line RDS(on) - Drain-to-Source On-Resistance (Normalized) 3.0 ID =26.5 A 2.5 Axis Title 10000 2.0 1000 1.5 VGS = 10 V 1.0 100 0.5 0 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ - Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 100 000 Axis Title 10000 10 000 1000 100 Ciss Coss 1000 10 Crss 100 1 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted 0.1 Crss = Cgd Coss = Cds + Cgd 0.01 0 100 200 300 400 500 VDS - Drain-to-Source Voltage (V) 10 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Axis Title 100 000 25 10 000 1000 Coss 100 20 15 Eoss 10 5 10 0 100 200 300 400 500 VDS - Drain-to-Source Voltage (V) Fig. 6 - Coss and Eoss vs. VDS 0 600 Eoss - Output Capacitance Stored Energy (µJ) 2nd line 2nd line ID - Drain-to-Source Current (A) S21-1035-Rev. A, 25-Oct-2021 3 Document Number: 92420 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com SiHB055N60EF Vishay Siliconix 1st line 2nd line 2nd line VGS - Gate-to-Source Voltage (V) Axis Title 12 VDS = 480 V VDS = 300 V 9 VDS = 120 V 6 3 10000 1000 100 0 10 0 20 40 60 80 Qg - Total Gate Charge (nC) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Axis Title 10000 100 2nd line ISD - Reverse Drain Current (A) TJ = 150 °C 10 1000 TJ = 25 °C 1 100 0.1 0.2 VGS = 0 V 10 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD - Source-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage Axis Title 10000 100 IDM limited Limited by RDS(on) a 10 Operation in this area limited by RDS(on) BVDSS limited 1000 100 µs 2nd line ID - Drain Current (A) 1 100 TC = 25 °C, TJ = 150 °C, single pulse 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) 1 ms 10 ms 10 1000 Fig. 9 - Maximum Safe Operating Area Note a. VGS > minimum VGS at which RDS(on) is specified 1st line 2nd line 1st line 2nd line 2nd line VDS - Drain-to-Source Breakdown Voltage (Normalized) 1st line 2nd line 2nd line ID - Drain Current (A) Axis Title 60 10000 45 1000 30 100 15 0 25 50 75 100 125 TC - Case Temperature (°C) 10 150 Fig. 10 - Maximum Drain Current vs. Case Temperature Axis Title 1.2 10000 1st line 2nd line 1.1 1000 1 100 0.9 ID = 30 mA 0.8 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ - Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage S21-1035-Rev. A, 25-Oct-2021 4 Document Number: 92420 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com SiHB055N60EF Vishay Siliconix Normalized Effective Transient Thermal Impedance 1st line 2nd line 1 Duty cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single pulse Axis Title 10000 1000 100 0.01 0.0001 0.001 0.01 0.1 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case 10 1 VDS VGS Rg RD D.U.T. 10 V Pulse width 1 s Duty factor 0.1 % +- VDD Fig. 13 - Switching Time Test Circuit VDS tp VDD VDS IAS Fig. 16 - Unclamped Inductive Waveforms VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 14 - Switching Time Waveforms Qg 10 V Qgs Qgd VG Charge Fig. 17 - Basic Gate Charge Waveform VDS Vary tp to obtain required IAS Rg 10 V tp L D.U.T. IAS 0.01 + - VDD Fig. 15 - Unclamped Inductive Test Circuit Current regulator Same type as D.U.T. 12 V 50 k 0.2 F 0.3 F + D.U.T. - VDS VGS 3 mA IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S21-1035-Rev. A, 25-Oct-2021 5 Document Number: 92420 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com D.U.T. + 2 - 1 Rg SiHB055N60EF Vishay Siliconix Peak Diode Recovery dv/dt Test Circuit + Circuit layout considerations · Low stray inductance 3 · Ground plane · Low leakage inductance current transformer - - 4+ · dv/dt controlled by Rg · Driver same type as D.U.T. · ISD controlled by duty factor "D" · D.U.T. - device under test + - VDD 1 Driver gate drive P.W. Period D = P.W. Period VGS = 10 V a 2 D.U.T. ISD waveform Reverse recovery Body diode forward current current di/dt 3 D.U.T. VDS waveform Diode recovery dv/dt V DD Re-applied voltage 4 Inductor current Body diode forward drop Ripple 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?92420. S21-1035-Rev. A, 25-Oct-2021 6 Document Number: 92420 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) (Datum A) 34 A E 4 L1 4 A A B c2 D 5 H 1 CC 23 L2 BB Detail A 2 x e 2 x b2 2 x b 0.010 M A M B Plating (c) A c ± 0.004 M B 5 b1, b3 Base metal c1 5 Gauge plane 0° to 8° H B Seating plane L3 L L4 A1 Detail "A" Rotated 90° CW scale 8:1 E D1 4 Lead tip (b, b2) Section B - B and C - C Scale: none E1 4 View A - A MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 - b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 Downloaded from Arrow.com. www.vishay.com 1 RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 (10.668) AN826 Vishay Siliconix 0.635 (16.129) 0.355 (9.017) Return to Index 0.135 (3.429) 0.200 (5.080) 0.145 (3.683) 0.050 (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) Document Number: 73397 11-Apr-05 Downloaded from Arrow.com. www.vishay.com 1 www.vishay.com Disclaimer Legal Disclaimer Notice Vishay ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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ALL RIGHTS RESERVED Revision: 01-Jan-2022 1 Downloaded from Arrow.com. Document Number: 91000