nRF903 Single Chip RF Transceiver Information
PRODUCT SPECIFICATION
Brand: Nordic VLSI ASA
nRF903 Single Chip RF Transceiver
430MHz-950MHz
FEATURES
- Single chip GFSK multi-channel transceiver
- 433MHz, 868MHz and 915MHz ISM/LPRD-bands compatible
- 76.8kbit/s data rate
- High bandwidth efficiency
- Easy 14-bit configuration
- Reliable communication due to superior adjacent channel selectivity
- Full output power in all ISM-bands
- Few external components required
- Standby- and power down-mode
APPLICATIONS
- Alarm and Security Systems
- Automotive
- Home Automation
- Automatic Meter Reading (AMR)
- Wireless Handsfree
- Remote Control
- Surveillance
- Wireless Communications
- Telemetry
- Toys
GENERAL DESCRIPTION
The nRF903 is a true single chip multi-channel UHF transceiver designed to operate in the unlicensed 433MHz, 868MHz and 915MHz ISM-/LPRD- (Industrial Scientific Medical / Low Power Radio Device) bands. Multi-channel operation, excellent receiver selectivity and sensitivity, high bandwidth efficiency and blocking performance make the nRF903 suitable for wireless links where high reliability is a key requirement. The device features GFSK (Gaussian Frequency Shift Keying) modulation and demodulation capability at an effective bit rate of 76.8kbit/s in 153.6kHz channel bandwidths. Transmit power can be adjusted to a maximum of 10dBm which is available for all frequency bands and channels. Antenna interface is differential and suited for low cost PCB-antennas. All necessary configuration data is programmed by a 14-bit configuration word via a Serial Peripheral Interface (SPI). nRF903 operates from a single +3V DC supply and features power down- and standby-modes which makes power saving easy and efficient.
QUICK REFERENCE DATA
Table 1. nRF903 quick reference data.
| Parameter | Value | Unit |
|---|---|---|
| Frequency bands | 433.05-434.87 MHz 868-870 MHz 902-928 MHz |
MHz |
| Datarate | 76.8 | kbit/s |
| Sensitivity @ 300Ω, BR=76.8kbit/s, BER<10-3 | -104 | dBm |
| Modulation | GFSK | |
| Blocking performance (>1 MHz from carrier) | >50 | dB |
| Max. RF output power @ 300Ω, 3V | 10 | dBm |
| Supply voltage | 2.7 - 3.3 | V |
| Number of available channels | 10 7 169 |
PRODUCT SPECIFICATION
As a primary application, the transceiver is intended for UHF radio equipment in compliance with the European Telecommunication Standard Institute (ETSI) specification EN 300 220-1 and the US Federal Communications Commission (FCC) standard CFR47, part 15.
ORDERING INFORMATION
Table 2. nRF903 ordering information.
| Type number | Description | Version |
|---|---|---|
| nRF903-IC | 32 pin TQFP | A |
| nRF903-EVKIT-433 | Evaluation kit (2 test PCBs) | 1.0 |
| nRF903-EVKIT-868 | Suffix designate frequency band | 1.0 |
| nRF903-EVKIT-915 | Suffix designate frequency band | 1.0 |
| nRF903-DEMO | Demonstration kit (4 transceiver units) | 1.0 |
BLOCK DIAGRAM
Figure 1. nRF903 block diagram with external components. The diagram illustrates the internal architecture of the nRF903 transceiver. Key components include a Low Noise Amplifier (LNA), Power Amplifier (PA), a polyphase filter, a frequency synthesizer, an Intermediate Frequency (IF) filter, a GFSK modulator/demodulator, and a serial interface. The transceiver is controlled by a dedicated control and configuration engine. Input signals from antennas (ANT1, ANT2) are processed through the LNA and PA. External components like inductors (IND1, IND2) and a loop filter are shown connected to specific pins. Configuration and clock signals (CFG CLK, CFG DATA, CS, XCI) are used for programming the device. Power is supplied via VDD and VSS pins. Output signals include data (DATA) and carrier sense (C_SENSE). A crystal oscillator (fxTAL) provides the base clock frequency. Power-down (PWR_DWN) and standby (STBY) modes are also indicated.
PRODUCT SPECIFICATION
PIN FUNCTIONS
Table 3. nRF903 pin functions.
| Pin | Name | Pin function | Description |
|---|---|---|---|
| 1 | VSS | Ground | Ground (0V) |
| 2 | LF1 | Output | Frequency synthesiser PLL loopfilter connection #1 |
| 3 | LF2 | Input | Frequency synthesiser PLL loopfilter connection #2 |
| 4 | IND1 | Input | External inductor for VCO |
| 5 | IND2 | Input | External inductor for VCO |
| 6 | VSS | Ground | Ground (0V) |
| 7 | VSS | Ground | Ground (0V) |
| 8 | VDD | Power | Power supply (+3.0V DC) |
| 9 | VDD | Power | Power supply (+3.0V DC) |
| 10 | CFG CLK | Input | Clock for programming mode |
| 11 | CFG DATA | Input | Serial input for transceiver configuration data |
| 12 | CS | Input | Chip select CS="0" transceiver normal operating mode CS="1" transceiver programming mode/test mode Refer to Table 5. for mode setup |
| 13 | XCI | Input | Crystal oscillator input (11.0592MHz) |
| 14 | VDD | Power | Power supply (+3.0V DC) |
| 15 | VDD | Power | Power supply (+3.0V DC) |
| 16 | CLK_OUT | Output | Full swing clock for external microcontroller Output frequency is set by 2 bits in the configuration word fCLK_OUT = 11.0592MHz/n, where n is 1,2,4 or 8 |
| 17 | VSS | Ground | Ground (0V) |
| 18 | C_SENSE | Output | Receiver carrier sense |
| 19 | DATA | Bidirectional | Transmitted/received data |
| 20 | TXEN | Input | Select transmit/receive mode TXEN = "0" Receive mode TXEN = "1" Transmit mode |
| 21 | FILT2 | Input | Input from external 10.7MHz IF filter |
| 22 | FILT1 | Output | Output to external 10.7MHz IF filter |
| 23 | VSS | Ground | Ground (0V) |
| 24 | VSS | Ground | Ground (0V) |
| 25 | PWR_DWN | Input | Power down mode Refer to Table 5. for mode setup |
| 26 | STBY | Input | Standby mode Refer to Table 5. for mode setup |
| 27 | VSS | Ground | Ground (0V) |
| 28 | ANT1 | Bidirectional | Antenna terminal |
| 29 | ANT2 | Bidirectional | Antenna terminal |
| 30 | VSS | Ground | Ground (0V) |
| 31 | VDD | Power | Power supply (+3.0V DC) |
| 32 | VSS | Ground | Ground (0V) |
PRODUCT SPECIFICATION
ELECTRICAL SPECIFICATIONS
Conditions: VDD = +3V DC, VSS = 0V, TA = -40°C to +85°C
Table 4. nRF0903 electrical specifications.
| Symbol | Parameter (condition) | Min. | Typ. | Max. | Units |
|---|---|---|---|---|---|
| VDD | Supply voltage | 2.7 | 3 | 3.3 | V |
| ta | Operating temperature range | -40 | 27 | +85 | °C |
| IPD | Total current consumption: Receive mode: 433MHz : 868-928MHz Transmit mode @ -8 dBm RF power: 433MHz :868-928MHz Transmit mode @ 10 dBm RF power: 433MHz :868-928MHz Standby mode Power-down mode |
18.5 22.5 12.5 15.5 24 29.5 600 1 |
mA mA mA mA mA mA μA μA |
||
| #CH | Number of available channels with fixed inductora | 169 | |||
| Modulation type | GFSK | ||||
| Δf | Frequency deviation | ±19 | ±23 | ±27 | kHz |
| BR | Bit rate | 76.8 | kbit/s | ||
| PRF | Max. RF output power @ 300Ω load | 10 | dBm | ||
| Sensitivity @ 300Ω, BR=76.8kbit/s, BER < 10-3 | -104 | dBm | |||
| CHBW | Channel spacing | 153.6 | kHz | ||
| fres | Frequency synthesizer resolution | 153.6 | kHz | ||
| ACS | Adjacent channel selectivity; upper channel (+2): upper channel (+1): lower channel (-1): lower channel (-2): |
42 32 21 42 |
dB | ||
| MIA | Mirror image attenuation | 15 | 30 | dB | |
| BLCK | Blocking level (facking signal > 1MHz from carrier) | 53 | dB | ||
| ACPOMSK | Adjacent channel power (76.8kbit/s) | -37 | -35 | dBc | |
| DR | Dynamic range | 90 | dB | ||
| PC_SENSE | Carrier sense input power level; stable 0b Carrier sense input power level; stable "1b |
-105 -92 |
dBm | ||
| fFI | 1st IF frequency | 10.7136 | MHz | ||
| fFI2 | 2nd IF frequency | 345.6 | kHz | ||
| BWIF | IF noise bandwidth | 130 | kHz | ||
| fXTAL | Crystal frequency | 11.0592 | MHz | ||
| Crystal reference frequency stability requirement @433MHz, BR = 76.8kbit/s @868-928MHz, BR = 76.8kbit/s |
±40 ±20 |
ppm | |||
| fLP_CLK | External microcontroller clock output frequencyc | 1.3824 11.0592 |
MHz | ||
| VIH | Logic "1" input voltage | 0.7-VDD | VDD | V | |
| VIL | Logic "0" input voltage | 0 | 0.3-VDD | V | |
| VOH | Logic "1" output voltage (IOH=-1.0mA) | 0.7-VDD | VDD | V | |
| VOL | Logic "0" output voltage (IOL=1.0mA) | 0 | 0.3-VDD | V | |
| IIH | Logic "1" input current (VI=VDD) | +20 | μA | ||
| IIL | Logic "0" input current (VI=VSS) | -20 | μA | ||
| ZANT | Recommended antenna port differential impedance | 300 | Ω | ||
| Spurious emission | Compliant with ETSI EN 300-220-1 And FCC CFR47, part 15 |
a: Use must be according to ETSI- and FCC frequency regulations. Table 7, page 9, lists the available channels for the three different frequency bands.
b: Refer to the Adjacent channel selectivity (ACS) section on page 24
c: fXTAL may be set to 1.3824MHz, 2.7648MHz, 5.5296MHz or 11.0592MHz depending on configuration word (see Table 6)
d: Antenna and matching network must be according to recommendations
