SanDisk SD Card

OEM Product Manual Version 3.0

Document No 80-36-00497 | April 2011

SanDisk Corporation

Corporate Headquarters

601 McCarthy Boulevard

Milpitas, CA 95035

Phone: (408) 801-1000 | Fax: (408) 801-8657

Website: www.sandisk.com

Policy and Disclaimers

SanDisk Corporation's general policy advises against the use of its products in life support applications where failure or malfunction could directly threaten life or cause injury. SanDisk shall not be liable for any loss, injury, or damage resulting from the use of its products in the following applications:

For any use in life support systems or other applications where product failure could cause damage, injury, or loss of life, products should only be incorporated into systems designed with appropriate redundancy, fault tolerance, or backup features. By using SanDisk products in such applications, the user assumes all risk and agrees to indemnify, defend, and hold harmless SanDisk Corporation and its affiliates against all damages.

Security safeguards are inherently capable of circumvention. SanDisk does not guarantee that data will not be accessed by unauthorized persons and disclaims all warranties to that effect to the fullest extent permitted by law.

This document and related material are for informational use only and are subject to change without prior notice. SanDisk Corporation assumes no responsibility for errors in this document or related material, nor for damages or claims resulting from its use. SanDisk Corporation explicitly disclaims all express and implied warranties and indemnities associated with this document and related material. By using this document, the user agrees to this disclaimer as a precondition to receipt and usage.

Each user expressly waives all warranties, express or implied, including warranties of merchantability or fitness for a particular purpose, and any liability of SanDisk Corporation and its affiliates for loss of use, revenue, profit, or any incidental, punitive, indirect, special, or consequential damages, including physical injury, death, property damage, lost data, or costs of procurement of substitute goods, technology, or services.

No part of this document may be reproduced, transmitted, transcribed, stored, or translated into any language or computer language, in any form or by any means, without the prior written consent of an officer of SanDisk Corporation. All SanDisk documentation is protected by copyright law.

SanDisk and the SanDisk logo are registered trademarks of SanDisk Corporation. Other brand names are for identification purposes only and may be trademarks of their respective holders.

© 2007 - 2010 SanDisk Corporation. All rights reserved.

Document 80-36-00497 Rev. 2.9

Revision History

Date Revision Description
January 2007 2.0 Added: Reliability and Durability Specifications Table for the SD Card to Chapter 2; Additional capacities and related specs to Tables 3-8 and 3-9; C Size 6 GB and related specs to Table 3-7; CID values to Table 3-4; CSD values to Table 3-6; TOC with subheadings removed application notes from Appendix D, replaced with links to white paper docs. Consolidated shared specifications in Chapter 2. Switched to out dent format. Rearranged General Description in Chapter 1. Changed hierarchy under Functional Description in Chapter 1. Corrected part number for microSD 6 GB and 8 GB. Made changes to Tables 3-6 and 3-7 according to feedback.
February 2007 2.1 N/A
June 2007 2.2 Added microSD Card top view to Chapter 2. Changed sleep current for microSD 6GB/8GB. Other minor edits.
October 2007 2.3 Removed miniSD and microSD (addressed in a separate manual); Sleep current updated; CSD Register updated; DOS Image parameters updated; Ordering information updated.
April 2009 2.4 Updated Appendix A SKU information.
August 2009 2.5 Updated Class information for SDSDAA-002G and SDSDAB-002G.
October 2009 2.6 Updated SDA Version from 2.0 to SDA Version 3.0.
January 2010 2.7 Updated speed class for SDSDAA parts.
August 2010 2.8 Updated speed class for SDSDAB parts.
November 2010 2.9 Updated SDSDAC products - UHSI, 30/30 MB/s Class 10.
March 2011 3.0 Added SDSDAB-064G product.

Introduction

1.1 General Description

The SanDisk SD Card is a flash-based, removable, non-volatile memory device designed to meet the security, capacity, performance, and environmental requirements of next-generation consumer electronic devices.

The SanDisk SD Card utilizes a 9-pin interface capable of operating at a maximum frequency of 100 MHz. This interface allows for easy integration into any design, regardless of the microprocessor used. Additionally, SD Card products offer an alternate communication protocol based on the SPI standard.

SanDisk SD cards are optimized for mass storage applications. They feature an on-board intelligent controller that manages interface protocols, security algorithms for content protection, data storage and retrieval, Error Correction Code (ECC) algorithms, defect handling, power management, wear leveling, and clock control.

SanDisk SD Card Block Diagram

The SanDisk SD Card Block Diagram illustrates the core components: an SD Bus/SPI Bus Interface connecting to a SanDisk Single Chip Controller. This controller manages Data In/Out and Control signals, interfacing with the Flash Cards.

1.2 Features

General features of SanDisk SD Cards include:

1.3 Scope

This document outlines the key features and specifications of the SanDisk SD Card, along with the information necessary for interfacing this product with a host system. Chapter 2 details the physical and mechanical properties, Chapter 3 covers pin assignments and registers, and Chapter 4 provides an overview of the SD protocol. Information on SPI Protocol can be found in Section 7 of the SDA Physical Layer Specification, Version 3.01.

1.4 SD Card Standard

SanDisk SD cards are fully compliant with the SDA Physical Layer Specification, Version 3.01, available from the SD Card Association (SDA).

SD Card Association Contact:

2400 Camino Ramon, Suite 375
San Ramon, CA 94583
USA
Telephone: +1 (925) 275-6615
Fax: +1 (925) 886-4870
Email: office@sdcard.org
Website: www.sdcard.org

1.5 Functional Description

The SanDisk SD card family features a high-level, intelligent subsystem, providing capabilities beyond typical memory cards. These include:

1.5.1 Technology Independence

The 512-byte sector size of SanDisk SD Cards aligns with IDE magnetic disk drives. Host software issues read/write commands with sector addresses, and the card handles the underlying flash memory operations (erase, program, read) transparently. This design ensures compatibility with future flash memory advancements without requiring host software updates.

1.5.2 Defect and Error Management

SanDisk SD Cards employ a sophisticated defect and error management system, offering enhancements over magnetic disk drives. Defective sectors are rewritten to good sectors transparently to the host, without consuming user data space. The cards feature a superior soft error rate compared to magnetic disk drives and utilize innovative algorithms for data recovery in rare read error scenarios, ensuring unparalleled reliability.

1.5.3 Content Protection

Details on content protection mechanisms and related security commands are available in the SD Security Specification from the SDA. All SD security-related commands in SanDisk SD Cards operate in data transfer mode.

1.5.4 Wear Leveling

Wear leveling is an integral part of the erase pooling functionality within SanDisk SD cards.

1.5.5 Automatic Sleep Mode

A key feature is the automatic transition to and from sleep mode. Upon operation completion, cards enter sleep mode to conserve power if no further commands are received, requiring no host action. Any command issued to a card in sleep mode will wake it up.

1.5.6 Hot Insertion

Support for hot insertion is managed by the host and connector. Connectors with extended power pins ensure power is supplied before other pins make contact, similar to PCMCIA devices.

1.6 SD Card Products in SD Bus Mode

This section provides information on SanDisk SD Cards in SD Bus mode. They are compliant with the SDA Physical Layer Specification, Version 3.01. Card Specific Data (CSD) Register structures comply with CSD Structure 1.0 and 2.0. Topics covered include operating conditions, card identification, status, memory array partitioning, read/write operations, data transfer rates, data protection, write protection, copy bit, and CSD registers. Additional card detection methods are detailed in application notes for the SDA Physical Layer Specification, Version 3.01.

Memory Array Partitioning

The Memory Array Partitioning diagram illustrates how an SD Card is divided into Write Protect (WP) Groups and Protected Areas, each containing sectors.

Data Transfer Formats

The Data Transfer Formats diagrams depict two modes: Single Block Mode, where one data block is transferred, and Multiple Block Mode, where multiple data blocks are transferred sequentially. Both modes show the structure of data transfer, including start and stop points.

1.7 SPI Mode

SPI Mode is a secondary communication protocol for SD cards, a subset of the SD Protocol, designed for communication with SPI channels common in microcontrollers. Detailed information is available in Section 7 of the SDA Physical Layer Specification, Version 3.01.

Product Specifications

2.1 SD Card

This section details the product specifications for the SanDisk SD Card.

Typical Card Power Requirements

Table 2-1 lists the typical power requirements for SanDisk SD Cards across various modes:

Mode Maximum Value
Standard Mode (25 MHz)
Sleep 350 uA
Read 100 mA
Write 100 mA
Standard Mode - for SDXC card (XPC bit on, 25 MHz)
(Host selected XPC bit in ACMD41)
Sleep 350 uA
Read 150 mA
Write 150 mA
High Performance Mode (50 MHz)
Sleep 350 uA
Read 200 mA
Write 200 mA
UHS-I SDR50 Mode - (100 MHz)
Sleep 350 uA
Read 400 mA
Write 400 mA
UHS-I DDR50 Mode – (50 MHz)
Sleep 350 uA
Read 400 mA
Write 400 mA
UHS-I SDR104 Mode - (208 MHz)
Sleep 350 uA
Read 800 mA
Write 800 mA

NOTE: Current consumption is measured by averaging over one (1) second. Refer to Section 6.6.3 of the SDA Physical Layer Specification, Version 3.01 for more information.

2.1.1 System Performance

This section provides system performance specifications for the SanDisk SD Card. Performance values in Table 2-2 were measured under the following conditions:

Timing Maximum Value
Block Read Access Time 100 ms
Block Write Access Time 250 ms

2.1.2 Physical Specifications

Table 2-3 and Figure 2-1 provide the physical dimensions of the SanDisk SD Card.

Specification SanDisk SD Card
Weight 2.5 g maximum
Length 32 mm +/- 0.1 mm
Width 24 mm +/- 0.1 mm
Thickness 2.1 mm +/- 0.15 mm

SD Card Dimensions

The SD Card Dimensions diagram provides a detailed technical drawing of the physical layout and measurements of the SD card, including pin configurations and tolerances, all in millimeters.

Interface Description

3.1 Pins and Registers

SanDisk SD Cards feature exposed contacts on one side, connected via a dedicated 9-pin connector. Table 3-1 details pin assignments for SD Bus Mode, while Table 3-2 lists assignments for SPI Mode. Pin assignments are based on the SDA Physical Layer Specification, Version 3.00.

SD Bus Mode Pin Assignment

Pin No. Name Typea Description
1 CD/DAT3b I/O/PP Card Detect/Data Line [bit 3]
2 CMD PP Command/Response
3 VSS1 S Supply Voltage Ground
4 VDD S Supply Voltage
5 CLK I Clock
6 VSS2 S Supply Voltage Ground
7 DAT0 I/O/PP Data Line [bit 0]
8 DAT1 I/O/PP Data Line [bit 1]
9 DAT2 I/O/PP Data Line [bit 2]

a Type Key: S=power supply; I=input; O=output using push-pull drivers; PP=I/O using push-pull drivers.
b The extended DAT lines (DAT1-DAT3) are input on power up and operate as DAT lines after the SET_BUS_WIDTH command.
c At power up, this line has a 50 kOhm pullup enabled for card detection and mode selection. The host can drive the line high for SD mode or low for SPI mode. The pull-up should be disconnected by the user during regular data transfer using the SET_CLR_CARD_DETECT (ACMD42) command.

SPI Mode Pin Assignment

Pin No. Name Type Description
1 CS I Chip Select (active low)
2 DataIn I Host-to-Card Commands and Data
3 VSS1 S Supply Voltage Ground
4 VDD S Supply Voltage
5 SCLK I Clock
6 VSS2 S Supply Voltage Ground
7 DataOut O/PP Card-to-Host Data and Status
8 RSV -- Reserved
9 RSV -- Reserved

SD Card Register Overview

Each card has a set of information registers. Table 3-3 provides an overview of these registers, with descriptions and references to the SDA Physical Layer Specification, Version 3.00.

Register Abbreviation Width (in bits) Register Name
CID 128 Card Identification Number
RCA 16 Relative Card Address
CSD 128 Card Specific Data
SCR 64 SD Configuration Register
OCR 32 Operation Condition Register
SSR 512 SD Status Register
CSR 32 Card Status Register

3.2 Bus Topology

SanDisk SD products support two communication protocols: SD and SPI. Refer to Section 3.5 of the SDA Physical Layer Specification, Version 3.01 for details. Section 6 of the specification provides a bus circuitry diagram.

3.2.1 SD Bus

Refer to Section 3.5.1 of the SDA Physical Layer Specification, Version 3.01 for more details.

3.2.2 SPI Bus

Refer to Section 3.5.2 of the SDA Physical Layer Specification, Version 3.01 for more details.

3.3 Hot Insertion and Power Protection

Refer to Sections 6.1, 6.2, and 6.3 of the SDA Physical Layer Specification, Version 3.01.

3.4 Electrical Interface

The power scheme for SanDisk SD products is handled locally within each card and the bus master. Refer to Section 6.4 of the SDA Physical Layer Specification, Version 3.01.

3.4.1 Power Up

Power must be applied to the VDD pin before any I/O pin is set to logic HIGH. CMD, CLK, and DAT0-3 must be at zero (0) volts when power is applied to the VDD pin. For more information, refer to Section 6.4.1 of the SDA Physical Layer Specification, Version 3.01.

Recommended Power Control Scheme

The Recommended Power Control Scheme diagram illustrates the power-up sequence. A host connects to the SD card via a connector, which typically includes a card detect switch. When the host detects card insertion, it activates a FET switch to supply power to the card's VDD pin. It is critical that CMD, CLK, and DAT0-3 pins remain at zero volts during the delay before VDD is powered to prevent damage. The host is responsible for ensuring VDD is powered before these signal pins exceed zero volts.

3.4.2 Bus Operating Conditions

SPI Mode bus operating conditions are identical to SD Card Bus Mode operating conditions. Refer to Section 6.6 of the SDA Physical Layer Specification, Version 3.01 for details.

3.4.3 Bus Timing (Standard Mode)

Refer to Section 6.7 of the SDA Physical Layer Specification, Version 3.01.

3.5 SD Card Registers

The card interface includes eight registers. The DSR Register is optional and not used in SanDisk SD Cards. For detailed register information, refer to Section 5 of the SDA Physical Layer Specification, Version 3.01.

3.5.1 Operation Conditions Register

The Operation Conditions Register (OCR) stores the card's VDD voltage profile. Refer to Section 5.1 of the SDA Physical Layer Specification, Version 3.01.

3.5.2 Card Identification Register

The Card Identification (CID) Register is 16 bytes long and contains the unique card identification number, programmed during manufacturing and unchangeable by hosts. See Table 3-4.

CID Register Definitions

Name Type Width CID Value Comments
Manufacturer ID (MID) Binary 8 0x03 Manufacturer IDs are controlled and assigned by the SD-3C, LLC.
OEM/Application ID (OID) ASCII 16 SD ASCII Code 0x53, 0x44 Identifies the card OEM and/or card contents. The OID is controlled and assigned by the SD-3C, LLC.
Product Name (PNM) ASCII 40 SD SD16G SD08G SD04G SD02G SD01G SD512 SD256 SD128 SD064 Five-character ASCII string.
Product Revision (PRV) BCD 8 Product Revision xx See Section 5.2 in the SDA Physical Layer Specification, Version 3.00.
Serial Number (PSN) Binary 32 Product Serial Number 32-bit unsigned integer
Reserved -- 4 -- --
Manufacture Date Code (MDT) BCD 12 Manufacture date (e.g., April 2001=0x014) Manufacturing date-yym (offset from 2000)
CRC7 Checksum (CRC) Binary 7 CRC7 Calculated
Not used, always 0 -- 1 -- --

3.5.3 Card Specific Data Register

The Card Specific Data (CSD) Register contains configuration information required to access card data, defining data format, error correction type, and maximum data access time. CSD Register field structures vary by physical specifications and card capacity. The CSD_STRUCTURE field indicates the structure version used. Table 3-5 shows version numbers related to CSD structure. Refer to Section 5.3.1 of the SDA Physical Layer Specification, Version 3.01.

CSD Register Structure

CSD_STRUCTURE CSD Structure Version Valid for SD Card Physical Specification Version / Card Capacity
0 CSD Version 1.0 Version 1.01 to 1.10 Version 2.00/Standard Capacity
1 CSD Version 2.0 Version 2.00/High Capacity
2-3 Reserved --

Table 3-6 provides an overview of the CSD Register. More field-specific information is in Section 5.3.2 of the SDA Physical Layer Specification, Version 3.01.

CSD Register (CSD Version 1.0)

Field CSD Value Description
CSD_STRUCTURE 1.0 CSD structure
TAAC -- Reserved
TAAC 1.5 msec Data read access-time-1
NSAC 0 Data read access-time-2 in CLK cycles (NSAC*100)
TRANS_SPEED Standard Mode 25MHz High Performance Mode 50MHz Ultra High Speed Mode 100MHz Maximum data transfer rate
CCC All (inc. WP, lock/unlock) Card command classes
READ_BL_LEN 2G = 0xA Up to 1G = 0x9 Maximum read data block length
READ_BL_PARTIAL Yes Partial blocks for read allowed
WRITE_BLK_MISALIGN No Write block misalignment
READ_BLK_MISALIGN No Read block misalignment
DSR_IMP No DSR implemented
-- -- Reserved
C_SIZE 64 MB 128 MB 256 MB 512 MB 1 GB 2 GB Secured 0xEDF 0xF03 0xF13 0xF1E 0xF22 0xF24 Device Size
VDD_R_CURR_MIN 100 mA Maximum read current @VDD min
VDD_R_CURR_MAX 80 mA Maximum read current @VDD max
VDD_W_CURR_MIN 100 mA Maximum write current @VDD min
VDD_W_CURR_MAX 80 mA Maximum write current @VDD max
C_SIZE_MULT 2G=2048 1G=1024 512=512 256=256 128=128 64=64 Device size multiplier
ERASE_BLK_EN Yes Erase single block enable
SECTOR_SIZE 31 blocks Erase sector size
WP_GRP_SIZE 127 sectors Write protect group size
WP_GRP_ENABLE Yes Write protect group enable
Reserved -- Reserved for MMC compatibility
R2W_FACTOR x16 Write speed factor
WRITE_BL_LEN 0x9 Maximum write data block length
WRITE_BL_PARTIAL No Partial blocks for write allowed
-- -- Reserved
FILE_FORMAT_GRP 0 File format group
COPY Has been copied Copy flag (OTP)
PERM_WRITE_PROTECT Not protected Permanent write protection
TMP_WRITE_PROTECT Not protected Temporary write protection
FILE_FORMAT HD w/partition File format
Reserved -- Reserved
CRC CRC7 CRC
-- -- Not used, always "1"

CSD Register (CSD Version 2.0)

Field CSD Value Description
CSD_STRUCTURE 2.0 CSD structure
-- -- Reserved
TAAC 1.5 msec Data read access-time
NSAC 0 Data read access-time in CLK cycles (NSAC*100)
TRANS_SPEED Standard Mode 25MHz High Performance Mode 50MHz Ultra High Speed Mode 100MHz Maximum data transfer rate
CCC All (inc. WP, lock/unlock) Card command classes
READ_BL_LEN 9 Maximum read data block length
READ_BL_PARTIAL Yes Partial blocks for read allowed
WRITE_BLK_MISALIGN No Write block misalignment
READ_BLK_MISALIGN No Read block misalignment
DSR_IMP No DSR implemented
-- 0 Reserved
C_SIZE 4 GB 6 GB 8 GB 12 GB 16 GB 32 GB Secured 0x1E5C 0x2D8C 0x3CDC 0x5B6C 0x79FC 0xF45C Device Size
ERASE_BLK_EN 1 Erase single block enable
SECTOR_SIZE 64 blocks Erase sector size
WP_GRP_SIZE 000000b Write protect group size
WP_GRP_ENABLE No Write protect group enable
Reserved -- Reserved for MMC compatibility
R2W_FACTOR x4 Write speed factor
WRITE_BL_LEN -- Maximum write data block length
WRITE_BL_PARTIAL No Partial blocks for write allowed
-- -- Reserved
FILE_FORMAT_GRP 0 File format group
COPY Has been copied Copy flag (OTP)
PERM_WRITE_PROTECT Not protected Permanent write protection
TMP_WRITE_PROTECT Not protected Temporary write protection
FILE_FORMAT HD w/partition File format
Reserved -- Reserved
CRC CRC7 CRC
-- -- Not used, always "1"

3.5.4 Card Status Register

The Card Status Register (CSR) transmits the card's status information to the host. It is defined in Section 4.10.1 in the SDA Physical Layer Specification, Version 3.01.

3.5.5 SD Status Register

The SD Status Register (SSR) contains status bits related to SD Card proprietary features and may be used for future applications. Its structure is described in Section 4.10.2 in the SDA Physical Layer Specification, Version 3.01.

SD Card Protocol Description

4.1 General Description

This chapter details SD Protocol information for the SanDisk SD Card, including SD bus protocol, card identification, and functional descriptions.

4.2 SD Bus Protocol

Communication over the SD bus uses command and data-bit streams initiated by a start bit and terminated by a stop bit. Refer to Section 3.6.1 of the SDA Physical Layer Specification, Version 3.01 for details.

4.3 Functional Description

The host controls all communication with the cards. This section provides an overview of card identification, data transfer modes, commands, card dependencies, operation modes, and clock signal control. It also covers responses, state transitions, error conditions, and timings. For comprehensive details, refer to Section 4 of the SDA Physical Layer Specification, Version 3.01.

4.3.1 Card Identification Mode

In Card Identification Mode, the host resets cards, validates voltage range, and requests cards to publish a relative card address. See Section 4.2 in the SDA Physical Layer Specification, Version 3.01.

4.3.2 Data Transfer Mode

In Data Transfer Mode, the host can operate the SanDisk SD Card in the specified frequency range. This section covers data read/write, erase, write-protect management, card lock/unlock, application-specific commands, switch function command, high-speed mode, command system, and the Send Interface Condition command (CMD8). CMD8 is relevant for identification mode and high-capacity SD cards. Refer to Section 4.3 of the SDA Physical Layer Specification, Version 3.01.

4.3.3 Clock Control

The host can use the bus clock signal to switch SanDisk SD cards to energy-saving mode or to control data flow. See Section 4.4 of the SDA Physical Layer Specification, Version 3.01.

4.3.4 Cyclic Redundancy Codes

Cyclic Redundancy Check (CRC) protects against transmission errors on the bus. Detailed information and examples for CRC7 and CRC16 are provided in Section 4.5 of the SDA Physical Layer Specification, Version 3.01.

4.3.5 Error Conditions

Refer to Section 4.6 of the SDA Physical Layer Specification, Version 3.01.

4.3.6 Commands

Refer to Section 4.7 of the SDA Physical Layer Specification, Version 3.01 for detailed information about card commands.

4.3.7 Card State Transition

Card state transitions are dependent on the received command and are defined in Section 4.8 of the SDA Physical Layer Specification, Version 3.01, along with command responses.

Appendix A: Ordering Information

Table 3-8 describes the user area for SanDisk SD Cards and provides DOS Image Parameters.

Part Number Capacity Interface Sequential Write Performance Sequential Read Performance Speed Class Rating
SDSDAA-001G 1GB SD3.0 n/a n/a n/a
SDSDAA-002G 2GB SD3.0 n/a n/a n/a
SDSDAB-002G 2GB SD3.0 7 MB/s 15 MB/s n/a
SDSDAA-004G 4GB SD3.0 n/a n/a 4
SDSDAB-004G 4GB SD3.0 5 MB/s 15 MB/s 4
SDSDAC-004G 4GB SD3.0 UHSI 30 MB/s 30 MB/s 10
SDSDAA-008G 8GB SD3.0 n/a n/a 4
SDSDAB-008G 8GB SD3.0 7 MB/s 15 MB/s 4
SDSDAC-008G 8GB SD3.0 UHSI 30 MB/s 30 MB/s 10
SDSDAA-016G 16GB SD3.0 n/a n/a 4
SDSDAB-016G 16GB SD3.0 7 MB/s 15 MB/s 4
SDSDAC-016G 16GB SD3.0 UHSI 30 MB/s 30 MB/s 10
SDSDAA-032G 32GB SD3.0 n/a n/a 4
SDSDAB-032G 32GB SD3.0 7 MB/s 15 MB/s 4
SDSDAC-032G 32GB SD3.0 UHSI 30 MB/s 30 MB/s 10
SDSDAB-064G 64GB SD3.0 7 MB/s 15 MB/s 4

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