User Manual for SUPERMICRO models including: MBD-X13DAI-T-O, X13DAI-T Motherboards, X13DAI-T, Motherboards

X13DAI-T - Supermicro

2023-07-03 — Note 2: Be sure to use processors of the same SKU on a multi-processor motherboard. Page 4. 4. Super X13DAI-T User's Manual. Conventions Used in the ...

X13DAI-T

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fca023b23ed26214b1bbcc21671cb4a096b7
X13DAI-T
USER'S MANUAL
Revision 1.0a

The information in this user's manual has been carefully reviewed and is believed to be accurate. The manufacturer assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/ or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING, OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in an industrial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer's instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate".
WARNING: This product can expose you to chemicals including
! lead, known to the State of California to cause cancer and birth
defects or other reproductive harm. For more information, go to www.P65Warnings.ca.gov.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0a
Release Date: July 03, 2023
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2023 by Super Micro Computer, Inc. All rights reserved. Printed in the United States of America

Preface
Preface
About This Manual
This manual is written for system integrators, IT technicians, and knowledgeable end users. It provides information for the installation and use of the X13DAI-T motherboard.
About This Motherboard
The Supermicro X13DAI-T supports dual 4th Generation Intel® Xeon® Scalable Processors (in Socket E LGA 4677) with four Ultra Path Interconnects (UPIs) (16 GT/s max.), up to 60 CPU cores, and a thermal design power (TDP) of up to 350W. Built with the Intel C741 chipset, the X13DAI-T supports up to 4TB 3DS RDIMM/RDIMM DDR5 ECC memory with speeds of up to 4800 MT/s in 16 DIMM slots (1DPC configuration). This motherboard features superior I/O expandability and flexibility, including five PCIe 5.0 x16/CXL slots, one PCIe 5.0 x8/CXL slot, two PCIe 5.0 x8 MCIO NVMe connectors (with support of four connections), ten SATA 3.0 connections (eight via one SlimSAS connector; two with support of SuperDOM devices), two PCIe 5.0 NVMe M.2 slots, two USB 2.0 connections (via one header), four USB 3.0 ports, two USB 3.0 connections (via one header), and one internal USB 3.1 Gen 2 connector. It also offers the most advanced data protection capability that provides the Trusted Platform Module (TPM) 2.0 support. The X13DAI-T is optimized for future PCIe specifications with flexible I/O, networking, storage, and Graphics Processing Unit (GPU) (optional) supports. It is ideal for use in general purpose servers with 3D Modeling and Rendering, 3D simulations, editing 8K video, visualization, and High Performance Computing (HPC). Also, the X13DAI-T is optimized for high-performance and high-end computing platforms that address the needs of next generation workstation applications. Please note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, please refer to our website at https://www.supermicro.com/products/.
Note 1: Memory speed support depends on the processors used in the system. Note 2: Be sure to use processors of the same SKU on a multi-processor motherboard.
3

Super X13DAI-T User's Manual
Conventions Used in the Manual
Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself:
Important: Important information given to ensure proper system installation or to relay safety precautions. Warning! Indicates important information given to prevent equipment/property damage or personal injury. Warning! Indicates high voltage may be encountered while performing a procedure. Note: Additional Information given to differentiate between various models or to provide information for proper system setup.
4

Preface

Contacting Supermicro

Headquarters Address:
Tel: Fax: Email:
Website:

Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. +1 (408) 503-8000 +1 (408) 503-8008 marketing@supermicro.com (General Information) Sales-USA@supermicro.com (Sales Inquiries) Government_Sales-USA@supermicro.com (Gov. Sales Inquiries) support@supermicro.com (Technical Support) RMA@supermicro.com (RMA Support) Webmaster@supermicro.com (Webmaster) www.supermicro.com

Europe Address:
Tel: Fax: Email:
Website:

Super Micro Computer B.V. Het Sterrenbeeld 28, 5215 ML 's-Hertogenbosch, The Netherlands +31 (0) 73-6400390 +31 (0) 73-6416525 Sales_Europe@supermicro.com (Sales Inquiries) Support_Europe@supermicro.com (Technical Support) RMA_Europe@supermicro.com (RMA Support) www.supermicro.nl

Asia-Pacific Address:
Tel: Fax: Email:
Website:

Super Micro Computer, Inc. 3F, No. 150, Jian 1st Rd. Zhonghe Dist., New Taipei City 235 Taiwan (R.O.C) +886-(2) 8226-3990 +886-(2) 8226-3992 Sales-Asia@supermicro.com.tw (Sales Inquiries) Support@supermicro.com.tw (Technical Support) RMA@supermicro.com.tw (RMA Support) www.supermicro.com.tw

5

Super X13DAI-T User's Manual
Table of Contents
Chapter 1 Introduction 1.1 Checklist ...............................................................................................................................8 1.2 Processor and Chipset Support .........................................................................................19 1.3 Special Features ................................................................................................................20 1.4 System Health Monitoring ..................................................................................................20 1.5 ACPI Features ....................................................................................................................21 1.6 Power Supply .....................................................................................................................21 1.7 Serial Port...........................................................................................................................21 Chapter 2 Installation 2.1 Static-Sensitive Devices .....................................................................................................22 2.2 Processor and Heatsink Installation...................................................................................23 2.3 Motherboard Installation .....................................................................................................52 2.4 Memory Support and Installation .......................................................................................54 2.5 Rear I/O Connectors/Ports .................................................................................................58 2.6 Front Control Panel ............................................................................................................61 2.7 Connectors and Headers ...................................................................................................67 2.8 Jumper Settings .................................................................................................................79 2.9 LED Indicators ....................................................................................................................83 Chapter 3 Troubleshooting 3.1 Troubleshooting Procedures ..............................................................................................86 3.2 Technical Support Procedures ...........................................................................................89 3.3 Frequently Asked Questions ..............................................................................................90 3.4 Battery Removal and Installation .......................................................................................91 3.5 Returning Merchandise for Service....................................................................................92 Chapter 4 UEFI BIOS 4.1 Introduction .........................................................................................................................93 4.2 Main Setup .........................................................................................................................94 4.3 Advanced Setup Configurations.........................................................................................96 4.4 Event Logs .......................................................................................................................157 4.5 BMC..................................................................................................................................159 4.6 Security.............................................................................................................................163
6

Preface 4.7 Boot ..................................................................................................................................169 4.8 Save & Exit.......................................................................................................................171 Appendix A BIOS POST Codes A.1 BIOS POST Codes...........................................................................................................173 Appendix B Software B.1 Microsoft Windows OS Installation...................................................................................174 B.2 Driver Installation..............................................................................................................176 B.3 SuperDoctor® 5................................................................................................................177 B.4 BMC..................................................................................................................................178 B.5 Logging into the BMC (Baseboard Management Controller)...........................................178 Appendix C Standardized Warning Statements
7

Super X13DAI-T User's Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance.
In addition to the motherboard, several important parts that are included in the retail box are listed below. If anything listed is damaged or missing, please contact your retailer.

1.1 Checklist
Description Supermicro Motherboard I/O Shield SATA Cables Quick Reference Guide CPU Carrier (E1A for SP XCC) CPU Carrier (E1B for SP MCC)

Main Parts List

Part Number X13DAI-T MCP-260-00181-0B CBL-0044L MNL-2569-QRG SKT-1333L-0000-FXC SKT-1424L-001B-LTS

Quantity 1 1 2 1 2 2

Important Links
For your motherboard to work properly, please follow the links below to download all necessary drivers/utilities and the user's manual for your computer.
· Supermicro product manuals: https://www.supermicro.com/support/manuals/
· Product drivers and utilities: https://www.supermicro.com/wdl/driver
· Product safety info: https://www.supermicro.com/about/policies/safety_information.cfm
· A secure data deletion tool designed to fully erase all data from storage devices can be
found at our website: https://www.supermicro.com/about/policies/disclaimer.cfm?url=/wdl/ utility/Lot9_Secure_Data_Deletion_Utility/
· Firmware-related and AOC user's guides: https://www.supermicro.com/support/manuals/
· If you have any questions, please contact our support team at: support@supermicro.
com
This manual may be periodically updated without notice. Please check the Supermicro website for possible updates to the manual revision level.

8

Chapter 1: Introduction X13DAI-T Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB revision available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.
9

Super X13DAI-T User's Manual
X13DAI-T Motherboard Layout
(not drawn to scale)

JPTG1 COM1

BMC
LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16 (JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1
(NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1
MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1
(SATA0~7)
FANA
FANB

M.2-C2
(NVME ONLY)

JL1

USB6/7 (3.0)

BT1 JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

Note: Components not documented are for internal testing only. 10

JPWR4

Chapter 1: Introduction

Quick Reference

LAN2

LAN1

FAN6 FAN8 VGA USB4/5 (3.0) USB2/3 (3.0) JAUDIO1

FAN5 FAN7

JPTG1
JPTG1
LEDBMC1
JNCSI1
COM1
COM1

BMC
LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

AUDIO FP

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16 (JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JNVI2C1 JIPMB1

JRK1

JRK1

M.2-C1

M.2-C1
(NVME ONLY)

LED4

LED4

JTPM1 JTP1
T-SGPIO1 USB0/1 JBT1
JPG1

JTP1 USB0/1
JPG1

T-SGPIO1
MH13 MH12

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC
JS1 (SATA0~7)
USB6/7 (3.0) USB8
(3.1 Gen 2) FANA FANB JL1

FANC
JS1
(SATA0~7)
FANA FANB
JL1

M.2-C2
(NVME ONLY)

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

LED7 BT1 I-SATA8 JVRM1, JVRM2 M.2-C2 FAN4 I-SATA9 JSD1, JSD2
FAN3

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

MAC CODE IPMI CODE

BAR CODE CM CODE

CPU1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2
P1_NVME0/1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

JPWR4

FAN10 FAN9
JPWR2
JPWR3
JPWR1
JPI2C1 LEDPWR1 P2_NVME0/1 JF1 JPWR4 FAN1
FAN2

Notes:
· See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-
nections.

· " " indicates the location of Pin 1.

· Jumpers/LED indicators not indicated are used for testing only.

· Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do
not install the onboard battery upside down to avoid a possible explosion.

11

Super X13DAI-T User's Manual

Quick Reference Table

Jumper JBT1 JPG1 JPTG1 JTP1 JVRM1 JVRM2

Description CMOS Clear VGA Port Enable/Disable 10GbE LAN Port Enable/Disable TPM Module Mode VRM SMBus Clock (to BMC or PCH) VRM SMBus Data (to BMC or PCH)

Default Setting Open (Normal) Pins 1-2 (Enabled) Pins 1-2 (Enabled) Pins 1-2 (Onboard TPM Module Enabled) Pins 1-2 (BMC, Normal) Pins 1-2 (BMC, Normal)

LED LED4 LED7
LEDBMC1
LEDPWR1

Description M.2-C1 LED M.2-C2 LED
BMC Heartbeat LED
Power LED

Status Blinking Green: Device Working Blinking Green: Device Working Blinking Green: BMC Normal (Active) Solid Green: During BMC Reset or during a Cold Reboot LED On: Onboard Power On

Connector AUDIO FP BT1 COM1 FAN1­FAN10, FANA, FANB, FANC
I-SATA8, I-SATA9
JAUDIO1 JF1 JIPMB1 JL1 JNCSI1
JNVI2C1
JPI2C1
JPWR1 JPWR2, JPWR3, JPWR4 JRK1
JS1 (SATA0~7)

Description Front Panel Audio Header Onboard CMOS Battery Front Accessible COM Header FAN1­FAN10: CPU Fan Headers FANA, FANB, FANC: System Fan Headers SATA 3.0 Connectors with support of SuperDOM devices * DOM: Disk on Module Rear I/O Audio Ports Front Control Panel Header 4-pin BMC External I2C Header Chassis Intrusion Header Network Controller Sideband Interface (NC-SI) Connector NVMe SMBus I2C Header used for PCIe SMBus clock and data connections with hot-plug support Power SMBus I2C Header used for monitoring the power supply, fans, and system temperatures 24-pin ATX Main Power Supply Connector
8-pin Power Connectors
Intel VROC Key Header for NVMe RAID support SlimSAS LP Connector with support of eight Intel PCH SATA 3.0 connections (Supports RAID 0, RAID 1, RAID 5, and RAID 10)

Note: For details on how to configure Network Interface Card (NIC) settings, please refer to the Network Interface Card Configuration User's Guide posted on our website under the link: https://www.supermicro.com/support/manuals/.

12

Chapter 1: Introduction

Connector JSD1, JSD2 JTPM1 LAN1, LAN2 M.2-C1, M.2-C2 P1 SLOT1/3/5 P2 SLOT2/4 P2 SLOT6 P1_NVME0/1 P2_NVME0/1 T-SGPIO1 USB0/1 USB2/3/4/5 USB6/7 USB8 VGA

Description SATA DOM Power Connectors Trusted Platform Module/Port 80 Header Rear I/O 10GbE LAN Ports (LAN1: shared BMC LAN port) PCIe 5.0 NVMe M.2 Slots (with support of M-Key 2280 and 22110) PCIe 5.0 x16 Slots supported by CPU1 PCIe 5.0 x16 Slots supported by CPU2 PCIe 5.0 x8 Slot supported by CPU2 NVMe PCIe 5.0 x8 MCIO Connector supported by CPU1 with two NVMe connections NVMe PCIe 5.0 x8 MCIO Connector supported by CPU2 with two NVMe connections Serial General Purpose I/O Header Front-accessible USB 2.0 Header Rear I/O USB 3.0 Ports Front-accessible USB 3.0 Header Internal USB 3.1 Gen 2 Connector Rear I/O VGA port

13

Super X13DAI-T User's Manual

Memory Slots
This motherboard contains 16 DIMM slots which support up to 4TB of DDR5 memory in 16 slots. Please refer to the layout below for the locations of the DIMM slots.

DIMM Slots Supported by CPU1 DIMM Slots Supported by CPU2

P1-DIMMA1

P2-DIMMA1

P1-DIMMB1

P2-DIMMB1

P1-DIMMC1

P2-DIMMC1

P1-DIMMD1

P2-DIMMD1

P1-DIMME1

P2-DIMME1

P1-DIMMF1

P2-DIMMF1

P1-DIMMG1

P2-DIMMG1

P1-DIMMH1

P2-DIMMH1

JPTG1
P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1
COM1

BMC
LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16 (JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

M.2-C1
(NVME ONLY)
LED4

P1-DIMME1 P1-DIMMF1 JTP1 P1-DIMMG1 USB0/1 P1-DIMMH1
JPG1

T-SGPIO1
MH13 MH12

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1
(SATA0~7)
FANA
FANB

M.2-C2
(NVME ONLY)

JL1

USB6/7 (3.0)

BT1 JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

14

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P2-DIMMH1

P2-DIMMG1

P2-DIMMF1

FAN9

P2-DIMME1

JPWR2

JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1

LEDPWR1

P2_NVME0/1

P1_NVME0/1

FAN1 FAN2

JPWR4

P1-DIMMD1 P1-DIMMC1
P1-DIMMB1 P1-DIMMA1

Chapter 1: Introduction
Motherboard Features
Motherboard Features CPU
· Supports dual 4th Gen. Intel Xeon Scalable Processors (in Socket E LGA 4677) with four UPIs (16 GT/s max.), up to 60
CPU cores, and a thermal design power (TDP) of up to 350W. Note: Be sure to use processors of the same SKU on a multi-processor motherboard.
Memory · Supports up to 4TB 3DS RDIMM/RDIMM DDR5 (288-pin) ECC memory with speeds up to 4800 MT/s in 16 DIMM slots.
Note: Memory speed and capacity support depends on the processors used in the system.
DIMM Size · Up to 256GB at 1.1V
Note: For the latest CPU/memory updates, please refer to our website at https://www.supermicro.com/products/ motherboard.
Chipset · Intel C741
Expansion Slots · Five PCIe 5.0 x16/CXL slots (CPU1 SLOT1/3/5, CPU2 SLOT2/4) · One PCIe 5.0 x8/CXL slot (CPU2 SLOT6) · Two PCIe 5.0 x8 MCIO NVMe connectors with support of four connections (P1_NVME0/1, P2_NVME0/1) · Two PCIe 5.0 NVMe M.2 slots (support M-Key 2280 and 22110)
Baseboard Management Controller (BMC)/Network · ASPEED AST2600 BMC (shared LAN) with RoT 2.0 · Two 10GbE LAN ports supported by Broadcom BCM57416 controller
Graphics · Graphics controller and VGA support via ASPEED AST2600 BMC
I/O Devices · One front accessible COM header (COM1) · One SlimSAS LP connector (JS1: SATA0~7) with support of eight Intel PCH SATA 3.0 connections (RAID 0, RAID 1,
RAID 5, and RAID 10 supported); Two Intel PCH powered SATA 3.0 connectors with support of SuperDOM devices (I-SATA8 and I-SATA9)
· One VGA port on the rear I/O panel Peripheral Devices
· One front-accessible USB 2.0 header with support of two connections (USB0/1) · Four USB 3.0 ports on the rear I/O panel (USB2/3/4/5) · One front-accessible USB 3.0 header with support of two connections (USB6/7) · One internal USB 3.1 Gen 2 connector (USB8)
15

Super X13DAI-T User's Manual
BIOS · AMI SPI BIOS · EFI GUI, SPI dual/quad speed control, Real Time Clock (RTC) wakeup, IPMIView, SMCIPMITOOL, IPMI CFG,
SuperDoctor® 5, Redundant power supply unit detection, SPM, SUM-OOB/InBand
Power Management · ACPI power management · S1, S5 support · Power button override mechanism · Power-on mode for AC power recovery · Wake-on-LAN · Power supply monitoring
System Health Monitoring · Onboard voltage monitoring for +12V, +5V/+5V standby, +3.3V, and +3.3V standby, Vcore, Vmem · Onboard temperature monitoring for CPU, VRM, LAN, PCH, system, and memory · 7+2 CPU switch phase voltage regulator · CPU thermal trip support · Platform Environment Control Interface (PECI)
Fan Control · Fan status monitoring via BMC connections · Dual cooling zone · Low-noise fan speed control · Thirteen 4-pin fan headers
System Management · SuperDoctor 5 for Windows Server and Red Hat/SuSE Linux · Chassis intrusion header and detection · Server platform service
Firmware Integrity/System Security · Trusted Platform Module (TPM) onboard
LED Indicators · Power LED · M.2 LEDs · LAN activity LEDs · BMC/CPLD firmware LED
Dimensions · 12.1" (W) x 13.1" (L) E-ATX (307.34 mm x 332.74 mm)
16

Chapter 1: Introduction Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and heatsink cooling restrictions. For proper thermal management, please check the chassis and heatsink specifications. Note 2: For BMC configuration instructions, please refer to the Embedded BMC Configuration User's Guide available at https://www.supermicro.com/support/manuals/.
17

Super X13DAI-T User's Manual

X13DAI-T

CPU1-D1 CPU1-C1 CPU1-B1 CPU1-A1

DDR5 4800/5600 DDR5 4800/5600 DDR5 4800/5600 DDR5 4800/5600

J7

J5

J3

J1

CPU1-H1 CPU1-G1 CPU1-F1 CPU1-E1

300W 550A Iccmax 185A IccTDC 922W Pmax

VR14 8 PHASE
300W

VR14 8 PHASE
300W

CPU1

P0

UPI

DDR5

P1

PECI:30 SOCKET ID:0

UPI P2
UPI

P3

PE0 PE1 PE2 PE3 PE4

UPI

IOU1 IOU3 IOU5 IOU7 IOU9 DMI3

P1

CPU2

P0

DDR5

P2

PECI:31 SOCKET ID:1

P3
PE4 PE2 PE1 PE0 PE3
N/A IOU8 IOU4 IOU2 IOU6

CPU2-A1 CPU2-B1 CPU2-C1 CPU2-D1

DDR5 4800/5600 DDR5 4800/5600 DDR5 4800/5600 DDR5 4800/5600

J17

J19

J21

J23

CPU2-E1 CPU2-F1 CPU2-G1 CPU2-H1

DDR5 4800/5600
DDR5 4800/5600
DDR5 4800/5600
DDR5 4800/5600

DDR5 4800/5600 DDR5 4800/5600 DDR5 4800/5600 DDR5 4800/5600

J15

J13

J11

J9

J25

J27

J29

J31

JPCIE5
JPCIE3
JPCIE1
M.2A
JM2_1
M.2B
JM2_2
1X x8 PCIe U.2 MCIO x8
JNVME1

PCIe GEN5 x16 PCIe GEN5 x16 PCIe GEN5 x16 PCIe GEN5 x4 PCIe GEN5 x4

PCIe GEN5 x8

PCIe GEN5 x12

HD AUDIO 7.1
ALC888 JAUDIO1

Intel HD AUDIO

DMI X4 DMI3

USB3.1 Gen2 x1 JUSB32_H1 ASM3142 JLAN1 & JLAN2 Broadcom BCM57416
JNCSI Header VGA port COM Header DDR4

NC-SI

PCIe GEN3 X2 PCIe GEN3 X4

MAC3/4
VGA BMC AST2600
DDR4 eMMC

PCIe IPMI

PCIe GEN2 X1
USB 2.0 USB2 4-5
eSPI

FWSPI

TPM

SPI BMC F/W
SPI0

eMMC

PCH
SPI CPLD LCMXO3LF -6900C

PCIe GEN5 x8

JPCIE6

PCIe GEN5 x16

JPCIE4

PCIe GEN5 x16

JPCIE2

PCIe GEN5 x8

#8 #7 #6 #5 #4 #3 #2 #1 6.0 Gb/S
SATA0-7

S-SAS

Slim-SAS x8 JS1

#2 #1 6.0 Gb/S

SATA DOM x2 SATA1 SATA2

1X x8 PCIe U.2
MCIO x8
JNVME2

SATA

SATA14-15 USB 2.0 USB2 0-1 USB 2.0

#2 #1
USB
Front IO

USB2 2-3 USB 3.0 USB3 8-9

#2 #1
USB
Rear IO

SPI

TPM HEADER

Debug Card

USB3.0 x2

USB2 3

USB3 9

TUSB8041 HUB

USB2 2

USB3 8

TUSB8041 HUB

TPM

USB2.0 x2 USB3.0 x2
USB2.0 x2 USB3.0 x2
USB2.0 x2 USB3.0 x2

#2 #1
USB
#2 #1
USB
#4 #3
USB

Front IO Rear IO Rear IO

eMMC

SPI BIOS

System Block Diagram

Note: This is a general block diagram and may not exactly represent the features on your motherboard. See the previous pages for the actual specifications of your motherboard.
18

Chapter 1: Introduction
1.2 Processor and Chipset Support
Built upon the functionality and capability of the 4th Gen. Intel Xeon Scalable Processors (Socket E) and the Intel C741 chipset, the X13DAI-T motherboard offers critical, pivotal technological breakthroughs that unleash unprecedented computing capabilities and provides a scalable platform optimized for applications used in Artificial Intelligence (AI) Acceleration, Deep Learning Boost, Network Interconnectivity, and Platform Manageability technologies. The key features supported by the platform include the following:
Processor Features Supported · Increased, scalable performance with substantial advancements, including UPI speed
improvement, memory speed/capacity/utilization enhancement, hardware-based security innovations for virtualization, and platform interconnectivity optimization
· Integrated accelerators optimized for workload enhancement including Advanced Matrix
Extensions (IntelAMX), In-Memory Analytics Accelerator (IAX), Data Streaming Accelerator (IntelDSA), and QuickAssist Technology (Intel QAT)
· Breakthroughs in memory and I/O support, including DDR5 (4800 MT/s max.), PCIe 5.0
(80 lanes max.), and CXL 1.1 (four devices per CPU)
· Increased operational and performance efficiency with substantial enhancements in virtu-
alization, network security, and telemetry and power management
· Integrated AI accelerators with support of 3rd Gen. Intel Deep Learning Boost and new
Tile Matrix Multiply (AMX/MUL)
· Enhanced Intel Security Boost Software Guard Extensions with Integrity Platform Firmware
Resilience support
· Intel Ultra Path Interconnect (Intel UPI) up to four links per processor at 16 GT/s · New Compute Express Link (CXL) and Intel Speed Select Technology · CPU with 52 physical address/57 virtual address support
PCH Features Supported · Flexible I/O at 20 lanes for PCIe 3.0, SATA and USB, and four DMIs at 8 GT/s
19

Super X13DAI-T User's Manual
1.3 Special Features
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state. See the Advanced BIOS Setup section for this setting. The default setting is Last State.
1.4 System Health Monitoring
Onboard Voltage Monitors
An onboard voltage monitor will scan the voltages of the onboard chipset, memory, and CPU continuously. Once a voltage becomes unstable, a warning is given, or an error message is sent to the screen.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the cooling fans. The CPU and chassis fans are controlled via BMC.
Environmental Temperature Control
System Health sensors monitor temperatures and voltage settings of onboard processors and the system in real time via the BMC interface. Whenever the temperature of the CPU or the system exceeds Supermicro's pre-defined threshold, the system and CPU cooling fan speed will increase to prevent the CPU or system from overheating.
Note: To avoid possible system overheating, please be sure to provide adequate airflow to your system.
System Resource Alert
This feature is available when used with SuperDoctor 5 in the Windows Server and Red Hat/ SuSE Linux. SuperDoctor 5 is used to notify the user of certain system events. For example, you can configure SuperDoctor 5 to provide you with warnings when the system temperature, CPU temperatures, voltages, and fan speeds go beyond a predefined range.
20

Chapter 1: Introduction
1.5 ACPI Features
ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a computer system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as network cards, hard disk drives and printers. In addition to enabling operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play, and an operating system-independent interface for configuration control. ACPI leverages the Plug and Play BIOS data structures, while providing a processor architecture-independent implementation that is compatible with appropriate Windows operating systems. For detailed information regarding OS support, please refer to the Supermicro website.
1.6 Power Supply
As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates where noisy power transmission is present. The X13DAI-T motherboard accommodates one 24-pin power connector (JPWR1) and three 12V 8-pin power connectors (JPWR2/JPWR3/JPWR4). Although most power supplies generally meet the specifications required by the CPU, some are inadequate. All these power connections are also required to ensure adequate power supply to the system. Warning! To avoid damaging the power supply or the motherboard, be sure to use a power supply that contains one 24-pin and three 8-pin power connectors. Be sure to connect the power supply to the 24-pin power connector (JPWR1) and the 8-pin power connectors (JPWR2/ JPWR3/JPWR4) on the motherboard. Failure in doing so may void the manufacturer warranty on your power supply and motherboard. It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2.02 or above. It must also be SSI compliant. The recommended power supply for the X13DAI-T motherboard is PWS-2K01-PQ PSU PS2 2000W Multi-output PLATINUM.
1.7 Serial Port
The X13DAI-T motherboard supports one serial communication connection. COM1 header can be used for input/output. The UART provides legacy speeds with a baud rate of up to 115.2 Kbps.
21

Super X13DAI-T User's Manual
Chapter 2
Installation
2.1 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic components. To avoid damaging your motherboard, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.
Precautions · Use a grounded wrist strap designed to prevent static discharge. · Touch a grounded metal object before removing the motherboard from the antistatic bag. · Handle the motherboard by its edges only; do not touch its components, peripheral chips,
memory modules or gold contacts.
· When handling chips or modules, avoid touching their pins. · Put the motherboard and peripherals back into their antistatic bags when not in use. · For grounding purposes, make sure that your computer chassis provides excellent conduc-
tivity between the power supply, the case, the mounting fasteners and the motherboard.
· Use only the correct type of onboard CMOS battery. Do not install the onboard battery
upside down to avoid a possible battery explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the motherboard, make sure that the person handling it is static protected.
22

Chapter 2: Installation
2.2 Processor and Heatsink Installation
The processor (CPU) and processor carrier should be assembled together first to form the processor carrier assembly. This assembly will be then attached to the heatsink to form the processor heatsink module (PHM) before being installed into the CPU socket. Before installation, be sure to perform the following steps:
· Please carefully follow the instructions given on the previous page to avoid ESD-related
damages.
· Unplug the AC power cords from all power supplies after shutting down the system. · Check that the plastic protective cover is on the CPU socket, and none of the socket pins
are bent. If they are, contact your retailer.
· When handling the processor, avoid touching or placing direct pressure on the LGA lands
(gold contacts). Improper installation or socket misalignment can cause serious damage to the processor or CPU socket, which may require manufacturer repairs.
· Thermal grease is pre-applied on a new heatsink. No additional thermal grease is needed. · Refer to the Supermicro website for updates on processor and memory support. · All graphics in this manual are for illustrations only. Your components may look different.
The 4th Gen. Intel Xeon Scalable Processor

SP XCC

SP MCC

Processor Top View

23

Super X13DAI-T User's Manual

1. The 4th Gen. Intel Xeon Scalable Processor Processor Top View

SP XCC

SP MCC

CPU Key Pin 1

CPU Key Pin 1

CPU Key

= Cutout = Pin 1 = CPU Key

24

2. The Processor Carrier Carrier E1A

Chapter 2: Installation Carrier E1B

Pin 1
Carrier Top View

Pin 1

Carrier Bottom View
= Cutout = Pin 1 = CPU Key
25

Super X13DAI-T User's Manual 3. 4U Heatsink

Air Flow Direction

Air Flow Direction

4U Heatsink and Heatsink Fan

Note: Exercise extreme care when handling the heatsink. Pay attention to the edges of heatsink fins, which can be sharp! To avoid damaging the heatsink, please do not apply excessive force on the fins.
26

Overview of the CPU Socket
The CPU socket is protected by a plastic protective cover.
Plastic Protective Cover

Chapter 2: Installation

CPU Socket 27

Super X13DAI-T User's Manual

Overview of the Processor Carrier Assembly
The processor carrier assembly contains a 4th Gen. Intel Xeon Scalable processor and a processor carrier. Carefully follow the instructions given in the installation section to place a processor into the carrier to create a processor carrier assembly. The processor carrier assembly includes a processor and a processor carrier as shown below.
1. The 4th Gen. Intel Xeon Scalable Processor (Component Side)

Processor (2D)

Processor (3D)

SP XCC

SP MCC

2. Processor Carrier (Top View) Processor Carrier (2D)

SP XCC

SP MCC

Processor Carrier (3D)

Carrier E1A

Carrier E1B

Carrier E1A

Carrier E1B

3. Processor Carrier Assembly (with processor seated inside the carrier)

Carrier E1A with SP XCC Installed
28

Carrier E1B with SP MCC Installed

Chapter 2: Installation
Overview of the Processor Heatsink Module (PHM) with SP XCC and Carrier E1A
The Processor Heatsink Module (PHM) contains a heatsink, a processor carrier, and a 4th Gen. Intel Xeon Scalable processor. 1. Heatsink (4U Heatsink)

2. Processor Carrier E1A

(Bottom View)

3. The 4th Gen. Intel Xeon Scalable Processor (SP XCC)

4. Processor Heatsink Module (PHM)

(Component Side)

(Bottom View) 29

Super X13DAI-T User's Manual
Overview of the Processor Heatsink Module (PHM) with SP MCC and Carrier E1B
The Processor Heatsink Module (PHM) contains a heatsink, a processor carrier, and a 4th Gen. Intel Xeon Scalable processor. 1. Heatsink (4U Heatsink)

2. Processor Carrier E1B

(Bottom View)

3. The 4th Gen. Intel Xeon Scalable Processor (SP MCC)
(Component Side)
4. Processor Heatsink Module (PHM)

(Bottom View) 30

Chapter 2: Installation
Creating the Processor Carrier Assembly
The processor carrier assembly contains a 4th Gen. Intel Xeon Scalable processor and a processor carrier. To create the processor carrier assembly, please follow the steps below.
Note: Before installation, be sure to follow the instructions given on pages 1 and 2 of this chapter to properly prepare for installation. 1. Hold the processor with the component side (including the gold contacts) facing down. Locate the small, gold triangle at the corner of the processor and the corresponding hollowed triangle on the processor carrier as shown below. Please note that the triangle indicates the location of Pin 1.

Pin 1
SP XCC

Pin 1
SP MCC

Pin 1
Carrier E1A

Pin 1
Carrier E1B

Processor with Matching Carrier

31

Super X13DAI-T User's Manual

2. First, turn over the processor carrier and locate Pin 1 on the CPU and Pin 1 on the carrier. Then, turn the processor over with component side (including the gold contacts) facing up and locate CPU keys on the processor. Finally, locate the CPU keys and four latches on the carrier as shown below.

CPU Key CPU Key

SP XCC
Latch

Latch

Latch Latch

CPU Key CPU Key

SP MCC
Latch

Latch
Carrier with the Processor Installed

Latch Latch

32

Chapter 2: Installation 3. Locate the lever on the CPU socket and press it down as shown below.

Lever

Lever

Carrier E1A

Carrier E1B

4. Using Pin 1 as a guide, carefully align the CPU keys (marked A and B) on the processor against the CPU keys on the carrier (marked a and b) as shown below.
5. Once they are properly aligned, carefully insert the CPU into the carrier, making sure that the CPU is properly secured by latches (marked 1, 2, 3, 4).

A
CPU Key

Latch Latch

Latch
B

4
CPU Key

1
a

2

3

CPU Key

b

Latch

CPU Key

SP XCC

A
CPU Key

CPU Key
B
Latch
4

CPU Key Latch
a
1

Latch

3 2
b
CPU Key

Latch

SP MCC

33

Super X13DAI-T User's Manual

6. After the processor is placed inside the carrier, examine the four sides of the processor, making sure that the processor is properly seated on the carrier.

Processor Carrier Assembly (Top View)

Processor Carrier Assembly (Component Side)

SP XCC

SP MCC

34

Chapter 2: Installation

Creating the PHM (4U Heatsink)
After creating the processor carrier assembly, please follow the instructions below to mount the processor carrier assembly into the heatsink to form the PHM.
Note: If this is a new heatsink, the thermal grease has been pre-applied on the underside. Otherwise, apply the proper amount of thermal grease.

1. Turn the heatsink over with the thermal grease, which is on the bottom side of the heatsink, facing up. Pay attention to the two triangle cutouts (marked A and B) located at the diagonal corners of the heatsink as shown below.
2. Hold the processor carrier assembly with component side facing up, and locate the triangle on the CPU and the triangle on the carrier. (Triangle indicates Pin 1.)
3. Using Pin 1 as a guide, turn the processor carrier assembly over with the gold contacts facing up. Locate the triangle cutout (marked A) on the heatsink and the corner (marked a) on the processor carrier assembly.
4. Align the corner (marked a) on the processor carrier assembly against the triangle cutout (marked A) on the heatsink, and align the corners (marked b, c, d) on the processor carrier assembly against the corners (marked B, C, D) on the heatsink.
5. Once they are properly aligned, place the corners (marked a, b, c, d) on the processor carrier assembly into the corners of the heatsink (marked A, B, C, D), making sure that all plastic clips are properly attached to the heatsink.

b d

a (CPU1) Pin 1
c

c (CPU2) Pin 1 a

C

Air Flow Direction

A

d B
b D

D

Air Flow Direction

B

A C

35

Super X13DAI-T User's Manual

Processor Carrier Assembly (Component Side)
(SP XCC, Carrier E1A)
b
d

c
(CPU2) Pin 1 a

C

Air Flow Direction

A

B D

Processor Carrier Assembly (Component Side)
(SP MCC, Carrier E1B)
b
d

c
(CPU2) Pin 1 a

C

Air Flow Direction

A

B D

Heatsink (Bottom Side)

Heatsink (Bottom Side)

Air Flow Direction

PHM (4U Heatsink) 36

Chapter 2: Installation
Preparing the CPU Socket for Installation
This motherboard comes with a plastic protective cover installed on the CPU socket. Remove it from the socket by following the instructions below. 1. Press the tabs inward.
2. Pull up the protective cover from the socket.
37

Super X13DAI-T User's Manual

Preparing to Install the PHM into the CPU Socket
After assembling the Processor Heatsink Module (PHM), you are ready to install it into the CPU socket. To ensure the proper installation, please follow the procedures below. 1. Locate four threaded fasteners (marked a, b, c, d) on the CPU socket.
CPU Socket
c
d
b
a

(a, b, c, d: Threaded Fasteners)

CPU Socket Pin1

2. Locate four peek nuts (marked A, B, C, D) and four rotating wires (marked 1, 2, 3, 4) on the heatsink as shown below.

A, B, C, D: Peek Nut 1, 2, 3, 4: Rotating Wire a, b, c, d: Threaded Fastener
Rotating Wire 2 B Rotating Wire 4
D

4U Heatsink (Top Side)

Air Flow Direction
Rotating Wire 3 C

Pin 1 Rotating Wire 1 A Rotating Wire 3
C

Air Flow Direction
Rotating Wire 4 D

Rotating Wire Peek Nut
(Unlatched) (Latched)

b d

CPU2 Socket

Pin 1 A

Rotating Wire 1 Peek Nut

c
a Pin 1

Pin 1 a
c

Rotating Wire 2

B

Peek Nut

d b

CPU1 Socket

38

Chapter 2: Installation

3. Check the rotating wires (marked 1, 2, 3, 4) to make sure that they are at unlatched positions as shown below before installing the PHM into the CPU socket.

Unlatched State
Side View
Rotating Wire 1

Top View

Peek Nut

4U Heatsink

39

Super X13DAI-T User's Manual

Installing the PHM into the CPU Socket
1. Align peek nut (marked A) on the heatsink against threaded fastener (marked a) on the CPU socket. Then align peek nuts (marked B, C, D) on the heatsink against threaded fasteners (marked b, c, d) on the CPU socket, making sure that all peek nuts on the heatsink are properly aligned with the correspondent threaded fasteners on the CPU socket.
2. Once they are aligned, gently place the heatsink on top of the CPU socket, making sure that each peek nut is properly attached to its corresponding threaded fastener.

A, B, C, D: Peek Nut on the Heatsink
B D

b

d
a, b, c, d: Threaded Fastener on the CPU socket

CPU2 Socket

4U Heatsink (Top Side)

Air Flow Direction

Air Flow Direction

A

C A

Pin 1 C

Pin 1
c a
Pin 1

a c
Pin 1
CPU1 Socket

D B
d b

40

Chapter 2: Installation 3. Press all four rotating wires outwards and make sure that the heatsink is securely
latched onto the CPU socket.
Latched State
4U Heatsink
41

Super X13DAI-T User's Manual 4. With a T30 screwdriver, tighten all peek nuts in the sequence of A, B, C, and D with even pressure. To avoid damaging the processor or socket, do not use excessive force when tightening the peek nuts. (For best durability, 8in-lbf torque is recommended.) 5. Examine all corners of the heatsink to ensure that the PHM is firmly attached to the CPU socket.
4U Heatsink
42

Chapter 2: Installation
Installing the Fan onto the 4U Heatsink
1. Align the aluminum fan shroud against the top of the 4U heatsink. The fan shroud was designed to match perfectly with the top of the heatsink in terms of geometric shape.
2. When the fan shroud and the top of the heatsink are properly aligned, gently push the fan onto the heatsink until the bottom of the fan properly rests on the two hooks of the heatsink as shown below.
Hooks
43

Super X13DAI-T User's Manual 3. Insert the torx screw into the screw hole on top the heatsink and turn it clockwise to tighten the screw.
torx screw
4. Connect the fan power connector to a 4-pin fan header on the motherboard.
44

Chapter 2: Installation
Uninstalling the Fan Before Removing the PHM (4U Heatsinks Only)
1. Loosen the torx screw from the heatsink. Unplug the fan power connector from the fan header.
2. Gently pull the heatsink fan upward to detach it from the heatsink.
45

Super X13DAI-T User's Manual
Removing the PHM from the CPU Socket
Before removing the PHM from the motherboard, be sure to shut down the system and unplug the power cables from the power supply. Then follow the steps below. 1. Use a T30 screwdriver to loosen the four peek nuts on the heatsink in the sequence of
A, B, C, and D.
B D
C A
4U Heatsink
46

Chapter 2: Installation 2. Once the peek nuts are loosened from the CPU socket, press the rotating wires inwards
to unlatch the PHM from the socket as shown below.
Unlatched State
4U Heatsink
47

Super X13DAI-T User's Manual 3. Gently pull the PHM upwards to remove it from the CPU socket. 4U Heatsink
48

Chapter 2: Installation
Removing the Processor Carrier Assembly from the PHM
To remove the processor carrier assembly from the PHM, please follow the steps below. 1. Detach the four plastic clips (marked a, b, c, d) on the processor carrier assembly from
the four corners of the heatsink (marked A, B, C, D) as shown below.

Processor Carrier Assembly (Component Side)
(SP XCC, Carrier E1A)
b
d

Processor Carrier Assembly (Component Side)
(SP MCC, Carrier E1B) b
d

c
(CPU2) Pin 1
a

B

c

(CPU2) Pin 1

a
D

B D

C A

C A

4U Heatsink (Bottom View)

49

Super X13DAI-T User's Manual
2. When all plastic clips are detached from the heatsink, remove the processor carrier assembly from the heatsink.

SP XCC

SP MCC

4U Heatsink (Bottom View) 50

Chapter 2: Installation
Removing the Processor from the Processor Carrier Assembly
Once you have removed the processor carrier assembly from the PHM, you are ready to remove the processor from the processor carrier by following the steps below. 1. Unlock the lever from its locked position and push the lever upwards to disengage the
processor from the processor carrier as shown in the drawings on the right below.
Lever
Processor Carrier Assembly (SP XCC, Carrier E1A)
Lever
Processor Carrier Assembly (SP MCC, Carrier E1B)
2. Once the processor is loosened from the carrier, carefully remove the processor from the processor carrier. Note: Please handle the processor with care to avoid damaging the processor and its pins.

SP XCC

SP MCC 51

Super X13DAI-T User's Manual

2.3 Motherboard Installation
All motherboards have standard mounting holes to fit different types of chassis. Make sure that the locations of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Tools Needed
Phillips Screwdriver (1)

Phillips Screws (9)

Standoffs (9) (Only if Needed)

JPTG1 COM1

BMC
LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1
(NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1
MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

LEDPWR1

FAN9 JPWR2
JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1

P2_NVME0/1

JPWR4

JS1
(SATA0~7)
FANA
FANB

M.2-C2
(NVME ONLY)

JL1

USB6/7 (3.0)

BT1 JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

Locations of Mounting Holes

P1_NVME0/1

FAN1 FAN2

Note 1: To avoid damaging the motherboard and its components, please do not use a force greater than 8 lbf-in on each mounting screw during motherboard installation.

Note 2: Some components are very close to the mounting holes. Please take precautionary measures to avoid damaging these components when installing the motherboard to the chassis.

52

Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the back of the chassis, if applicable. 2. Locate the mounting holes on the motherboard. See the previous page for the location.
3. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed. 5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components. 6. Using the Phillips screwdriver, insert a pan head #6 screw into a mounting hole on the
motherboard and its matching mounting hole on the chassis. 7. Repeat Step 6 to insert #6 screws into all mounting holes. 8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or components might look different from those shown in this manual.
53

Super X13DAI-T User's Manual
2.4 Memory Support and Installation
Note: Check the Supermicro website for recommended memory modules. Important: Exercise extreme care when installing or removing memory modules to prevent any possible damage.
Memory Support
This motherboard supports up to 4TB of 3DS RDIMM/RDIMM DDR5 (288-pin) ECC memory with speeds of up to 4800 MT/s in 16 DIMM slots.
Note: Memory speed and capacity support depends on the processors used in the system.

DDR5 Memory Support for 4th Gen. Intel Xeon Scalable Processors

DDR5 Memory Support for the 4th Gen. Intel Xeon Scalable Processors

Type RDIMM RDIMM 3DS

Ranks Per DIMM & Data Width (Stack)
SRx8 (RC D) SRx4 (RC C) SRx4 (RC F) 9x4 DRx8 (RC E) DRx4 (RC A)) DRx4 (RC B) 9x4
(4R/8R) x4 (RC A)

DIMM Capacity (GB)
16Gb (DRAM Density) 16GB 32GB 32GB 32GB 64GB 64GB
2H-128GB 4H-256GB

Speed (MT/s); Voltage (V); DIMM Per Channel (DPC)

1DPC (Note)

2DPC

1.1V

4800

4400

LRDIMM/LRDIMM-3DS

N/A

N/A

Not Supported Not Supported

Note: 1DPC applies to 1 SPC (Sockets Per Channel) or 2 SPC implementation.

54

Chapter 2: Installation

Memory Population for the X13DAI-T Motherboard (with 16 DIMM Slots)

DDR5 Memory Population Table for the X13DAI-T Motherboard (with 16 DIMM Slots)

1 CPU:

Memory Population Sequence

1 CPU & 1 DIMM P1-DIMMA1 or P1-DIMME1 or P1-DIMMB1 or P1-DIMMF1

1 CPU & 2 DIMMs

P1-DIMMA1 / P1-DIMMG1 or P1-DIMMC1 / P1-DIMME1

1 CPU & 4 DIMMs P1-DIMMA1 / P1-DIMMC1 / P1-DIMME1 / P1-DIMMG1

1 CPU & 6 DIMM

P1-DIMMA1 / P1-DIMMC1 / P1-DIMMD1 / P1-DIMME1 / P1-DIMMF1 / P1-DIMMG1 or P1-DIMMA1 / P1-DIMMB1 / P1-DIMMC1 / P1-DIMME1 / P1-DIMMG1 / P1-DIMMH1 or P1-DIMMB1 / P1-DIMMC1 / P1-DIMMD1 / P1-DIMME1 / P1-DIMMF1 / P1-DIMMH1 or P1-DIMMA1 / P1-DIMMB1 / P1-DIMMD1 / P1-DIMMF1 / P1-DIMMG1 / P1-DIMMH1

1 CPU & 8 DIMMs P1-DIMMA1 / P1-DIMMB1 / P1-DIMMC1 / P1-DIMMD1 / P1-DIMME1 / P1-DIMMF1 / P1-DIMMG1 / P1-DIMMH1

2 CPUs: (Recommended)

Memory Population Sequence

2 CPUs & 2 DIMMs

CPU1: P1-DIMMA1, CPU2: P2-DIMMA1 or CPU1: P1-DIMME1, CPU2: P2-DIMME1 or CPU1: P1-DIMMB1, CPU2: P2-DIMMB1 or CPU1: P1-DIMMF1, CPU2: P2-DIMMF1

2 CPUs & 4 DIMMs

CPU1: P1-DIMMA1 / P1-DIMMG1, CPU2: P2-DIMMA1 / P2-DIMMG1 or CPU1: P1-DIMMC1 / P1-DIMME1, CPU2: P2-DIMMC1 / P2-DIMME1

2 CPUs & 8 DIMMs

CPU1: P1-DIMMA1 / P1-DIMMC1 / P1-DIMME1 / P1-DIMMG1 CPU2: P2-DIMMA1 / P2-DIMMC1 / P2-DIMME1 / P2-DIMMG1

2 CPUs & 12 DIMMs

CPU1: P1-DIMMA1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMG1 CPU2: P2-DIMMA1/P2-DIMMC1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1/P2-DIMMG1
or CPU1: P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1/P1-DIMMH1 CPU2: P2-DIMMA1/P2-DIMMB1/P2-DIMMC1/P2-DIMME1/P2-DIMMG1/P2-DIMMH1
or CPU1: P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMH1 CPU2: P2-DIMMB1/P2-DIMMC1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1/P2-DIMMH1
or CPU1: P1-DIMMA1/P1-DIMMB1/P1-DIMMD1/P1-DIMMF1/P1-DIMMG1/P1-DIMMH1 CPU2: P2-DIMMA1/P2-DIMMB1/P2-DIMMD1/P2-DIMMF1/P2-DIMMG1/P2-DIMMH1

2 CPUs & 16 DIMMs

CPU1: P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1/P1-DIMMG1/P1-DIMMH1 CPU2: P2-DIMMA1/P2-DIMMB1/P2-DIMMC1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1/P2-DIMMG1/P2-DIMMH1

Note: This memory configuration is recommended by Supermicro for optimal memory performance. Please use this configuration to maximize your memory performance.

55

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

Super X13DAI-T User's Manual

DIMM Installation

Note: The DDR5 DIMM module is NOT hot-swappable JPTG1

and be sure to disconnect power for a minimum of

twenty seconds before inserting or removing it.

COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

1. Insert the desired number of DIMMs into the memory

M.2-C1

slots based on the recommended DIMM population tables

(NVME ONLY) LED4

in the previous section. Locate DIMM memory slots on

JTP1 USB0/1

T-SGPIO1

MH13

the motherboard as shown on the right.

JPG1 MH12

FANC

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

MH10

MH11

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

BIOS LICENSE
X13DAI-T
REV:1.00 DESIGNED IN USA

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

Release Tabs
3. Align the key of the memory module with the receptive point on the memory slot.
Key

4. Align the notches on both ends of the module against the receptive points on the ends of the slot.
Notches

5. Push both ends of the module straight down into the slot until the module snaps into place.
6. Press the release tabs to the lock positions to secure the memory module into the slot.
Push both ends straight down into the memory slot.
56

Chapter 2: Installation
DIMM Removal
Press both release tabs on the ends of the memory module to unlock it. Once the memory module has been loosened, remove it from the memory slot.
Note: Removing a DDR5 DIMM module at a slant angle will cause module damages. It is strongly recommended that you lift the module straight up out of the slot.
Warning! Please do not use excessive force when pressing the release tabs on the ends of the DIMM socket to avoid causing any damage to the memory module or the DIMM socket. Please handle memory modules with care. Carefully follow all the instructions given on the first page of this chapter to avoid ESD-related damages done to your memory modules or components.
57

Super X13DAI-T User's Manual
2.5 Rear I/O Connectors/Ports
7.1 High-Definition (HD) Audio This motherboard features a 7.1 Channel High-Definition (HD) Audio codec that provides eight Digital to Analog Converter (DAC) channels. The HD audio supports multiple-streaming 7.1 sound playback through the front_panel stereo output via the subwoofer speakers. Download the appropriate software from our website to enable this function.
VGA Port There is one VGA port located on the rear I/O panel. The VGA connection provides analog interface support between the computer and the video displays. Refer to the layout below for the location of VGA connection.

JPTG1 COM1

4

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. Line In 2. Line Out 3. Mic In 4. VGA

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

58

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1 2 3

4

Chapter 2: Installation

Universal Serial Bus (USB) Ports and Headers
There are four USB 3.0 ports (USB2, USB3, USB4, USB5) on the rear I/O panel. The USB 2.0 header, located at USB0/1, and one USB 3.0 header, located at USB6/7, support two USB connections of each for front access. USB8 is the internal USB 3.1 Gen 2 connector. These USB ports and headers/connector can be used for USB support via USB cables (not included).

USB 3.0 Header (USB6/7) Pin Definitions

Pin# Definition

Pin# Definition

1

USB3_RN1

11 USB_P2

2

USB3_RP1

12 USB_N2

3

GND

13 GND

4

USB3_TN1

14 USB3_TP2

5

USB3_TP1

15 USB3_TN2

6

GND

16 GND

7

USB_N1

17 USB3_RP2

8

USB_P1

18 USB3_RN2

9

GND

19 VBUS

10 NC

X

USB 3.1 Gen 2 Connector (USB8) Pin Definitions

Pin# Definition

Pin# Definition

1

VBUS

20 VBUS

2

USB3_TP1

19 USB3_TP2

3

USB3_TN1

18 USB3_TN2

4

GND

17 GND

5

USB3_RP1

16 USB3_RP2

6

USB3_RN1

15 USB3_RN2

7

VBUS

14 GND

8

USBC_CC1

13 USB_N

9

USBC_SBU1 12 USB_P

10 USBC_SBU2

11 USBC_CC2

JPTG1 COM1

3

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

2

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1

T-SGPIO1
1 MH13

JPG1

MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

4
M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
5
JSD2
I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

59

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. USB0/1: USB 2.0 Header 2. USB2/USB3: USB 3.0 Ports 3. USB4/USB5: USB 3.0 Ports 4. USB6/7: USB 3.0 Header 5. USB8: Internal USB 3.1 Gen 2 Connector

2

3

Super X13DAI-T User's Manual
LAN Ports (LAN1/LAN2) Two Ethernet LAN ports (LAN1, LAN2) are located on the rear I/O panel. LAN1/LAN2 ports support 10GbE LAN connections (via the Broadcom BCM57416 controller) and share with the support for the Baseboard Management Controller (BMC). LAN1 is the shared BMC LAN port. Both of the LAN ports accept RJ45 cables. Please refer to Section 2.9 for LAN LED information.

JPTG1 COM1

2

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

1

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. LAN1 (Shared BMC LAN Port) 2. LAN2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

60

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1

2

Chapter 2: Installation

2.6 Front Control Panel
The front control panel header (JF1) contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. Refer to the figure below for the descriptions of the front control panel buttons and LED indicators.

JPTG1 COM1

BMC
LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1
(NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1
MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

LEDPWR1

FAN9 JPWR2
JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1

P2_NVME0/1

JS1
(SATA0~7)
FANA
FANB

M.2-C2
(NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

JF1
12

Power Button

Ground

CPU1

P1_NVME0/1

FAN1 FAN2

Reset Button

Ground

3.3V Red+ (Blue LED_Cathode_UID) NIC2 (Activity) LED

Power Fail (for LED6) Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) NIC2 (Link) LED

NIC1 (Activity) LED

NIC1 (Link) LED

ID_UID/3.3V Stby

HDD LED

3.3V PWR LED+(Cable)
Key

FP PWR LED Key

NMI PWR LED-(Cable)
19

Ground 20

61

Super X13DAI-T User's Manual

Front Control Panel (JF1) LEDs

Event Power On HDD Activity NIC Activity Overheat Fan Fail Power Fail Checking
Recovering/Updating
Flash Not Detected or Golden Image Check Failed CPLD Recovery Mode

Power (LED1)
Solid On

Front Control Panel (JF1) LED Indicators

HDD (LED2)

LAN (LED3/4)

Blinking

Blinking

BMC/BIOS Blinking at 4HZ BMC Blinking at 4HZ BMC 2 Blinks at 4Hz, 1 Pause at 2Hz (on-on-off-off) BMC/BIOS Blinking at 1HZ

Information (LED5)
Solid On Blinking at 1Hz Blinking at 1/4Hz

Blinking at 10Hz (FP Red LED)

Power Fail (LEDPWR)
Solid On

62

Chapter 2: Installation

Power On & BMC/BIOS Status LED Button

The Power On and BMC/BIOS Status LED button is located on Pin 1 and Pin 2 of JF1.

Momentarily contacting both pins will power on/off the system or display BMC/BIOS status. Refer to the tables below for more information.

Power Button & BIOS/BMC Status LED Indicator Pin Definitions (JF1)

Pin# Definition

1

Signal

2

Ground

Status

Power Button LED Indicator Status

Green: solid on

BMC/BIOS blinking green at 4Hz

BIOS blinking green at 4Hz

BMC blinking red x2 (2 blinks red) at 4Hz, 1 pause at 2Hz (on-on-off-off) BMC/BIOS blinking green at 1Hz

Event System power on BMC/BIOS checking BIOS recovery/update in progress BMC recovery/update in progress Flash not detected or golden image checking failure

Reset Button

The Reset Button connection is located on Pin 3 and Pin 4 of JF1. Momentarily contacting both

pins will reset the system. Refer to the table below for pin definitions.

Reset Button Pin Definitions (JF1)

Pin# Definition

3

Reset

4

Ground

1 Power Button 2 Reset Button

JF1
12

Ground Ground

1. PWR Button 2. Reset Button

3.3V Red+ (Blue LED_Cathode_UID) NIC2 (Activity) LED

Power Fail (for LED6) Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) NIC2 (Link) LED

NIC1 (Activity) LED

NIC1 (Link) LED

ID_UID/3.3V Stby

HDD LED

3.3V PWR LED+(Cable)
Key

FP PWR LED Key

NMI PWR LED-(Cable)
19

Ground 20

63

Super X13DAI-T User's Manual

Power Fail LED

The Power Fail LED connection is located on Pin 5 and Pin 6 of JF1. When this LED turns solid red, it indicates a power failure. Refer to the table below for pin definitions.

Pin# Definition

Power Fail LED Pin Definitions (JF1)

5 3.3V 6 PWR Fail for LEDPWR (Solid red on: PWR failure)

Information LED (OH/Fan Fail/PWR Fail/UID LED)
The Information LED (OH/Fan Fail/PWR Fail/UID LED) connection is located on Pin 7 and Pin 8 of JF1. The LED on Pin 8 provides warnings of overheat, power failure, or fan failure. Refer to the table below for more information.

Information LED-Blue+ (OH/Fan Fail/PWR Fail LED/Blue UID LED) (Pin 7 & Pin 8 of JF1) LED Indicator Status

Status

Description

Solid red (on) Blinking red (1Hz)

Overheating, recovering/updating, flash not detected or golden image checking fail have occurred.
Fan failure: check for an inoperative fan.

Blinking red (0.25Hz)

Power failure: check for a non-operational power supply.

Blinking red (10Hz) (FP red LED)

CPLD recovery mode error(s).

Status

Information LED-Blue+ (Blue UID LED) (Pin 7 & Pin 8 of JF1) LED Indicator Status
Description

BIOS/BMC blinking blue (10Hz) (blinking for a few minutes, and stop when recovery complete)
BIOS/BMC blinking blue (10Hz) (never stop)

Recovering/Updating; CPLD recovery mode.
OTP has not been programmed.

JF1
12

Power Button

Ground

Reset Button
3.3V Red+ (Blue LED_Cathode_UID) NIC2 (Activity) LED

Ground
1 Power Fail (for LED6) 2 Blue+
(Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) NIC2 (Link) LED

NIC1 (Activity) LED

NIC1 (Link) LED

ID_UID/3.3V Stby

HDD LED

3.3V PWR LED+(Cable)
Key

FP PWR LED Key

NMI PWR LED-(Cable)
19

Ground 20

64

1. Power Fail LED 2. Information LED

Chapter 2: Installation

NIC1/NIC2 (LAN1/LAN2)
The NIC (Network Interface Controller) LED connection for LAN port 1 is located on Pin 11 and Pin 12 of JF1, and LAN port 2 is on Pin 9 and Pin 10. Refer to the tables below for pin definitions.

LAN1/LAN2 LED Pin Definitions (JF1)

Pin# Definition

Pin# Definitin

9 NIC 2 Activity LED 10 NIC 2 Link LED

11 NIC 1 Activity LED 12 NIC 1 Link LED

LAN1/LAN2 LED LED Indicator Status

Color

State

NIC 2: Blinking green LAN 2: Active

NIC 1: Blinking green LAN 1: Active

ID_UID Button/HDD LED
The UID Button/HDD LED connection is located on Pin 13 and Pin 14 of JF1. The UID Button is used for a chassis that supports a front UID Button. The front UID Button functions in the same way as the rear UID Button; both are for input only and cannot be used for output.
When this LED is blinking green, it indicates HDD is active. Attach a cable to Pin 13 and Pin 14 to show ID_UID status and hard drive activity. Refer to the tables below for pin definitions.

ID_UID/HDD LED Pin Definitions (JF1) Pin# Definition 13 ID_UID/3.3V Stdby
14 HDD Activity

ID_UID/HDD LED Pin Definitions (JF1)

Color

State

Blinking Green

HDD Active

Power Button

JF1
12

Ground

Reset Button

Ground

1. NIC2 (LAN2) LED 2. NIC1 (LAN1) LED 3. ID_UID/HDD LED

3.3V

Power Fail (for LED6)

Red+ (Blue LED_Cathode_UID)
NIC2 (Activity) LED NIC1 (Activity) LED
ID_UID/3.3V Stby

Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED)
1 NIC2 (Link) LED 2 NIC1 (Link) LED HDD LED 3

3.3V PWR LED+(Cable)
Key

FP PWR LED Key

NMI PWR LED-(Cable)
19

Ground 20

65

Super X13DAI-T User's Manual
Front Panel Power LED The Front Panel Power LED connection is located on Pin 15 and Pin 16 of JF1. Refer to the table below for pin definitions. Please note that Pin 15 and Pin 16 are also for the connection of PWR LED+(Cable).
FP Power LED Pin Definitions (JF1) Pin# Definition 15 3.3V 16 FP PWR LED
NMI Button The non-maskable interrupt (NMI) button header is located on Pin 19 and Pin 20 of JF1. Refer to the table below for pin definitions. Please note that Pin 19 and Pin 20 are also for the connection of PWR LED-(Cable).
NMI Button Pin Definitions (JF1) Pin# Definition 19 NMI 20 Ground

JF1
12

Power Button

Ground

Reset Button

Ground

3.3V Red+ (Blue LED_Cathode_UID) NIC2 (Activity) LED

Power Fail (for LED6) Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) NIC2 (Link) LED

NIC1 (Activity) LED

NIC1 (Link) LED

ID_UID/3.3V Stby

HDD LED

3.3V PWR LED+(Cable)
Key

1 FP PWR LED
Key

NMI PWR LED-(Cable)

Ground 2

19 20

1. FP PWR LED 2. NMI

66

Chapter 2: Installation

2.7 Connectors and Headers

Power Connections

ATX Power Supply Connector (JPWR1)

The 24-pin power supply connector (JPWR1) meets the ATX power specification. You must also connect the 8-pin 12V DC power connectors (JPWR2/JPWR3/JPWR4) to the power supply to provide adequate power to your system.

Important: To provide adequate power supply to the motherboard, be sure to connect

the 24-pin ATX power connector and the 8-pin power connectors to the power sup-

ply. Failure to do so may void the manufacturer warranty on your power supply and

motherboard.

12V 8-pin Power Pin Definitions Pin# Definition 1 - 4 Ground
5 - 8 +12V Required Connection

ATX Power 24-pin Connector Pin Definitions

Pin# Definition Pin# Definition

13 +3.3V

1

+3.3V

14 NC

2

+3.3V

15 Ground 3

Ground

16 PS_ON 4

+5V

17 Ground 5

Ground

18 Ground 6

+5V

19 Ground 7

Ground

20 Res (NC) 8

PWR_OK

21 +5V

9

5VSB

22 +5V

10 +12V

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

AUDIO FP

23 +5V

11 +12V

JPTG1

BMC LEDBMC1

LAN CTRL
FAN8

JAUDIO1
24 Ground 12 +3.3V

CPU2

Required Connection

JNCSI1

FAN7

FAN6

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

FAN5 COM1

1. JPWR1: 24-pin ATX Power

Connector

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

LEDPWR1

FAN9 JPWR2
JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1

1

P2_NVME0/1

JPWR4

P1_NVME0/1

FAN1 FAN2

67

Super X13DAI-T User's Manual
ATX Power Supply Connector (JPWR2/JPWR3/JPWR4) It is required to connect the 8-pin 12V DC power connectors (JPWR2/JPWR3/JPWR4) to the power supply to provide adequate power to your system.
12V 8-pin Power Pin Definitions Pin# Definition 1 - 4 Ground 5 - 8 +12V Required Connection
Important: To provide adequate power supply to the motherboard, be sure to connect the 24-pin ATX power connector and the 8-pin power connectors to the power supply. Failure to do so may void the manufacturer warranty on your power supply and motherboard.

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. JPWR2: 8-pin Power Connector 2. JPWR3: 8-pin Power Connector 3. JPWR4: 8-pin Power Connector

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

LEDPWR1

FAN9 JPWR2
JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1

1 2

P2_NVME0/1

P1_NVME0/1

FAN1

3

JPWR4

FAN2

68

Chapter 2: Installation

Headers

Fan Headers
There are thirteen 4-pin fan headers (FAN1­FAN10: CPU fan headers; FANA, FANB, FANC: system fan headers) on the motherboard. All these 4-pin fan headers are backwards compatible with the traditional 3-pin fans. However, fan speed control is available for 4-pin fans only by Thermal Management via the BMC interface. Refer to the table below for pin definitions.

Fan Header Pin Definitions

Pin# Definition

1

Ground

2

2.5A/+12V

3

Tachometer

4

PWM_Control

JPTG1 COM1

BMC LEDBMC1

LAN CTRL

JNCSI1

8
FAN8

VGA LAN2 USB4/5 (3.0)

FAN7

7

FAN6

6

FAN5

5

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1
13

T-SGPIO1 MH13 MH12

FANC

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

11
JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

12 JL1

USB6/7 (3.0)

4 3 BT1 JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

FAN9
9 10 JPWR2
JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1

LEDPWR1

P2_NVME0/1

JPWR4

1

FAN1

P1_NVME0/1

2

FAN2

69

1. FAN1 2. FAN2 3. FAN3 4. FAN4 5. FAN5 6. FAN6 7. FAN7 8. FAN8 9. FAN9 10. FAN10 11. FANA 12. FANB 13. FANC

Super X13DAI-T User's Manual

TPM/Port 80 Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is available from Supermicro (optional). A TPM/Port 80 connector is a security device that supports encryption and authentication in hard drives. It allows the motherboard to deny access if the TPM, which is associated with the hard drive, is not installed in the system. Refer to the layout below for the location of the TPM header. Please go to the following link for more information on the TPM: https://www.supermicro.com/manuals/other/AOM-TPM9670V_9670H.pdf.

Trusted Platform Module Header Pin Definitions

Pin# Definition

Pin# Definition

1

+3.3V

2

SPI_CS#

3

RESET#

4

SPI_MISO

5

SPI_CLK

6

GND

7

SPI_MOSI 8

NC

9

+3.3V Stdby 10 SPI_IRQ#

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)

LED4
1

JTP1 USB0/1

T-SGPIO1

MH13 JPG1

MH12

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

70

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. TPM Header (JTPM1)

Chapter 2: Installation
4-pin BMC External I2C Header An SMBus (I2C) header for the BMC is located at JIPMB1. Connect the appropriate cable here to use the IPMB I2C connection on your system. Refer to the layout for the location of JIPMB1.
NC-SI Connector The Network Controller Sideband Interface (NC-SI) connector is located at JNCSI1. This connector is used to connect a Network Interface Card (NIC) to the motherboard to allow the onboard BMC to communicate with a network.
Note: For detailed instructions on how to configure Network Interface Card (NIC) settings, please refer to the Network Interface Card Configuration User's Guide posted on the web page under the link: https://www.supermicro.com/support/manuals/.

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

2

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

1

JRK1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

71

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. BMC External Header (JIPMB1) 2. NC-SI Connector (JNCSI1)

Super X13DAI-T User's Manual

T-SGPIO Header The Serial General Purpose Input/Output header (T-SGPIO1) is used to communicate with the enclosure management chip on the backplane. Refer to the table below for pin definitions.

T-SGPIO Header Pin Definitions

Pin# Definition Pin# Definition

1

NC

2

NC

3

Ground 4

Data

5

Load

6

Ground

7

Clock 8

NC

NC = No Connection

Audio Front Panel Header
A 10-pin audio header (AUDIO FP) located on the motherboard allows you to use the onboard sound chip (ALC888S) for audio function. Connect an audio cable to this header to use this feature. Refer to the table below for pin definitions.

Audio Header Pin Definitions

Pin# Definition

1

Microphone_Left

3

Microphone_Right

5

Line_2_Right

7

Jack_Detect

9

Line_2_Left

Pin# Definition

2

Audio_Ground

4

Audio_Detect

6

Ground

8

Key

10 Ground

JPTG1

BMC LEDBMC1

LAN CTRL

VGA LAN2 USB4/5 (3.0)
FAN8

LAN1 USB2/3 (3.0)

2
AUDIO FP

JAUDIO1

JNCSI1

FAN7

CPU2

1. T-SGPIO Header (T-SGPIO1)

FAN6 FAN5 COM1

2. Audio Front Panel Header (AUDIO FP)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

1JTP1
USB0/1 JPG1

T-SGPIO1 MH13 MH12

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

72

JPWR4

Chapter 2: Installation

Disk-On-Module Power Connector

The Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power to a

solid-state DOM storage devices connected to one of the SATA ports. Refer to the table

below for pin definitions.

DOM Power Pin Definitions

Pin# Definition

1

5V

2

Ground

3

Ground

NVMe SMBus Header
The NVMe SMBus (I2C) header (JNVI2C1), used for PCIe SMBus clock and data connections, provides hot-plug support via a dedicated SMBus interface. This feature is only available for a Supermicro complete system with an Supermicro-proprietary NVMe add-on card and a proper cable installed. Refer to the table below for pin definitions.

NVMe SMBus Header Pin Definitions

Pin# Definition

1

Data

2

Ground

3

Clock

4

VCCIO

JPTG1
COM1
3

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

1 USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

2USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

73

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. Disk-On-Module (DOM) Power Connector (JSD1)
2. Disk-On-Module (DOM) Power Connector (JSD2)
3. NVMe SMBus (I2C) Header (JNVI2C1)

Super X13DAI-T User's Manual

Power SMBus (I2C) Header

The Power SMBus (I2C) header (JPI2C1) monitors the power supply, fans, and system temperatures. Refer to the table below for pin definitions.

Power SMBus Header Pin Definitions

Pin# Definition

1

Clock

2

Data

3

PMBUS_Alert

4

Ground

5

+3.3V

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable from the chassis to inform you when the chassis is opened. Refer to the table below for pin definitions.

Chassis Intrusion Pin Definitions

Pin# Definition

1

Intrusion Input

2

Ground

JPTG1

BMC LEDBMC1

LAN CTRL

VGA LAN2 USB4/5 (3.0)
FAN8

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

JNCSI1

FAN7

CPU2

1. Power SMBus (I2C) Header

FAN6 FAN5 COM1

(JPI2C1) 2. Chassis Intrusion Header (JL1)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7)
FANA

FANB

M.2-C2 (NVME ONLY)

2 JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2
JPWR3
1
JPWR1 JPI2C1(PWR I2C)
JF1
FAN1
FAN2

74

JPWR4

Chapter 2: Installation

COM Header
A single COM connection (COM1) is located on the motherboard. COM1 is located next to P1 SLOT1. Refer to the layout below for the location of COM1.

COM Header Pin Definitions

Pin# Definition

Pin# Definition

1

DCD

6

DSR

2

RXD

7

RTS

3

TXD

8

CTS

4

DTR

9

RI

5

Ground

10 N/A

M.2-C1/M.2-C2 Slots (for NVMe Only)
Two M.2 slots are located at M.2-C1 and M.2-C2 on the motherboard. These M.2 slots support PCIe 5.0 x4 M.2 NVMe devices in the 2280 and 22110 form factors. M.2 allows for a variety of card sizes, increased functionality, and spatial efficiency. Refer to the layout below for the locations of M.2-C1 and M.2-C2.

JPTG1

BMC LEDBMC1

LAN CTRL

VGA LAN2 USB4/5 (3.0)
FAN8

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

1
COM1

JNCSI1

FAN7

FAN6

FAN5

CPU2

1. COM1 2. M.2 Slot (M.2-C1)

3. M.2 Slot (M.2-C2)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)

2

LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

3
M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

75

JPWR4

Super X13DAI-T User's Manual
MCIO NVMe Connectors Two PCIe 5.0 x8 MCIO NVMe connectors, located at P1_NVME0/1 and P2_NVME0/1, provide four NVMe connections on the motherboard. P1_NVME0/1 connector is supported by CPU1. P2_NVME0/1 connector is supported by CPU2. Use these MCIO connectors to support highspeed PCIe NVMe storage devices.
Note: When installing an NVMe device on a motherboard, please be sure to connect the first MCIO NVMe connector (P1_NVME0/1) first for your system to work properly.

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2
JPWR3
JPWR1 JPI2C1(PWR I2C)
JF1
2
FAN1
1
FAN2

76

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. P1_NVME0/1 2. P2_NVME0/1

Chapter 2: Installation
SATA 3.0 via SlimSAS One SlimSAS connector, located at JS1, supports eight SATA 3.0 connections (SATA0~7) on the motherboard. These SATA connections are supported by the Intel C741 chipset. Connect a proper SlimSAS cable to JS1 to use SATA connections.
SATA 3.0 Connections Two SATA 3.0 connectors, located at I-SATA8/I-SATA9, support two SATA connections on the motherboard. Supported by the Intel C741 chipset, these SATA connections are compatible with SATA HDDs and SATA DOMs that need external power cables. In addition, I-SATA8 and I-SATA9, which are orange SATA connectors with power pins built in, can be used with Supermicro SuperDOMs and do not require external power cables.

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

1

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)
3
BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
2
JSD2
I-SATA8

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

77

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. JS1 (SATA0~7) 2. I-SATA8 (SuperDOM) 3. I-SATA9 (SuperDOM)

Super X13DAI-T User's Manual

VROC RAID Key Header
An Intel VROC RAID Key header is located at JRK1 on the motherboard. Install a VROC RAID Key on JRK1 for NVMe RAID support as shown in the illustration below. Please refer to the layout below for the location of JRK1.
Note: For detailed instructions on how to configure VROC RAID settings, please refer to the VROC RAID Configuration User's Guide posted on the web page under the link: https://www.supermicro.com/support/manuals/.

Intel VROC Key Pin Definitions

Pin# Definition

1

Ground

2

3.3V Standby

3

Ground

4

PCH RAID Key

VROC Key VROC Key Header (JRK1)

Note: The graphics contained in this user's manual are for illustration only. The components installed in your system may or may not look exactly the same as the graphics shown in the manual.

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. VROC RAID Key Header (JRK1)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

JRK1

1
M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

78

JPWR4

Chapter 2: Installation

2.8 Jumper Settings
How Jumpers Work
To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram below for an example of closing Pin 1 and Pin 2 of the jumper. Refer to the motherboard layout page for jumper locations.
Note 1: Unplug the power cord from the power supply before adjust jumper setting.
Note 2: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.

Connector Pins

3 2 1

Jumper

Setting

3 2 1

79

Super X13DAI-T User's Manual

CMOS Clear
JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS 1. First power down the system and unplug the power cord(s).

JBT1 contact pads

2. Remove the cover of the chassis to access the motherboard and remove the battery from the motherboard.

3. Short the CMOS pads, JBT1, with a metal object such as a small screwdriver for at least four seconds.

4. Remove the screwdriver (or shorting device).

5. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

MH10

MH11

1

JBT1(CLEAR CMOS)

JVRM1

JVRM2

BIOS LICENSE
X13DAI-T
REV:1.00 DESIGNED IN USA

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

80

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. JBT1

Chapter 2: Installation

I2C Bus for VRM JVRM1 and JVRM2 allow the BMC or the PCH to access CPU and memory VRM controllers. Refer to the table below for jumper settings.

VRM Jumper Settings

Jumper Setting Definition

Pins 1-2

BMC (Default)

Pins 2-3

PCH

LAN Port Enable/Disable JPTG1 allows you to enable the onboard LAN ports (LAN1 and LAN2). The default setting is pins 1-2 to enable the connections. Refer to the table below for jumper settings.

LAN Enable/Disable Jumper Settings

Jumper Setting Definition

Pins 1-2

Enabled (Default)

Pins 2-3

Disabled

3
JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

MH10

MH11

1

JBT1(CLEAR CMOS)

JVRM1

2
JVRM2

BIOS LICENSE
X13DAI-T
REV:1.00 DESIGNED IN USA

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

81

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. JVRM1 2. JVRM2 3. LAN Port Enable/Disable (JPTG1)

Super X13DAI-T User's Manual

VGA Enable/Disable JPG1 allows you to enable the onboard VGA connector. The default setting is pins 1-2 to enable the connection. Refer to the table below for jumper settings.

VGA Enable/Disable Jumper Settings

Jumper Setting Definition

Pins 1-2

Enabled (Default)

Pins 2-3

Disabled

TPM Module Mode
JTP1 allows you to set the TPM module mode. The default setting is pins 1-2 to have the onboard TPM module mode (internal). Close pins 2-3 to disable the onboard TPM and enable the external TPM module.

TPM Module Mode Jumper Settings

Jumper Setting Definition

Pins 1-2

Onboard TPM Module

Pins 2-3

JTPM1 Header (External Module)

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. VGA Enable/Disable (JPG1) 2. TPM Module Mode (JTP1)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

JTP1 USB0/1

2T-SGPIO1

MH13
1 JPG1 MH12

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

82

JPWR4

Chapter 2: Installation

2.9 LED Indicators

LAN LEDs
Two LAN ports (LAN1 and LAN2) are located on the rear I/O panel of the motherboard. Each Ethernet LAN port has two LEDs. The amber LED indicates activity, while the other Link LED may be green, amber, or off to indicate the speed of the connection. Refer to the tables below for more information.

Color Amber

LAN1/2 Activity LED (Right) LED State

Status

Definition

Blinking Active

LAN1/2 Link LED (Left) LED State

LED Color

Definition

Solid Green 10Gbps

Solid Amber 1Gbps

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

1

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

83

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

JPWR4

1. LAN1/LAN2 LEDs 1

Super X13DAI-T User's Manual

Onboard Power LED
The Onboard Power LED is located at LEDPWR1 on the motherboard. When this LED is on, the system power is on. Be sure to turn off the system power and unplug the power cords before removing or installing components. Refer to the table below for more information.

Onboard Power LED Indicator

LED Color

Definition

Off

System Power Off (power cable not connected)

Green

System Power On

BMC Heartbeat LED
A BMC Heartbeat LED is located at LEDBMC1 on the motherboard. When it is blinking green, the BMC is functioning normally. Refer to the layout below for the location of LEDBMC1.

BMC Heartbeat LED Indicator

LED Color

Definition

Green: Blinking BMC Normal

JPTG1 COM1

2
BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. Power LED (LEDPWR1) 2. BMC Heartbeat LED (LEDBMC1)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB

M.2-C2 (NVME ONLY)

JL1

USB6/7 (3.0)

BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2
JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
1
FAN1
FAN2

84

JPWR4

Chapter 2: Installation

M.2 LED Indicators
Two M.2 LED indicators are located at LED4 and LED7 on the motherboard. When LED4 is blinking, M.2-C1 functions normally, while LED7 is blinking, M.2-C2 functions properly. Refer to the layout below for locations of LED4 and LED7.

LED# LED4 LED7

M.2 LED Indicators (LED4/LED7)

LED Color

State

Green: Blinking M.2-C1: M.2 device working properly

Green: Blinking M.2-C2: M.2 device working properly

JPTG1 COM1

BMC LEDBMC1

LAN CTRL
FAN8

JNCSI1

FAN7

FAN6

FAN5

VGA LAN2 USB4/5 (3.0)

LAN1 USB2/3 (3.0)

JAUDIO1

AUDIO FP

CPU2

1. LED4 (M.2-C1 LED) 2. LED7 (M.2-C2 LED)

(JPCIE6) P2 SLOT6 PCIe 5.0 x8

(JPCIE5) P1 SLOT5 PCIe 5.0 x16 (JPCIE4) P2 SLOT4 PCIe 5.0 x16

(JPCIE3) P1 SLOT3 PCIe 5.0 x16

(JPCIE2) P2 SLOT2 PCIe 5.0 x16

(JPCIE1) P1 SLOT1 PCIe 5.0 x16

JNVI2C1 JIPMB1

JRK1

FAN10
P2-DIMMH1 P2-DIMMG1 P2-DIMMF1 P2-DIMME1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIMMA1

P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
JTPM1

M.2-C1 (NVME ONLY)
1 LED4

BIOS

MH10

MH11

LICENSE

X13DAI-T
REV:1.00
DESIGNED IN USA

JTP1 USB0/1
JPG1

T-SGPIO1 MH13 MH12

JBT1(CLEAR CMOS)

JVRM1

JVRM2

PCH

FANC

P2-DIMMA1 P2-DIMMB1 P2-DIMMC1 P2-DIMMD1

MAC CODE IPMI CODE

BAR CODE CM CODE

JS1 (SATA0~7) FANA
FANB
JL1

M.2-C2 (NVME ONLY)

USB6/7 (3.0)
2 BT1

JSD1

LED7

I-SATA9

FAN4

FAN3

USB8 (3.1 Gen 2)
JSD2 I-SATA8

CPU1

P1_NVME0/1

P2_NVME0/1

LEDPWR1

FAN9 JPWR2 JPWR3 JPWR1 JPI2C1(PWR I2C) JF1
FAN1
FAN2

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Chapter 3
Troubleshooting
3.1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the `Technical Support Procedures' and/ or `Returning Merchandise for Service' section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and chassis. 2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard
and mouse. 3. Remove all add-on cards. 4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to
the motherboard.
No Power
1. Make sure that there are no short circuits between the motherboard and the chassis. 2. Make sure that the ATX power connectors are properly connected. 3. Check that the 115V/230V switch, if available, on the power supply is properly set. 4. Turn the power switch on and off to test the system, if applicable. 5. The battery on your motherboard may be old. Check to verify that it still supplies
approximately 3VDC. If it does not, replace it with a new one.
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No Video
1. If the power is on, but you do not have video, remove all add-on cards and cables. 2. Remove all memory modules and turn on the system (if the alarm is on, check the
specs of memory modules, reset the memory, or try a different one).
System Boot Failure
If the system does not display POST (Power-On-Self-Test) or does not respond after the power is turned on, check the following: 1. Remove all components from the motherboard, especially the DIMM modules. Power on
the system and check if the power-on LED (LEDPWR1) and the BMC Heartbeat LED (LEDBMC1) are on, and system fans are spinning. 2. Turn on the system with only one DIMM module installed. If the system boots, check for bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure in this chapter.
Memory Errors
1. Make sure that the memory modules are compatible with the system and are properly installed. See Chapter 2 for installation instructions. (For memory compatibility, refer to the "Tested Memory List" link on the motherboard's product page to see a list of supported memory.)
2. Check if different speeds of DIMMs have been installed. It is strongly recommended that you use the same RAM type and speed for all DIMM modules in the system.
3. Make sure that you are using the correct type of ECC DDR5 modules recommended by the manufacturer.
4. Check for bad DIMM modules or slots by swapping a single module among all memory slots and check the results.
Losing the System's Setup Configuration
1. Make sure that you are using a high-quality power supply. A poor-quality power supply may cause the system to lose the CMOS setup information. Refer to Chapter 1 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies approximately 3VDC. If it does not, replace it with a new one.
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When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following: 1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system. 2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility. Note: Click on the "Tested Memory List" link on the motherboard's product page to see a list of supported memory.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/ system fans, etc., work properly. Check the hardware monitoring settings in the BMC to make sure that the CPU and system temperatures are within the normal range. Also check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to the system. Make sure that all power connectors are connected. Please refer to our website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following: 1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as USB flash or media drives. 2. Cable connection: Check to make sure that all cables are connected and working
properly. 3. Using the minimum configuration for troubleshooting: Remove all unnecessary
components (starting with add-on cards first), and use the minimum configuration (but with the CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures. 4. Identifying bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it works properly. Replace a bad component with a good one.
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5. Check and change one component at a time instead of changing several items at the same time. This will help isolate and identify the problem.
6. To find out if a component is good, swap this component with a new one to see if the system will work properly. If so, then the old component is bad. You can also install the component in question in another system. If the new system works, the component is good and the old system has problems.
3.2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specific system configuration that was sold to you. 1. Please go through the Troubleshooting Procedures and Frequently Asked Questions
(FAQ) sections in this chapter or see the FAQs on our website (https://www.supermicro. com/FAQ/index.php) before contacting Technical Support. 2. BIOS upgrades can be downloaded from our website (https://www.supermicro.com/ ResourceApps/BIOS_BMC_Intel.html). 3. If you still cannot resolve the problem, include the following information when contacting Supermicro for technical support:
· Motherboard model and PCB revision number · BIOS release date/version (This can be seen on the initial display when your system first
boots up.)
· System configuration
4. For immediate assistance, please have your account number ready when placing a call to our Technical Support department. We can be reached by email at support@ supermicro.com.
5. For worldwide services and support, please visit our website at Worldwide Services & Support | Supermicro.
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3.3 Frequently Asked Questions
Question: What type of memory does my motherboard support? Answer: This motherboard supports up to 4TB 3DS RDIMM/RDIMM DDR5 (288-pin) DDR5 memory with speeds of up to 4800 MT/s in 16 DIMM slots. To enhance memory performance, do not mix memory modules of different speeds and sizes. Please follow all memory installation instructions given in Section 2.4. Question: How do I update my BIOS? Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system. Updated BIOS files are located on our website at https:// www.supermicro.com/ResourceApps/BIOS_BMC_Intel.html. Please check our BIOS warning message and the information on how to update your BIOS on our website. Select your motherboard model and download the BIOS file to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before downloading.
Note 1: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. Note 2: For BIOS Update and Recovery instructions, please refer to the Firmware Update and Recovery Instructions for Supermicro's X13 motherboard user's manuals posted at https://www.supermicro.com/support/manuals/.
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3.4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below: 1. Power off your system and unplug your power cable. 2. Locate the onboard battery as shown below. 3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder. 4. Remove the battery.

Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any way; a damaged battery may release hazardous materials into the environment. Do not discard a used battery in the garbage or a public landfill. Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly.
Battery Installation
To install an onboard battery, follow the steps below: 1. Power off your system and unplug your power cable.
2. Locate the onboard battery as shown below
3. Identify the battery's polarity. The positive (+) side should be facing up.
4. Insert the battery into the battery holder and push it down until you hear a click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.

LITHIUM BATTERY BATTERY HOLDER

OR

LITHIUM BATTERY BATTERY HOLDER

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3.5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning the motherboard to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and the shipping package is mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, you can also request a RMA authorization online (https://www.supermicro. com/RmaForm/). This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products. During the warranty period, contact your distributor first for any product problems.
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Chapter 4: UEFI BIOS
Chapter 4
UEFI BIOS
4.1 Introduction
This chapter describes the AMIBIOSTM Setup utility for the motherboard. The BIOS is stored on a chip and can be easily upgraded using the BMC WebUI or the SUM utility.
Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual Download area of our website for any changes to the BIOS that may not be reflected in this manual.
Starting the Setup Utility
To enter the BIOS Setup utility, press the <Delete> key while the system is booting up. In most cases, the <Delete> key is used to invoke the BIOS Setup screen; however, in other cases, other hot keys, such as <F1>, <F2>, may be used for this purpose. Each main BIOS menu option is described in this manual. The Main BIOS screen has two main frames. The left frame displays all the options that can be configured. "Grayed-out" options cannot be configured. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white, and often a text message will accompany it. Please note that BIOS has default text messages built in, and we retain the option to include, omit, or change any of these text messages. Settings printed in Bold are the default values. A "" indicates a submenu. Highlighting such an item and pressing the <Enter> key will open the list of settings within that submenu. The BIOS Setup utility uses a key-based navigation system called hot keys. Most of these hot keys (<F1>, <F2>, <F3>, <F4>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during the setup navigation process.
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4.2 Main Setup
When you first enter the AMI BIOS Setup utility, you will see the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS Setup screen is shown below.
System Date / System Time Use the two features to change the system date and time. To change system date and time settings, please highlight System Date or System Time using the arrow keys and enter new values using the keyboard. Press the <Tab> key or the arrow keys to move between fields. The date must be entered in Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is the BIOS build date after the RTC (Real Time Clock) reset. Supermicro X13DAIT BIOS Version This feature displays the version of the BIOS ROM used in the system. Build Date This feature displays the date when the version of the BIOS ROM used in the system was built. CPLD Version This feature displays the version of the Complex-Programmable Logical Device (CPLD) used in the system.
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Chapter 4: UEFI BIOS Memory Information Total Memory This feature displays the total size of memory available in the system.
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4.3 Advanced Setup Configurations
Use the arrow keys to select the Advanced submenu and press <Enter> to access the submenu items:
Warning: Take caution when changing the Advanced settings. An incorrect value, an improper DRAM frequency, or a wrong BIOS timing setting may cause the system to malfunction. When this occurs, restore the setting to the manufacturer default setting.
Boot Feature
Quiet Boot Use this feature to select the screen between displaying Power-on Self Test (POST) messages or the OEM logo at bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Disabled and Enabled.
Note: BIOS POST messages are always displayed regardless of the setting for this feature. Option ROM Messages Use this feature to set the display mode for the Option ROM. Select Keep Current to use the current AddOn ROM display settings. Select Force BIOS to use the Option ROM display mode set by the system BIOS. The options are Force BIOS and Keep Current.
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Bootup NumLock State Use this feature to set the Power-on state for the NumLock key. The options are On and Off.
Wait For "F1" If Error Select Enabled to force the system to wait until the <F1> key is pressed if an error occurs. The options are Disabled and Enabled.
INT19 Trap Response Interrupt 19 is the software interrupt that handles the boot disk function. When this feature is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup immediately and allow the drives that are attached to these host adaptors to function as bootable disks. If this feature is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately to allow the drives attached to these adaptors to function as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot When EFI (Extensible Firmware Interface) Boot is selected, the system BIOS will automatically reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to allow the BIOS to automatically reboot the system from a Legacy boot device after an initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Power Configuration
Watch Dog Function Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more than five minutes. The options are Disabled and Enabled.
Watch Dog Action (Available when "Watch Dog Function" is set to Enabled) Use this feature to configure the Watch Dog Time_out setting. The options are Reset and NMI.
Front USB Port(s) (Available when "Lockdown Mode" is set to Enabled with the DCMS key) Select Enabled to allow the specific type of USB devices to be used in the front USB ports. Select Enabled (Dynamic) to allow or disallow this particular type of USB devices to be used in the front USB ports without rebooting the system. The options are Enabled, Disabled, and Enabled (Dynamic).
Note 1: Supermicro DataCenter Management Suite per Node License Key (SFT-DCMS-SINGLE) is Supermicro's Data Center Management Suite license that enables server node to take full advantage of Supermicro Management Software and Utilities features. Contact us for more information.
Note 2: Refer to the submenu of Security > Supermicro Security Erase Configuration to set "Lockdown Mode".
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Rear USB Port(s) (Available when "Lockdown Mode" is set to Enabled with the DCMS key) Select Enabled to allow the specific type of USB devices to be used in the rear USB ports. Select Enabled (Dynamic) to allow or disallow this particular type of USB devices to be used in the rear USB ports without rebooting the system. The options are Enabled, Disabled, and Enabled (Dynamic). Restore on AC Power Loss Use this feature to set the power state after a power outage. Select Power Off for the system power to remain off after a power loss. Select Power On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Stay Off, Power On, and Last State. Power Button Function This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override to power off the system after pressing and holding the power button for four seconds or longer. Select Instant Off to instantly power off the system as soon as the user presses the power button. The options are Instant Off and 4 Seconds Override.
CPU Configuration
Warning: Setting the wrong values for the features included in the following sections may cause the system to malfunction.
Processor Configuration The following CPU information is displayed:
· Processor BSP Revision · Processor Socket · Processor ID · Processor Frequency · Processor Max Ratio · Processor Min Ratio · Microcode Revision · L1 Cache RAM (Per Core) · L2 Cache RAM (Per Core)
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· L3 Cache RAM (Per Package) · Processor 0 Version · Processor 1 Version
Advanced Power Management Configuration
Power Technology Select Energy Efficient to support power-saving mode. Select Custom to customize system power settings. Select Disabled to disable power-saving settings. The options are Disable, Energy Efficient, and Custom. Power Performance Tuning (Available when "Power Technology" is set to Custom) Set this feature to allow either operating system (OS) or the BIOS to control the EPB. The options are OS Controls EPB and BIOS Controls EPB. (EPB is the abbreviation for Intel Performance and Energy Bias Hint.) ENERGY_PERF_BIAS_CFG Mode (ENERGY PERFORMANCE BIAS CONFIGURATION Mode) (Available when "Power Performance Tuning" is set to BIOS Controls EPB) Use this feature to configure the proper operation setting for your machine by achieving the desired system performance level and energy saving (efficiency) level at the same time. Select Maximum Performance to maximize system performance to its highest potential; however, this may consume maximal amount of power as energy is needed to fuel processor operation. Select Performance to enhance system performance; however, this may consume more power as energy is needed to fuel the processors for operation. The options are Maximum Performance, Performance, Balanced Performance, Balanced Power, and Power. Optimized Power Mode (Available when "Power Technology" is set to Custom) Set this feature to Enable to reduce overall power consumption. The options are Disable and Enable. When this feature is set to Enable, the features below will be automatically set by the BIOS:
· "Power Performance Tuning" - BIOS controls EPB · "ENERGY_PERF_BIAS_CFG Mode" - Balanced Performance · "Enhanced Halt State (C1E)" - Enable
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CPU P State Control
This feature allows you to configure the following CPU power settings:
AVX P1 (Available when "SpeedStep (P-States)" is set to Enable) Use this feature to set the appropriate TDP level for the system. The Intel Advanced Vector Extensions (Intel AVX) P1 feature allows you to set the base P1 ratio for Streaming SIMD Extensions (SSE) and AVX workloads. Each P1 ratio has the corresponding AVX Impressed Current Cathodic Protection (ICCP) pre-grant license level, which refers to the selection between different AVX ICCP transition levels. The options are Nominal, Level 1, and Level 2.
Intel SST-PP (Available when "SpeedStep (P-States)" is set to Enable and "Dynamic SST-PP" is set to Disable) This feature allows you to choose from two additional Base-Frequency conditions maximum for CPU P State Control. The options are Auto, Level 0, Level 3, and Level 4. (SST-PP is the abbreviation for Speed Select Technology-Performance Profile.)
Dynamic SST-PP (Available when "SpeedStep (P-States)" is set to Enable and when your CPU supports the Intel Speed Select function) If this feature is set to Enable, it allows you to configure Intel SST-PP features, including Base, Configuration 3, and Configuration 4 settings under various processor working conditions. The options are Disable and Enable. The following information is displayed when "SpeedStep (P-States)" is set to Enable:
· SST-PP Level · Capable · Core Count · P1 Ration · Package TDP (W) · DTS_Max
Activate SST-BF (Available when your CPU supports the Intel Speed Select function) Select Enable for Intel Speed Select Technology-Base Frequency support. The options are Disable and Enable. (SST-BF is the abbreviation for Speed Select Technology-Base Frequency.)
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Configure SST-BF (Available when your CPU supports the Intel Speed Select function and when "Activate SST-BF" is set to Enable) When this feature is set to Enable, the system BIOS will configure SST-BF High Priority Core settings so that system software does not have to configure these settings. The options are Disable and Enable. SpeedStep (P-States) Enhanced Intel SpeedStep Technology (EIST) allows the system to automatically adjust processor voltage and core frequency in an effort to reduce power consumption and heat dissipation. Please refer to Intel's website for detailed information. The options are Disable and Enable. EIST PSD Function (Available when "SpeedStep (P-States)" is set to Enable) This feature reduces the latency that occurs when one P-state changes to another, thus allowing the transitions to occur more frequently. This will allow for more demand-based P-state switching to occur based on the real-time energy needs of applications so that the power-to-performance balance can be optimized for energy efficiency. The options are HW_ALL and SW_ALL. Turbo Mode (Available when "SpeedStep (P-States)" is set to Enable) Select Enable to allow the CPU to operate at the manufacturer-defined turbo speed by increasing CPU clock frequency. This feature is available when it is supported by the processors used in the system. The options are Disable and Enable. CPU Flex Ratio Override (Available when "SpeedStep (P-States)" is set to Enable and when your CPU supports this feature) Select Enable to override the CPU Flex-Ratio setting, which is the minimum multiplier that allows the computer to clock. The options are Disable and Enable. CPU Core Flex Ratio (Available when "CPU Flex Ratio Override" is set to Enable and when your CPU supports this feature) Use this feature to configure the Core Ratio Multiplier settings for non-Turbo mode processors. The default setting is 23.
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Hardware PM State Control
Hardware P-States If this feature is set to Disable, system hardware will choose a P-state setting for the system based on an OS request. If this feature is set to Native Mode, hardware will choose a P-state setting based on the OS guidance. If this feature is set to Native Mode with No Legacy Support, system hardware will choose a P-state setting independently without OS guidance. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
Frequency Prioritization (Available when "Power Technology" is set to Custom, "Hardware P-states" is set to Native Mode or Native Mode with No Legacy Support, and when your processor supports Intel SST-CP)
SST-CP With Intel Speed Select Technology (Intel SST-CP), surplus frequency is allocated based on the cores' weights. The weight for each core is assigned by the OS or the Virtual Machine Manager (VMM). The options are Enable and Disable.
CPU C State Control
Enable Monitor MWAIT Select Enable to support Monitor and Mwait, which are two instructions in Streaming SIMD Extension 3 (SSE3), to improve synchronization between multiple threads for CPU performance enhancement. The options are Disable, Enable, and Auto.
CPU C1 Auto Demotion Enable this feature to allow CPU to automatically demote to the C1 state. Reboot the system for the change to take effect. The options are Disable and Enable.
CPU C6 Report Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating system. During the CPU C6 State, the power to all cache is turned off. The options are Disable, Enable, and Auto. (ACPI is the abbreviation for Advanced Configuration and Power Interface.)
Enhanced Halt State (C1E) Select Enable to enable "Enhanced Halt State" support, which will significantly reduce the CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a "Halt State". The options are Disable and Enable.
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Package C State Control
Package C State Use this feature to optimize and reduce CPU package power consumption in the idle mode. Please note that the changes you've made in this setting will affect all CPU cores or the circuits of the entire system. The options are C0/C1 state, C2 state, C6 (non Retention) state, C6 (Retention) state, No Limit, and Auto.
CPU1 Core Disable Bitmap / CPU2 Core Disable Bitmap
Available Bitmap: This feature displays the available bitmap. Disable Bitmap Enter 0 to enable this feature for all CPU cores. Enter FFFFFFFFFFF to disable this feature for all CPU cores. Please note that at least one core per CPU must be enabled. Disabling all cores is not allowed. The default setting is 0. Hyper-Threading [ALL] Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The options are Enable and Disable. Hardware Prefetcher If this feature is set to Enable, the hardware prefetcher will prefetch data from the main system memory to Level 2 cache to help expedite data transaction to enhance memory performance. The options are Enable and Disable. Adjacent Cache Prefetch Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Enable and Disable. DCU Streamer Prefetcher If this feature is set to Enable, the Data Cache Unit (DCU) streamer prefetcher will prefetch data streams from the cache memory to the DCU to speed up data accessing and processing to enhance CPU performance. The options are Enable and Disable. DCU IP Prefetcher This feature allows the system to use the sequential load history, which is based on the instruction pointer of previous loads, to determine whether the system will prefetch additional lines. The options are Enable and Disable.
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LLC Prefetch If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be supported. The options are Disable and Enable. Extended APIC Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU performance. The options are Disable and Enable. (APIC is the abbreviation for Extended Advanced Programmable Interrupt Controller.) Intel Virtualization Technology Select Enable to enable the Intel Vanderpool Technology for Virtualization platform support, which will allow multiple operating systems to run simultaneously on the same computer to maximize system resources for performance enhancement. The options are Disable and Enable.
Note: Please reboot the system for any change of the setting to take effect. Enable SMX Select Enable to support Safer Mode Extensions (SMX) which provides a programming interface for system software to establish a controlled environment to support the trusted platform configured by the end user and to verify a virtual machine monitor before it is allowed to run. The options are Disable and Enable. PPIN Control Select Unlock/Enable to use the Protected Processor Inventory Number (PPIN) in the system. The PPIN is a unique number set for tracking a given Intel Xeon server processor. The options are Lock/Disable and Unlock/Enable. AES-NI Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Disable and Enable. Limit CPU PA to 46 Bits Select Enable to limit CPU physical address to 46 bits to support the older Hyper-V CPU platform. The options are Disable and Enable.
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---------------------------------------------------------------TME, TME-MT, TDX ---------------------------------------------------------------Memory Encryption (TME) (Available when your CPU supports Intel TME) Select Enabled for Intel Total Memory Encryption (TME) support to enhance memory data security. The options are Disabled and Enabled. Total Memory Encryption (TME) Bypass (Available when "Memory Encryption (TME)" is set to Enabled) Use this feature to disable/enable the TME function for physical memory protection. The options are Auto, Disabled, and Enabled. Total Memory Encryption Multi-Tenant (TME-MT) (Available when "Memory Encryption (TME)" is set to Enabled and when "Limit CPU PA to 46 Bits" is set to Disable) Use this feature to support tenant-provided (SW-provided) keys. The options are Disabled and Enabled. Memory Integrity (Available when both "Memory Encryption (TME)" and "Total Memory Encryption Multi-Tenant (TME-MT)" are set to Enabled and when "Limit CPU PA to 46 Bits" is set to Disable) Use this feature to enable TME-MT memory integrity protection for memory transactions. The options are Disabled and Enabled. Key Stock Amount (Available when "Memory Encryption (TME)" is set to Enabled and when your system supports this feature) Use this feature to set the number of unique keys per system (the number of tenants per platform). The default setting is 0. TME-MT Key ID Bits (Available when "Memory Encryption (TME)" is set to Enabled) Use this feature to set the number of bits for each key ID. The default setting is 0. Trust Domain Extension (TDX) (Available when your CPU supports Intel TDX) Use this feature to enable Intel Trust Domain Extension (TDX) technology support to enhance control of data security. The options are Disabled and Enabled. TDX Secure Arbitration Mode Loader (SEAM Loader) (Available when your CPU supports Intel TDX) The SEAM Loader (SEAMLDR) is used to load and update Intel TDX modules into the SEAM memory range by verifying the digital signature. The options are Disabled and Enabled.
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----------------------------------------------------------------
Software Guard Extension (SGX) ----------------------------------------------------------------
*The following SGX features are available when "Memory Encryption (TME)" is set to Enabled and when your CPU supports Intel SGX.
Note: Each memory channel must have at least one DIMM populated on the motherboard to support the Intel SGX features.
SGX Factory Reset Use this feature to perform an SGX factory reset to delete all registration data and force an Initial Platform Establishment flow. Reboot the system for the changes to take effect. The options are Disabled and Enabled.
SW Guard Extensions (SGX) Use this feature to enable Intel Software Guard Extensions (SGX) support. Intel SGX is a set of extensions that increases the security of application code and data by using enclaves in memory to protect sensitive information. The options are Disabled and Enabled.
SGX Package Info In-Band Access Setting this feature to Enabled is required before the BIOS provides software with the key blobs, which are generated for each CPU package. The options are Disabled and Enabled.
SGX PRM Size (Available when "SW Guard Extensions (SGX)" is set to Enabled) Use this feature to set the Processor Reserved Memory Range Register (PRMRR) size. The options are 256M, 512M, 1G, 2G, 4G, and 8G. Please note that the available options are based on your motherboard features, memory size, and memory map.
SGX QoS (Available when "SW Guard Extensions (SGX)" is set to Enabled) Use this feature to enable Intel SGX Quality of Service (QoS) support. QoS can enhance network performance by prioritizing network traffic. The options are Disabled and Enabled. Select Owner EPOCH Input Type (Available when "SW Guard Extensions (SGX)" is set to Enabled) Owner EPOCH is used as a parameter to allow you to add personal entropy into the key derivation process. A correct Owner EPOCH is required to have access to personal data previously sealed by other platform users. There are two Owner EPOCH modes. One is New Random Owner EPOCH, and the other is manually entered by the user. Each EPOCH is 64-bit. The options are Change to New Random Owner EPOCHs and Manual User Defined Owner EPOCHs.
Note: Changing the Owner EPOCH value will lose the data in enclaves.
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Software Guard Extensions Epoch 0 (Available when "SW Guard Extensions (SGX)" is set to Enabled and "Select Owner EPOCH input type" is set to Manual User Defined Owner EPOCHs) Use this feature to enter the EPOCH value. The default is 0. Software Guard Extensions Epoch 1 (Available when "SW Guard Extensions (SGX)" is set to Enabled and "Select Owner EPOCH input type" is set to Manual User Defined Owner EPOCHs) Use this feature to enter the EPOCH value. The default is 0. SGXLEPUBKEYHASHx Write Enable (Available when "SW Guard Extensions (SGX)" is set to Enabled) Use this feature to enable writes to SGXLEPUBKEYHASH[3..0] from OS/SW. The options are Disabled and Enabled. Only those CPUs that support Intel SGX Flexible Launch Control (FLC) feature have SGXLEPUBKEYHASH, which contains the hash of the public key for the SGX Launch Enclave (LE) to be signed with. SGXLEPUBKEYHASH0 (Available when both "SW Guard Extensions (SGX)" and "SGXLEPUBKEYHASHx Write Enable" are set to Enabled) Use this feature to enter the bytes 0­7 of SGX Launch Enclave Public Key Hash. SGXLEPUBKEYHASH1 (Available when both "SW Guard Extensions (SGX)" and "SGXLEPUBKEYHASHx Write Enable" are set to Enabled) Use this feature to enter the bytes 8­15 of SGX Launch Enclave Public Key Hash. SGXLEPUBKEYHASH2 (Available when both "SW Guard Extensions (SGX)" and "SGXLEPUBKEYHASHx Write Enable" are set to Enabled) Use this feature to enter the bytes 16­23 of SGX Launch Enclave Public Key Hash. SGXLEPUBKEYHASH3 (Available when both "SW Guard Extensions (SGX)" and "SGXLEPUBKEYHASHx Write Enable" are set to Enabled) Use this feature to enter the bytes 24­31 of SGX Launch Enclave Public Key Hash. SGX Auto MP Registration (Available when "SW Guard Extensions (SGX)" is set to Enabled) Use this feature to enable/disable SGX Auto Multi-Package Registration Agent (MPA) running automatically at boot time. The options are Disabled and Enabled.
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Chipset Configuration
Warning: Setting the wrong values in the following features may cause the system to malfunction.
North Bridge
This feature allows you to configure the following North Bridge settings.
Uncore Configuration
The following information is displayed.
· Number of CPU · Current UPI Link Speed · Current UPI Link Frequency · Global MMIO Low Base / Limit · Global MMIO High Base / Limit · PCIe Configuration Base / Size
Degrade Precedence Use this feature to select the degrading precedence option for Ultra Path Interconnect (UPI) connections. Select Topology Precedent to degrade UPI features if system options are in conflict. Select Feature Precedent to degrade UPI topology if system options are in conflict. The options are Topology Precedence and Feature Precedence. Link L0p Enable Select Enable for the system BIOS to enable Link L0p support which will allow the CPU to reduce the UPI links from full width to half width in the event when the CPU's workload is low in an attempt to save power. This feature is available for the system that uses Intel processors with UPI technology support. The options are Disable, Enable, and Auto.
Note: You can change the performance settings for non-standard applications by using this parameter. It is recommended that the default settings be used for standard applications.
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Link L1 Enable Select Enable for the BIOS to activate Link L1 support which will power down the UPI links to save power when the system is idle. This feature is available for the system that uses Intel processors with UPI technology support. The options are Disable, Enable, and Auto.
Note: Link L1 is an excellent feature for an idle system. L1 is used during Package C-States when its latency is hidden by other components during a wakeup.
KTI Prefetch Keizer Technology Interconnect (KTI) is also known as the Intel Ultra Path Interconnect (UPI) technology. Select Enable for the KTI prefetcher to preload the L1 cache with data deemed relevant, which will allow the memory read to start earlier on a DDR bus in an effort to reduce latency. Select Auto for the KTI prefetcher to automatically preload the L1 cache with relevant data whenever is needed. The options are Disable, Enable, and Auto.
IO Directory Cache (IODC) Select Enable for the IODC to generate snoops instead of generating memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.
SNC Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into clusters based on address range. Each cluster is connected to a subset of the memory controller. Enable this feature to improve average latency and reduce memory access congestion for higher performance. The options are Auto, Disable, Enable SNC2 (2-clusters), and Enable SNC4 (4-clusters).
Stale AtoS (A to S) The in-memory directory has three states: I, A, and S states. The I (-invalid) state indicates that the data is clean and does not exist in the cache of any other sockets. The A (-snoop All) state indicates that the data may exist in another socket in an exclusive or modified state. The S state (-Shared) indicates that the data is clean and may be shared in the caches across one or more sockets. When the system is performing "read" on the memory and if the directory line is in A state, we must snoop all other sockets because another socket may have the line in a modified state. If this is the case, a "snoop" will return the modified data. However, it may be the case that a line "reads" in an A state, and all the snoops come back with a "miss". This can happen if another socket reads the line earlier and then has silently dropped it from its cache without modifying it. If "Stale AtoS" is enabled, a line will transition to the S state when the line in the A state returns
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only snoop misses. That way, subsequent reads to the line will encounter it in the S state and will not have to snoop, saving the latency and snoop bandwidth. Stale "AtoS" may be beneficial in a workload where there are many cross-socket reads. The options are Disable, Enable, and Auto.
LLC Dead Line Alloc Select Enable to opportunistically fill the dead lines in the LLC. The options are Disable, Enable, and Auto.
UPI3 (Available when your motherboard supports dual processors) Use this feature to enable/disable the 4th Intel Ultra Path Interconnect (UPI) link. The default setting is Enable if your motherboard supports UPI3. The options are Disable and Enable.
Memory Configuration
This feature allows you to configure the Integrated Memory Controller (iMC) settings.
Enforce DDR Memory Frequency POR Select POR to enforce Plan of Record (POR) restrictions for DDR memory frequency and voltage programming. The options are POR and Disable.
Memory Frequency Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 3200, 3600, 4000, 4400, 4800, 5200, and 5600. Please note that the available options are CPU dependent.
Data Scrambling for DDR5 Select Enable to enable data scrambling for DDR5 modules to enhance memory data security. The options are Disable and Enable.
Enable fADR Select Enable to have Fast Asynchronous DRAM Refresh (fADR) support to enhance memory performance on Intel PMem 300 series DIMMs. With the support of fADR feature, the ADR safe domain (flush domain) includes CPU caches, IIO caches, and Write Pending Queue (WPQ). The implementation of fADR can lower flush time and reduce flush times. The support of fADR is based on your motherboard hardware features. The options are Disable and Enable.
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Enable ADR (Available when "Enable fADR" is set to Disable) Select Enable for Asynchronous DRAM Refresh (ADR) support to enhance memory performance. The options are Disable and Enable.
Legacy ADR Mode (Available when "Enable fADR" is set to Disable and "Enable ADR" is set to Enable) Use this feature to support the Legacy ADR mode to enhance memory performance. In the Legacy ADR mode, the ADR safe domain (flush domain) includes the WPQ in memory controllers. The options are Disable, Enable, and Auto.
fADR Configuration (Available when "Enable fADR" is set to Enable)
Number of Cores Use this feature to set the number of CPU cores to be involved in the fADR event. The options are 1 Core, 4 Cores, and All Cores.
Core Ratio Use this feature to set the CPU core ratio to be involved in the fADR event. The options are Auto and Manual.
Core Ratio Value (Available when "Core Ratio" is set to Manual) Use this feature to enter the core ratio value. The default value is FF.
Mesh Ratio Use this feature to set the mesh ratio to be involved in the fADR event. The mesh ratio determines the frequency of data access between CPU cores and caches. The options are Auto and Manual.
Mesh Ratio Value (Available when "Mesh Ratio" is set to Manual) Use this feature to enter the mesh ratio value. The default value is FF.
Flush Timeout Use this feature to set the timeout setting when the data in the CPU cache memory will be flushed by the applications to persistent memory in the absence of system power. The options are Auto and Manual.
Flush Timeout Value (Available when "Flush Timeout" is set to Manual) Use this feature to enter the flush timeout value. The default value is FFF.
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DDR 2X Refresh Enable Select Enable for memory 2X refresh support to enhance memory performance. The options are Auto, Disable, and Enable.
CXL Type 3 Legacy Select Enable to use the CXL Type 3 memory device, which can be supported by the CXL Type 2 flows, for memory bandwidth and capacity expansion. The options are Disable and Enable.
Memory Topology This feature displays the information of onboard memory modules as detected by the BIOS, for example: P1-DIMMA1: 4800MT/s Micro DRx8 32GB RDIMM
Memory RAS Configuration Use this submenu to configure the following Memory Reliability_Availability_Serviceability (RAS) settings.
Mirror Mode (Available when "ADDDC Sparing" is set to Disabled and "UEFI ARM Mirror" is set to Disabled) Use this feature to configure the mirror mode settings for all 1LM/2LM memory modules in the system which will create a duplicate copy of data stored in the memory to increase memory security, but it will reduce the memory capacity into half. The options are Disabled, Full Mirror Mode, and Partial Mirror Mode.
UEFI ARM Mirror (Available when "ADDDC Sparing" is set to Disabled and "Mirror Mode" is set to Disabled) If this feature is set to Enable, mirror mode configuration settings for UEFI-based Address Range memory will be enabled upon system boot. This will create a duplicate copy of data stored in the memory to increase memory security, but it will reduce the memory capacity into half. The options are Disabled and Enabled.
ARM Mirror Percentage (Available when "UEFI ARM Mirror" is set to Enabled) Use this feature to set the percentage of memory space to be used for UEFI ARM mirroring for memory security enhancement. The default setting is 0.
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Correctable Error Threshold Use this feature to specify the threshold value for correctable memory-error logging, which sets a limit on the maximum number of events that can be logged in the memory error log at a given time. The default setting is 512.
Leaky Bucket Low Bit Use this feature to set the Low Bit value for the Leaky Bucket algorithm which is used to check the data transmissions between CPU sockets and the memory controller. The default setting is 11.
Leaky Bucket High Bit Use this feature to set the High Bit value for the Leaky Bucket algorithm which is used to check the data transmissions between CPU sockets and the memory controller. The default setting is 14.
ADDDC Sparing (Available when populating 1Rx4, 2Rx4, and 4Rx4 DIMM) Select Enabled for Adaptive Double Device Data Correction (ADDDC) support, which will not only provide memory error checking and correction but will also prevent the system from issuing a performance penalty before a device fails. Please note that virtual lockstep mode will only start to work for ADDDC after a faulty DRAM module is spared. The options are Disabled and Enabled.
Patrol Scrub Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected in a memory module and send the corrections to the requestor (the original source). When this feature is set to Enable, the IO hub will read and write back one cache line every 16K cycles if there is no delay caused by internal processing. By using this method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are Disabled and Enable at End of POST. (POST is the abbreviation for Power_On Self Test.)
DDR PPR Type Post Package Repair (PPR) is a new feature available for the DDR4/DDR5 technology. PPR provides additional spare capacity within a DDR4/DDR5 DRAM module that is used to replace faulty cell areas detected during system boot. PPR offers two types of memory repairs. Soft Post Package Repair (sPPR) provides a quick, temporary fix on a raw element in a bank group of a DDR4/DDR5 DRAM device, while hard Post Package Repair (hPPR) will take a longer time to provide a permanent repair on a raw element. The options are PPR Disabled, Hard PPR, and Soft PPR.
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Enhanced PPR Use this feature to set advanced memory test. Select Enabled to always execute for every boot. Select Once to execute only one time. The options are Disabled, Enabled, and Once.
Memory PFA Support (Available when the DCMS key is activated) Select Enabled to enable memory Predictive Failure Analysis (PFA) support. PFA can be used to avoid uncorrectable faults in the same memory page. The options are Disabled and Enabled.
IIO Configuration
CPU1 Configuration / CPU2 Configuration
IOU0 (IIO PCIe Port 1) This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
IOU1 (IIO PCIe Port 2) This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
IOU2 (IIO PCIe Port 3) This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
IOU3 (IIO PCIe Port 4) This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
IOU4 (IIO PCIe Port 5) This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
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P1 SLOT5 PCIe 5.0 X16 / P1 SLOT3 PCIe 5.0 X16 / P1 SLOT1 PCIe 5.0 X16 / M.2-C1 / P1_NVMe0 / P1_NVMe1 / M.2-C2 / P2 SLOT4 PCIe 5.0 X16 / P2 SLOT2 PCIe 5.0 X16 / P2_NVMe0 / P2_NVMe1 / P2 SLOT6 PCIe 5.0 X8
Note: The number of slots and the slot naming vary based on your motherboard features.
Link Speed Use this feature to select the link speed for the PCIe port specified by the user. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), Gen 3 (8 GT/s), Gen 4 (16 GT/s), and Gen 5 (32 GT/s). The following information is displayed:
· PCIe Port Link Status · PCIe Port Link Max · PCIe Port Link Speed
Data Link Feature Exchange Use this feature to enable/disable the PCIe port to enter PCIe 4.0 DL_Feature negotiation state. The options are Disable and Enable. PCIe Port Max Payload Size Use this feature to set the maximum payload size supported in Direct Media Interface (DMI) device capabilities register for the device installed in the PCIe port. The options are 128B, 256B, 512B, and Auto. Equalization Bypass To Highest Rate Set this feature to Enable to reduce the link training time for PCIe 5.0 device by skipping equalization of intermediate data rates. The options are Disable and Enable.
IOAT Configuration
Relaxed Ordering Select Yes to allow certain transactions to be processed and completed before other transactions that have already been enqueued. The options are No and Yes.
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Intel VT for Directed I/O (VT-d)
Intel VT for Directed I/O (VT-d) Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by reporting the I/O device assignments to the Virtual Machine Monitor (VMM) through the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms, providing greater reliability, security and availability in networking and data-sharing. The options are Enable and Disable. (DMA is the abbreviation for Direct Memory Access. DMAR is the abbreviation for DMA Remapping Reporting.)
Pre-boot DMA Protection (Available when "Intel VT for Directed I/O (VT-d)" is set to Enable) Select Enable to establish DMA protection during pre-boot processing by setting DMA_CTRL_PLATFORM_OPT_IN_FLAG in the DMAR ACPI table. The options are Enable and Disable.
Interrupt Remapping (Available when "Intel VT for Directed I/O (VT-d)" is set to Enable) Select Enable to support I/O DMA transfer remapping and device-generated interrupts. The options are Auto, Enable, and Disable.
PCIe ACSCTL (Available when "Intel VT for Directed I/O (VT-d)" is set to Enable) Select Enable to program ACS control to Chipset PCIe Root Port bridges. Select Disable to program ACS control to all PCIe Root Port bridges. The options are Disable and Enable.
Intel VMD Technology
This section describes the configuration settings for the Intel VMD technology. Note 1: After you've enabled VMD in the BIOS on a PCIe slot, this PCIe slot will be dedicated for VMD use only, and it will no longer support any PCIe device. To re-activate this slot for PCIe use, please disable VMD in the BIOS. Note 2: The number of PCIe slots and the slot naming can differ depending on the PCIe devices connected to your motherboard.
NVMe Mode Switch When this feature is set to Auto, VMD support will be automatically enabled when a VROC key is detected by the BIOS. The options are Manual, VMD, and Auto.
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Intel VMD for Volume Management Device on CPU1 (Available when "NVMe Mode Switch" is set to Manual)
VMD Config for PCH ports Enable/Disable VMD Select Enable to enable the Intel Volume Management Device (VMD) technology support for the root port specified. The options are Disable and Enable.
M.2-C1 VMD / M.2-C2 VMD (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
VMD Config for IOU 0 / VMD Config for IOU 1 / VMD Config for IOU 2 / VMD Config for IOU 3 Enable/Disable VMD Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
CPU1 SLOT5 VMD / CPU1 SLOT4 VMD / CPU1 SLOT1 VMD / M.2-C1 VMD (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.
VMD Config for IOU 4 Enable/Disable VMD Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
JNVME1 VMD / JNVME2 VMD / M.2-C2 VMD (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
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Hot Plug Capable (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.
Intel VMD for Volume Management Device on CPU2 (Available when "NVMe Mode Switch" is set to Manual)
VMD Config for IOU 0 / VMD Config for IOU 1 Enable/Disable VMD Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
CPU2 SLOT4 VMD / CPU2 SLOT2 VMD (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.
VMD Config for IOU 2 Enable/Disable VMD Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
JNVME1 VMD / JNVME2 VMD (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.
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VMD Config for IOU 3 Enable/Disable VMD Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
CPU2 SLOT6 VMD (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable the Intel VMD technology support for the root port specified. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system and "Enable/Disable VMD" above is set to Enable) Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.
IIO-PCIe Express Global Options PCIe ASPM Support (Global) Use this feature to disable the Active State Power Management (ASPM) support for all PCIe root ports. The options are Disable and Auto.
PCIe Max Read Request Size Use this feature to set the maximum read request size in PCI hierarchy. The options are Auto, 128B, 256B, 512B, 1024B, 2048B, and 4096B.
Equalization Bypass To Highest Rate Set this feature to Enable to reduce the link training time for PCIe 5.0 device by skipping equalization of intermediate data rates. The options are Disable and Enable.
IIO eDPC Support (Available when your system supports this feature) Use this feature to configure the setting for IIO Enhanced Downstream Port Containment (eDPC) support for your system in an effort to improve the error containment capacity within the PCIe subsystem when an uncorrected error is detected either at the root port or at the switch downstream port. Select Disable to disable IIO eDPC support. Select On Fatal Error to enable IIO eDPC support in your system when a fatal error occurs. Select On Fatal and Non-Fatal Error to enable IIO eDPC support when an error, fatal or non-fatal, has occurred. The options are Disable, On Fatal Error, and On Fatal and Non-Fatal Errors.
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IIO eDPC Interrupt (Available when your system supports this feature and when "IIO eDPC Support" is set to On Fatal Error/On Fatal and Non-Fatal Errors) Select Enable to enable IIO eDPC Interrupt support. The options are Disable and Enable.
IIO eDPC ERR_COR Message (Available when your system supports this feature and when "IIO eDPC Support" is set to On Fatal Error/On Fatal and Non-Fatal Errors) If this feature is set to Enable, an IIO eDPC error correction message will be displayed. The options are Disable and Enable.
CXL Security Level By defining security protocols, CXL standards provide protection against the data security threats. Use this feature to set the CXL security level for data transiting the CXL link. The options are Fully Trusted, Partially Trusted, Untrusted, and Auto.
· Fully Trusted: This option allows the CXL device to access CXL.$ for both host-
attached and device-attached memory ranges in the write-back (WB) address space.
· Partially Trusted: This option allows the CXL device to access CXL.$ for device-
attached memory ranges only.
· Untrusted: If this option is selected, the host (your system) will abort all requests on
CXL.$.
· Auto: This option is based on Si Compatibility.
CXL Header Bypass Set this feature to enable or disable the CXL header bypass. The options are Disable and Enable.
South Bridge
The following information is displayed:
· USB Devices:
Legacy USB Support Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support if there are no legacy USB devices present. Select Disabled to have all USB devices available for EFI applications only. The options are Enabled, Disabled, and Auto.
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XHCI Hand-off This is a work-around solution for operating systems that do not support Extensible Host Controller Interface (XHCI) hand-off. The XHCI ownership change should be claimed by the XHCI driver. The options are Enabled and Disabled. Port 60/64 Emulation Select Enabled for I/O port 60h/64h emulation support, which in turn, provides complete legacy USB keyboard support for the operating systems that do not support legacy USB devices. The options are Disabled and Enabled. PCIe PLL SSC Select Enabled for PCH PCIe Spread Spectrum Clocking (SSC) support, which allows the BIOS to monitor and attempt to reduce the level of electromagnetic interference caused by the components whenever needed. The options are Disabled and Enabled.
Server ME Information
The following information is displayed:
· General ME Configuration · Oper. Firmware Version
· Current State · Error Code
PCH SATA0 Configuration / PCH SATA1 Configuration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following features. SATA Controller(s) This feature enables or disables the onboard SATA controller(s) supported by the Intel PCH chip. The options are Enabled and Disabled. SATA Mode Selection (Available when "SATA Controller(s)" is set to Enabled) Use this feature to select the mode of installed SATA drives. The options are AHCI and RAID.
Note 1: The option of RAID is unavailable when "Boot Mode Select" is set to Legacy. Note 2: Refer to Boot submenu in the BIOS Setup main menu to set "Boot Mode Select".
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Support Aggressive Link Power Management (Available when "SATA Controller(s)" is set to Enabled) When this feature is set to Enabled, the SATA AHCI controller manages the power use of the SATA link. The controller will put the link in a low power mode during an extended period of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Disabled and Enabled. SATA SGPIO Mode (Available when "SATA Controller(s)" is set to Enabled) Use this feature to change the serial GPIO mode for SATA controller. The options are LED and SGPIO. SATA Port 0 - SATA Port 9 (Available when "SATA Controller(s)" is set to Enabled)
Note: The SATA port naming may vary based on the related configuration.
Hot Plug Select Enabled to support Hot-plugging for the device installed on a selected SATA port to allow you to replace the device installed in the slot without shutting down the system. The options are Disabled and Enabled. Spin Up Device Select Enabled for Staggered Spin Up support to allow the SATA devices specified by the user to spin up one at a time at boot up in an effort to prevent all hard drive disks from spinning up at the same time, causing a power surge. The options are Disabled and Enabled. SATA Device Type Use this feature to specify if the device installed on the SATA port specified by the user should be connected to a solid state drive or a hard disk drive. The options are Hard Disk Drive and Solid State Drive.
Trusted Computing (Available when a TPM device is installed and detected by the BIOS)
When a Trusted-Platform Module (TPM) device is detected by your system, the following information is displayed:
· TPM 2.0 Device Found · Firmware Version: · Vendor:
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Security Device Support Select Enable to enable BIOS support for onboard security devices, which are not displayed in the OS. If this feature is set to Enable, TCG EFI protocol and INT1A interface will not be available. The options are Disable and Enable. *When "Security Device Support" is set to Enable, the following information is displayed:
· Active PCR banks · Available PCR banks
SHA-1 PCR Bank (Available when "Security Device Support" is set to Enable) Select Enabled to enable SHA-1 PCR Bank support to enhance system integrity and data security. The options are Disabled and Enabled. SHA256 PCR Bank (Available when "Security Device Support" is set to Enable) Select Enabled to enable SHA256 PCR Bank support to enhance system integrity and data security. The options are Disabled and Enabled. Pending Operation (Available when "Security Device Support" is set to Enable) Use this feature to schedule a TPM-related operation to be performed by a security (TPM) device at the next system boot to enhance system data integrity. The options are None and TPM Clear.
Note: Your system will reboot to carry out a pending TPM operation.
Platform Hierarchy (Available when "Security Device Support" is set to Enable) (for TPM version 2.0 and above) Select Enabled for TPM Platform Hierarchy support which allows the manufacturer to utilize the cryptographic algorithm to define a constant key or a fixed set of keys to be used for initial system boot. These early boot codes are shipped with the platform and are included in the list of "public keys". During system boot, the platform firmware uses the trusted public keys to verify a digital signature in an attempt to manage and control the security of the platform firmware used in a host system via a TPM device. The options are Disabled and Enabled. Storage Hierarchy (Available when "Security Device Support" is set to Enable) Select Enabled for TPM Storage Hierarchy support that is intended to be used for non-privacysensitive operations by a platform owner such as an IT professional or the end user. Storage Hierarchy has an owner policy and an authorization value, both of which can be set and are held constant (-rarely changed) through reboots. This hierarchy can be cleared or changed independently of the other hierarchies. The options are Disabled and Enabled.
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Endorsement Hierarchy (Available when "Security Device Support" is set to Enable) Select Enabled for Endorsement Hierarchy support, which contains separate controls to address the user's privacy concerns because the primary keys in the hierarchy are certified by the TPM key or by a manufacturer with restrictions on how an authentic TPM device that is attached to an authentic platform can be accessed and used. A primary key can be encrypted and certified with a certificate created by using TPM2_ ActivateCredential, which allows the user to independently enable "flag, policy, and authorization values" without involving other hierarchies. A user with privacy concerns can disable the endorsement hierarchy while still using the storage hierarchy for TPM applications, permitting the platform software to use the TPM. The options are Disabled and Enabled.
PH Randomization (for TPM version 2.0 and above) Select Enabled for Platform Hierarchy (PH) Randomization support, which is used only during the platform developmental stage. This feature cannot be enabled in the production platforms. The options are Disabled and Enabled.
Disable Block Sid (Available when your motherboard supports NVMe) Select Enabled to allow SID authentication to be performed in TCG Storage devices. The options are Disabled and Enabled.
Supermicro BIOS-Based TPM Provision Support If this feature is set to Enabled, Supermicro BIOS-based TPM provision will be supported. The options are Disabled and Enabled.
Note: Enabling this feature will lock your TPM on the production platform, and you will not be able to delete the NV indexes.
TXT Support Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance system integrity and data security. The options are Disabled and Enabled.
Note 1: If this feature is set to Enabled, be sure to disable Device Function On-Hide (EV DFX) support when it is present in the BIOS for the system to work properly. Note 2: For more information on TPM, please refer to the TPM manual at https://www. supermicro.com/manuals/other/AOM-TPM-9670V_9670H.pdf.
ACPI Settings
NUMA Use this feature to enable Non-Uniform Memory Access (NUMA) to enhance system performance. The options are Disabled and Enabled.
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UMA-Based Clustering When this feature is set to Hemisphere, Uniform Memory Access (UMA)-based clustering will support 2-cluster configuration for system performance enhancement. The options are Disabled (All2All), Hemisphere (2-clusters), and Quadrant (4-clusters). WHEA Support Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and provide a common infrastructure for the system to handle hardware errors within the Windows OS environment to reduce system crashes and to enhance system recovery and health monitoring. The options are Disabled and Enabled. High Precision Event Timer Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The HPET is used to replace the 8254 Programmable Interval Timer. The options are Disabled and Enabled.
Super IO Configuration (Available when your system supports this feature)
The following information is displayed.
· Super IO Chip
Serial Port 1 Configuration
Serial Port 1 Select Enabled to enable serial port 1. The options are Disabled and Enabled. Device Settings (Available when "Serial Port 1" is set to Enabled) This feature displays the base I/O port address and the Interrupt Request address of serial port 1. Change Settings (Available when "Serial Port 1" is set to Enabled) This feature specifies the base I/O port address and the Interrupt Request address of serial port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to serial port 1. The options are Auto, (IO=3F8h; IRQ=4;), (IO=2F8h; IRQ=4;), (IO=3E8h; IRQ=4;), and (IO=2E8h; IRQ=4;).
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Serial Port 2 Configuration
Note: It can be "Serial Port 2 Configuration" or "SOL Configuration" based on your system support.
Serial Port 2/SOL ("Serial Port 2" or "SOL" based on your system support) Select Enabled to enable serial port 2 (or SOL). The options are Disabled and Enabled. Device Settings (Available when "Serial Port 2/SOL" is set to Enabled) This feature displays the base I/O port address and the Interrupt Request address of serial port 2 (or SOL). Change Settings (Available when "Serial Port 2/SOL" is set to Enabled) This feature specifies the base I/O port address and the Interrupt Request address of serial port 2 (or SOL). Select Auto for the BIOS to automatically assign the base I/O and IRQ address to serial port 2. The options are Auto, (IO=3F8h; IRQ=3;), (IO=2F8h; IRQ=3;), (IO=3E8h; IRQ=3;), and (IO=2E8h; IRQ=3;). Serial Port 2 Attribute (Available for Serial Port 2 only) Select SOL to use serial port 2 as a Serial Over LAN (SOL) port for console redirection. The options are SOL and COM.
Serial Port Console Redirection
COM1 (Available when your system supports serial port of COM1) Console Redirection Select Enabled to enable COM port 1 for Console Redirection, which allows a client machine to be connected to a host machine at a remote site for networking. The options are Disabled and Enabled.
Note: This feature will be set to Enabled if there is no BMC support.
Console Redirection Settings (Available when "Console Redirection" above is set to Enabled)
Terminal Type Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
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Bits Per Second Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second). Data Bits Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8 (bits). Parity A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space. Stop Bits A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2. Flow Control Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS. VT-UTF8 Combo Key Support Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled. Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled. Resolution 100x31 Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.
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Putty KeyPad This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400.
SOL/COM2 Note: This feature is available when your system supports serial port of SOL and/or COM2. The "SOL/COM2" here indicates a shared serial port, and SOL is used as the default.
Console Redirection Select Enabled to use the SOL/COM2 port for Console Redirection. The options are Disabled and Enabled.
Console Redirection Settings (Available when "Console Redirection" above is set to Enabled)
Use this feature to specify how the host computer will exchange data with the client computer.
Terminal Type Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per Second Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second).
Data Bits Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8 (bits).
Parity A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark
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as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space. Stop Bits A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2. Flow Control Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS. VT-UTF8 Combo Key Support Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled. Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled. Resolution 100x31 Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled. Putty KeyPad This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400. Legacy Console Redirection
Legacy Console Redirection Settings
Legacy Serial Redirection Port Use this feature to select a COM port to display redirection of Legacy OS and Legacy OPROM messages. The options are COM1 and SOL. Please note that the available options are based on your motherboard features. Resolution Use this feature to select the numbers of rows and columns used in Console Redirection for Legacy OS support. The options are 80x24 and 80x25.
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Redirect After BIOS POST Use this feature to enable or disable legacy console redirection after BIOS POST. When the option - BootLoader is selected, legacy console redirection is disabled before booting the OS. When the option - Always Enable is selected, legacy console redirection remains enabled upon OS bootup. The options are Always Enable and BootLoader.
Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS) The feature allows you to configure Console Redirection settings to support Out-of-Band Serial Port management.
Console Redirection EMS Select Enabled to use the SOL port for Console Redirection. The options are Disabled and Enabled.
Console Redirection Settings (Available when "Console Redirection EMS" above is set to Enabled)
Out-of-Band Mgmt Port The feature selects a serial port in a client server to be used by the Microsoft Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are COM1 and SOL/COM2. Please note that the option of SOL/COM2 indicates a shared serial port. SOL is available with BMC support.
Terminal Type EMS Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per Second EMS This feature sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second).
Flow Control EMS Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff.
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The following information is displayed: Data Bits EMS / Parity EMS / Stop Bits EMS
Network Configuration
Network Stack Select Enabled to enable Preboot Execution Environment (PXE) or Unified Extensible Firmware Interface (UEFI) for network stack support. The options are Disabled and Enabled. IPv4 PXE Support (Available when "Network Stack" is set to Enabled) Select Enabled to enable IPv4 PXE boot support. If this feature is disabled, it will not create the IPv4 PXE boot option. The options are Disabled and Enabled. IPv4 HTTP Support (Available when "Network Stack" is set to Enabled) Select Enabled to enable IPv4 HTTP boot support. If this feature is disabled, it will not create the IPv4 HTTP boot option. The options are Disabled and Enabled. IPv6 PXE Support (Available when "Network Stack" is set to Enabled) Select Enabled to enable IPv6 PXE boot support. If this feature is disabled, it will not create the IPv6 PXE boot option. The options are Disabled and Enabled. IPv6 HTTP Support (Available when "Network Stack" is set to Enabled) Select Enabled to enable IPv6 HTTP boot support. If this feature is disabled, it will not create the IPv6 HTTP boot option. The options are Disabled and Enabled. PXE Boot Wait Time (Available when "Network Stack" is set to Enabled) Use this feature to set the wait time (in seconds) upon which the system BIOS will wait for you to press the <ESC> key to abort PXE boot instead of proceeding with PXE boot by connecting to a network server immediately. Press "+" or "-" on your keyboard to change the value. The default setting is 0. Media Detect Count Use this feature to select the wait time (in seconds) for the BIOS ROM to detect the presence of a LAN media either via the Internet connection or via a LAN port. Press "+" or "-" on your keyboard to change the value. The default setting is 1.
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MAC:(MAC address)-IPv6 Network Configuration
Enter Configuration Menu The following information is displayed: Interface Name / Interface Type / MAC address / Host address / Route Table / Gateway addresses / DNS addresses Interface ID Use this feature to change/enter the 64-bit alternative interface ID for the device. The string format is colon separated. The default setting is the MAC address above. DAD Transmit Count This feature displays the number of consecutive neighbor solicitation messages have been sent while performing duplicate address detection on a tentative address. The default setting is 1. Policy Use this feature to select how the policy is to be configured. The options are automatic and manual.
Advanced Configuration (Available when "Policy" is set to manual)
New IPv6 address Use this feature to enter the IPv6 address for the local machine. New Gateway address Use this feature to set the gateway address for the local machine. New DNS address Use this feature to set the DNS server address for the local machine. Commit Changes and Exit Press <Enter> to save changes and exit. The options are Yes and No. Discard Changes and Exit Press <Enter> to discard changes and exit. The options are Yes and No. Save Changes and Exit Press <Enter> to save changes and exit. The options are Yes and No.
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MAC:(MAC address)-IPv4 Network Configuration
Configured Select Enabled to show whether the network address has been successfully configured. The options are Disabled and Enabled. Enable DHCP (Available when "Configured" is set to Enabled) Select Enabled to support Dynamic Host Configuration Protocol (DHCP) which allows the BIOS to search for a DHCP server attached to the network and request the next available IP address for this computer. The options are Disabled and Enabled. Local IP Address (Available when "Configured" is set to Enabled and "Enabled DHCP" is set to Disabled) Use this feature to enter an IP address for the local machine. Local NetMask (Available when "Configured" is set to Enabled and "Enabled DHCP" is set to Disabled) Use this feature to set the netmask for the local machine. Local Gateway (Available when "Configured" is set to Enabled and "Enabled DHCP" is set to Disabled) Use this feature to set the gateway address for the local machine. Local DNS Servers (Available when "Configured" is set to Enabled and "Enabled DHCP" is set to Disabled) Use this feature to set the Domain Name System (DNS) server address for the local machine. Save Changes and Exit Press <Enter> to save changes and exit. The options are Yes and No.
PCIe/PCI/PnP Configuration
The following information is displayed:
· PCI Bus Driver Version
PCI Devices Common Settings: Above 4G Decoding (Available when the system supports 64-bit PCI decoding) Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address. The options are Disabled and Enabled.
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MMCFG Base This feature determines how the lowest Memory Mapped Configuration (MMCFG) base is assigned to onboard PCI devices. The options are 1G, 1.5G, 1.75G, 2G, 2.25G, 3G, and Auto.
MMCFG Size Use this feature to set the MMCFG size. The options are 128M, 256M, 512M, 1G, 2G, and Auto. Please note that the MMCFG size is based on the memory populated.
MMIO High Base Use this feature to select the base memory size according to memory-address mapping for the IO hub. The options are 56T, 40T, 32T, 24T, 16T, 4T, 2T, 1T, 512G, and 3584T.
MMIO High Granularity Size Use this feature to select the high memory size according to memory-address mapping for the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
SR-IOV Support Select Enabled for Single-Root IO Virtualization support. The options are Disabled and Enabled.
ARI Support Select Enabled for Alternative Routing-ID Interpretation (ARI) support. The options are Disabled and Enabled.
Bus Master Enable If it is set to Enabled, the PCI Bus Driver will enable the Bus Master Attribute for DMA transactions. If it is set to Disabled, the PCI Bus Driver will disable the Bus Master Attribute for Pre-Boot DMA protection. The options are Disabled and Enabled.
Consistent Device Name Support Select Enabled for ACPI_DSM (DSM: Device Specific Method) device name support for onboard devices and slots. The options are Disabled and Enabled.
NVMe Firmware Source Use this feature to select the NVMe firmware to support system boot. The options are Vendor Defined Firmware and AMI Native Support. The default option, Vendor Defined Firmware, is pre-installed on the drive and may resolve errata or enable innovative functions for the drive. The other option, AMI Native Support, is offered by the BIOS with a generic method. VGA Priority Use this feature to select the graphics device to be used as the primary video display for system boot. The options are Onboard and Offboard.
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For the following features, please note that: Note 1: The number of slots and slot naming vary based on your motherboard features. Note 2: The option of Legacy is available when "Boot Mode Select" is set to Dual or Legacy. Note 3: Refer to Boot submenu in the BIOS Setup main menu to set "Boot Mode Select" (page 169).
Onboard Video Option ROM Select EFI to allow you to boot the computer using the Extensible Firmware Interface (EFI) device installed on the onboard video port. The options are Disabled and EFI. P1 SLOT1 PCIe 5.0 X16 OPROM / P2 SLOT2 PCIe 5.0 X16 OPROM / P1 SLOT3 PCIe 5.0 X16 OPROM / P2 SLOT4 PCIe 5.0 X16 OPROM / P1 SLOT5 PCIe 5.0 X16 OPROM OPROM / P2 SLOT6 PCIe 5.0 X8 OPROM Select EFI to allow you to boot the computer using the EFI device installed on the PCIe slot specified. The options are Disabled and EFI. Onboard LAN Device Select Enabled to use the onboard LAN device. The options are Disabled and Enabled. Onboard LAN1 Option ROM (Available when "Onboard LAN Device" is set to Enabled) Use this feature to select the type of device installed in LAN Port 1 used for system boot. The options are Disabled and EFI. Please note that available options are based on your LAN OPROM ROM. Onboard LAN2 Option ROM (Available when "Onboard LAN Device" is set to Enabled and "Onboard LAN1 Option ROM" is set to Disabled or PXE) Use this feature to select the type of device installed in LAN Port 2 used for system boot. The default setting for LAN2 Option ROM is Disabled. Please note that available options are based on your LAN OPROM ROM. Onboard NVME1 Option ROM / Onboard NVME2 Option ROM / Onboard NVME3 Option ROM / Onboard NVME4 Option ROM / Onboard NVME5 Option ROM / Onboard NVME6 Option ROM Use this feature to select which firmware function to be loaded for the NVMe device in this slot. The options are Disabled and EFI.
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HTTP Boot Configuration
HTTP Boot Policy Use this feature to set the HTTP boot policy. The options are Apply to all LANs, Apply to each LAN, and Boot Priority #1 instantly.
HTTPS Boot Checks Hostname Enable this feature for HTTPS boot to check the hostname of the TLS certificates to see if it matches the host name provided by the remote server. The options are Enabled and Disabled (WARNING: Security Risk!!). Priority of HTTP Boot
Instance of Priority 1 (Available when your motherboard supports this feature) This feature sets the rank target port. The default setting is 1.
Select IPv4 or IPv6 This feature specifies which connection the target LAN port should boot from. The options are IPv4 and IPv6.
Boot Description Use this feature to enter a boot description, which cannot be longer than 75 characters. Please be sure to enter a boot description; otherwise, the boot option for the URI cannot be created.
Boot URI Enter a Boot Uniform Research Identifier (URI) with 128 characters or shorter. This Boot URI determines how IPv4 Boot Option and IPv6 Boot Option will be created. This feature is only supported on Dual or EFI Boot Mode.
Instance of Priority 2 (Available when your motherboard supports this feature) This feature sets the rank target port. The default setting is 0.
Select IPv4 or IPv6 (Unavailable when "Instance of Priority x:" is set to 0) This feature specifies which connection the target LAN port should boot from. The options are IPv4 and IPv6.
Boot Description (Unavailable when "Instance of Priority x:" is set to 0) Use this feature to enter a boot description, which cannot be longer than 75 characters. Please be sure to enter a boot description; otherwise, the boot option for the URI cannot be created.
Boot URI (Unavailable when "Instance of Priority x:" is set to 0) Enter a Boot URI with 128 characters or shorter. This Boot URI determines how IPv4 Boot Option and IPv6 Boot Option will be created. This feature is only supported on Dual or EFI Boot Mode.
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Supermicro KMS Server Configuration
Note: Be sure to configure all the features in the section of Supermicro KMS Server Configuration and the feature of "KMS Security Policy" (page 141) so that your system can communicate with the KMS server. Supermicro KMS Server IP address Use this feature to set the Supermicro Key Management Service (KMS) server IPv4 address in dotted-decimal notation. Second Supermicro KMS Server IP address Use this feature to set the second Supermicro KMS server IPv4 address in dotted-decimal notation. Supermicro KMS TCP Port number Use this feature to set the TCP port number used in Supermicro KMS Server. The valid range is 100­9999. The default setting is 5696. Do not change the default setting unless a different TCP port number has been specified and used in the Supermicro KMS Server. KMS Time Out Use this feature to set the KMS server connecting timeout (in seconds). The default setting is 5 (seconds). TimeZone Use this feature to set the correct time zone. The default setting is 0 (not specified). Client UserName Press <Enter> to set the client identity (UserName). The maximum length is 63 characters. Client Password Press <Enter> to set the client identity (Password). The maximum length is 31 characters.
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CA Certificate/ Client Certificate/ Client Private Key
Use the three features to enroll factory defaults or load the KMS Transport Layer Security (TLS) certificates, which are generated by the KMS Server, from the file stored in the USB flash drive as shown below.
Private Key Password (Available when "Client Private Key" above has been set) Use this feature to change the private key password.
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Super-Guardians Configuration
Press <Del> during system boot to enter the BIOS Setup utility. Navigate to the Advanced tab. Use the arrow keys to select Super-Guardians Configuration and press <Enter>.
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Super X13DAI-T User's Manual Super-Guardians Protection Policy Use this feature to enable the Super-Guardians Protection Policy. The options are Storage, System, and System and Storage. The default setting is Storage. Set this feature to Storage to protect and have secure access to your storage devices (TCG NVMe devices) with the Authentication-Key (AK). Set this feature to System to protect and have secure access to your system/motherboard with the AK. Set this feature to System and Storage to protect and have secure access to your system/motherboard/storage devices with the AK. (TCG is the abbreviation for Trusted Computing Group.)
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Chapter 4: UEFI BIOS KMS Security Policy (Available when "TPM Security Policy" and "USB Security Policy" are set to Disabled) Set this feature to Enabled to enable the KMS Security Policy. The options are Disabled and Enabled. The default setting is Disabled. Save settings (you can press <F4>) and reboot the system for changes to take effect.
Note 1: Be sure that the KMS Server is ready before configuring this feature. Note 2: Use the professional KMS Server solutions (e.g., Thales Server) or the Supermicro PyKMIP Software Package to establish the KMS Server.
KMS Server Retry Count (Available when "TPM Security Policy" and "USB Security Policy" are set to Disabled) Use this feature to specify how many times of connection retrying to the KMS server. The valid range is 0­10. Press "+" or "-" on your keyboard to change the value. The default setting is 5 (times). The value of 0 indicates a infinite-retrying.
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Super X13DAI-T User's Manual TPM Security Policy (Available when "KMS Security Policy" and "USB Security Policy" are set to Disabled) The options are Disabled and Enabled. The default setting is Disabled. Set this feature to Enabled to enable the TPM Security Policy. Save settings (you can press <F4>) and reboot the system for changes to take effect. Note: Be sure to install a Trusted Platform Module (TPM) device (TPM 2.0) to your system before configuring this feature.
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Chapter 4: UEFI BIOS Load Authentication-Key (Available when "KMS Security Policy" and "TPM Security Policy" are set to Disabled) The options are Disabled and Enabled. The default setting is Disabled. Set this feature to Enabled; save settings (you can press <F4>) and reboot the system for changes to take effect. While booting, the BIOS will automatically load the Authentication-Key (filename: TPMAuth. bin) from the USB flash drive. Afterwards, the default setting will be set to Disabled by the BIOS.
Note 1: Be sure to connect a USB flash drive with the Authentication-Key (filename: TPMAuth.bin) to your system before the system reboot. Note 2: Be sure to save the Authentication-Key (filename: TPMAuth.bin) to the USB flash drive and have a backup. Please load the Authentication-Key (filename: TPMAuth. bin) after installing a TPM device. Otherwise, the TPM function can not work properly.
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Super X13DAI-T User's Manual Save Authentication-Key (Available when "TPM Security Policy" is set to Enabled and "USB Security Policy" is set to Disabled) The options are Disabled and Enabled. The default setting is Disabled. Set this feature to Enabled; save settings (you can press <F4>) and reboot the system for changes to take effect. While booting, the BIOS will automatically save the Authentication-Key (filename: TPMAuth. bin) to the USB flash drive. Afterwards, the default setting will be set to Disabled by the BIOS.. Note: Be sure to connect a USB flash drive to your system before the system reboot.
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Chapter 4: UEFI BIOS USB Security Policy (Available when "KMS Security Policy" and "TPM Security Policy" are set to Disabled) Use this feature to enable the USB Security Policy. The options are Disabled and Enabled. The default setting is Disabled. Set this feature to Enabled; save settings (you can press <F4>) and reboot the system for changes to take effect. Connect a USB flash drive to your system before the system reboot. While booting, the BIOS will automatically create the USB Authentication-Key (filename: USBAuth.bin) and save it to the USB flash drive.
Note 1: Be sure to connect a USB flash drive to your system before configuring this feature. Note 2: Be sure to save the USB Authentication-Key (filename: USBAuth.bin) to the USB flash drive and have a backup.
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Intel(R) VROC SATA Controller
Note 1: This section is based on your system features and related device(s) installed. Note 2: This section is available when "SATA Mode Selection" is set to RAID. Note 3: Refer to PCH SATA0 Configuration and PCH SATA1 Configuration submenus in the BIOS Setup main menu to set "SATA Mode Selection". The following information is displayed.
· Intel VROC SATA driver version
Create RAID Volume
Name: This feature allows you to enter the unique name of RAID volume. RAID Level: This feature allows you to select the RAID level. The options are RAID0(Stripe), RAID1(Mirror), RAID5(Parity), and RAID10(RAID0+1). Select Disks: Select the desired RAID disks one by one by setting them to X. The options are (not selected) and X (selected). Strip Size: Use this feature to select the RAID strip size. The options are 4KB, 8KB, 16KB, 32KB, 64KB, and 128KB. The available options are based on the setting of "RAID Level:" above. Capacity (GB): This feature allows you to enter the desired RAID capacity (in GB).
Create RAID Volume Use this feature is to create a RAID volume with the settings above. The options are Yes and No. Non-RAID Physical Disks: This feature displays the information of non-RAID physical disk(s). RAID Volumes: This feature displays the information of RAID volumes that have been created earlier.
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Intel(R) VROC sSATA Controller
Note 1: This section is based on your system features and related device(s) installed. Note 2: This section is available when "SATA Mode Selection" is set to RAID. Note 3: Refer to PCH SATA0 Configuration and PCH SATA1 Configuration submenus in the BIOS Setup main menu to set "SATA Mode Selection". The following information is displayed.
· Intel VROC sSATA driver version
Create RAID Volume
Name: This feature allows you to enter the unique name of RAID volume. RAID Level: This feature allows you to select the RAID level. The options are RAID0(Stripe), RAID1(Mirror), RAID5(Parity), and RAID10(RAID0+1). Select Disks: Select the desired RAID disks one by one by setting them to X. The options are (not selected) and X (selected). Strip Size: Use this feature to select the RAID strip size. The options are 4KB, 8KB, 16KB, 32KB, 64KB, and 128KB. The available options are based on the setting of "RAID Level:" above. Capacity (GB): This feature allows you to enter the desired RAID capacity (in GB).
Create RAID Volume Use this feature is to create a RAID volume with the settings above. The options are Yes and No. Non-RAID Physical Disks: This feature displays the information of non-RAID physical disk(s). RAID Volumes: This feature displays the information of RAID volumes that have been created earlier.
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Supermicro 10GBASE-T Ethernet Controller - (MAC address)
Note: The Ethernet controller and MAC addresses shown above are based on you system features.
Firmware Image Menu
The following information is displayed:
· Family Firmware Version · Boot Code · MBA · EFI · iSCSI Boot · CCM · NCSI · RDMA FW
Device Configuration Menu
Multi-Function Mode Use this feature to configure NIC hardware mode. In Single Function (SF) mode, a single physical function is assigned to each network port. In Network Partitioning Mode (NPAR) mode, a single physical network port will appear as as multiple virtual network interfaces in system. The options are SF and NPAR 1.0. Number of VFs per PF (Available when "SR-IOV" is set to Enabled) Use this feature to configure the number of Virtual Function (VF) per Physical Function (PF). The valid range is from 0 to 128 in multiples of 8. Maximum value is 128 divided by number of ports. The default is 8. SR-IOV Use this feature to enable or disable the Single Root I/O Virtualization (SR-IOV) feature on the network adapter. The options are Disabled and Enabled. Number of MSI-X Vectors per VF Use this feature to configure the number of Message Signaled Interrupts (MSI)-X vectors per VF. The valid range is from 0 to 64. The default is 16.
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Maximum Number of PF MSI-X Vectors Use this feature to configure the maximum number of MSI-X Vectors of a PF. The valid range is from 0 to 512. The default is 255. Energy Efficient Ethernet Use this feature to configure the Energy Efficient Ethernet (EEE) mode. The options are Disabled and Enabled. Operational Link Speed This feature controls the default link speed for the LAN port. The default setting is AutoNeg (Auto Negotiation). Support RDMA Use this feature to configure the Remote Direct Memory Access (RDMA) mode. The options are Disabled and Enabled. DCB Protocol Use this feature to configure the Data Center Bridging (DCB) settings. The options are Disabled, Enabled (IEEE only), CEE (only), and Both (IEEE preferred with fallback to CEE). LLDP nearest bridge Use this feature to configure the Link Layer Discovery Protocol (LLDP) nearest bridge state The options are Disabled and Enabled. Default EVB Mode Use this feature to configure the Edge Virtual Bridging (EVB) mode. The options are VEB, VEPA, and None. Enable PME Capability Use this feature to configure the Power Management Event (PME) capability support. The options are Disabled and Enabled. Flow Offload Use this feature to configure the Flow Offload mode. This feature is supported on Linux DPDK only. It is not supported on Windows or ESX OS. The options are Disabled and Enabled. Live Firmware Upgrade Use this feature to enable the upgrade of device firmware with minimal downtime and minimal traffic interruption. It avoids host reboot, device power cycle, and driver reload. This feature is only supported on Linux OS only. The options are Disabled and Enabled.
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Adapter Error Recovery Use this feature to enable the recovery of firmware from fatal errors without manual intervention, host reboot, or power cycle. The options are Disabled and Enabled.
MBA Configuration Menu
Option ROM Use this feature to control the enablement of legacy boot protocols in Option ROM. The options are Disabled and Enabled. Legacy Boot Protocol Use this feature to specify the non-UEFI boot protocol. The options are PXE, iSCSI, and NONE. Boot Strap Type Use this feature to specify the boot strap method used to boot to the operating system. Options are Auto Detect, BBS, Int 18h, and Int 19h. Hide Setup Prompt Use this feature to specify whether to display or hide the legacy Option ROM setup prompt during system Power-on Self Test (POST). The options are Disabled and Enabled. Setup Key Stroke Use this feature to configure key strokes to invoke configuration menu. The options are Ctrl-S and Ctrl-B. Banner Message Timeout Use this feature to specify the number of seconds that the Option ROM banner is displayed during POST. The default is 7. Pre-boot Wake On LAN This feature allows you to remotely wake up the system from standby mode. The options are Disabled and Enabled. VLAN Mode Use this feature to enable or disable VLAN mode. The options are Disabled and Enabled. VLAN ID (1­4094) If VLAN Mode is enabled, use this feature to specify the VLAN ID. The valid VLAN ID range is from 1 to 4049. The default is 1.
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Boot Retry Count Use this feature to specify the number of times legacy boot to be attempted in case of a boot failure. The options are No Retry, 1 Retry, 2 Retries, 3 Retries, 4 Retries, 5 Retries, 6 Retries, and Indefinite Retries.
iSCSI Boot Configuration Menu
iSCSI General Parameters
TCP/IP Parameters via DHCP Use this feature to acquire TCP/IP configuration via DHCP. The options are Disabled and Enabled.
iSCSI Parameters via DHCP Use this feature to acquire iSCSI configuration via DHCP. The options are Disabled and Enabled.
CHAP Authentication Use this feature to enable or disable the CHAP authentication. The options are Disabled and Enabled. Challenge handshake authentication protocol (CHAP) is a protocol used to verify the identity of the peer of a connection.
Boot to iSCSI Target Use this feature to enable or disable booting to iSCSI target after logon. The options are Disabled, Enabled, and One Time Disabled.
DHCP Vendor ID Press <Enter> to enter the DHCP vendor ID (up to 32 characters).
Link Up Delay Time Use this feature to set the link up delay time. The valid value is 0­255 (seconds).
Use TCP Timestamp Use this feature to enable or disable the TCP timestamp. The options are Disabled and Enabled.
Target as First HDD Use this feature to set the target as the first hard disk drive (HDD) in your system. The options are Disabled and Enabled.
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LUN Busy Retry Count LUN stands for logical unit number, which is used to identify a logical/physical disk. Use this feature to set the number of retries in two-second intervals when LUN is busy. The valid value is 0­60. IP Version This feature controls whether IPv4 or IPv6 network address will be used for the iSCSI initiator and targets. The options are IPv4 and IPv6. Configuring this feature will reset all IP related fields.
iSCSI Initiator Parameters
The following information is displayed: · IP Address · Subnet Mask · Default Gateway · Primary DNS · Secondary DNS iSCSI Name Use this feature to enter the unique initiator name in iSCSI qualified name (IQN) format. CHAP ID (Available when "CHAP Authentication" is set to Enabled) Use this feature to enter the iSCSI initiator CHAP ID (up to 128 characters). CHAP Secret (Available when "CHAP Authentication" is set to Enabled) Use this feature to enter the iSCSI initiator CHAP secret (password). The valid value is 12­16 (characters).
iSCSI First Target Parameters
Connect Use this feature to enable or disable the first target establishment. The options are Disabled and Enabled. IP Address Use this feature to configure the first target IP address.
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TCP Port Use this feature to configure the first target TCP port number (1­65535). The default setting is 3260.
Boot LUN Use this feature to configure the first target boot LUN number (0­255). The default setting is 0.
iSCSI Name Usee the feature to create an iSCSI first target name. CHAP ID (Available when "CHAP Authentication" is set to Enabled) Use this feature to enter the CHAP ID of the first target (up to 128 characters). CHAP Secret (Available when "CHAP Authentication" is set to Enabled) Use this feature to specify the CHAP secret (password) of the first target. The valid value is 12­16 (characters).
iSCSI Second Target Parameters
Connect Use this feature to enable or disable the second target establishment. The options are Disabled and Enabled.
IP Address Use this feature to configure the second target IP address. TCP Port Use this feature to configure the second target TCP port number (1­65535). The default setting is 3260.
Boot LUN Use this feature to configure the second target boot LUN number (0­255). The default setting is 0.
iSCSI Name Usee the feature to create an iSCSI second target name.
CHAP ID (Available when "CHAP Authentication" is set to Enabled) Use this feature to enter the CHAP ID of the second target (up to 128 characters).
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CHAP Secret (Available when "CHAP Authentication" is set to Enabled) Use this feature to specify the CHAP secret (password) of the second target. The valid value is 12­16 (characters).
Secondary Device
Secondary Device Use this feature to enter the secondary device MAC address in the XX:XX:XX:XX:XX:XX format. Use Independent Target Portal Set this feature to use the independent target portal with multipath I/O enabled. The options are Disabled and Enabled. Use Independent Target Name Set this feature to use the independent target name with multipath I/O enabled. The options are Disabled and Enabled. Blink LEDs Use this feature to identify the physical network port by blinking the associated LED. The default setting is 0 (up to 15 seconds). The following information is displayed:
· Link Status · Physical Link Speed · Chip Type · PCI Device ID · Bus: Device: Function · Permanemt MAC Address · Virtual MAC Address
Restore Defaults Use this feature to reset the network adapter settings to factory defaults.
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TLS Authenticate Configuration
This submenu allows you to configure Transport Layer Security (TLS) settings.
Server CA Configuration
This feature allows you to configure the client certificate that is to be used by the server.
Enroll Certification
This feature allows you to enroll the certificate in the system.
Enroll Certification Using File
This feature allows you to enroll the security certificate in the system by using a file. Certification GUID Press <Enter> and input the certification Global Unique Identifier (GUID).
Commit Changes and Exit
Use this feature to save all changes and exit TLS settings.
Discard Changes and Exit
Use this feature to discard all changes and exit TLS settings. Delete Certification This feature is used to delete the certificate if a certificate has been enrolled in the system. The options are Disabled and Enabled.
Client Certification Configuration
This feature allows you to configure the client certificate to be used by the server.
Enroll Certification
This feature allows you to enroll the certificate in the system.
Enroll Certification Using File
This feature allows you to enroll the security certificate in the system by using a file.
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Certification GUID Press <Enter> and input the certification GUID.
Commit Changes and Exit
Use this feature to save all changes and exit TLS settings.
Discard Changes and Exit
Use this feature to discard all changes and exit TLS settings. Delete Certification This feature is used to delete the certificate if a certificate has been enrolled in the system.
Intel(R) Virtual RAID on CPU
Note: It is available when your system supports this feature and when "Enable/Disable VMD" is set to Enable. The following information is displayed:
· Intel(R) VROC with VMD Technology x.x.x.xxxx · Upgrade key: · Intel VROC Managed Controllers:
· Memory controller ID Driver Health
This feature displays the health information of the drivers installed in your system, including LAN controllers, as detected by the BIOS. Select one and press <Enter> to see the details.
Note: This section is provided for reference only, for the driver health status will differ depending on the drivers installed in your system. It's also based on your system configuration and the environment that your system is operating in.
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4.4 Event Logs
Use this feature to configure Event Logs settings. Note: After you've made any changes in this section, please be sure to reboot the system for the changes to take effect.
Change SMBIOS Event Log Settings
Enabling/Disabling Options SMBIOS Event Log Select Enabled to enable System Management BIOS (SMBIOS) Event Logging during system boot. The options are Disabled and Enabled. Erasing Settings Erase Event Log (Available when "SMBIOS Event Log" is set to Enabled) Select No to keep the event log without erasing it upon next system bootup. Select Yes, Next reset to erase the event log upon next system reboot. The options are No, (Yes, Next reset), and (Yes, Every reset). When Log is Full (Available when "SMBIOS Event Log" is set to Enabled) Select Erase Immediately to immediately erase all errors in the SMBIOS event log when the event log is full. Select Do Nothing for the system to do nothing when the SMBIOS event log is full. The options are Do Nothing and Erase Immediately.
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SMBIOS Event Log Standard Settings Log System Boot Event (Available when "SMBIOS Event Log" is set to Enabled) Select Enabled to log system boot events. The options are Enabled and Disabled. MECI (Available when "SMBIOS Event Log" is set to Enabled) Enter the increment value for the multiple event counter. Enter a number between 1 to 255. The default setting is 1. (MECI is the abbreviation for Multiple Event Count Increment.) METW (Available when "SMBIOS Event Log" is set to Enabled) This feature is used to determine how long (in minutes) should the multiple event counter wait before generating a new event log. Enter a number between 0 to 99. The default setting is 60. (METW is the abbreviation for Multiple Event Count Time Window.)
Note: Please reboot the system for the changes above to take effect.
View SMBIOS Event Log
This feature allows you to view the event in the system event log. Select this feature and press <Enter> to view the status of an event in the log. The following information is displayed: DATE / TIME / ERROR CODE / SEVERITY.
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Use this feature to configure BMC settings.

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BMC Firmware Revision This feature indicates the BMC firmware revision used in your system. BMC STATUS This feature indicates the status of the BMC firmware installed in your system.
System Event Log
Enabling/Disabling Options SEL Components Select Enabled to enable all system event logging upon system boot. The options are Disabled and Enabled. Erasing Settings Erase SEL (Available when "SEL Components" is set to Enabled) Select (Yes, On next reset) to erase all system event logs upon next system boot. Select (Yes, On every reset) to erase all system event logs upon each system reboot. Select No to keep all system event logs after each system reboot. The options are No, (Yes, On next reset), and (Yes, On every reset).
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When SEL is Full (Available when "SEL Components" is set to Enabled) This feature allows you to determine what the BIOS should do when the system event log is full. Select Erase Immediately to erase all events in the log when the system event log is full. The options are Do Nothing and Erase Immediately.
Note: After making changes on a setting, be sure to reboot the system for the changes to take effect.
BMC Network Configuration
Update BMC LAN Configuration Select Yes for the BIOS to implement all IP/MAC address changes upon next system boot. The options are No and Yes. ******************************** Configure IPv4 Support ****************************** BMC LAN Selection Use this feature to select the type of the IPMI LAN. The default setting is Failover. BMC Network Link Status: This feature displays the status of the IPMI network link for this system. The default setting is Dedicated LAN. Configuration Address Source (Available when "Update BMC LAN Configuration" is set to Yes) Use this feature to select the source of the IPv4 connection. If Static is selected, you will need to know the IP address of IPv4 connection and enter it to the system manually in the field. If DHCP is selected, the BIOS will search for a Dynamic Host Configuration Protocol (DHCP) server in the network that is attached to and request the next available IP address for this computer. The options are Static and DHCP. Station IP Address (Available when "Configuration Address Source" is set to Static) This feature displays the Station IP address in decimal and in dotted quad form (i.e., 172.29.176.131). Subnet Mask (Available when "Configuration Address Source" is set to Static) This feature displays the sub-network that this computer belongs to. The value of each threedigit number separated by dots should not exceed 255.
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Station MAC Address (Available when "Configuration Address Source" is set to Static) This feature displays the Station MAC address for this computer. Mac addresses are six two-digit hexadecimal numbers.
Gateway IP Address (Available when "Configuration Address Source" is set to Static) This feature displays the Gateway IP address for this computer. This should be in decimal and in dotted quad form (i.e., 172.29.0.1).
VLAN (Available when "Update BMC LAN Configuration" is set to Yes) This feature displays the status of virtual LAN (VLAN) support. The options are Disable and Enable.
VLAN ID (Available when "VLAN" is set to Enable) Use this feature to create a new VLAN ID by using an existing VLAN or creating a new VLAN ID. Enter a valid value between 1 - 4094. The default setting is 1.
*****************************
Configure IPv6 Support ******************************
IPv6 Address Status This feature displays the status of the IPv6 address.
IPv6 Support Use this feature to enable IPv6 support. The options are Enabled and Disabled.
Configuration Address Source (Available when "IPv6 Support" is set to Enabled) Use this feature to select the source of the IPv6 connection. If Static Configuration is selected, you will need to know the IP address of IPv6 connection and enter it to the system manually in the field. If the other two options are selected, the BIOS will search for a DHCP server in the network that is attached to and request the next available IP address for this computer. The options are Static Configuration, DHCPv6 Stateless, and DHCPv6 Stateful. IPv6 Address ("Static", "DHCPv6 Stateless", or "DHCPv6 Stateful", depending on the option you selected for "Configuration Address Source" above) This feature displays the station IPv6 address. Press <Enter> to change the setting.
Prefix Length (Available when "Configuration Address Source" is set to Static Configuration) This feature displays the prefix length. Press <Enter> to change the setting.
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Super X13DAI-T User's Manual Gateway IP (Available when "Configuration Address Source" is set to Static Configuration) Use this feature to enter the IPv6 gateway IP address. Press <Enter> to change the setting. Advanced Settings (Available when "Configuration Address Source" is set to DHCPv6 Stateless) Use this feature to set the DNS server IP. The options are Auto obtain DNS server IP and Manually obtain DNS server IP. Preferred DNS server IP (Available when "Advanced Settings" above is set to Manually obtain DNS server IP) This feature allows you to set the preferred DNS server IP. Alternative DNS server IP (Available when "Advanced Settings" above is set to Manually obtain DNS server IP) This feature allows you to set the alternative DNS server IP.
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4.6 Security
This feature allows you to configure the following security settings for the system.
The following information is displayed:
· Administrator Password · User Password · Password Description
Administrator Password This feature indicates if an administrator password has been installed. It also allows you to set the administrator password which is required to enter the BIOS Setup utility. The length of the password should be from three characters to 20 characters long. User Password (Available when "Administrator Password" has been set) This feature indicates if a user password has been installed. It also allows you to set the user password which is required to enter the BIOS Setup utility. The length of the password should be from three characters to 20 characters long.
Note: For detailed instructions on how to configure Security Boot settings, please refer to the Security Boot Configuration User's Guide posted on the web page under the link: https://www.supermicro.com/support/manuals/.
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Password Check Select Setup for the system to check for a password at Setup. Select Always for the system to check for a password at bootup and upon entering the BIOS Setup utility. The options are Setup and Always. Hard Drive Security Frozen Select Enabled to freeze the Lock Security feature for HDD to protect key data in hard drives from being altered. The options are Enabled and Disabled.
Supermicro Security Erase Configuration (Available when any storage device is detected by the BIOS)
Note: For more information, please refer to https://www.supermicro.com/manuals/ other/X11_X12_X13_B11_B12_B13_H11_H12_BH12_H13_Secure_Erase_Guide.pdf. This section allows you to configure the Supermicro-proprietary Security Erase settings. When this section is selected, the following information is displayed. Please note that the order of the following information may differ based on the storage devices being detected.
· HDD Name: This feature displays the name of the storage device that is detected by the
BIOS.
· HDD Serial Number: This feature displays the serial number of the storage device that is
detected by the BIOS.
· Security Mode: This feature displays the security mode of the storage device that is de-
tected by the BIOS.
· Estimated Time: This feature displays the estimate time needed to perform the selected
Security Erase features.
· HDD User Pwd Status: This feature indicates if a password has been set as a storage
device user password which allows you to configure Supermicro Security Erase settings on the storage device by using this user password.
· TCG Device Type: This feature displays the TCG device type detected by the system. · Admin Pwd Status: This feature indicates if a password has been set as a storage device
administrator password which allows you to configure Supermicro Security Erase settings on the storage device by using this administrator password.
Security Function Select Set Password to set an storage device password which allows you to configure the security settings of the storage device. Select Security Erase - Password to enter a storage
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device user password to allow you to erase the password and the contents previously stored in the storage device. Select Security Erase - Without Password to use the manufacturer default password "111111111" as the storage device user password and allow you to erase the contents of the storage device by using this default password. The options are Disable, Set Password, Security Erase - Password, Security Erase - PSID, and Security Erase - Without Password.
Note: The option of Security Erase - PSID is based on the storage device support. PSID is the abbreviation for Physical Security Identification. Password Use this feature to set the storage device user password which allows you to configure the Supermicro Security Erase settings by using this user password. New Password (Available when "Password" above has been set) Use this feature to set the new user password for the storage device which allows you to configure the Supermicro Security Erase settings by using this new user password.
Lockdown Mode (Available when the DCMS key is activated) Select Enabled to support Lockdown Mode that will prevent the existing data or keys stored in the system from being altered or changed in an effort to preserve system integrity and security. The options are Disabled and Enabled. HDD Security Configuration:
P4: (Storage Device Name)
This section is available when the storage device is detected by the BIOS. Select this device. Press <Enter> and the following information is displayed:
· HDD Password Description: · HDD PASSWORD CONFIGURATION:
· Security Supported: · Security Enabled: · Security Locked:
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· Security Frozen: · HDD User Pwd Status: · HDD Master Pwd Status:
Set User Password (Available when "Security Frozen:" above is No) Press <Enter> to set the HDD user password.
Secure Boot
Note: For detailed instructions on how to configure Security Boot settings, please refer to the Security Boot Configuration User's Guide posted on the web page under the link: https://www.supermicro.com/support/manuals/. The following information is displayed:
· System Mode · Secure Boot
Secure Boot Select Enabled to configure Secure Boot settings. The options are Disabled and Enabled. Secure Boot Mode Use this feature to select the desired secure boot mode for the system. The options are Standard and Custom. CSM Support If this feature is set to Enabled, legacy BIOS boot mode will be supported by the system. Please make sure you use the device with compatibility support for legacy boot. The options are Disabled and Enabled.
Restore Factory Keys (Available when "Secure Boot Mode" is set to Custom)
Select Yes to restore manufacturer default keys used to ensure system security. The options are Yes and No.
Reset To Setup Mode (Available when "Secure Boot Mode" is set to Custom)
This feature resets the system to the Setup Mode.
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Enter Audit Mode (Available when "Secure Boot Mode" is set to Custom)
Select Ok to enter the Audit Mode workflow. It will result in erasing of Platform Key (PK) variables and reset system to the Setup/Audit Mode.
Enter Deployed Mode / Exit Deployed Mode (Available when "Secure Boot Mode" is set to Custom)
Select Ok to reset system to the User Mode or to the Deployed Mode.
Key Management (Available when "Secure Boot Mode" is set to Custom)
The following information is displayed.
· Vendor Keys
Provision Factory Defaults Select Enabled to install provision factory default settings after a platform reset while the system is in the Setup Mode. The options are Disabled and Enabled.
Restore Factory Keys (Available when any secure keys have been installed) Select Yes to restore manufacturer default keys to ensure system security. The options are Yes and No. Selecting Yes will reset system to the Deployed mode.
Reset To Setup Mode (Available when any secure keys have been installed) This feature resets the system to the Setup Mode. The options are Yes and No.
Export Secure Boot Variables (Available when any secure keys have been installed) This feature exports the NVRAM contents of secure boot variables to a storage device. The options are Yes and No.
Enroll Efi Image
This feature allows the Efi image to run in the secure boot mode, which will enroll the SHA256 Hash certificate of a PE image into the Authorized Signature Database (DB).
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Secure Boot variable / Size / Keys / Key Source
Platform Key (PK)
Use this feature to enter and configure a set of values to be used as platform firmware keys for the system. These values also indicate the sizes, keys numbers, and the sources of the authorized signatures. Select Update to update the platform key.
Key Exchange Keys (KEK)
Use this feature to enter and configure a set of values to be used as Key-Exchange-Keys for the system. These values also indicate the sizes, keys numbers, and the sources of the authorized signatures. Select Update to update your "Key Exchange Keys". Select Append to append your "Key Exchange Keys".
Authorized Signatures (db)
Use this feature to enter and configure a set of values to be used as Authorized Signatures for the system. These values also indicate the sizes, keys numbers, and the sources of the authorized signatures. Select Update to update your "Authorized Signatures". Select Append to append your "Authorized Signatures".
Forbidden Signatures (dbx)
Use this feature to enter and configure a set of values to be used as Forbidden Signatures for the system. These values also indicate sizes, key numbers, and key sources of the forbidden signatures. Select Update to update your "Forbidden Signatures". Select Append to append your "Forbidden Signatures".
Authorized TimeStamps (dbt)
This feature allows you to set and save the timestamps for the authorized signatures which will indicate the time when these signatures are entered into the system. These values also indicate sizes, keys, and key sources of the authorized timestamps. Select Update to update your "Authorized TimeStamps". Select Append to append your "Authorized TimeStamps".
OsRecovery Signature (dbr)
This feature allows you to set and save the authorized signatures used for OS recovery. Select Update to update your "OS Recovery Signatures". These values also indicate sizes, keys, and key sources of the OsRecovery signatures. Select Append to append your "OS Recovery Signatures".
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Use this feature to configure Boot settings:

Chapter 4: UEFI BIOS

Boot Mode Select Use this feature to select the type of devices from which the system will boot. The options are Legacy, UEFI, and Dual.
Note: When "Boot Mode Select" is set to Dual, all OPROM-related features will be set to Legacy.
LEGACY to EFI Support Select Enabled to boot EFI OS support after Legacy boot order has failed. The options are Disabled and Enabled.
FIXED BOOT Option Priorities This feature prioritizes the order of a bootable device from which the system will boot. Press <Enter> on each item sequentially to select devices. When "Boot Mode Select" is set to Dual, the following features will be displayed for configuration:
· Boot Option #1 ~ Boot Option #17
When "Boot Mode Select" is set to Legacy, the following features will be displayed for configuration:
· Boot Option #1 ~ Boot Option #8
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When "Boot Mode Select" is set to UEFI, the following features will be displayed for configuration:
· Boot Option #1 ~ Boot Option #9 Add New Boot Option (Available when any storage device is detected by the BIOS)
This feature allows you to add a new boot option to the boot priority features for system boot. Add boot option This feature allows you to specify the name for the new boot option. Path for boot option Use this feature to enter the path for the new boot option in the format fsx:\path\filename.efi. Boot option File Path This feature allows you to specify the file path for the new boot option. Create After the name and the file path for the boot option are set, press <Enter> to create the new boot option in the boot priority list.
Delete Boot Option
This feature allows you to select a boot device to delete from the boot priority list. Delete Boot Option This feature allows you to remove an EFI boot option from the boot priority list.
UEFI NETWORK Drive BBS Priorities
This feature allows you to set the system boot order of detected devices.
UEFI Application Boot Priorities
This feature allows you to set the system boot order of detected devices.
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4.8 Save & Exit
Select Save & Exit from the BIOS Setup screen to configure the settings below.
Save Options Discard Changes and Exit Use this feature to exit from the BIOS Setup utility without making any permanent changes to the system configuration and reboot the computer. Save Changes and Reset When you have completed the system configuration changes, use this feature to exit the BIOS Setup utility and reboot the computer for the new system configuration parameters to become effective. Save Changes When you have completed the system configuration changes, use this feature to save all changes you've made. This will not reset (reboot) the system. Discard Changes Select this feature and press <Enter> to discard all the changes you've made and return to the BIOS Setup utility.
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Default Options Restore Optimized Defaults Select this feature and press <Enter> to load manufacturer optimized default settings which are intended for maximum system performance but not for maximum stability.
Note: Please reboot the system for the changes to take effect to ensure that your system has the optimized default settings. Save as User Defaults Select this feature and press <Enter> to save all changes on the default values specified to the BIOS Setup utility for future use. Restore User Defaults Select this feature and press <Enter> to retrieve user-defined default settings that have been saved previously. Boot Override This feature allows you to override the Boot priorities sequence in the Boot menu, and immediately boot the system with a device specified instead of the one specified in the boot list. This is a one-time override.
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Appendix A: BIOS Codes
Appendix A BIOS POST Codes
A.1 BIOS POST Codes
The AMI BIOS supplies additional checkpoint codes, which are documented online at https:// www.supermicro.com/support/manuals/ ("AMI BIOS POST Codes User's Guide"). When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, a diagnostic card can be attached to the computer to read I/O port 0080h (Supermicro P/N AOM-SPI80-V). For information on AMI updates, please refer to https://www.ami.com/products/.
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Appendix B Software
After the hardware has been installed, you can install the Operating System (OS), configure RAID settings, and install the drivers.
B.1 Microsoft Windows OS Installation
If you will be using RAID, you must configure RAID settings before installing the Windows OS and the RAID driver. Refer to the RAID Configuration User Guides posted on our website at www.supermicro.com/support/manuals.
Installing the OS
1. Create a method to access the Microsoft Windows installation ISO file. That can be a USB flash or media drive.
2. Retrieve the proper RST/RSTe driver. Go to the Supermicro web page for your motherboard and click on "Download the Latest Drivers and Utilities", select the proper driver, and copy it to a USB flash drive.
3. Boot from a bootable device with Windows OS installation. You can see a bootable device list by pressing F11 during the system startup.
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Appendix B: Software 4. During Windows Setup, continue to the dialog where you select the drives on which to
install Windows. If the disk you want to use is not listed, click on "Load driver" link at the bottom left corner.
To load the driver, browse the USB flash drive for the proper driver files.
· For RAID, choose the SATA/sSATA RAID driver indicated then choose the storage drive
on which you want to install it.
· For non-RAID, choose the SATA/sSATA AHCI driver indicated then choose the storage
drive on which you want to install it. 5. Once all devices are specified, continue with the installation. 6. After the Windows OS installation has completed, the system will automatically reboot
multiple times.
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B.2 Driver Installation
The Supermicro website contains drivers and utilities for your system is at https://www. supermicro.com/wdl/driver. Some of these must be installed, such as the chipset driver. After accessing the website, go into the CDR_Images (in the parent directory of the above link) and locate the ISO file for your motherboard. Download this file to a USB flash or media drive. (You may also use a utility to extract the ISO file if preferred.) Another option is to go to the Supermicro website at https://www.supermicro.com/products/. Find the product page for your motherboard and download the latest drivers and utilities. Insert the flash drive or disk and the screenshot shown below should appear.
Note: Click the icons showing a hand writing on paper to view the readme files for each item. Click the computer icons to the right of these items to install each item (from top to the bottom) one at a time. After installing each item, you must re-boot the system before moving on to the next item on the list. The bottom icon with a CD on it allows you to view the entire contents.
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Appendix B: Software
B.3 SuperDoctor® 5
The Supermicro SuperDoctor 5 is a program that functions in a command-line or web-based interface for Windows and Linux operating systems. The program monitors such system health information as CPU temperature, system voltages, system power consumption, fan speed, and provides alerts via email or Simple Network Management Protocol (SNMP). SuperDoctor 5 comes in local and remote management versions and can be used with Nagios to maximize your system monitoring needs. With SuperDoctor 5 Management Server (SSM Server), you can remotely control power on/off and reset chassis intrusion for multiple systems with SuperDoctor 5 or BMC. SuperDoctor 5 Management Server monitors HTTP and SMTP services to optimize the efficiency of your operation.
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B.4 BMC
This motherboard supports the Baseboard Management Controller (BMC). BMC is used to provide remote access, monitoring and management. There are several BIOS settings that are related to BMC. For general documentation and information on BMC, please visit our website at: https://www.supermicro.com/products/nfo/BMC.cfm.
B.5 Logging into the BMC (Baseboard Management Controller)
Supermicro ships standard products with a unique password for the BMC ADMIN user. This password can be found on a label on the motherboard. When logging in to the BMC for the first time, please use the unique password provided by Supermicro to log in. You can change the unique password to a user name and password of your choice for subsequent logins. For more information regarding BMC passwords, please visit our website at https://www. supermicro.com/bmcpassword.
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Appendix C: Standardized Warning Statements
Appendix C
Standardized Warning Statements
The following statements are industry standard warnings, provided to warn the user of situations where a potential bodily injury may occur. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components. Read this section in its entirety before installing or configuring components. These warnings may also be found on our website at https://www.supermicro.com/about/ policies/safety_information.cfm.
Battery Handling
Warning! There is the danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the manufacturer's instructions
          Warnung Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp. Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.
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Attention Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées conformément aux instructions du fabricant. ¡Advertencia! Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Reemplazar la batería exclusivamente con el mismo tipo o el equivalente recomendado por el fabricante. Desechar las baterías gastadas según las instrucciones del fabricante.
!   .         
.       .       
             
                  
!       .          .       .
Waarschuwing Er is ontploffingsgevaar indien de batterij verkeerd vervangen wordt. Vervang de batterij slechts met hetzelfde of een equivalent type die door de fabrikant aanbevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften afgevoerd te worden.
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Appendix C: Standardized Warning Statements
Product Disposal
Warning! Ultimate disposal of this product should be handled according to all national laws and regulations.
      Warnung Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes erfolgen. ¡Advertencia! Al deshacerse por completo de este producto debe seguir todas las leyes y reglamentos nacionales. Attention La mise au rebut ou le recyclage de ce produit sont généralement soumis à des lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de l'organisme compétent.
  !
.          
             
!           .
Waarschuwing De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming met alle nationale wetten en reglementen.
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References

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