Renesas R-Car V3U: 64-BIT SoC Family

Introduction

The R-Car V3U SoC is the latest member of Renesas' Autonomy Platform. It delivers highly flexible DNN (Deep Neural Processing) and AI machine learning functions. Its flexible architecture can handle any state-of-the-art neural networks, providing up to 60 TOPS with low power consumption. The SoC integrates multiple sophisticated safety mechanisms that provide high coverage, achieving ASIL D metrics. The R-Car V3U comes with an open and integrated development environment that enables fast time-to-market for computer vision and deep learning-based solutions.

Target Applications

• Automated Driving L3 & above
• Parking & Surround View
• NCAP 2025 5 stars
• Passenger cars
• Commercial and off-road vehicles
• Industrial application (survey camera, ...)

Key Features

• 8 Arm® Cortex®-A76, configurable in LockStep
• Dual Cortex-R52 LockStep cores to run AUTOSAR.
• CNN IP delivering 60 TOPS
• Multi-Threading Computer Vision Engine
• Hardware accelerator: optical flow, object detection, ...
• Dual DSP for Radar, TFT
• Integrated ISP
• Automotive interfaces: Ethernet AVB, CAN FD and FlexRay
• Multiple PCIe 4th generation
• ASIL D Process and metrics
• Low Power
• Secure Crypto engine

Block Diagram

The R-Car V3U features a comprehensive block diagram designed for automotive applications. It includes:

• Application CPU: Two clusters of 2x ARM Cortex-A76 cores each, configured in LockStep, connected via a cache-coherent interconnect (CCI-500).
• GPU: GE7800.
• Image Pipeline: Equipped with 4x MIPI-CS12 inputs, 4x ISP (Image Signal Processor), 4x IMR-RS external, 2x IMR standard, and 2x Display Units.
• Memory Interface: Supports 128-bit LPDDR4x-4266.
• Video Codec: Includes H.264 encoder and H.264 Codec.
• Real-time CPU: Two ARM Cortex-R52 cores, configured in LockStep, for real-time tasks.
• Computer Vision & Deep Learning Accelerators: A suite of specialized hardware including Lockstep DMA (2x iDMA 2vc), DSP (2x DSP), 2x STV, 4x IMP cores, 4x ACF, 2x DOF, 8x CVe 32-thread cores, a CNN IP delivering 60 TOPS (INT8), and IMPC 2MB.
• System Components: Features Security Control (ICU-MX), SYSRAM (1MB), Power Domain Control, RT-SRAM (2MB), Thermal Sensor, and JTAG Debug (Coresight).
• Connectivity: Offers extensive interfaces including 4x PCIe Rev4.0 (2 lanes), IPC (320Mbps), 2x QSPI (1x Hyperflash), 1x eMMC, FlexRay (2 channels), AURORA (PCIe), Ethernet (6x Gigabit AVB), CAN2.0B/CAN-FD (8x), UART (4x), SPI (6x), and I2C (7x).
• Functional Safety: Targets ASIL D metrics.
• Package: FCBGA 1992 pins, 40x40mm, 0.8mm pitch.

Benefits

• R-Car V3U is tailored for the Automated Driving use case, balancing innovation and automotive constraint.
• CNN IP delivering 60 TOPS, capable of handling any state-of-the-art neural networks for automated driving.
• Low power consumption allowing air cooling systems and thus drastically BOM.
• ASIL D SoC reduces SW development effort and removes the need for an additional redundant SoC.
• Real-time ASIL D CPU core avoids the need for an external MCU to handle Realtime Task and execute AUTOSAR SW.
• Multiple PCIe enabling easy scaling of V3U and smooth increase in overall system performance.
• Integrated development environment enables fast time-to-market for computer vision and deep learning-based solutions.

Falcon Development Board

The Falcon Development Board provides a platform for evaluating the R-Car V3U SoC. Key features include:

• NOR flash memory
• SDRAM: four LPDDR4X devices for DBSC4
• Display interface: mini display & GMSL output connector
• Video input interfaces: x3 GMSL input connectors
• Storage interface: eMMC memory for MMC
• Network interfaces:
  • PCIe (4 lanes)
  • Gigabit Ethernet (GbE)
  • Six Ethernet AVB ports (MATEnet) for EtherAVB0 to EtherAVB5
  • Two FlexRay connectors for FlexRay_A and FlexRay B
• Peripheral interfaces: debug serial connector
• Debugger interfaces: 20-pins JTAG connector
• Power supply: two 12.0-V DC inputs
• Package includes CD with user's manual, schematic and boot SW.

SW Development Environment

Renesas offers an integrated development environment (IDE) for the R-Car family, including specific plug-ins for ADAS. The e2 studio environment allows users to edit, build, debug, and profile R-Car applications on target hardware and simulators. It provides seamless debugging of ARM and hardware accelerator cores, with profiler integration leveraging built-in trace capabilities for detailed analysis of application processor, IMP-subsystem, and IP activities.

HW Ordering Reference