IEC60601-1-8 Compliant MCU Based Medical Alarm Reference Design With Supercapacitor Backup

Design Guide: TIDA-010264

Description

This reference design is an IEC60601-1-8 compliant medical alarm system utilizing the MSPM0G1507 or MSPM0G3507 microcontroller (MCU) to offer primary alarm, backup alarm, and visual alarm functionality. The MCU reads audio from internal or external flash and outputs the digital-to-analog converter (DAC) waveform to the audio amplifier. During system power loss, the backup piezo buzzer and MCU with integrated real time clock (RTC) remain powered from a supercapacitor.

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Features

Applications

System Overview

System Description

Medical alarm systems are a required subsystem for most medical devices, especially those used in an intensive care unit (ICU). For patient safety, these medical devices must comply with the requirements established by the International Electrotechnical Commission (IEC). The IEC60601-1-8 standard details the necessary alarm-related elements for these systems including a primary alarm, a redundantly powered backup alarm, and a visual alarm indicator. This design provides an IEC60601-1-8 medical alarm utilizing the MSPM0G1507 microcontroller (MCU) to offer primary alarm, backup alarm, and visual alarm functionality. Figure 2-1 depicts the design block diagram.

Block Diagram

The system block diagram illustrates the integration of key components. A microphone feeds into an MCU (MSPM0G150x) which processes audio signals for primary alarm output via an audio amplifier (TPA6211A1) connected to a speaker. Visual alarm functionality is provided by LEDs. A backup alarm system, featuring a piezo buzzer, is powered by a supercapacitor. This supercapacitor is managed and charged by a bidirectional buck/boost converter (TPS61094). The MCU also interfaces with external flash memory for audio storage. The backup alarm is triggered by various inputs, including a watchdog timer (TPL5010) and logic gates, and can be overridden by the MCU. The diagram shows connections for external flash, microphone, primary alarm output (speaker), visual alarm LEDs, backup alarm (piezo buzzer), supercapacitor, and power inputs.

Design Considerations

Primary Alarm Circuit - Current Sensing

The primary alarm circuit uses the TPA6211A1 class AB audio amplifier. Low-side current sensing is implemented using a 20-mΩ shunt resistance (R20). This resistance is voltage-amplified by the MSPM0 MCU's internal op-amp with a gain of 32, and then digitized by a 12-bit ADC. This measurement helps detect speaker connection and monitor current. During testing with a 4-Ω speaker and 3.3-V input, a maximum current of approximately 0.6 A was measured in a high-alarm state. The following equations define the relationship between shunt resistance, current, and ADC steps:

Vshunt = Rshunt × Ishunt

VADC = 32 × (Rshunt × Ishunt)

With Rshunt = 20 mΩ and I_shunt_max = 0.6 A, the maximum VADC is 0.384 V.

Max # ADC Steps = (VADC max / VREF) × 4095

With VREF = 3.3 V, the maximum ADC steps are 496.

Microphone Circuit - Coincidence Detection

An optional microphone circuit is included for environmental feedback, such as ambient noise or acoustic feedback from the primary alarm. This circuit connects to the MSPM0's op-amp for signal conditioning.

Backup Alarm Circuit

The backup alarm circuit triggers the backup alarm if primary power is lost or if the MCU initiates the alarm. An external watchdog timer (TPL5010) resets the MCU if the system becomes unresponsive. The backup alarm can be disabled by the MCU via a secondary alarm override signal, allowing the MCU full control for specific durations (e.g., 3 minutes).

Supercapacitor Charging Circuit

This circuit manages supercapacitor charging and provides backup power. The TPS61094 is used as a bidirectional buck/boost converter. It charges the supercapacitor and provides regulated output voltage from the supercapacitor when primary power is lost. The charging voltage (VCHG) is set to 2.7 V, and charging current (ICHG) to 250 mA. A minimum voltage of 0.7 V is required for supercapacitor operation.

Equation 2 shows usable energy storage for supercapacitors rated below 5 V:

EJoules = ½ × C × V² - ½ × C × (0.7V)² {Supercapacitor VCHG < 5 V}

Simplified: EJoules = ½ × C × V² - 0.245 × C {Supercapacitor VCHG < 5 V}

For a 2.7 V, 5 F supercapacitor, this design offers 17 joules of energy storage. Equation 3 shows usable energy storage for supercapacitors rated 5 V or greater:

EJoules = ½ × C × (5V)² – 0.245 × C {Supercapacitor VCHG ≥ 5 V}

Simplified: EJoules = 12.255 × C {Supercapacitor VCHG ≥ 5 V}

Operation Modes

Table 2-1. Operation Modes
MODES EN MODE BYPASS BOOST BUCK FUNCTION
Forced bypass 0 0 ✔️ Turn on bypass MOSFET, turn off boost or buck, VOUT = VIN
True shutdown 0 1 Bypass disconnect, turn off boost or buck, VOUT = 0 V
Forced buck 1 0 ✔️ ✔️ Buck enabled, turn on bypass MOSFET, VOUT = VIN while charging the supercapacitor or backup battery
Auto buck or boost 1 1 ✔️ ✔️ Buck enable, when VIN > target VOUT +100 mV and VOUT > target VOUT, supercapacitor is charged by buck
Auto buck or boost 1 1 ✔️ ✔️ Boost and bypass enabled; when VOUT + 100 mV > VIN > target VOUT and VOUT = target VOUT, VOUT is from both VIN through bypass and supercap by boost.
Auto buck or boost 1 1 ✔️ Boost enable; when VIN < target VOUT, VOUT is powered from supercapacitor by boost.

Software Flow Chart

The software flow chart outlines the device's operation. It begins with device initialization, followed by declaration of audio data and alarm timings. The system then configures the DAC, volume, and alarm state. An interrupt service routine (ISR) for the DAC is triggered by a timer interrupt. The system enters a selected alarm state playback loop, outputting DAC values. The process repeats until the pulse playback is complete, after which a delay occurs between alarm pulses. The loop continues until the alarm is no longer active.

Highlighted Products

MSPM0G150x

The MSPM0G150x is a highly-integrated, ultra-low-power 32-bit MCU based on the Arm Cortex-M0+ core, operating up to 80-MHz. It offers high-performance analog peripherals, extended temperature range (-40°C to 125°C), and supports supply voltages from 1.62 V to 3.6 V. Key features include up to 128KB flash memory with ECC, 32KB SRAM, a memory protection unit, DMA, math accelerator, multiple ADCs, DACs, comparators, op-amps, timers, watchdog timers, and communication interfaces (UART, I2C, SPI). The MSPM0 family provides a holistic ultra-low-power system architecture.

TPS61094

The TPS61094 is a 60-nA IQ boost converter with supercapacitor management, suitable for smart meter and supercapacitor backup power applications. It supports a wide input voltage range and output voltage up to 5.5 V. It operates in buck mode for supercapacitor charging and boost mode to regulate output voltage from the supercapacitor when primary power fails. It features low quiescent current (60-nA in boost mode) and supports true shutdown and forced bypass modes.

TPA6211A1

The TPA6211A1 is a 3.1-W mono fully-differential amplifier designed to drive a speaker with at least 3-Ω impedance. It operates from 2.5 V to 5.5 V and draws only 4 mA of quiescent supply current. It is available in space-saving packages and offers features like high supply voltage rejection, improved RF immunity, and fast startup with minimal pop, making it suitable for various portable applications.

Hardware, Software, Testing Requirements, and Test Results

Hardware Requirements

Table 3-1. Equipment Used for Testing
EQUIPMENT RATING DESCRIPTION
DC Power Supply 3.3 V, 1 A Device input power
Speaker 4 Ω Primary Alarm Sound Output
SPI Flash Programmer - For programming custom audio to SPI flash
MSPM0 Programmer - Any MSPM0 LaunchPad™ or XDS110 debug programmer

Software Requirements

Programming MSPM0 MCU

To program the MCU, connect the MSPM0 programmer's GND, NRST, SWDIO, and SWCLK pins to the J3 connector. Connect an external 3.3-V DC power supply to the VIN and GND connections on the alarm board. Program the MCU using the Code Composer Studio™ integrated development environment (IDE) on a host computer.

Programming External SPI Flash

An SPI flash programmer is required to write audio to the external flash. Connect the programmer to the J2 connector. Ensure the SPI programmer operates at 3.3 V before flashing the audio.

Test Setup

Table 3-2. TIDA-010264 Board Connections for Testing
CONNECTOR DESCRIPTION
VIN, GND Connected to DC power supply, 3.3 V
SPK+, SPK- Connected to 4-Ω speaker
SPI Flash Programmer Connected to J2
MSPM0 Programmer Connected to J3

Test Results

Primary Alarm Waveforms

Figure 3-1 shows the measured waveform at the output of the MSPM0 12-bit DAC during a high-alarm state, illustrating pulsed audio output. Figure 3-2 displays the corresponding speaker output waveform, representing the amplified alarm sound.

Custom Audio Waveform

Figure 3-3 presents an example custom audio waveform measured from the speaker terminals.

Primary Alarm Harmonic Testing

Figure 3-4 shows the harmonic content of the high alarm state. The IEC60601-1-8 requirements mandate that at least four harmonics must be within +/- 15 dB of the fundamental frequency's amplitude. This test confirmed that eight harmonics fall within this required range for the high alarm state.

Coincidence Detection

Figure 3-5 shows the high-alarm state current-sense waveform, indicating current consumption through the speaker. A significant reduction in current suggests a speaker fault (e.g., disconnection). Figure 3-6 displays the analog signal output from the microphones during a high alarm state, capturing both the alarm sound and ambient noise levels, which can be used for volume adjustment.

Backup Power Transition

Figure 3-7 illustrates the transition from external 3.3-V power to the 3-V supercapacitor backup source, showing the voltage change and switchover. Figure 3-8 depicts the reverse transition, from the supercapacitor backup mode back to the external 3.3-V power source.

Alarm Sound Levels and Backup Alarm Runtime

Table 3-3. Primary and Backup Alarm Sound Levels
ALARM TYPE SOUND LEVEL (dBA AT 1 m) RUNTIME
Primary 73.3 Continuous (line power)
Backup (0-Ω series resistance) 68.8 2 minutes 50 seconds from 2.7-V, 5F supercapacitor
Backup (43-Ω series resistance) 66.3 3 minutes 52 seconds from 2.7-V, 5F supercapacitor

Design and Documentation Support

Design Files

Schematics and Bill of Materials (BOM) can be downloaded from the design files at TIDA-010264.

Tools and Software

Tools

Code Composer Studio™: An integrated development environment (IDE) for TI microcontrollers and processors, offering tools for developing and debugging embedded applications. Available for Windows, Linux, and macOS, and also in the cloud via the TI Developer Zone.

Software

TIDA-010264-MSPM0G150x-FW: Downloadable firmware for the onboard MSPM0G150x, enabling an IEC60601-1-8 compliant medical alarm design with standard and custom audio playback.

Documentation Support

Additional documentation includes:

Support Resources

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Trademarks

TI E2E™, PowerPAD™, LaunchPad™, Code Composer Studio™, E2E™ are trademarks of Texas Instruments. Arm® and Cortex® are registered trademarks of Arm Limited, Inc. Microsoft® and Windows® are registered trademarks of Microsoft Corporation. Linux® is a registered trademark of Linus Torvalds. macOS® is a registered trademark of Apple Inc. All other trademarks are the property of their respective owners.

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