Microchip ICP1044

Product Overview

Microchip's ICP1044 is a 3-stage MMIC power amplifier in bare die form, fabricated in GaN on SiC technology. The ICP1044 operates from 7.9-11GHz with 44dBm output power, 38% typical PAE (Power Added Efficiency), and 34dB small signal gain. It is well-suited for commercial and defense applications.

Key Features

• Frequency Range: 7.9-11GHz
• Pout: 44dBm Pulsed (100μs, 10% duty cycle)
• PAE: 38%
• Small Signal Gain: 34dB
• Bias: VD=28V, IDQ=220mA
• Technology: GaN on SiC
• Lead-free and RoHS compliant
• Pulsed or CW operation
• Dimensions: 3.56mm x 1.81mm
• Integrated Power Detector

Functional Block Diagram

The functional block diagram illustrates a three-stage amplifier. It shows an RF input (RF IN) and an RF output (RF OUT). Each stage has gate voltage (VG) and drain voltage (VD) inputs, indicating bias and power supply connections.

Applications

• Commercial Radar
• Satellite Communications
• Aerospace & Defence

Electrical Specifications

⁽¹⁾ Test Conditions unless otherwise stated: VD=28V, IDQ=220mA, TA=25°C, Pulsed 10% (100us/1ms)

Absolute Maximum Ratings

Note: Exceeding any one or combination of these limits may cause permanent damage to this device. Microchip Technology Inc. does not recommend sustained operation near these survivability limits.

Small Signal Performance (Typical Data)

Test conditions: VD=24V and 28V, IDQ=220mA.

• Figure 1-1. S21: A graph showing S21 (Gain) in dB versus Frequency in GHz. Two curves are plotted, one for Vdq=28V and another for Vdq=24V, illustrating gain performance across the frequency range.
• Figure 1-2. S11: A graph showing S11 (Input Return Loss) in dB versus Frequency in GHz. Two curves are plotted, one for Vdq=28V and another for Vdq=24V, indicating input reflection characteristics.
• Figure 1-3. S22: A graph showing S22 (Output Return Loss) in dB versus Frequency in GHz. Two curves are plotted, one for Vdq=28V and another for Vdq=24V, indicating output reflection characteristics.

Large Signal Performance (Typical Pulsed Power Data, VD=28V, IDQ=220mA, Pulsed 10% (100μs/1ms))

• Figure 1-4. Pout vs. Pin: Output Power (dBm) versus Input Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-5. Gain vs. Pout: Gain (dB) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-6. PAE vs. Pout: Power Added Efficiency (%) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-7. Id vs. Pout: Drain Current (mA) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-8. Pout vs. Freq: Output Power (dBm) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.
• Figure 1-9. PAE vs. Freq: Power Added Efficiency (%) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.

Large Signal Performance (Typical Pulsed Power Data, VD=28V, IDQ=220mA, Pulsed 20% (100μs/500μς))

• Figure 1-10. Pout vs. Pin: Output Power (dBm) versus Input Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-11. Gain vs. Pout: Gain (dB) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-12. PAE vs. Pout: Power Added Efficiency (%) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-13. Id vs. Pout: Drain Current (mA) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-14. Pout vs. Freq: Output Power (dBm) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.
• Figure 1-15. PAE vs. Freq: Power Added Efficiency (%) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.

Large Signal Performance (Typical CW Power Data, VD=28V, IDQ=220mA, CW)

• Figure 1-16. Pout vs. Pin: Output Power (dBm) versus Input Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-17. Gain vs. Pout: Gain (dB) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-18. PAE vs. Pout: Power Added Efficiency (%) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-19. Id vs. Pout: Drain Current (mA) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-20. Pout vs. Freq: Output Power (dBm) versus Frequency (GHz) for input power levels of 14, 16, 18, and 20 dBm.
• Figure 1-21. PAE vs. Freq: Power Added Efficiency (%) versus Frequency (GHz) for input power levels of 14, 16, 18, and 20 dBm.

Large Signal Performance (Typical Pulsed Power Data, VD=24V, IDQ=220mA, Pulsed 10% (100μs/1ms))

• Figure 1-22. Pout vs. Pin: Output Power (dBm) versus Input Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-23. Gain vs. Pout: Gain (dB) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-24. PAE vs. Pout: Power Added Efficiency (%) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-25. Id vs. Pout: Drain Current (mA) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-26. Pout vs. Freq: Output Power (dBm) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.
• Figure 1-27. PAE vs. Freq: Power Added Efficiency (%) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.

Large Signal Performance (Typical Pulsed Power Data, VD=24V, IDQ=220mA, Pulsed 20% (100μs/500μς))

• Figure 1-28. Pout vs. Pin: Output Power (dBm) versus Input Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-29. Gain vs. Pout: Gain (dB) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-30. PAE vs. Pout: Power Added Efficiency (%) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-31. Id vs. Pout: Drain Current (mA) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-32. Pout vs. Freq: Output Power (dBm) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.
• Figure 1-33. PAE vs. Freq: Power Added Efficiency (%) versus Frequency (GHz) for input power levels of 10, 12, 14, and 16 dBm.

Large Signal Performance (Typical CW Power Data, VD=24V, IDQ=220mA, CW)

• Figure 1-34. Pout vs. Pin: Output Power (dBm) versus Input Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-35. Gain vs. Pout: Gain (dB) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-36. PAE vs. Pout: Power Added Efficiency (%) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-37. Id vs. Pout: Drain Current (mA) versus Output Power (dBm) for frequencies from 8 to 10.5 GHz.
• Figure 1-38. Pout vs. Freq: Output Power (dBm) versus Frequency (GHz) for input power levels of 14, 16, 18, and 20 dBm.
• Figure 1-39. PAE vs. Freq: Power Added Efficiency (%) versus Frequency (GHz) for input power levels of 14, 16, 18, and 20 dBm.

Mechanical Drawing

The mechanical drawing shows the physical layout of the bare die. It includes pad numbers, their functions (e.g., VG1, VD2, RF IN, RF OUT, GND), and dimensions in millimeters. The backside of the die is noted as RF and DC ground. A table details each pad number, its function, and a description of its use, including notes that VG1, VG2, VG3 can be connected together, and VD1, VD2, VD3 can be connected together.

Application Circuit

The application circuit diagram shows a typical implementation of the ICP1044. It includes various passive components (capacitors C1-C17, resistors R3-R4) and active components (U1-U16) connected to the ICP1044 device. The diagram illustrates bias voltages (VD1, VD2, VD3, VG1, VG2, VG3), RF input (RFIN), and RF output (RFOUT).

Bill of Materials

Evaluation Board

The evaluation board section describes the PCB construction and materials. The top and bottom layers (METAL_1_TOP, METAL2_BOTTOM) are constructed with Cu + ENIG, featuring 1oz copper plating, electroless nickel, and immersion gold. The dielectric layer is RO4003C with a thickness of 8 mils (203µm). Key features include VIA drill size (0.3mm), VIA plating thickness (50-70µm), and a 50 Ohm line width of 420µm. A diagram shows the PCB layout with component placement and connector locations (CONN1, CONN2).

Other Considerations

Bias-up Procedure

1. Set VG to -5V
2. Set VD to 28V
3. Adjust VG positive until ID quiescent is 220mA
4. Limit ID to 4A
5. Apply RF signal

Bias-down Procedure

1. Turn off RF
2. Turn off VD, allow drain capacitors to discharge
3. Turn off VG

Ordering, Shipping, and Handling

Handling Recommendations

Integrated circuits are sensitive to electrostatic discharge (ESD) and can be damaged by static electricity. It is recommended to follow all procedures and guidelines outlined in the Microsemi application note AN01: GaAs MMIC Handling and Die Attach Recommendations.

Ordering Information

For additional ordering information, contact your Microchip sales representative.

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