ANALOG DEVICES ADIN6310 Hardware and TSN Switch Evaluation User Guide

The EVAL-ADIN6310EBZ operates from a single, external, 5 V to 17 V supply rail. Connect the provided 9 V or 12 V wall adapter to the P2 connector or apply 5 V to 17 V to the P1 plug. Switch BRD_ON_OFF to the ON position. The LED DS4 will light up to indicate successful power up of the main power rails.

Hardware Strapping:

The host interface hardware strapping can be configured using jumpers for choice of S/D/Q SPI interface. Additionally, PHY strapping can be set through surface-mount configuration resistors.

Switch Configuration:

The switch firmware manages PHY operation over MDIO. Default state is software power down from Port 1 to Port 5. The switch supports IEEE standards for time synchronization, scheduled traffic, frame preemption, frame replication and elimination, stream filtering and policing, VLAN table control, and IGMP snooping.

Evaluation Board Contents:

The EVAL-ADIN6310EBZ evaluation board includes the hardware components necessary for evaluating the TSN switch functionalities.

It comes with a wall adapter, an Ethernet cable, and access to the necessary software tools.

FAQ

How do I power up the EVAL-ADIN6310EBZ?
- To power up the board, connect the provided wall adapter to the appropriate connector (P2) or apply a suitable voltage range to another plug (P1). Ensure that the BRD_ON_OFF switch is in the ON position. The LED DS4 will indicate successful power up.
What standards does the switch support?
- The switch supports IEEE standards including IEEE 802.1AS Time Synchronization, IEEE 802.1Qbv for scheduled traffic, IEEE 802.1Qbu for frame preemption, IEEE 802.1CB for frame replication and elimination, IEEE 802.1Qci for per stream filtering and policing, VLAN table control, and IGMP snooping.

“`

View Fullscreen

User Guide | EVAL-ADIN6310
UG-2280
ADIN6310 Hardware and TSN Switch Evaluation User Guide

FEATURES
6 port TSN switch with RGMII or SGMII interface 6 RGMII ports to 10 Mbps/100 Mbps/1000 Mbps ADIN1300 PHYs RJ45 with integrated magnetics 4 SGMII ports connected to on board SFP cages
Host interface hardware strapping with jumpers, choice of S/D/Q SPI interface Ethernet port through RJ45 (Port 0)
FMC (LPC) connector Host port access through S/D/Q SPI interface or Port 0
PHY Strapping through surface-mount configuration resistors Default state is software power down from Port 1 to Port 5 Switch firmware manages PHY operation over MDIO
Operates from a single, external 9 V to 17 V supply LED indicators on GPIO pins IEEE 802.1AS Time Synchronization Scheduled traffic (IEEE 802.1Qbv) Frame preemption (IEEE 802.1Qbu) Frame replication and elimination for reliability (IEEE 802.1CB) Per stream filtering and policing (IEEE 802.1Qci) VLAN table control (remapping, reprioritization) IGMP snooping GPIO/Timer control
EVALUATION KIT CONTENTS
EVAL-ADIN6310EBZ evaluation board 9 V or 12 V, 18 W wall adapter with international adapters 1 Ethernet cable
EQUIPMENT NEEDED
EVAL-ADIN6310EBZ evaluation kit Ethernet cables PC running Windows® 10
DOCUMENTS NEEDED
ADIN6310 data sheet
SOFTWARE NEEDED
TSN application suite (switch configuration GUI and web server) Npcap packet capture

GENERAL DESCRIPTION

The EVAL-ADIN6310EBZ is a flexible platform, which enables an efficient evaluation of the ADIN6310 industrial Ethernet Switch with time sensitive networking (TSN) capability. This user guide describes the hardware kit and software evaluation package (TSN Switch Evaluation application). It discusses how to use the kit to interface to one or more Switches to configure the Switch, TSN, or redundancy features to meet the requirements of an industrial network. The TSN Switch Evaluation application enables the initial evaluation of the Switch and its functionality, which further enables the users to familiarize themselves with the Switch capability in advance of migrating to the driver library. Simply connect a PC through Ethernet port to Port 0 on the evaluation board and run the application. The TSN Switch Evaluation application can identify and allow configuration of a chain of up to 10 ADIN6310 devices. The application launches a PC-based web server and NETCONF server for each Switch device it finds. A user can interact with the web server to configure the Switch functionality or load YANG configurations from a NETCONF client. Once configuration completes, the user applications can communicate with other devices over the TSN network. Figure 1 shows an overview of the evaluation board. Full specifications on the ADIN6310 are available in the ADIN6310 data sheet available from Analog Devices, Inc., and must be consulted with this user guide and hardware reference manual when using the EVAL-ADIN6310EBZ evaluation board.

Figure 1. Hardware Overview

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS.

EVALUATION BOARD HARDWARE

POWER SUPPLIES

The EVAL-ADIN6310EBZ operates from a single, external, 5 V to 17 V supply rail. A 9 V or 12 V wall adapter is supplied as part of the kit.

Apply the wall adapter to P2 connector or alternatively 5 V to 17 V to the P1 plug. Switch BRD_ON_OFF to the ON position. The LED DS4 lights up to indicate a successful power up of the main power rails.

The EVAL-ADIN6310EBZ power requirements are generated from the input power rail by an on-board LTM4668A Module regulator, which provides the four rails required for operation of the ADIN6310 Switch, the six ADIN1300 Ethernet PHYs and other support circuitry. The default nominal voltages are listed in Table 1.

By default, the VDDIO_A and VDDIO_B share the same voltage rail and default to 1.8 V with the installed components and jumper settings.

Table 1. Default Device Power Supply Configuration

LTM4668A Output

Nominal Voltage

ADIN6310 Switch

VOUT1

3.3 V

VDD3P3

VOUT2

1.8 V

VDDIO_A/B

VOUT3

1.1 V

VDDCORE

VOUT4

0.9 V

N/A1

1 N/A means not applicable.

ADIN1300 PHY
AVDD3P3 VDDIO N/A1 VDD0P9

The VDDIO_A rail provides a separate voltage domain for the Switch interface pins that can connect to a Host interface. This includes SPI interface, TIMER, GPIO, and Port 0 MAC interface pins. The motivation for partitioning the VDDIO_A/B voltage rails is to ensure flexible Host interface I/O voltage while helping to reduce overall power consumption for the Switch ports and PHY devices. For normal operation of the evaluation hardware, the default voltage rail should be sufficient. If user is connecting own Host interface over SPI or FMC connector, flexibility to change the VDDIO_A rail may be beneficial.

If a different VDDIO_A voltage is required, user can adjust by changing the placement of configuration jumpers. The VDDIO_A rail can be changed from 1.8 V default to either 2.5 V or 3.3 V. To change the VDDIO_A rail to 2.5 V, the LDO, U3 must be used. The jumpers to reconfigure this are P3, P4, P5, and P33.

For more details, see Table 2 and the evaluation board schematics.

Table 2. VDDIO_A Configuration

VDDIO_A

Jumper Setting

1.8 V

P3 (1-2), P4 (1-2), P33 (OPEN)

2.5 V

P3 (OPEN), P4 (2-3), P33 (1-2)

3.3 V

P3 (1-2), P4 (2)-P5(1), P33 (OPEN)

Table 3 shows an overview of the EVAL-ADIN6310EBZ current for various operating modes.

analog.com

EVAL-ADIN6310

Table 3. Board Quiescent Current (P2 = 9 V)

Board Status

Typical Quiescent Current

On Power-Up (S1 on)

104 mA initially

In Hardware Power-Down (RESET_N Held Low)
1000BASE-T, 2 RGMII + HOST Port

72 mA 250 mA

1000BASE-T, 5 RGMII + HOST Port 360 mA

POWER SEQUENCING

The ADIN6310 device does not have any power supply sequencing requirements, however the preferred power up sequence is to bring up VDDCORE last and removed first on power down. There are no power sequence requirements for the ADIN1300 devices. The evaluation board is configured to bring up the power rails in the following order VDD3P3 and VDD0P9 -> VDDIO_A/B -> VDDCORE.

EVALUATION BOARD USE CASES

The EVAL-ADIN6310EBZ can be used in two general modes. The default and expected use case utilize Port 0 as the Host interface port through the RJ45 connector. Port 0 is connected to a PC running the TSN evaluation software package for network configuration and control. Port 0 can still be used for data traffic, but it is not a part of the time aware network as it is connected to the PC. In this use case, the other five RGMII ports and four SGMII ports on the EVAL-ADIN6310EBZ can be used to evaluate IEEE802.3 and TSN features of the ADIN6310, establish links with other link partners and evaluate the performance of the chip.

Alternatively, the user can connect their own Host directly to the EVAL-ADIN6310EBZ. If Host interface is SPI, then option to connect directly through the SPI header or the FMC LPC connector (FPGA mezzanine card low pin count). The FMC connector can be plugged into an FPGA development board. When the Switch hardware is used with an FPGA board, the media independent interfaces (MIIs) for Port 0, SPI interface, GPIO, and TIMER signals can be connected to the FPGA. In this use case, a MAC-MAC type Host interface can be used on Port 0 or the SPI (quad, dual, or single) interface can be used for control and configuration with the FGPA as the Host processor for evaluation of the ADIN6310 in a full system. With the SPI interface as the HOST interface, the system can have six TSN capable ports.

JUMPER AND SWITCH OPTIONS

Several jumpers on the EVAL-ADIN6310EBZ must be set for the required operating setup before using the EVAL-ADIN6310EBZ for evaluation. The default settings and functions of these jumper options are described in Table 4.

Table 4. Default Jumper, Switch Options and Descriptions

Link

Position

Function

BRD_ON_OFF

OFF

Power ON/OFF Switch Reset options

Inserted

Rev. 0 | 4 of 127

User Guide

EVALUATION BOARD HARDWARE

Table 4. Default Jumper, Switch Options and Descriptions (Continued)

Link

Position

Function

1-2 Inserted VDDIO_A = VDDIO_B = 1.8 V; runs

off the Switching regulator

P33 TIMER2

Open

Enable for VDDIO_A LDO

Open

Host strapping (RGMII No Tx Rx

Delay)

SPI_SS, TIMER0, TIMER1, TIMER3

1-2 Inserted

Host strapping (RGMII No Tx Rx Delay 1000 Mbps)

P28

1-2 Inserted Power to TIMER/GPIO LEDs

P41

1-2 Inserted Connect VCCIO supply of FTDI to

VDDIO_A

P11, P13, P17, P18 P36

1-2 inserted Open

PortX link from PHY Connect power to U26

GPIO AND TIMER HEADERS

The EVAL-ADIN6310EBZ provides a header (P10) for observation of all Timer and GPIO signals. In addition to the header, there are LEDs on these pins. When using the TSN Switch Evaluation application, TIMER2 is configured for a 1 pulse per second (1PPS) signal by default and the LED connected to TIMER2 pin can be observed to blink at a 1 second rate when the board is powered and has been successfully configured using the TSN Switch Evaluation application.
If the Switch Host strapping is changed to SPI interface (default is Ethernet Host – RGMII), the TIMER0 pin functionality changes to be an Interrupt signal to the Host and TIMER0 is no longer available for timer or TSN functionality.

CLOCK OPTIONS

A crystal oscillator, Y8, is used to provide the ADIN6310 a clock signal. It is a 25 MHz crystal connected across the XTAL_I pin and XTAL_O pin of the ADIN6310 on the board. The clock for the ADIN1300 Ethernet PHYs can be provided from a buffered 25 MHz clock from the ADIN6310 or alternatively from a dedicated 25 MHz crystal local to each PHY (default). If the buffered clock option is selected, once the ADIN6310 has successfully powered up it generates a 25 MHz clock on CLK_OUT_1 pin. This clock is routed to a clock buffer chip, SI5330F-B00214-GMR (U31), which provides a buffered version of 25 MHz clock to each of the six ADIN1300 transceivers on the board.

ON-BOARD LEDS

The EVAL-ADIN6310EBZ has one LED, DS4, that lights up to indicate a successful power up of the circuit. There are eight LEDs, that are controlled by GPIO (0-3) and the Timer (0-3) signals when link P28 is inserted.
For the ports that support SGMII interface, there are LEDs (DS1, DS2, DS3, DS5) close to the SFP modules. When an SFP module is inserted and the link is up, the LOS signal from the SFP module is used to indicate optical activity/link status.

analog.com

EVAL-ADIN6310

STRAPPING AND CONFIGURATION

ADIN6310 Host Port Strapping

The ADIN6310 Switch supports stack Processor/Host control over SPI or any of the six Ethernet ports. There is no stack processor/microcontroller used on this board, instead use a Windows PC as the Host with the TSN Switch Evaluation package.

When using this hardware, the user can connect a Host in a few different ways, firstly, via Port 0 Ethernet Port, alternatively, connected to RMII/RGMII directly over the FMC connector or otherwise via SPI through the dedicated headers (P39, P40). The Host Hardware strapping jumpers must be set according to the Host interface required.

The default Host port strapping configuration for this hardware is using Ethernet interface with Port 0 as the Host interface. The Switch port is configured for RGMII with no TXC or RXC delays and port speed of 1000 Mbps. In a typical application, with an MII interface to the Host, the Switch MAC port is directly connected to the Host MAC interface without a PHY in the path. As a result, when the Switch is configured for MAC interface Host, the Switch does not expect a PHY and does not perform any PHY configurations for that port. The EVAL-ADIN6310EBZ hardware does include a PHY on Port 0 (default RGMII Host interface), but the TSN Switch Evaluation application does not configure this PHY directly. As a result, the link brought up by the PHY on the Host port must match the Switch port speed set by strapping jumpers, default 1000 Mbps. The PHY is hardware strapped to auto-negotiate all speeds, if it brings up a lower speed link, there is a link mismatch between the Switch port and the PHY, which blocks the communication between the Host and Switch.

The Host port and Host port interface selection are configured via jumpers labeled TIMER_0/_1/_2/_3 and SPI_SS.

The Timer and SPI pins have internal pull-up/-down resistors, as shown in Table 5, the strapping jumpers provide user with ability to reconfigure the strapping to select alternative Host port types. For more details on all options available, refer to the Host Strapping section in the data sheet.

Table 5. Host Port Selection Jumpers

Host Port

SPI_SS TIMER3

Internal Pull up PU

(PU)/Pull down

(PD)

SPI (Single)

OPEN OPEN

SPI (dual)
SPI (quad) (low drive strength)

OPEN INSERT INSERT OPEN

SPI (quad) (high INSERT INSERT drive strength)

TIMER2 PD
OPEN OPEN INSERT
INSERT

TIMER1 PU
OPEN OPEN OPEN
OPEN

TIMER0 PU
OPEN OPEN OPEN
OPEN

Rev. 0 | 5 of 127

User Guide

EVALUATION BOARD HARDWARE

Table 5. Host Port Selection Jumpers (Continued)

Host Port

SPI_SS TIMER3 TIMER2

RGMII 1000M (default H/W config)

INSERT INSERT OPEN

TIMER1 INSERT

TIMER0 INSERT

ADIN1300 Strapping

There are six ADIN1300 devices on this evaluation board. The PHY on Port 0 is hardware strapped for auto-negotiation for all speeds (10 Mbps/100 Mbps/1000 Mbps), which allow it to bring a link up with a remote partner without any configuration from the Switch/Host. By default, the Switch Host strapping is configured for Port 0 as Host interface, the PHY needs to be able to bring up a link to enable communication path between the Host and the Switch so the TSN Switch Evaluation package can configure the Switch.

The other five PHYs (on Port 1 to Port 5) are configured for the same speeds (10 Mbps/100 Mbps/1000 Mbps), but power up in software power down mode with the Switch bringing them out of software power down and configuring them over the MDIO interface.

The PHY strapping upon power up is shown in Table 6.

Table 6. ADIN1300 PHY Port Configuration

Function

PHY Port 0

PHY Port (1-5)

MAC Interface
MDI Mode Speed

RGMII With Tx& Rx DLL Enabled
AutoMDI, Pref MDI
10/100 HD/FD, 1000 FD Target

RGMII With Tx& Rx DLL Enabled
AutoMDI, Pref MDI
10/100 HD/FD, 1000 FD Target, SftPd

ADIN1300 Link Status Polarity
The ADIN1300 LINK_ST output pin is active high by default, whereas the P0_LINK input of the ADIN6310 is active low by default, therefore the EVAL-ADIN6310EBZ hardware includes an inverter in the path between the Port 0 PHY LINK_ST and the P0_LINK of the Switch. The other five ports do not include this inverter, instead the PHY link polarity is changed to default low during the initial configuration.
As a result of this hardware difference on the Host Port 0, when the board first powers up, prior to configuration, the right LED of Port 1 to Port 5 lights. Once the configuration has been loaded from the TSN Switch Evaluation application, the PHY link signal as seen at the LEDs matches for all ports. The RJ45 right LEDs light to indicate link up, the left LEDs are on for link up and blink for traffic activity.
ADIN1300 Link Status Voltage Domain
The ADIN1300 LINK_ST is primarily intended to drive the Switch Px_LINK input signal, therefore, resides on the VDDIO_A/B voltage domain (default voltage rail is 1.8 V). If using the LINK_ST pin to drive an LED to indicate link active, a level shifter must be used to
analog.com

EVAL-ADIN6310

provide voltage and drive capability for the LED function. The LED anode is connected to 3.3 V through a 470 resistors.

ADIN1300 PHY Addressing

The ADIN1300 PHY addresses are configured by sampling their RXD pins after power on, when they come out of reset. The ADIN6310 Switch has internal pull-up/-down resistors on its RXD pins to support assignment of unique PHY addresses to each PHY per port. As a result, external PHY address strapping resistors are not necessary, unless different PHY addressing is required. The default PHY addresses assigned to the ADIN1300 devices is shown in Table 7.

Table 7. Default PHY Addressing (set by ADIN6310)

Port Number

PHY Address

MDIO INTERFACE

The MDIO bus of the ADIN6310 connects to the MDIO bus of each of the six PHYs on the evaluation board. Configuration of the PHYs is done by the Switch firmware via this MDIO bus. The TSN Switch Evaluation application supports read and write access of the PHYs on all ports.

FMC CONNECTOR

This evaluation board is fitted with a low pin count FPGA mezzanine card (LPC FMC) connector on the back of the board. This allows it to interface directly with a compatible FPGA board. All port 0 signals, SPI, TIMER, and GPIO signals are brought directly to the connector. This allows users to directly interface with the ADIN6310 with any one of the three Host interface options SPI, RGMII, and RMII. To use the FMC connector to interface with an FPGA or a processor board, make the changes to the resistor set, as shown in Table 8.

Table 8. Resistor configuration for FMC Use

Signal

Remove

RGMIIRMII

P0_TXC

R239

P0_TXCTL

R240

P0_TXD0

R238

P0_TXD1

R237

P0_TXD2

R236

P0_TXD3

R235

P0_RXC

R242

P0_RXCTL

R241

P0_RXD0

R243

Install
R227 R228 R226 R225 R224 R217 R219 R218 R220

Rev. 0 | 6 of 127

User Guide

EVALUATION BOARD HARDWARE

Table 8. Resistor configuration for FMC Use (Continued)

Signal

Remove

RGMIIRMII

P0_RXD1

R244

P0_RXD2

R245

P0_RXD3

R246

SPI

SPI_SS

R485

SPI_SCLK

R484

SPI_SIO0

R493

SPI_SIO1

R492

SPI_SIO2

R499

SPI_SIO3

R501

TIMER0

R494

Install
R221 R222 R223
R372 R329 R358 R365 R373 R379 R378

SOFTWARE INSTALLATION

INSTALLING THE TSN SWITCH EVALUATION APPLICATION SOFTWARE
The evaluation package runs on Windows 10. To use the TSN Switch Evaluation software, first run the installer package to install the GUI and PC based web server. The installation steps are listed in the following section. The default location for the TSN Switch software install is C:AnalogADINx310EVKSW-Relx.x.x folder. When the TSN Switch Evaluation software installation is complete, install Npcap if not already present on the machine. Download from Packet capture library for windows on the Npcap website. Npcap is recommended over WinPcap.
TSN Switch Evaluation Software Installation
To install the TSN Switch Evaluation software package, do the following steps:
1. Launch the installer file to begin the TSN Switch Evaluation software installation.
2. If a window appears asking for permission to allow the program to make changes to the PC, click Yes.
3. The installation process starts, see Figure 2.

EVAL-ADIN6310
Figure 3. Welcome Message

Figure 2. Installation Begins
4. The welcome window appears (see Figure 3), with prompts that user must separately install Npcap, click Next.

5. A license agreement appears. Read the agreement and click I accept the terms in the license agreement to allow the installation to proceed, as shown in Figure 4, click Next.

Figure 4. License Agreement
6. Select the location to install the TSN Switch Evaluation software and click Next (see Figure 5).

analog.com

Rev. 0 | 8 of 127

User Guide
SOFTWARE INSTALLATION

EVAL-ADIN6310

Figure 5. Select Destination Folder
7. At the next step, click Install (see Figure 6).

Figure 7. Installation Completes
Repair/Remove Installation The installer also supports removing or repairing the installation. Launch the installer to remove or repair and do the following steps: 1. Select Repair or Remove and click Next (see Figure 8).

Figure 6. Installation Begins
8. A window appears, which shows the progress of the installation. When installation is complete, click Finish. (see Figure 7).

Figure 8. Remove or Repair Installation
2. Follow the steps until complete, click Finish (see Figure 9).

analog.com

Rev. 0 | 9 of 127

User Guide
SOFTWARE INSTALLATION

EVAL-ADIN6310

Figure 9. Remove or Repair Completes
NPCAP INSTALLATION
Install Npcap if not already present on the machine. Npcap is recommended over WinPcap. Download from Packet capture library for Windows on the Npcap website.
When installing NPCAP, ensure that the Install Npcap in WinPcap API-compatible Mode check box is selected, as shown in Figure 10.

Figure 11. Main Folder
This main folder contains the following sub-folders:
The bin folder contains the firmware. New versions of the TSN Switch Evaluation package take care of automatically updating the latest firmware when initially run.
The doc folder contains release note, schematics, and layout for the evaluation board in PDF format.
The exe folder contains the executable (GUI), configuration files, and the web server file system (see Figure 12).
The lic contains the license files (ELA license).

Figure 10. Npcap Installation Option (WinPcap API-Compatible Mode Selected)
TSN SWITCH EVALUATION CONTENTS OVERVIEW
The software consists of GUI used to identify the Switch or chain of Switches and launch a PC based web server for each ADIN6310 device connected. The following section shows the different portions of the software. The default location for the TSN Switch Evaluation software install is C:AnalogADINx310EVKSW-Relx.x.x folder (see Figure 11).
analog.com

Figure 12. Contents of the exe Sub-Folder
ADIN6310-tsn-evaluation-util The TSN Switch Evaluation application GUI is named as ADIN6310-tsn-evaluation-util.exe. This application executes on a Windows PC platform and is used to query ADIN6310 boards that are present on a network. When an ADIN6310 board is found, the GUI configures the device primary MAC address, and allow the user to launch the TSN Switch Evaluation web page.
Process Application (windows-tsn-io-app) The process tool runs automatically in the background for each instance of SES device found and does not need to be launched by the user.
Modules Folder The modules folder contains yang models and start-up configuration.
Rev. 0 | 10 of 127

User Guide
SOFTWARE INSTALLATION
FileSystemFolders The FileSystemFolders folder (see Figure 13) contains the PCbased web server pages for each instance of the Switch that can be supported by the GUI (up to 10 max). Each device has its own file system, which is emulated on the PC by having a unique folder to act as the file system root.

EVAL-ADIN6310

Figure 13. Contents of the FileSystemFolders
When the application is first run, the process needs to create a repository inside the file system instance, this can take some time, on order of 30 seconds to complete. Creating the repository is done first, prior to communicating with the Switch. Once the repository is successfully created, only then the process starts to communicate with the Switch and load the default start up configuration.
Figure 14. Contents of an FS_SES_Instance_0 Folder Prior to First Run of Application
Once the application runs successfully, additional folders can be observed in the FileSystemFolders, specifically the eventLog, log, and repository folders (see Figure 15).

Figure 15. Contents of an FS_SES_Instance_0 Folder After Running Application and Successfully Configuring Device
ses-configuration File
The ses-configuration.txt file shown in Figure 16 contains configuration parameters for the PC based web server, such as IP address, Port, NETCONF server port, location of file system, and hardware configuration XML file:
IP and Port address: Specifies the IP and Port address used by the process application instance web pages. For the ADIN6310 evaluation kit the IP address must be set to use the local Host, otherwise known as the loop back address, which is fixed to 127.0.0.1. Given the IP must remain the same for all process instances a port number must be used to identify which process instance the web pages belong to. This allows multiple instances of the process application to execute while controlling each board independently.
FsName: Name of file system folder for each device. NetconfPortSsh: Port on which NETCONF server is listening
(SSH), different port for each SES device. ImageType: Pass Production.
There are 10 instances included in the folder, one instance for each possible Switches in the network (up to 10 maximum supported by GUI). The StartupFileName points to the board specific configuration for the device, and for this example is using the EVAL-ADIN6310EBZ evaluation board. The software also supports operation with the EVAL-ADIN3310 and EVAL-ADIN6310T1L versions of hardware.

analog.com

Rev. 0 | 11 of 127

User Guide
SOFTWARE INSTALLATION
Figure 16. Contents of ses-configuration
The device/hardware specific configuration is contained in XML files within in each FS_SES_Instance folder inside the FileSystemFolders. Pass the matching xml file name to the ses-configuration.txt instance for the version of hardware being used and the required mode of operation. Example XML files are provided for various configurations and parameters can be modified within the XML files. The Switch configuration is volatile and power cycling the Switch requires reconfiguration: Default configuration is for TSN functionality (for example, file
names eval-adin6310 and eval-adin6310-10t1l.xml all support TSN capability). Redundancy configuration examples are provided for HSR, PRP, and MRP. Syntax and case are important when modifying parameters in the XML file. Errors or passing incorrect parameters is not supported and affect the operation of application. Per-port configuration parameters, including MII mode and PHY related specifics, see Figure 18. MII/Port MAC Interface Selection: All ports support RMII/ RGMII, additionally Port 1 to Port 4 support the following MAC interfaces, however hardware must be configured to match the required MAC interface: SGMII 1000base-SX/LX 1000Base-KX 100BASE-FX If-type: The default configuration for the EVAL-ADIN6310EBZ is RGMII interface to the ADIN1300 PHYs. The hardware does not support RMII interface to the PHYs. Port 0 (Ethernet Host) is always configured in unmanaged mode and the Switch does not configure that PHY directly. Hardware must be capable of the MII configured by software, for example, EVAL-ADIN6310 and EVAL-ADIN3310 hardware can support MII modes: rgmii, sgmii, sgmii-1000base-sxlx, or sgmii-100basefx. EVAL-ADIN6310T1LEBZ supports RGMII interface for all

EVAL-ADIN6310
PHYs and can optionally support sgmii, sgmii-1000base-kx, or sgmii-100base-fx options on Port 2 and Port 3. Phy-rx-delay-supported/phy-tx-delay-supported: RxDelay/TxDelay: RXC and TXC delays configuration for the Port. Phy-type: Per port identification of what PHY is connected. Choice of ADIN1100, ADIN1200, ADIN1300, or Unmanaged for ports that either have no PHY or have a different PHY. Hardware must match/support. By default Unmanaged is passed to Port 0. clock-selection: For use with RMII mode only. A setting of 0 enables a 50 MHz clock to be output onto the Port TXC pin for use by the PHY. Only use RMII mode where hardware is configured appropriately, EVAL-ADIN6310EBZ evaluation board supports RGMII mode by default for all ports. PHY Address: PHY address as configured by internal/external strapping. EVAL-ADIN6310 evaluation board uses ADIN6310 internal strapping to provide unique PHY address to each PHY, see ADIN1300 PHY Addressing section. Link-polarity: ADIN6310 expects Port _LINK pin to be driven low for link up, high for link down. The default polarity of the ADIN1200/ADIN1300/ADIN1100 PHYs is for the LINK_ST pin to be active high with link up, however the polarity can be inverted via MDIO write if needed as part of the port initialization. In the ses-configuration.txt file, for this parameter, a setting of active-low indicates the default is active low (no inversion needed), while passing active-high instructs the ADIN6310 to perform a MDIO write to invert polarity of LINK signal in PHY as part of the initialization routine. For the EVAL-ADIN6310EBZ evaluation hardware, there are six ADIN1300 PHYs, the PHY on Port 0 includes an inverter in the path between the LINK_ST and the Switch P0_LINK pin, therefore the inversion is already done for that port. For the remaining PHYs on Port 1 to Port 5, there is no inverter in the path, instead the ADIN6310 configuration needs to invert the polarity of the PHY LINK_ST pin by writing over MDIO to configure the PHY. Phy-pull-up-control: Options of: internal, external, do-not-disable. Allows configuration of whether the PHY address strapping uses the internal pull resistors from the Switch RXD lines or uses external strapping resistors for PHY addressing. With EVAL-ADIN6310EBZ, the internal or do-not-disable options must be used. Do not use the external option as there are no external PHY address strapping resistors and this results in all PHYs defaulting to Address 0. Internal: Internal pulls are enabled. Default setting for the
EVAL-ADIN6310EBZ evaluation board, the Switch sets unique PHY addresses for each PHY. No external strapping resistors are required for PHY addressing as a result. The strapping resistors are enabled until the PHY is brought out of reset and then disabled. External: Internal pulls are disabled. Use with EVALADIN6310T1LEBZ evaluation board, external resistors are used to configure PHY addresses, therefore the internal pulls are disabled.

analog.com

Rev. 0 | 12 of 127

User Guide
SOFTWARE INSTALLATION
Do not disable: Internal pulls are enabled and left enabled even after the PHYs are configured.
Speed: Choice of 1, 0.1, 0.01 (Gbps). Device configuration specifics such as device MAC Address, what redundancy capability is enabled and PHY latencies for PTP stack are passed next. See Figure 19. MAC address: Specifies the mac address the ADIN6310 hard-
ware uses. The MAC address is unique to each device found

EVAL-ADIN6310
and is also used by the process application to establish point-topoint communication with each device. PhyIngressLatency/EgressLatency: Pass the ingress and egress latency if there is an Ethernet PHY connected to the Port. Must match the hardware, the values passed show the ADIN1300 PHY latency parameters.

Figure 17. Ses-configuration.txt File Overview and Location of Hardware Configuration XML Files

Figure 18. EVAL-ADIN6310EBZ: Per-Port Specific Configuration

analog.com

Rev. 0 | 13 of 127

User Guide
SOFTWARE INSTALLATION

EVAL-ADIN6310

Figure 19. EVAL-ADIN6310EBZ: Device MAC address, Redundancy Configuration, PTP/PHY Latency

Figure 20. EVAL-ADIN6310EBZ-HSR: HSR Specific Configuration

HSR Specific Configuration
Figure 20 shows an example of eval-adin6310-hsr.xml file where HSR is enabled. All TSN functionality is disabled when PRP/HSR is enabled, therefore the TSN Switch Evaluation web server only exposes HSR functionality and any TSN related functionality is hidden. The configuration specific parameters for HSR functionality are:
lreNodeType: LRE node type supported: none (redundancy disabled), prpmode1 for PRP operation or hsr to configure the device for HSR mode. Pass the relevant parameter to this field.

lreSwitchingEndNode: Defines the type of functionality, use hsrnode for a DANH or hsrredboxsan for HSR redbox.
LreDuplisResideMaxTime: Duplicate list reside max time in second fraction units.
LreMacAddress: MAC address of the LRE device, this must be the MAC address of the Host interface.
LrePortX: Pass which ports are A, B ports. LreDanPortC: Pass which port is used as Port C. If using SPI
Host interface, pass none to this parameter.

analog.com

Rev. 0 | 14 of 127

User Guide
SOFTWARE INSTALLATION
RedboxInterlinkPortCx: For redbox configurations, identify which ports are interlink ports.
PRP Specific Configuration Figure 21 shows an example of eval-adin6310-prp.xml file where PRP is enabled. All TSN functionality is disabled when PRP is enabled, therefore the PC-based web server only exposes the PRP related functionality and all TSN related functionality is hidden.

EVAL-ADIN6310
Ring Ports 1, 2: Default Port 1 and Port 2, choice of any port. Domain VLANID: Defaults to untagged/4095. React on Link Change: For faster recovery, use react on link
change enabled for which the manager does not wait for test frames to timeout, instead, reacts on the link change frames. Recovery rate: Recovery profile choice of 30 ms, 200 ms, and 500 ms. MRP Port Tx Priority: Default Queue 7 is highest priority. PTP traffic also egresses in Queue 7. If using lowest recovery profile, change default PTP queue from 7 to a lower priority in the Time Synchronization page.

Figure 21. PRP Configuration
The configuration specific parameters for PRP functionality are:
lreNodeType: LRE node type supported: none (redundancy disabled), prpmode1 for PRP operation.
lreSwitchingEndNode: Defines the type of functionality, use prpnode.
LreDuplisResideMaxTime: Duplicate list reside max time in second fraction units.
LreMacAddress: MAC address of the LRE device, this must be the MAC address of the Host interface.
LrePortX: Pass which ports are A, B ports. LreDanPortC: Pass which port is used as Port C. If using SPI
Host interface, pass none to this parameter. RedboxInterlinkPortCx: For redbox configurations, identify
which ports are interlink ports.
MRP Specific Configuration
MRP can be enabled up front or alternatively use the default eval-adin6310.xml configuration and enable the function through the MRP web server page.
Figure 22 shows an example of eval-adin6310-mrp.xml file where MRP is enabled. TSN functionality is supported with MRP, so the full web server configuration is exposed.
Domain ID: Unique domain ID for the MRP ring. MRP OUI: MRP OUI, defaults to 0x080006 (Siemens OUI). Domain Name: Domain name for the ring. MRP Role: Choice of client (default), manager or auto-manager.
analog.com

Rev. 0 | 15 of 127

User Guide
SOFTWARE INSTALLATION

EVAL-ADIN6310

Figure 22. MRP Configuration Example

ADIN6310 and 10BASE-T1L Hardware
There are two versions of XML file for the 10-BASE-T1L version of hardware. Check which revision of hardware prior to configuring and only use the matching XML file. Use REV C XML for both REV C and D versions.
INITIAL EVALUATION BOARD SETUP
The TSN Switch Evaluation software can be used to test the Switch features. Connect the Switch evaluation board to another TSN capable device and do the following steps:
1. Do the steps shown in Installing the TSN Switch Evaluation Application Software to install the software.
2. Pass the matching XML configuration file for the hardware/setup required (TSN, HSR, PRP, MRP).
3. Apply power to the board with the wall adapter provided by connecting to P2.
4. Turn Switch S1 to ON position, LED DS4 lights up. 5. Connect PC through an Ethernet cable to Host Port 0 (Port 0 is
the control plane for Switch configuration, it can also pass data traffic). 6. Launch software by double-clicking the application ADIN6310tsn-evaluation-util.exe in the C:AnalogADINx310EVKSWRelx.x.xFiles folder. 7. When the package is first run, it can take time to create the repository (less than 1 minute). The repository is created first, then the application starts communicating with the device for configuration purposes. The LED in the GUI blinks yellow until web server is ready to launch, when configuration is complete, the LEDs for any Switches found goes green.

8. If daisy-chaining a number of Switch boards, allow a couple of minutes for each board as a repository needs to be created for each instance of the web server.
9. In the event it takes a lot longer than 2 minutes for the LED to go green, close the GUI and reopen, power cycle the board and start searching again.

analog.com

Rev. 0 | 16 of 127

User Guide
SOFTWARE EXECUTION
Start the application by double-clicking the ADIN6310-tsn-evaluation-util.exe executable. The GUI application window appears, as shown in Figure 24.
1. The GUI automatically detects the available network adapters. Select the adapter that is connected to the ADIN6310 board Host (Port 0) by double-clicking the description line for that adapter. Once the adapter is selected, the device configuration information pulled from the ses-configuration.txt and XML files load and populate the lower window.
2. Click Find and Configure SES Devices button to start searching for connected Switch boards.
3. The GUI searches for and configures the MAC address for any ADIN6310 device it finds. Each Switch powers up with the same default MAC address (7a:c6:bb:ff:fe:00). The first thing the GUI application does during configuration is to assign a primary MAC address (based on XML configuration). If observing the traffic from Host to Switch using Wireshark, initially messages are sent from the PC to the default multicast address (79:c6:bb:ff:fe:00) and responses come from default MAC address 7a:c6:bb:ff:fe:00 until the primary MAC address gets assigned. An LED turns green for each board connected. Clicking on the LED for each connected ADIN6310 device launches a browser for each board as shown in Figure 24. Once the web server is launched, the LED color changes to orange. Keep the PC application open, it needs to stay running while interacting with the web server. The GUI application continues to search for more ADIN6310 devices, so if all connected devices have been identified, stop the application searching by clicking the Find and configure button again. The find LED then stops flashing.
4. If boards are power cycled or reset button is pressed, the device reverts to the default MAC address and if the GUI application is searching, it sees them as new devices (additional LED lights go green). To avoid this, close the older processes associated with those instances of boards on the keyboard, use Ctrl and Close All Running Processes, as shown in point 4 of Figure 24.
Note that the first time the application launches the web page, a user may receive a security warning regarding Windows firewall settings. Ensure that the firewall settings are configured to allow communications to pass through the firewall.

EVAL-ADIN6310
Figure 23. Firewall Security Pop-Up

analog.com

Rev. 0 | 17 of 127

User Guide
SOFTWARE EXECUTION

EVAL-ADIN6310

Figure 24. Starting the GUI Application

analog.com

Rev. 0 | 18 of 127

User Guide

EVAL-ADIN6310

TSN SWITCH EVALUATION WEB PAGE OVERVIEW

The TSN Switch Evaluation software package contains a set of web pages to configure the Switch for use in a TSN network or with redundancy features (see Figure 25).
A separate instance of the web server is used for each evaluation board connected to the PC and identified by the GUI.
The TSN Switch Evaluation Home page provides access to the following web pages:
Setup: Which allows the user to perform global actions, such as loading, storing, and managing the overall TSN database.
Port Statistics: Provides an overview of each port transmit and receive information and any errors observed.
Port Configuration: Provides user ability to control the port configuration and change port speed, interface type (hardware must support). It is not supported to change MAC interface modes during run-time. MAC interface must be configured during initial configuration. User can also communicate directly with the Ethernet PHYs via an MDIO read/write from this page.
GPIO and Timer Configuration: Configure the functionality of the GPIO and Timer pins.
IGMP Snooping Configuration: Provides user ability to enable and configure timeouts for IGMP snooping in the Switch.
Switching Table: Provides user ability to install static entries in the lookup table, install extended table entries and flush the dynamic table. Status view provides insight into the learned dynamic entries. Per stream filtering and policing filters can be linked with static and extended entries in the Switching table.
VLAN Table: Provides user ability to configure the port behavior for VLAN IDs. Choice of standard VLAN configuration or configuring ports as Trunk or Access ports.
VLAN Remapping: Provides the ability to remap VLAN IDs for each port.

VLAN Reprioritization: Gives user ability to configure remapping of VLAN priority on a port basis.
Time Synchronization: Provides ability to configure and observer status of time synchronization (IEEE802.1AS).
Frame Preemption: Provides ability to configure frame preemption on each port and observe preemption statistics.
Scheduled Traffic Assign Queue: Provides user the ability to configure the mapping of VLAN priorities to the available queues for each port.
Scheduled Traffic Set Queue Max. SDU: Provides ability to configure the maximum SDU transmission size for each port and each queue.
Scheduled Traffic Schedule: Provides ability to set up schedules per port and also configure a schedule for the hardware Timer pins.
LLDP Configuration: Provides LLDP configuration. PSFP Configuration: Provides ability to configure Per-Stream
filtering and policing, Qci. MRP Configuration: Provides ability to configure MRP function. Stream Table: Used with FRER specifically, provides ability to
configure stream entries for FRER. FRER Configuration: Frame replication and elimination for Reli-
ability, 802.1CB, configuration page. Firmware Update: Provides ability to update/check version of
device firmware.
Click any of these links to go to the required page. Once in a page, use the menu on the left to navigate to any of the other pages at any time. Ensure the GUI is kept running while navigating the web pages.

analog.com

Rev. 0 | 19 of 127

User Guide
TSN SWITCH EVALUATION WEB PAGE OVERVIEW

EVAL-ADIN6310

Figure 25. TSN Switch Evaluation Home Page
CANDIDATE/RUNNING/STARTUP PAGES
All configuration pages have Candidate/Running/Startup views and are linked to the sysrepo repository. To tune the way a function performs, users can change several parameters in the Candidate pages. Once the user has a new set of values for the candidate configuration, click Save followed by Commit to send the candidate configuration entries to the Running configuration. Click Discard to revert the candidate configuration back to current running configuration. The Startup page shows the current startup configuration. This may be the default startup configuration or user may have saved a previous configuration to Startup.

analog.com

Rev. 0 | 20 of 127

User Guide
SETUP PAGE
This page is used to perform global operations on the Candidate, Running, and Startup configurations. Figure 26 shows these three configurations and which commands act on each configuration from the Setup page. Click the following command labels to perform the following actions: SAVE AND LOAD CANDIDATE DATASTORE Save Candidate as: Save Candidate in JSON or XML format.
The file gets saved to Downloads folder. Load Candidate from file: Select JSON or XML file to load. DATASTORE MANAGEMENT Save current Running as Startup: To store the running configu-
ration to the startup configuration. Commit All: To push saved configuration to the device. Discard All: To discard configuration and revert to startup. ADVANCED Save Status as JSON: The operational file gets saved in JSON
format to Downloads folder.

EVAL-ADIN6310
Restore default values: Revert to default. Hardware Reset: Provides ability to do a reset of the ADIN6310
over the Ethernet Port. This also resets all the ADIN1300 PHYs (except for the Host Port PHY on Port 0). When this reset is used, this requires that any previous application processes running on the PC (running the web server) need to be closed. To close the process instances, press the keyboard Ctrl key, click Close all running processes. Release the Ctrl key, click Find and Configure SES Devices to resume operation, as shown in Performing a Reset section. Port 0 to Port 5 Status: The LEDs on the left of page visually show which ports have established a link, these LEDs do not update automatically and require a refresh of the page.

analog.com

Figure 26. TSN Switch Evaluation Setup Page

Rev. 0 | 21 of 127

SETUP PAGE

PERFORMING A RESET
After performing a reset, either using the RESET push button on the Evaluation kit or alternatively through the Hardware Reset button in the Setup page, the Switch reverts to it’s power on reset configuration and the device MAC address reverts to default, therefore if the GUI is searching for devices, it likely finds it as a new device, not one of the previously found devices. Either reset the GUI or do the following steps (see Figure 27):
1. To reestablish communication with the device, return to the GUI. Using the keyboard Ctrl button, click Close All Running Processes. All LEDs should turn off on the GUI.
2. Click Find And Configure SES Devices to identify and connected boards (shown with green LEDs) the devices again.

EVAL-ADIN6310

Figure 27. After a Reset Close Processes and Find Again

analog.com

Rev. 0 | 22 of 127

User Guide
PORT STATISTICS
As shown in Figure 28, click Port Statistics in the menu item on the Home page or in the menu on the left of the page to access the Port Statistics page. This page shows what data has been transmitted and received on each port and provides insight into any errors observed during transmission. The Clear buttons enable clearing of individual ports or all port statistics.

EVAL-ADIN6310
This window is updating automatically on a refresh rate of 5 seconds. To update on demand, reload the page in the browser. There is a Download as CSV option on the bottom right of this page, where the current snapshot of statistics can be saved to an excel file.

Figure 28. Port Statistics Page

analog.com

Rev. 0 | 23 of 127

PORT CONFIGURATION

CANDIDATE PAGE

As shown in Figure 25 or Figure 26, in the menu item on the Home page or in the menu on the left of the page, click Port Configuration. Similar to other pages, there are Status, Candidate, Running, and Startup views for this page.
The Candidate page provides user ability to configure some parameters for the port operation. Note that the XML file in the package is the primary opportunity for port configuration, but some additional run-time configuration is possible within the Candidate page.
Each port can be configured independently and saved, or alternatively, there is a Save button at top of page. Click the Commit button to push any changes to the device.
As shown in Figure 29, the configuration provided here as follows:
Enable Port: This check box allows user to enable or disable ports. By default, all ports are enabled.
MAC Address: The default MAC addresses shown corresponds to the MAC addresses assigned to each port based on the primary MAC address set by the XML configuration file. Changes

EVAL-ADIN6310
to this field are supported within the web page, enter the required MAC address and click Save button. PHY Type: This shows what is provided in the XML configuration file. PHY Auto-Negotiation: This check box is enabled by default and if disabled, indicates that the PHY is in Forced Speed mode, therefore only speeds 10 Mbps/100 Mbps are available. Speed: For Auto-Negotiation enabled options of 10 Mbps/100 Mbps/1000 Mbps, 10 Mbps/100 Mbps or 10 Mbps. When AutoNegotiation disabled, options of 10 Mbps or 100 Mbps only. PHY Duplex: Full duplex by default. PHY duplex can be configured for speeds of 10 Mbps or 100 Mbps. PHY Crossover Config: Enables user to decide the cable crossover configuration of the ADIN1300 PHY on each port. Defaults to Auto MDIX. The user can select the following options: Auto MDI MDIX RGMII Strength: Configuration of the drive strength of the RGMII from the Switch side.

analog.com

Figure 29. Port Configuration Page Overview Candidate View Rev. 0 | 24 of 127

User Guide
PORT CONFIGURATION
STATUS PAGE
The Status page provides user snapshot of the current port configuration status.
As shown in Figure 30, the configuration provided here as follows:
Interface Type: Shows the MAC interface as configured by the XML file. When using EVAL-ADIN6310EBZ, this hardware supports RGMII on all ports and SGMII interfaces on Port 1 to Port 4. SGMII modes need to be configured during initial configuration by editing the XML configuration. This hardware does not have any PHYs connected via RMII, therefore no RMII connectivity is possible.

EVAL-ADIN6310
MAC Address: Shows the assigned MAC address to the port. PHY Type: Shows what PHY is connected. Crossover: Shows the actual crossover configuration. Link: Shows whether the link is up or down. Speed (Mbps): Shows the speed of the established link. PHY Delay: Shows the PHY Tx delays (of ADIN1300 PHY),
which depends on the speed of the link established. RGMII Strength: Shows the configured drive strength of RGMII
from the Switch side.

Figure 30. Port Configuration Page Overview Status View

analog.com

Rev. 0 | 25 of 127

User Guide
PORT CONFIGURATION

EVAL-ADIN6310

Figure 31. Port Configuration Page Overview Running View

analog.com

Figure 32. Port Configuration Page Overview Startup View

Rev. 0 | 26 of 127

User Guide
PORT CONFIGURATION
MDIO CONTROL The MDIO Control field is shown at the bottom of the Port Configuration page and provides user ability to interrogate any of the six ADIN1300 PHYs on the evaluation board. Clause 22 read/writes are supported to the standard IEEE802.3 registers and vendor specific registers up to 0x1F. As shown in Figure 33, to read a register, in the Port field, select the port, in the Reg-Address field, enter the register address, and then click the Read button. The Switch communicates over MDIO bus to the appropriate PHY and the data field appears with the register information returned. Similarly to write a PHY register, in the Port field, select the port, in the Reg-Address field, enter the register address, and then click the Write button to load.

EVAL-ADIN6310
Access to Clause 45 or Extended registers is supported. Register address input format is 0xHEX.
Figure 34. MDIO Control Access of Extended Register Space

Figure 33. MDIO Control Communication with the PHYs on the Evaluation Board

analog.com

Rev. 0 | 27 of 127

GPIO AND TIMER CONFIGURATION

There are four GPIO pins and four Timer pins. This page provides user ability to control the function of these hardware pins. There are Status, Candidate, Running, and Startup pages for this functionality.
All pins are enabled by default. The GPIOs are enabled as Outputs. Timer0 is enabled as a GPIO by default, Timer1 is enabled for TSN timer function, Timer2 is enabled as a 1 pulse per second (1PPS) timer signal, and Timer3 is configured to be a Capture Input.
The available configurations and default configuration for these pins is shown in Table 9.
When changing GPIO or Timer operation, each change must be saved individually, otherwise, the user loses the change.
When SPI mode is selected as Host interface, Timer0 automatically configures as an Interrupt for the SPI interface to the Host and does not available to configure as a Timer/GPIO pin.
TSN OUTPUT TIMER
This is the default operation for Timer1. When TSN Output Timer function is selected in this page, then a user needs to navigate to the Scheduled Traffic Schedule page. The TSN Output Timer functionality allows the user to control the Timer pins with specific cycle times and is configured through the Scheduled Traffic Schedule page.
1PPS PERIODIC OUTPUT
Timer2 and Timer3 can support a 1 pulse per second (1PPS) output. As shown in Figure 35, in the Mode drop-down box, select the 1PPS_PERIODIC_OUT option. The low/high pulse-width fields fix at 500 ms.

EVAL-ADIN6310

Table 9. GPIO and Timer Pin Functionality

Hardware Pin

Available Mode

GPIO0

GPIO

GPIO1

GPIO

GPIO2

GPIO

GPIO3

GPIO

GPIO4/TIMER0 GPIO5/TIMER1

GPIO, TSN Output Timer (Default), Interrupt (SPI INT) GPIO, TSN Output Timer (Default)

GPIO6/TIMER2 GPIO7/TIMER3

GPIO, TSN Output Timer, Periodic Output, 1PPS Output (Default)
GPIO, TSN Output Timer, Periodic Output, 1PPS Output, Capture In (Default)

PERIODIC OUTPUT
Timer2 and Timer3 also support a user-configurable periodic output. As shown in Figure 35, in the Mode drop-down box, select the PERIODIC_OUT option and enter the required high/low pulse-width for required pulse. The minimum value of high/low pulse-width is 16 ns and the time period must not exceed 1 second.
CAPTURE INPUT
Timer2 and Timer3 can also support configuration as a capture Input. By default, Timer3 is a capture input. A possible usage for the capture input is to trigger the Switch to capture a hardware timestamp in response to a transition on the Timer3 and send that timestamp information to the Host. Note the web server does not support this configuration, the driver APIs need to be used to enable this and send the message to the Host.
OTHER MODES
Any greyed out options are not available yet and intended for future releases.

analog.com

Rev. 0 | 28 of 127

User Guide
GPIO AND TIMER CONFIGURATION

EVAL-ADIN6310

Figure 35. GPIO and Timer Candidate Page

analog.com

Rev. 0 | 29 of 127

User Guide
SWITCHING TABLE
CANDIDATE VIEW
Dynamic Table
Entries in the Dynamic Table are entries learned by the Switch based on traffic crossing the Switch. The Switch learns based on Source MAC address and if the VLAN configuration is enabled for learning, the Switch automatically installs an entry in the table with an age value based on when the entry is updated. The table ages out frames if they are no longer seen within the configured aging period. The default configuration is for learn and forwarding on untagged traffic. VLAN tagged traffic is not learned or forwarded unless user configures the VLAN table accordingly, see VLAN Table. The Switching Table page provides the user ability to configure the aging period of the Dynamic Table entries, simply enter the aging period in ms in the field and click the Save button to adjust the aging (range of 1000 ms to 10000000 ms). The default setting for aging is 300 seconds.
As shown in Figure 36, a user can flush the Dynamic table on-demand, by clicking the Flush Dynamic Table button.
Source Port Lookup Modes
The default behavior on all ports is to perform a destination MAC and VLAN lookup.
User can configure the lookup behavior on a port basis to instruct the Switch to perform other lookup options. Checking the bit 0 field for a port enables a Source lookup on all traffic to ingress that port. Setting bit 1 enables extended lookup on all frames for that port and setting bit 2 enables a Destination MAC address lookup (802.1D). Combinations of lookups are supported.
Static Table Entries
The Static Table allows user to install/remove entries in the lookup table. When the Switch is configured for TSN mode, the startup configuration installs an entry in the table for LLDP multicast addresses. This static entry can be seen as the first row of the table. Do not interfere or overwrite this entry.
To install a new entry, first add a row, then fill in the Destination MAC Address, VLAN identifier, and Egress Ports. For untagged traffic use 4095 as a VLAN Identifier to indicate no VLAN identified associated with entry. For tagged traffic, ensure to also configure the VLAN table to support the VLAN IDs of interest for specific ports. The format of the Destination MAC Address must be entered as xx-xx-xx-xx-xx-xx and the Egress Port must be entered in hex.

EVAL-ADIN6310
Figure 36 shows examples of adding various entries with different VLAN tags destined to egress on specific ports.
The Static Table also gives user the ability to add or remove VLAN tags from traffic. To insert a tag, add the table entry with the Add Tag Option and define the VLAN ID and Priority to add. To remove the tag as the frame egresses, select the Remove tag. The standards indicate a minimum sized frame for a VLAN tagged frame is 68 bytes (64 bytes + 4 byte VLAN tag). If user is ingressing frames of 64-bytes including VLAN tag and configuring the Switch to remove the VLAN tag directly or using VLAN access port, the Switch deliberately corrupts the frame on egress.
By default, only untagged or VID 0 frames crosses the Switch, the VLAN table must be configured to forward other VIDs.
Extended Table Entries
Similarly, this page allows the user to install extended table entries and define how they are handled. A VLAN tag can be inserted or removed. Note that configuring the extended table to install a VLAN tag in traffic that has an existing VLAN tag results in two VLAN tags. This operation is a misconfiguration by user. Two VLAN tags are visible in the frame, upper layers need to handle accordingly.
The extended table input fields in the web server currently only support basic lookups up to 14-bytes. Installing lookups for EtherTypes such as IPv4, IPv6, and PTP are not yet supported and rejected by the web server. These type of entries are supported using the Driver APIs directly, for more details, refer to the ADIN6310 Hardware Reference Manual.
Cut Through Enable
When installing a Static Table entry, user can install with cut through enabled/disabled by selecting the Cut Through Enable check box.
Stream Filter
When installing a Static Table entry or Extended Table entries, a Stream Filter can be associated with this entry. Stream Filter is a part of PSFP functionality. To use this feature, select the Stream Filter Enable check box and pass the ID of the Stream Filter to apply, then go to the PSFP web page to configure the Stream Filter, Stream Gate, or Flow Meter as required. Stream filters can only be applied to static entries that are configured for Store and forward mode, ensure that the Cut Through Enable check box is not selected when using PSFP.

analog.com

Rev. 0 | 30 of 127

User Guide
SWITCHING TABLE

EVAL-ADIN6310

Figure 36. Switching Table Candidate View Adding Static Entries and Extended Table Entries

analog.com

Figure 37. Switching Table Running View with Added Static Entries

Rev. 0 | 31 of 127

User Guide
SWITCHING TABLE

EVAL-ADIN6310

Figure 38. Switching Table Startup View

analog.com

Rev. 0 | 32 of 127

User Guide
SWITCHING TABLE
STATUS VIEW DYNAMIC ENTRIES The Status view allows user to readback the MAC addresses learned by the Switch. Figure 39 shows the untagged traffic entries learned as the user is ingressed Port 0.

EVAL-ADIN6310

Figure 39. Switching Table Status View with Learned Entries

analog.com

Rev. 0 | 33 of 127

VLAN CONTROL

As shown in Figure 40, the VLAN Table has Candidate, Running, and Startup pages. There is no Status page for VLAN function. To see how the VLANs are configured based on changes in the Candidate view, see the Running page. VLAN TABLE The VLAN Table page provides user ability to configure the port learning and forwarding operational mode for each VLAN IDs (1 through 4094). The default behavior is No Learn and No Forward for all VLANs with exception of VLAN ID 0/untagged traffic. There are two modes of operation within the VLAN Table, Candidate page: Trunk/Access Port configuration or VLAN Table Configuration. The default is VLAN Table, but this can be changed using the VLAN Table/Mode Table Switch check box.
VLAN Table Configuration To configure each individual port behavior, simply enter the VLAN ID, select the appropriate behavior for each port and click the Save button followed by Commit. The configuration is loaded and the web page moves automatically to show the Running view. To read the configuration for a specific VLAN ID, enter the ID of interest in the Running page. The configuration mode choices for each port are: Learn and Forward, Learn and No Forward, No Learn and Forward, or No Learn and No Forward.
Trunk/Access Configuration The Switch ports can be configured as Trunk or Access ports. Trunk Ports can support multiple VLAN IDs or ranges of VLAN IDs, whereas access ports support only 1 VLAN ID.

EVAL-ADIN6310
The Switch handles the insertion and removal of VLAN tags where required when traffic is crossing between ports. When removing a VLAN tag on an access port, the switch expects a minimum sized frame for a VLAN tagged frame to be 68 bytes (64 bytes + 4 byte VLAN tag). If user is ingressing frames of 64-bytes including VLAN tag and configuring the Switch to remove the VLAN tag directly or using VLAN access port, the Switch sees this frame as a runt frame and deliberately corrupts the frame on egress.
To use this feature, first enable the check box VLAN Table/Mode Table Switch.
Then configure the ports as Trunk or Access ports with the VLAN IDs or ranges of interest.
In the example shown in Figure 41, Port 0 is configured as a Trunk port for VLAN IDs 1 to 5, but VLAN ID 2 is not disabled.
Port 1 to Port 4 are configured as Access ports for individual VLANs and Port 5 is another Trunk port subscribing to VLAN IDs in range of 1 to 5 including VLAN ID 2. VLAN Priority can also be configured for the access port, so any traffic ingressing the access port have a VLAN tag inserted with the VID and the priority configured for the access port.
There is an upper limit on the number of different VLAN IDs that can be active with a max of 62 different VLAN IDs, therefore, when configuring Trunk ports, user must avoid enabling the full range of VLAN IDs. In practice, only a small number of VLAN IDs are in use.
The Running view in Figure 42 shows the configured VIDs across ports. Note that VID 2 is not shown for Port 0, but is for Port 5, which matches what is configured.

analog.com

Rev. 0 | 34 of 127

User Guide
VLAN CONTROL

EVAL-ADIN6310

Figure 40. VLAN Table for Port Configuration

analog.com

Figure 41. Using Trunk/Access Port Configuration Candidate View

Rev. 0 | 35 of 127

User Guide
VLAN CONTROL

EVAL-ADIN6310

Figure 42. Using Trunk/Access Port Configuration Running View

analog.com

Rev. 0 | 36 of 127

User Guide
VLAN CONTROL
VLAN REMAPPING
As shown in Figure 43, the VLAN Remapping page provides user ability on a per port basis to add entries to remap incoming VLAN IDs to a different VLAN ID. Remapping is achieved by replacing the source VID in an incoming VLAN tagged frame with a destination VID. Per port, a table with 16 entries (slots) is used to configure the remapping. To add an entry, select the port of interest, select the Enable remapping check box, add the Source VLAN ID and

EVAL-ADIN6310
the Target VLAN ID, click the Save button followed by the Commit button. These remap entries are then saved and loaded to the device. Traffic ingressing a port with a corresponding VLAN ID can be observed to egress on the defined port with the remapped/target ID. To remove an entry, choose Delete button (see Figure 44). To view status of other ports, select the other port and any existing entries are displayed in the table.

Figure 43. VLAN Remapping Page Candidate View

analog.com

Rev. 0 | 37 of 127

User Guide
VLAN CONTROL

EVAL-ADIN6310

Figure 44. VLAN Remapping Page Candidate View Adding Entries for Port 2

analog.com

Figure 45. VLAN Remapping Page Running View Displays Entries for Port 2

Rev. 0 | 38 of 127

User Guide
VLAN CONTROL
VLAN REPRIORITIZATION As shown in Figure 46, the VLAN Reprioritization page gives user ability to remap the priority of the VLAN traffic on a port basis. There is a Candidate, Running, and Startup view for these pages. There is no status page for VLAN Reprioritization. All configuration happens in the Candidate page. To select a different priority for a VLAN ID, select the port of interest, enable prioritization on that port by enabling the Enable Reprioritization check box, then select the appropriate remapping IDs, use the

EVAL-ADIN6310
individual Save buttons or the main page Save button to save the changes to the web server and click the Commit button to load the changes to the device. When the Commit button is clicked, the changes are loaded and the web server automatically changes to show the Running view, where user can confirm programmed changes are applied. The Discard button allows user to revert changes in the Candidate field, by copying the running configuration back to the Candidate.

Figure 46. VLAN Reprioritization Page Candidate View

analog.com

Rev. 0 | 39 of 127

User Guide
VLAN CONTROL

EVAL-ADIN6310

Figure 47. VLAN Reprioritization Page Running View

analog.com

Figure 48. VLAN Reprioritization Page Startup View

Rev. 0 | 40 of 127

User Guide
TIME SYNCHRONIZATION
The Switch supports IEEE 802.1AS 2020 Time Synchronization. As shown in Figure 25 or Figure 26, click Time Synchronization in the menu item on the Home page or in the menu on the left of the page to access the Time Synchronization pages.
By default, when the web server runs, the PTP stack running on the Switch is automatically enabled with one instance, Domain 0, and PTP is enabled for all ports using the instance-specific peer-to-peer delay mechanism. The instance-specific peer-to-peer delay mechanism supports backward compatibility with IEEE802.1AS 2011.
CANDIDATE PAGE
The Candidate page provides user ability to modify the operation of the PTP instance or add additional instances. Any changes must be saved and then committed. When changes are successfully committed, the Running page appears and shows the updated configuration. If an update is unsuccessful, a pop-up appears that shows the user update failed, and the Running page displays the last successful configuration.

EVAL-ADIN6310
Traffic Priority: By default, PTP messages go into the highest priority transmit queue which is queue 7. The queue that PTP messages use for each port can be changed via the corresponding Transmit Priority fields, see Figure 51. Using MRP with the fastest Recovery profiles may motivate the user to make changes to the priority of PTP messaging.
Priorities
The default behavior for the enabled instance has Priority1 and Priority2 values set to 248. Priority values are among the parameters used as part of the best timeTransmitter clock algorithm (BTCA).
Lower values in the Priority1 or Priority2 fields, increase the chance that device becomes the Grandmaster. A service in a TSN network should not try to claim Grandmaster functionality unless it is by design. A typical Grandmaster is a node with a time normal receiver, a global positioning system (GPS) receiver, or an atomic clock. In industrial automation, an infrastructure Switch or a controller can cover Grandmaster functions. The priority value range is 0 to 255.

Figure 49. Time Synchronization Candidate Page Update Unsuccessful
PTP CONFIGURATION
The PTP stack supports up to 4 PTP instances. By default, one instance, Domain 0, is enabled for all 6 ports.
As shown in Figure 50, the page shows the mapping of PTP ports to Link Port Numbers. In the IEEE802.1AS standard, the Port assignment starts with Port 1. The web server Time Synchronization Port numbering aligns with this, but elsewhere in the web server, the port number starts at Port 0.

Figure 51. Time Synchronization Candidate Page Traffic Priority and Default Dataset
PORT CONFIGURATION
The Port Configuration, shown in Figure 53. provides ability to configure various parameters associated with the PTP instance per port. The web server provides ability to change each individual port individually with the PTP Port Number drop-down menu, as shown in Figure 52. When changing port configuration, remember the port numbering for PTP is offset by one.

Figure 50. Time Synchronization Candidate Page PTP Configuration analog.com

Rev. 0 | 41 of 127

User Guide
TIME SYNCHRONIZATION

EVAL-ADIN6310

Figure 52. Time Synchronization Candidate Page Port Configuration per Port Selection

Figure 53. Time Synchronization Candidate Page Port Configuration

analog.com

Rev. 0 | 42 of 127

User Guide
TIME SYNCHRONIZATION

EVAL-ADIN6310

Figure 54. Time Synchronization Candidate Page (Top)

analog.com

Figure 55. Time Synchronization Candidate Page (Bottom)

Rev. 0 | 43 of 127

User Guide
TIME SYNCHRONIZATION
Delay Mechanism
By default, the PTP instance is enabled on all ports with a peer-topeer delay mechanism, which supports backward compatibility to IEEE802.1AS 2011.
If only one time domain is enabled, user has choice of instancespecific peer-to-peer delay mechanism or common mean link delay service (CMLDS). CMLDS provides the mean propagation delay and neighbor rate ratio to all active domains.
For any PTP instance with a domain number that is not zero, CMLDS is enabled. Attempting to enable the instance-specific peer-to-peer delay mechanism on any one instance with a domain number that is not zero is not accepted. The update is rejected and the Running page shows the previous successful update.
To synchronize with devices running IEEE802.1AS 2020 and to add additional PTP instances, change the delay mechanism for the relevant ports to CMLDS.

EVAL-ADIN6310

analog.com

Rev. 0 | 44 of 127

User Guide

TIME SYNCHRONIZATION

Interval Times

This section of web page gives user ability to adjust the interval messaging for Sync, Announce and Peer Delay request messages.

Changing interval settings can result in improved tuned application behavior of the synchronized clocks. For example, lowering the sync interval (to a smaller value) can improve the precision of the synchronization.

Table 10. Port Delay Message Options

Parameter Log Pdelay_Req Interval
Log Sync Interval
Log Announce Interval

Description
The interval of peer delay requests sent from the timeReceiver to the timeTransmitter.
The interval of sync messages sent out by the timeTransmitter.
The interval in which the timeTransmitter announces its leadership.

Value Range +5 to -5
+5 to -5
+5 to -5

Default 0 (1 sec)
-3 (125 ms) 0 (1 sec)

The interval time is given in log2 values, as the 802.1AS standard suggests:

tINTERVAL = 1e9 × 2log2INTERVAL

(1)

Table 11. Interval Time Setting

Log2

tINTERVAL

-5

31.25 ms

-4

62.5 ms

-3

125 ms

-2

250 ms

-1

500 ms

1 sec

2 sec

4 sec

8 sec

16 sec

32 sec

Within the range specified, users can make changes to any of these values.

Mean Link Threshold
The mean link threshold defaults to 800 ns. If using an Ethernet tap inline with the time aware link or attempting to synchronize over a

EVAL-ADIN6310

10BASE-T1L link, larger threshold values are required. In event the link delay is in excess of the programmed threshold, devices are not able to synchronize.
COMMON SERVICES
Figure 56 shows the configuration for Common Mean Link Delay Service. This section only applies when using CMLDS as the Delay Mechanism (selected from the drop-down in the Port Dataset view).
Note that the clock identity for common services differs from the PTP instance Clock identity.

Egress/Ingress Latency

The Egress/Ingress Latency values shown are specific to the Ethernet physical layer device (PHY). These are hardware dependent parameters based on the PHYs used. The default values shown in the web page are based on the ADIN1300 PHYs that are connected over RGMII interface to the Switch on the EVAL-ADIN6310EBZ hardware.

The RGMII latencies based on the ADIN1300 configuration are listed in Table 12. For Link Port 2 to Port 6, the ADIN1300 Rx/ Ingress latency defaults to the lowest latency mode when the cable length is estimated to be <100 m (CDIAG_CBL_LEN_EST (0xBA25)) and the PHY MSE (mean squared error) is <14 on all four dimensions (MSE_A (0x8402), MSE_B (0x8403), MSE_C (0x8404), and MSE_D (0x8405)).

When Link Port 1 (Physical port 0) is used as the Host interface, the PHY is treated as unmanaged, therefore the ingress/egress latency for that port always shows the higher Ingress latency of 226 ns.

Table 12. ADIN1300 PHY RGMII Actual Rx/Tx Delay/Latency

Speed

Tx/Egress Rx/Ingress Comment

1000 Mbps

68 ns

1000 Mbps

68 ns

178 ns 226 ns

Low Latency mode when cable length <100 m or MSE values <14.
Standard latency mode when cable length >100 m or MSE values >14.

100 Mbps 10 Mbps

92 ns 124 ns

250 ns 250 ns

Standard latency mode. Standard latency mode.

analog.com

Rev. 0 | 45 of 127

User Guide
TIME SYNCHRONIZATION

EVAL-ADIN6310

Figure 56. Time Synchronization Candidate Page Common Services

analog.com

Rev. 0 | 46 of 127

TIME SYNCHRONIZATION

PTP INSTANCES To add an additional instance, click the Add Instance button, as shown in Figure 57. Another row appears on the web page with different Clock Identity, Hardware Clock, and Domain number.

EVAL-ADIN6310

Figure 57. Time Synchronization Candidate Page Adding a Second Instance

Select the number of ports with which this instance should be used. By default, only one is selected. Configure any specific other parameters associated with this instance. When more than one in-

stance is configured, the delay mechanism CMLDS is automatically used. To remove an instance, in the Remove area, click the Delete button.

Figure 58. Time Synchronization with Two Instances

Figure 59. Time Synchronization Candidate Page Adding a Second Instance for All 6-Ports

analog.com

Rev. 0 | 47 of 127

User Guide
TIME SYNCHRONIZATION
HARDWARE CLOCK The Switch supports two hardware clocks (TIMER A and TIMER B) and a free running clock. Currently only TIMER A and FREE RUNNING options are available. By default, the first instance is configured with TIMER A. When a second instance is added, it runs from the FREE RUNNING clock automatically. EXTERNAL PORT CONFIG The External Port configuration enable is used where user does not want to use BTCA to decide who is Grandmaster in the network. Instead, user configures each device and port accordingly. The External Port Config Enable is used in conjunction with the External Port Config Desired state drop-down.

EVAL-ADIN6310
Figure 61. Time Synchronization Example for External Port Config

Figure 60. Time Synchronization Candidate Page External Port Config Enable
Figure 61 shows an example where the first Switch is configured to be Grandmaster by configuring all its ports with timeTransmitter as the desired state. The following applies to Switch 2 and Switch 3. The External Port Config Desired state for the ports connected to Switch 1 is configured as timeReceiver and all other ports as timeTransmitter.

analog.com

Rev. 0 | 48 of 127

User Guide
TIME SYNCHRONIZATION
STATUS PAGE As shown in Figure 62, the Status page provides insight into the current status of PTP instances and indicates whether the device is synchronized. The status information is available per configured instance, showing information such as who is Grandmaster. The remaining parameters displayed are those defined by IEE 802.1AS and provide information regarding the operation of the time synchronization. The following parameters are displayed for each port in the Port Configuration > Port Dataset:

EVAL-ADIN6310
Port State: which is either timeTransmitter, timeReceiver, or Disabled.
Mean Link Delay (ns): Measured the link delay across the cable.
AS Capable: Which is either Enable or Disable. The Status page also shows the detailed Port Statistics for the PTP instance, such as counts for PTP messaging, see Figure 64 and Figure 65 for CMLDS dataset (only shows valid information if CMLDS is active).

Figure 62. Time Synchronization Status Page PTP Instance Configuration

analog.com

Rev. 0 | 49 of 127

User Guide
TIME SYNCHRONIZATION

EVAL-ADIN6310

Figure 63. Time Synchronization Status Page Port Configuration Dataset

Figure 64. Time Synchronization Status Page Port Statistics Dataset

analog.com

Rev. 0 | 50 of 127

User Guide
TIME SYNCHRONIZATION

EVAL-ADIN6310

Figure 65. Time Synchronization Status Page Common Mean Link Delay Service Dataset and Statistics (Returns Information if CMLDS is Enabled)

analog.com

Rev. 0 | 51 of 127

User Guide
TIME SYNCHRONIZATION
TIME SYNC MESSAGING Using an Ethernet Tap between two Time Aware devices with just one instances enabled, user can view the gPTP messaging.

EVAL-ADIN6310
Figure 66 shows an example of the messaging between two devices with the default Time Sync parameters. The messaging intervals can be modified through the Candidate web page.

Figure 66. Time Synchronization View of Messaging through Wireshark Using an Ethernet Tap between Two Devices

analog.com

Rev. 0 | 52 of 127

User Guide
TIME SYNCHRONIZATION
RUNNING PAGE The Running page shows the running configuration on the device. The fields on this page cannot be edited. Return to the Candidate configuration to change configuration. STARTUP PAGE The Startup page shows the startup configuration. These parameters are displayed to verify the values of the Startup configuration only.

EVAL-ADIN6310
TIMER PINS, 1PPS SIGNAL The TIMER2 pin is used to provide a 1PPS (one pulse per second) signal. Probing the TIMER2 pin with a logic analyzer shows the 1PPS Time Synchronization pulse, as shown in Figure 67. It is also visible on the evaluation board via the blinking of LED TIMER2.

Figure 67. 1PPS Signal on TIMER2 Pin for Two Switch Boards

analog.com

Rev. 0 | 53 of 127

User Guide
FRAME PREEMPTION
Click Frame Preemption in the menu item on the TSN Switch Evaluation – Home page (see Figure 25) or in the menu on the left of the page to access the Frame Preemption page, as shown in Figure 69. Similar to Time Synchronization, the Frame Preemption page has Status, Candidate, Running, and Startup views.
CANDIDATE PAGE
To configure the way Frame Preemption operates, users can configure each port through the Candidate page, see Figure 68.
The following control parameters are provided for each port:
Preemption Support: Check box to enable or disable the function, default is disabled.
Ignore Peer Preemption Status: Check box to allow port ignore the peer preemption capabilities. This bypasses the checks for peer preemption. This must be used in conjunction with the Disable Verify Message Transmit.
Minimum Non-Final Fragment Size (bytes): Provides control of the fragment size, drop-down with choice of 64, 28, 192, or 256 bytes.
Disable Verify Message Transmit: By default, this check box is cleared, which is the expected operation. Preemption requires that a port sending a verification frame must get a response to

EVAL-ADIN6310
allow frame preemption be enabled. This check box provides ability to disable the verify message if required to force preemption on. Verify Message Period (ms): Sets the verify frame transmit retry timer with a range of 1 ms to 128 ms, default 10 ms. Express Queues: Defaults to all queued marked as express. Select the required check boxes to enable preemption on that queue. Queues map directly to VLAN priorities. Once the user has a new candidate configuration, click Save button followed by Commit button to send the Candidate configuration entries to the Running configuration. Click Discard button to revert the Candidate configuration back to current Running configuration. When committing the Candidate configuration to the Running configuration, the current Running configuration saves to a running backup configuration before the Candidate configuration saves to the Running configuration. The purpose of this save to the running backup configuration is to allow the user to undo the Commit action in the event that the committed Candidate configuration results in a catastrophic effect on the TSN operation. The example configuration shown in Figure 68 has Port 5 with preemption enabled and all queues except queue 5 are configured as preemptable.

analog.com

Figure 68. Frame Preemption Candidate Page View

Rev. 0 | 54 of 127

FRAME PREEMPTION

STATUS PAGE

The Preemption Status page is shown in Figure 69. The following status information is provided per port:
Preemption Active: Reports status check box. Selected indicates active, cleared indicates inactive.
Verify Status: Shows state (Initial, Active). Peer Supported: Shows whether the peer is capable of Preemption. Peer Enabled: Shows whether the peer has preemption enabled Peer Active: Shows whether the peer has preemption active. Hold Advance (nsec): Shows the maximum number of nano-seconds that can elapse between issuing a Hold to the MAC and the MAC ceasing to transmit any preemptable frame that is in the process of transmission or any preemptable frames that are queued for transmission, including any MAC specific delay before transmission of an express frame can start once preemptable frame transmission has ceased.

EVAL-ADIN6310
Release Advance (nsec): Shows the maximum number of nanoseconds that can elapse between issuing a Release to the MAC and the MAC being ready to resume transmission of preemptable frames, in the absence of there being any express frames available for transmission.
Preemption Statistics: Provides overview of the various statistics associated with Transmit and Receive processing: Frame Assembly Error Count Frame SMD Error Count Frame Assembly OK Count Fragment Count Rx Fragment Count Tx
Hold Count: Associated with use of Hold_EN with Scheduled Traffic, returns a count of the number of times the HOLD enable transitions from FALSE to TRUE.

analog.com

Figure 69. Frame Preemption Status Page

Rev. 0 | 55 of 127

User Guide
FRAME PREEMPTION
FRAME PREEMPTION EXAMPLE
The following example works through enabling preemption in a configuration with two EVAL-ADIN6310EBZ evaluation boards. Port 3 of Switch 1 is connected to Port 0 of Switch 2.
The Preemption settings for each device are configured through the individual web pages.
In Switch 1, Preemption is enabled on Port 3, express and preemptable queues configured accordingly Queue 5 is assigned as the only express queue and all other queues are cleared and therefore preemption can be applied to these queues. Once the

EVAL-ADIN6310
changes are made, then click the Save button followed by the Commit button to load the settings. In Switch 2, enable Preemption support on Port 0. A transmitting port only sends frames with an SMD-S/C (frames to which preemption has been applied) only after it has been established that the link partner supports preemption and the transmitting port has been instructed to enable preemption on the Tx Queues for this link. LLDP frames are used to exchange capabilities. Enabling Preemption in Switch 2 allows preemption to become active as shown in Figure 71.

Figure 70. Candidate Page View to Enable and Configure Preemption

analog.com

Figure 71. Status View with Preemption Enabled and visibility into Statistics

Rev. 0 | 56 of 127

User Guide
SCHEDULED TRAFFIC
Configuration of Scheduled Traffic is done on three main pages: Scheduled Traffic Assign Queue, Scheduled Traffic Set Queue Max SDU, and Scheduled Traffic Schedule (see Figure 72). Click Scheduled Traffic Assign Queue menu item on the Home page or in the menu on the left of the page to start configuration, this opens the Candidate view, as shown in Figure 73.

EVAL-ADIN6310
Click the Running button to display the current Running configuration. This is shown in Figure 74 for the Queue Assignment Running page. Click the Startup button to display the configuration of the Startup configuration. This is shown in Figure 75 for the Queue Assignment Startup page.

Figure 72. Scheduled Traffic Pages
ASSIGNING QUEUES
Traffic is scheduled on a TSN network using VLAN Priority. By assigning VLAN Priority to an Ethernet message, that message can be assigned to a queue in the Switch hardware. There are 8 queues in this hardware and any of the 8 VLAN Priorities can be assigned to any of the queues.
By default, PTP and LLDP traffic has been designated to go into Q7, therefore Q7 must be enabled for at least 10 s to provide bandwidth for time synchronization messages.
Q0 is designated best effort, untagged traffic is forced to this queue.
The Candidate page is used to map VLAN Priority to a queue. Click the white dot under a queue corresponding to the required VLAN Priority. The default mapping is, for example, Q0 to VLAN Priority 0, Q1 to VLAN Priority 1.
In Figure 73, the configuration for Port 1 has been remapped to the following, by clicking Q0 for VLAN Priority 0 and 1, Q1 for VLAN Priority 2 and 3, Q2 for VLAN Priority 4 and 5, Q3 for VLAN Priority 6 and 7. Click the Save button followed by Commit button to send assignments to the Running configuration. Click the Discard button to revert to current Running configuration.

analog.com

Rev. 0 | 57 of 127

SCHEDULED TRAFFIC

EVAL-ADIN6310

Figure 73. Scheduled Traffic Queue Assignment Candidate Page

Figure 74. Scheduled Traffic Queue Assignment Running Page

analog.com

Rev. 0 | 58 of 127

User Guide
SCHEDULED TRAFFIC

EVAL-ADIN6310

Figure 75. Scheduled Traffic Queue Assignment Startup Page

analog.com

Rev. 0 | 59 of 127

User Guide
SCHEDULED TRAFFIC
SCHEDULED TRAFFIC SET QUEUE MAX. SDU
This page provides ability to adjust the service data unit (SDU) size of the frames allowed to egress per queue per port. The web server startup default setting is 1536 bytes, while the hardware defaults to 10,000 bytes. Adjusting the SDU size allows the user to fine tune the timing of the scheduled traffic. These values only need to be adjusted if the user knows precisely how they want to configure the timing. QueueMaxSDU does not include MAC addresses or FCS (QueueMaxSDU = Frame Size 16 bytes).
The Queue Max. SDU Candidate page (see Figure 76) has a Max. SDU [bytes] field that can be defined for each of the 8 queues per port. Use this page to edit to the SDU byte sizes, by changing the

EVAL-ADIN6310
values. Click the Save button and then click the Commit button to load the new values. To return to the previously used parameters, click the Discard button. When using Scheduled traffic with guard bands enabled, the guard band calculation uses the Max. SDU value to determine the duration of guard band to implement. Note that Queue Max. SDU limits only apply to traffic forwarding in Store and Forward mode. When the Switch is cutting frames through, the frame has already started to egress before the frame size is known. Similar to the other pages, there are Candidate, Running, and Startup views.

Figure 76. Scheduled Traffic Queue Max. SDU Candidate Page

analog.com

Rev. 0 | 60 of 127

User Guide
SCHEDULED TRAFFIC

EVAL-ADIN6310

Figure 77. Scheduled Traffic Queue Max. SDU Running Page

analog.com

Figure 78. Scheduled Traffic Queue Max. SDU Startup Page

Rev. 0 | 61 of 127

SCHEDULED TRAFFIC

As shown in Figure 25 or Figure 26, click the Scheduled Traffic Schedule menu item on the Home page or in the menu on the left of the page to access the Scheduled Traffic Schedule pages. The first page that is navigated to is the Scheduled Traffic Candidate page. The Scheduled Traffic Candidate page provides a means to set the gate open events for each of the queues to support 802.1Qbv Scheduled Traffic. Schedules can be configured on a per port basis. Figure 79 shows the controls for Port 0 only. SCHEDULE ENABLED To enable a Schedule, select the Schedule Enabled check box. Clear to disable scheduled traffic on this port. Note that any schedule must be saved and committed to load it to the device.

EVAL-ADIN6310
first cycle, with a frame size too large to complete before the second cycle is due to begin, this results in a delayed start of the second cycle. The impact of this is that potentially lower priority traffic can be infringing on the start of time critical time slice, meaning real-time frames delays, which impact the application requirements.
Scheduled traffic can use guard bands in front of every time slice that carries time critical traffic. During the guard band duration, no new Ethernet transmissions can be started, only ongoing transmissions can complete. The duration of the guard band is sized for as long as it takes the maximum frame size to safely transmit.
When the Guard Band Gate Event check box is enabled, the Switch automatically inserts a guard band between the step that has the gate open for a traffic class and the step that has the gate closed. The length of the guard band is the product of the QueueMaxSDU value of the queue associated with the gate and the current link speed. The guard band time value is subtracted from the gate close time. This ensures that the start of the time slots do not get delayed.
As the different queues can have different QueueMaxSDU values, the guard bands for the different queues are calculated accordingly, as shown in Figure 82.
Different QueueMaxSDU values do consume entries in the internal Gate control list. In the event the automatic guard band insertion fails, the driver package reports a return error. Exotic schedules with many different time slots and different QueueMaxSDU values can result in failure of guard bands to be inserted, but the GUI prompts in this event and user can review their schedule and revise accordingly.

Figure 79. Scheduled Traffic Page (Showing Port 0 Only)
GUARD BANDS
As shown in Figure 79, two check boxes (Guard Band Gate Event and Guard Band Hold Event) are associated with Guard band capability. The Switch supports automatic insertion of guard bands when these check boxes are enabled.
Guard bands are used with scheduled traffic to protect transmission of the schedule gate open times. Consider the scenario shown in Figure 80 where no guard bands are used. An Ethernet port that has started transmission of a frame must complete transmitting that frame before another transmission can start. Consider a scenario where a new frame transmission starts just before the end of the
analog.com

Figure 80. Scheduled Traffic Affect of No Guard Band Figure 81. Scheduled Traffic with Guard Band Rev. 0 | 62 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE
Figure 82. Scheduled Traffic with Different Max. SDUs per Queue
When using the evaluation package and PC based web server, the QueueMaxSDU values are set to 1536 bytes per queue per port. With a 1 Gbps link speed, this corresponds to 12.29 s guard band. The Switch hardware defaults to QueueMaxSDU setting of 10,000 bytes, therefore, when interfacing directly to the driver from own stack processor, configure the QueueMaxSDU values as required to avoid having excessive guard bands. The second Guard band check box, Guard Band Hold Event is only relevant where Scheduled traffic and Frame preemption co-exist and the Hold En check box in the gate control list is enabled. When Guard Band Hold Event is enabled, a guard band of hold advance length is inserted between the step that has the Hold_En signal asserted and the previous step and the release advance length is inserted between the steps where the Hold_En signal transitions from asserted to deasserted. The value of hold advance can be seen in the Frame Preemption Status page and vary depending on the speed of the link established.

Figure 83. Guard Band Hold Event Hold Advance and Release Advance

Table 13. Hold Advance, Release Advance (1 Gbps)

Fragment Size Hold Advance (ns)

Release Advance

1128

128

1640

192

2152

256

2664

analog.com

EVAL-ADIN6310

Table 14. Hold Advance, Release Advance (100 Mbps)

Fragment Size Hold Advance (ns)

Release Advance

10560

160

128

15680

160

192

20800

160

256

25920

160

In all cases, for guard bands to be successfully inserted, the Port link must be up, as the speed of the established link is part of the calculation to determine the guard band duration required.

Note that the guard bands do rely on the Switch operating in Store and Forward mode. When the Switch cuts through traffic, frames egress an empty port before the frame size is known, therefore a frame larger than the Max. SDU setting can egress and the start of a time slot can be delayed in this scenario.

When a schedule has been saved and committed, confirm that the schedule is accepted by viewing the Running page. If the Running page does not show what is loaded, then there is an issue with the loaded schedule.

CYCLE TIME

The next controls available in Figure 79 are related to the Cycle Time for scheduled traffic. The first check box is the Cycle Time Numerator, the second is the Cycle Time Denominator expressed in seconds. The ratio of the cycle time numerator and denominator must be an integer multiple of 1 ns. Values that do not result in integer multiples of 1 ns are not loaded to the device, with the schedule being rejected. If an invalid cycle time is entered, when a user clicks the Save button, followed by the Commit button, if the schedule is not accepted, the Running page is not updated. The default values in the web page of 1/1000 results in a cycle time of 1 ms.

BASE TIME

The Base Time value is the absolute time at which a new schedule is required to take effect. A new schedule takes effect at the programmed base time. If the base time is in the past, then the Switch takes the base time for the new schedule and projects forward based on the new schedule cycle times to get past the current time and apply the new schedule at the next new cycle boundary.

CYCLE TIME EXTENSION

The Cycle Time Extension value defines the maximum amount of time by which the old cycle for the port is permitted to be extended when Switching to a new schedule. When changing from an old schedule to a new schedule, without cycle time extension, the new cycle can result in a partial or runt cycle of the old schedule directly before the transition to the new cycle, as shown in Figure 84.

Using the Cycle Time Extension ensures a more seamless transition between schedules. Now instead of a partial old schedule, the last valid cycle is extended with the old schedule gate states being

Rev. 0 | 63 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE retained until the new schedule is implemented at the programmed base time, thereby, bridging the Switchover between the two schedules, as shown in Figure 85.
Figure 84. Schedule Switchover with no Cycle Time Extension Setting

EVAL-ADIN6310

Figure 85. Schedule Switchover with Cycle Time Extension Setting
GATE STATES WHEN DISABLED
These check boxes only apply to the gates after a schedule has been disabled.
CUT-THROUGH ALLOWED
The Switch operates in cut-through mode by default. To configure queues per port to Store and Forward mode, clear the corresponding check box, click Save button followed by Commit button. This functionality does not require a valid schedule to be running. Note that guard bands do rely on the Switch operating in Store and Forward mode. When the Switch cuts-through traffic, frames egress an empty port before the frame size is known, therefore, a frame larger than the Max. SDU setting can egress and the start of a time slot can be delayed in this scenario.
GATE CONTROL LIST, TIME INTERVALS
The Switch supports a gate control list of 32 entries per port through the driver. By default, the web page displays 8 entries, but it is possible to extend this to 32 entries per port. When the last time interval has a value entered into the Interval [ns] field, the web page automatically increases the number of entries displayed. The last entry always needs to be 0 ns.

Figure 86. Adding Additional GCL Entries
Next to the time interval entries are Gate State check boxes for each of the 8 queues. The gate state corresponds to Queue number, with lowest priority on the right. When a box is selected, the gate for that queue is open from the completion of the last time slot for the duration specified in the entry field. If a check box is not selected the gate, for that queue is closed for that duration. Up to 8 entries (Entry 0 to 7) can be entered for the queues by default, the web server allows additional fields to be added. These entries make up a queue’s Gate Control List. The entries are relative, meaning they are additive from the previous entry. Entry 0 is from Time = 0, so entering a value of 100000 ns means the gate control value for the first entry is from 0 s to 100 s. Entering 100000 ns in Entry 1 means that gate control value starts at 100000 ns with 100000 ns duration, so finish at 200000 ns or 200 s.
For queues that are checked for Entry 0, their gate opens at the start of the cycle. For queues that are checked for Entry 1, their gate opens at 100 s. For any entry where a queue is not checked, those queues have their gates closed at that entry duration. For example, if Q0, Q1, Q2, and Q3 are all checked and 100000 ns is entered at Entry 0, all 4 queues open at 0 s. The Entry 1 Gate States become active at 100 s. Then, if Q0 and Q1 are checked, Q2 and Q3 are unchecked, and 100000 ns is entered at Entry 1, Q0 and Q1 continue to have their gates open for another 100 s and Q2 and Q3 have their gates closed. And at Entry 2 closes the

analog.com

Rev. 0 | 64 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE
gates for Q0 and Q1 if their queues are not checked. This is shown in Figure 87. Note that gPTP and LLDP messages use Queue7 by default, therefore Gate 7 must always be open for some duration of the cycle.

EVAL-ADIN6310

Figure 87. Simplified Schedule
Schedules with time entry intervals in excess of the programmed cycle time are accepted, but the duration and gate states in excess of the cycle time are ignored.
HOLD EN
There is an additional check box shown adjacent to the Gate State. This check box provides the ability to enable Hold EN for each entry. This feature can be enabled when Scheduled traffic and frame preemption are used in combination. When Hold EN is enabled for a time slot, no preemptable traffic is allowed to start egressing the port in that window.

Figure 88. Hold EN Control
CANDIDATE PAGE
The default page is the Candidate tab, see Figure 89, where user can configure the schedule for each port individually. It is also possible to configure a schedule for the hardware Timer pins. Once the user has a new set of values for the Candidate configuration, click the Save button, followed by Commit button to send the Candidate configuration entries to the Running configuration. Click Discard button to revert the Candidate configuration back to current Running configuration.
When committing the Candidate configuration to the Running configuration, the current Running configuration saves to a running backup configuration before the Candidate configuration saves to the Running configuration. The purpose of this save to the running backup configuration is to allow the user to undo the Commit action in the event that the committed Candidate configuration results in a catastrophic effect on the TSN operation.

analog.com

Rev. 0 | 65 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE

EVAL-ADIN6310

Figure 89. Scheduled Traffic Candidate Page

analog.com

Rev. 0 | 66 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE
RUNNING PAGE Click Running to display the Running configuration, as shown in Figure 90. The fields on this page cannot be edited. Return to the Candidate configuration to change configuration.

EVAL-ADIN6310

Figure 90. Scheduled Traffic Running Page

analog.com

Rev. 0 | 67 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE
STARTUP PAGE The Startup page displays the Startup configuration, see Figure 91. These parameters are displayed to verify the values of the Startup configuration only.

EVAL-ADIN6310

Figure 91. Scheduled Traffic Startup Page

analog.com

Rev. 0 | 68 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE
SCHEDULE ON THE TIMER PINS The Switch has four hardware Timer pins. A schedule can be created on all four pins. The functionality of the timer pins can be configured in the GPIO and Timer Configuration page. By default, Timer0 and Timer1 are configured to allow a schedule be created, while Timer2 is configured to provide a 1PPS signal and is shown greyed out in this page, Timer3 defaults as a Capture input. To apply a TSN schedule on Timer2 or Timer3, first change the configuration in the GPIO and Timer Configuration page. In the examples below, two different schedules have been applied to the two devices for the Timer0, Timer1, and Timer3 pins. Figure 92 and Figure 93 show the two different scheduled for two sets of ADIN6310 Timers pins. For Switch 1 timers, the Cycle time is 1 ms and there are four time slots. Each Timer is enabled for a window of 200 s, starting with Timer0, followed by Timer1, then Timer3. The remaining time of the 1 ms cycle time, all timers are in the Off state. Figure 94 and Table 15 show visually how the schedule looks in terms of time. For the second devices, Switch 2, the Cycle time is still 1 ms and there are eight time slots with a binary pattern enabled for a slot duration of 100 s, using 700 s of the cycle time. The remaining time of the 1 ms cycle time, all timers are in the Off state. Table 16 shows visually how the schedule looks in terms of time and Figure 95 shows a capture of the scheduled activity on the Timer pins for both devices using a logic analyzer.
Figure 92. Configured Schedule for Switch 1 Timers

EVAL-ADIN6310

Figure 93. Configured Schedule for Switch 2 Timers

Figure 94. Schedule for Switch 1 Timer Pins

Table 15. Switch 1 Schedule (1 ms Cycle Time)

Start time

Entry (s)

End Time (s) Timer3

200

400

600

Remainder 0

Timer1
0 1 0 0

Timer0
1 0 0 0

Table 16. Switch 2 Schedule (1 ms Cycle Time)

Start time

Entry (s)

End Time (s) Timer3

100

200

300

400

500

600

700

Remainder 0

Timer1
0 1 1 0 0 1 1 0

Timer0
1 0 1 0 1 0 1 0

analog.com

Rev. 0 | 69 of 127

User Guide
SCHEDULED TRAFFIC SCHEDULE

EVAL-ADIN6310

Figure 95. Logical Analyzer View of a Schedule on the Hardware Timer Pins

analog.com

Rev. 0 | 70 of 127

LLDP CONFIGURATION

LINK LAYER DISCOVERY PROTOCOL (LLDP)
LLDP is a protocol devices use to advertise information about their capabilities between peers. The configuration exposed in the web server is limited to basic configuration and visibility into statistics. Additional capability is exposed in the TSN driver library APIs, for more details, refer to the ADIN6310 Hardware Reference Manual.
LLDP CANDIDATE VIEW
The LLDP stack runs on the Packet Assist engine of the Switch and is enabled during initial configuration of the device from the GUI application when using TSN functionality or HSR functionality (not currently enabled with PRP operation). The default configuration is shown in the Candidate page in Figure 96. Configure the required changes, click the Save button followed by Commit button to load changes to the Switch. The admin configuration included in the web server are as follows:
Admin status: Choice of Tx and Rx, Tx only, Rx only, or disabled.
Message Fast Tx: Time intervals (in ticks) between transmissions during fast transmission periods. Default is 1, range of 1 to 3600. Fast transmission periods are initiated when a new neighbor is detected and results in LLDP packets to be transmitted on a shorter time interval than the normal message Tx interval.
Message Tx Hold Multiplier: Used as a multiplier of msgTxInterval to determine the value of txTTL (Time to Live), txTTL =

EVAL-ADIN6310
((Message Tx Interval X Message Tx Hold) + 1). Default is 4, intended range is 1 to 100, but web page currently limits field to 2 to 10, this needs to be addressed in future release. Message Tx Interval: Time interval in ticks between transmission during normal transmission periods. Default is 30, range of 1 to 3600. Reinit Delay: Amount of delay from when Admin Status becomes disabled until reinitialization is attempted. Default value is 2 seconds. Tx Credit Max: TxCredit is the number of consecutive LLDPDUs that can be transmitted at any time. The parameter is the maximum value of txCredit. Default is 5, range of 1 to 10. Tx Fast Init: Used as the initial value for txFast. Default is 4, range of 1 to 8. Number of peer supported: Per port number of peers supported. Enable end of LLDPDU TLV: Enable or disable end of LLDPDU TLV in Tx LLDP frames, which marks the end of the LLDPDU frame. Override MAC address: The default MAC address for the LLDP stack is derived from the Port MAC address. Overriding the MAC address changes the source MAC address, PortID and/or ChassisID in the LLDP frames egressing from the given port.

analog.com

Figure 96. LLDP Candidate Page

Rev. 0 | 71 of 127

User Guide
LLDP CONFIGURATION

EVAL-ADIN6310

Figure 97. LLDP Running Page

analog.com

Figure 98. LLDP Startup Page

Rev. 0 | 72 of 127

User Guide
LLDP CONFIGURATION LLDP STATUS The Status view shows an overview of the Remote, Local, and Port based statistics for the LLDP feature. This includes a capture of the

EVAL-ADIN6310
LLDP frames transmitted and received and additional information related to error scenarios, ageouts, inserts, and deletes.

Figure 99. LLDP Status Page

analog.com

Rev. 0 | 73 of 127

User Guide
LLDP CONFIGURATION
LLDP EXAMPLE
Figure 100 shows a Wireshark capture of the LLDP messages exchanged between two ADIN6310 devices (Switch 1 – Port 3 to Switch 2 – Port 0). The messages are targeted at the LLDP multicast address 01:80:c2:00:00:0e, and originate with a source MAC of the Switch Port MAC address. The LLDP protocol message contents can be observed in the capture, with information describ-

EVAL-ADIN6310
ing the Chassis Subtype, Port Subtype, Time to live ((message Tx Hold x message Tx Interval ) + 1 = (4 × 30) + 1 = 121 ), and additional Ethernet capabilities. The Switch uses LLDP to exchange capability for Frame Preemption with its peer. The LLDP messages can be observed every 30 seconds (Message Tx Interval).

Figure 100. Wireshark Capture of LLDP Frames between Two ADIN6310 Devices (Default Configuration)

analog.com

Rev. 0 | 74 of 127

User Guide
LLDP CONFIGURATION
LLDP EXAMPLE (FAST TX)
Fast transmission periods are initiated when a new neighbor is detected and results in LLDP packets to be transmitted on a shorter time interval than the normal message Tx interval. The default setting for Message Fast Tx is 1 second. As shown in Figure 101, LLDP is disabled on Port 3 after time 12 seconds and then

EVAL-ADIN6310
reenabled after approx 73 seconds. At that time, both SES 1 and SES 2 start transmitting fast Tx messages at a 1 second interval before returning to the normal Tx interval of 30 seconds. They each send 5 LLDP messages as the default value of the Maximum Tx Credit parameter is set to 5.

Figure 101. Wireshark Capture of LLDP Frames between Two ADIN6310 Devices when LLDP is Reenabled on Switch 1

analog.com

Rev. 0 | 75 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)
The Switch hardware supports PRP per IEC62439-3 (2021 ed4) standard. The capability exposed in the Switch is ability to support one instance of a doubly attached node obeying PRP (DANP) or Redundancy Box (Redbox) function configured over either an SPI or Ethernet connected Host (web server only supports configuration over Ethernet Host). The Host configures the Switch for the PRP function, defining which ports are PRP network ports, sets the link redundancy entity (LRE) MAC address and enables the PRP function.
The Switch hardware takes care of duplicating the outgoing traffic onto LAN A/B and inserting the RCT tag to the end of the frame. On reception of PRP traffic, the Switch consumes the first frame, removes the tag, and discards duplicates. The Switch generates supervision frames, which are sent out on the LAN A/B ports and maintain a nodes table of other PRP DANP, Redbox, and SAN entities in the network. PRP supervisory frames are generated periodically with or without VLAN tag every 2 seconds. The device maintains a nodes table, recording the last time a frame is received from a node. Node entries are removed from the table if no frames are received for over 60 seconds. The node table can support 1024 entries max. The Switch supports operation of one instance of PRP on the 6-port ADIN6310 Switch, multiple instances of PRP running on the 6-port device is not supported.

EVAL-ADIN6310
The Switch PRP functionality can be configured to support:
PRP operation as a DANP or PRP Redbox. PRP configured over Ethernet or SPI Host.
Enabling PTP or LLDP functionality with PRP is not currently supported, future software updates include this capability. Using TSN features such as Scheduled Traffic, Frame Preemption, Per Stream Filtering, and Policing or Frame Replication and Elimination for Reliability with PRP is not supported.
Figure 102 shows a simple configuration of the Switch with Ethernet Host (Port C) configured as a DANP and connected over a PRP network (LAN A/B) to another PRP capable Switch. The duplicate network, LAN A/B, provides the redundant path ensuring seamless redundancy. Three Ethernet ports are used in a PRP DANP device, Port A, Port B are network facing ports, while Port C is connected to the Host/End node over Ethernet interface and is used for control plane configuration of the Switch and PRP data plane traffic to that node. PRP Port C can also be connected over SPI interface.

Figure 102. Example of Switch Configuration as PRP-DANP (Host Connected over Ethernet)

analog.com

Rev. 0 | 76 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)
ENABLING PRP EXAMPLE To enable PRP, pass an XML file that includes PRP configuration to the ses-configuration.txt file as PRP needs to be enabled as part of the initial configuration. The XML file must include all relevant PRP configuration, how PRP is configured, which ports are PRP Port A, Port B, and Port C for DANP configuration and interlink ports if configuring the device for PRPRedbox. The LRE MAC address must be the Host MAC address (or if connected over Ethernet to a PC Network adapter, it must be the MAC of the NIC). In the configuration shown in Figure 103, Port 0, Port 1, and Port 2 are the LRE Port C, Port A, Port B, and Port 3 to Port 5 are configured as Interlink ports. For details on the XML configuration for PRP, see the PRP Specific Configuration section.
Figure 103. PRP Configuration as a Redbox
After the configuration file has been edited for the relevant PRP configuration, launch the GUI, click the Find and Configure to search for a connected Switch. Once the Switch has been configured and the GUI LED turns green, the web server can be opened. When using PRP functionality, the web server shows the features supported with PRP, which is a reduced feature vs. when operating in TSN mode, see Figure 104.

EVAL-ADIN6310
PRP CONFIGURATION WEB PAGE VIEWS
PRP Candidate View
The default PRP configuration is based on the XML configuration as discussed in the ses-configuration File section. There are additionally some run-time configurable parameters for PRP, as shown in the Candidate view, see Figure 105. To change the PRP configuration during operation, make the required changes, click the Save button followed by Commit button to load them to the device. The configuration included are as follows:
Redundancy Device: Shows the type of redundancy device configured as per the XML file. Choice of PRP DANP or PRP Redbox.
Duplicate mode: The Switch receiving hardware can detect duplicates based on information in the RCT tag in the frame. When Duplicate Discard mode is enabled, it only forwards the first frame of a pair to the upper layers. Duplicate Accept is typically only used for testing purposes and allows the Switch to forward both duplicate frames to upper layers. The default mode is for Duplicate Discard. In the event a frame is received with the wrong LANID (ID 0xA on Port B or ID 0xB on port A), the Switch performs a Duplicate Discard and strip off the PRP RCT trailer, this applies to DANP and PRP Redbox use cases.
Port-A Admin State: Shows if the port is active or not, choice of On or Off, default is On.
LRE MAC Address: Shows the LRE MAC address as configured through the XML file.
Max Reside Time: Sets the maximum time an entry may reside in the duplicate list. The default is 10 ms (15 s × 625). The range of possible values is 15 s to 400 ms (corresponding to 0 to 26214).
Evaluate Supervision: By default, the Switch evaluates supervision frames in the network and add nodes to its nodes table. This can be disabled by clearing the check box.
Transparent Reception: By default, the Switch removes the RCT tag from the frame before it passes it to upper layers. Select Pass to leave the PRP RCT tag in the frame.
Supervision VLAN ID (0-4095): By default the supervision frames are sent untagged (VLAN 4095). To send supervision frames with a VLAN tag, enter a valid VLAN ID in this field.

Figure 104. Web Page when PRP Function is Enabled

analog.com

Rev. 0 | 77 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)

EVAL-ADIN6310

Figure 105. PRP Candidate Page
PRP Running View PRP Running page shows the configuration loaded to the device. No changes can be made in the Running page. See Figure 106.

Figure 106. PRP Running Page

analog.com

Rev. 0 | 78 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP) PRP Startup View PRP Startup page shows the Startup configuration. See Figure 107.

EVAL-ADIN6310

Figure 107. PRP Startup Page

PRP STATUS PAGE
The Status page shows the LRE Statistics and the Node Table Statistics. See Figure 108.
The LRE Statistics section shows the traffic statistics and error counters associated with each PRP LAN that have been observed by the Switch in addition to showing how many nodes are in the network. The configuration included are as follows:
Rx Count: Shows the number of frames received by Port A or Port B that have PRP RCT trailers added.
Tx Count: Shows the number of frames transmitted by Port A or Port B that have PRP RCT trailers added.
Error Count: Shows the number of frames with errors received on the LRE Port A or Port B.

Wrong LAN error count: Shows the number of frames with the wrong LAN identifier received on LRE Port A or Port B.
Duplicate Count: Shows the number of entries in the duplicate detection mechanism on Port A or Port B for which one single duplicate is received.
Multi Count: Shows the number of entries in the duplicate detection mechanism on Port A or Port B for which more than one duplicate is received.
Unique Count: Shows the number of entries in the duplicate detection mechanism on Port A or Port B for which no duplicate is received.
Node Count: Returns the number of nodes detected in the system.

analog.com

Rev. 0 | 79 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)

EVAL-ADIN6310

Figure 108. PRP Status Page

Node Table Statistics
The Node Table Statistics shows the MAC addresses of other PRP devices in the network. The nodes table is built up of entries based on Supervision frames received by the Switch from other PRP devices. The nodes table can hold 1024 entries. The Switch also reports the time (in TimeTicks 1/100 seconds) a node is last seen on either Port A or Port B and what type of device it is. The Host can access this information to understand what is happening and whether there are any issues in the network. The nodes table refreshes every 60 seconds, therefore, node entries remove from the table if traffic from that address is no longer seen.

Proxy Node Table
The Proxy Node Table captures information when the Switch is configured as a PRP Redbox. A Switch Proxy Node Table shows the LRE MAC addresses of the detected SAN devices connected to its Interlink ports. The Proxy Node Table can support up to 8 entries. The entries are learned based on the traffic coming into the interlink port. The table refreshes every 60 seconds, therefore, node entries remove from the table if traffic from that address is no longer seen.

analog.com

Rev. 0 | 80 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)
PRP – SUPERVISION FRAMES The Wireshark capture shown in Figure 109 is a supervision frame generated by the Switch and transmitted on Port B (LAN B). By default, supervisory frames are transmitted at a 2 second interval and without VLAN tags. The Switch sends a supervisory frame for

EVAL-ADIN6310
its LRE MAC address and on behalf of any proxy nodes connected to its interlink ports if configured as a Redbox. Supervisory frames are sent out to the PRP network, therefore, only visible on Port A and Port B. The PRP RCT tag has a suffix 0x88fb and the tag can be seen at the end of the frame.

Figure 109. Wireshark Capture of Supervision Frames in LAN B

analog.com

Rev. 0 | 81 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)
PRP CAPTURE OF PRP TAGGED TRAFFIC The Wireshark capture shown in Figure 110 is traffic sent into Port C of the Switch and observed on Port B of the PRP network. The

EVAL-ADIN6310
PRP RCT tag can be seen at the end of the frame, with LAN information, SDU size, and Sequence number.

Figure 110. Wireshark Capture of PRP Tagged Frames in LAN B

analog.com

Rev. 0 | 82 of 127

User Guide
PARALLEL REDUNDANCY PROTOCOL (PRP)
GPIO/TIMER CONFIGURATION TAB WHEN USING PRP MODE
In the GPIO/Timer page, the options to configure the Timers as TSN/periodic output are shown as available, but not intended for use when the device is configured for PRP mode.
VLAN TABLE OPERATION IN PRP MODE
The web server does not expose the VLAN configuration pages that are included with the TSN functionality (VLAN table operation, prioritization, and remapping). The default VLAN table behavior is for forwarding on VLAN ID 0x0 and 0xFFF. VLAN configuration can be performed when using the TSN Driver Library, for more details, refer to the ADIN6310 Hardware Reference Manual.
SWITCHING TABLE IN PRP MODE
Dynamic Table, Learning Operation
Normal learning is disabled when in PRP mode.
Static Table Entries
Entries can be placed into the static table in the usual way and used to direct traffic from the DANP/End Node Host to a SAN on one of the LANs. For the ADIN6310, static entries can be used to route traffic from the Host to ports not involved in PRP network or from the other ports to SANs on the network, as shown in Figure 111 and Figure 112. This traffic is not duplicated, and do not have PRP RCT tags added and only egress on the port(s) defined by the installed table entry.
By default, broadcast entries do not forward in the PRP device, therefore, user needs to install a broadcast entry in the Switching table to support broadcast frames crossing from Port C to Port A/Port B. This is required to ping across a PRP device.

EVAL-ADIN6310
Figure 112. Host Routing to SAN Device on One of the LANs or to Another Port
Extended Table Entries In PRP mode, extended table is available and entries can be installed similar to the static table.

Figure 111. Host Routing to SAN on One of the LANs

analog.com

Rev. 0 | 83 of 127

User Guide

EVAL-ADIN6310

HIGH AVAILABILITY SEAMLESS REDUNDANCY (HSR)

HSR is a ring protocol that provides seamless fail-over in event of a single failure in the network. The Switch supports being configured as a doubly attached node obeying HSR (DANH) or HSR Redundancy box (Redbox). Following initial device configuration, the Host configures the Switch for the required HSR function. In the case of a DANH, Port A/Port B/Port C are defined. In the case of a RedBox, Port A/Port B/Port C are defined as well as any other Interlink ports used to bridge singly attached node (SAN) devices to the HSR ring. The Host sets the link redundancy entity (LRE) MAC address (same as Host MAC address) and enables the HSR function.
Once configured for the HSR mode, the Switch hardware takes care of HSR functionality, duplicating the outgoing traffic onto each of its ring ports with the HSR tag inserted into the frame. On receipt of HSR frames from the ring, the receiving device consumes the first frame, removes the tag on reception and discards duplicates. The Switch generates supervisory frames and maintains a nodes table that lists other HSR entities in the network based on the supervision frames it received from the ring ports. The HSR supervisory frames are generated periodically with or without VLAN tag every 2 seconds. The hardware records the last time a frame is received from a node, refreshing the nodes table. Each device in the HSR ring maintains its own nodes table. Node entries are removed from the table based on the NodeForgetTime default of 1 minute. The node table is currently capable of supporting up to 1024 entries. The nodes table records entries for DANH, RedBox, and VDAN devices connected to the ring, based on the supervision frames circulating the ring.
When operating as a RedBox, the Switch maintains a Proxy Node Table in addition to the Nodes table. The Proxy Node Table is a list of the detected SANs that are connected to the RedBox and the last time they are seen. The Proxy Node Table learns the SAN/VDAN MAC based on ingressing traffic on ports configured as Interlink ports. Like the nodes table, the Proxy Node Table keeps its table refreshed based on incoming frames and ages out entries after 60 seconds. The maximum size of the Proxy Node Table for HSR Redbox is 8. The Switch supports operation of one instance of HSR on the 6-port ADIN6310 Switch, multiple instances of HSR running on the 6-port device is not supported.
The Switch HSR functionality can be configured to support:
HSR as DANH
HSR as RedBoxSAN
HSR with LLDP and VLAN Table
Enabling PTP functionality with HSR is not currently supported, future software updates include this capability. Using TSN features such as Scheduled Traf

Documents / Resources

ANALOG DEVICES ADIN6310 Hardware and TSN Switch Evaluation [pdf] User Guide
EVAL-ADIN6310EBZ, ADIN6310, ADIN6310 Hardware and TSN Switch Evaluation, ADIN6310, Hardware and TSN Switch Evaluation, TSN Switch Evaluation, Switch Evaluation

References

User Manual

ANALOG DEVICES ADIN6310 Hardware and TSN Switch Evaluation

Product Information

Product Usage Instructions

FAQ

EVALUATION BOARD HARDWARE

JUMPER AND SWITCH OPTIONS

GPIO AND TIMER HEADERS

STRAPPING AND CONFIGURATION

ADIN1300 PHY Addressing

SOFTWARE INSTALLATION

TSN SWITCH EVALUATION WEB PAGE OVERVIEW

SETUP PAGE

PORT CONFIGURATION

GPIO AND TIMER CONFIGURATION

VLAN CONTROL

TIME SYNCHRONIZATION

FRAME PREEMPTION

SCHEDULED TRAFFIC

LLDP CONFIGURATION

Documents / Resources

References

Leave a comment

Cancel reply