MICROCHIP Core16550 Universal Asynchronous Receiver Transmitter
Taw qhia
Core16550 yog tus qauv Universal Asynchronous Receiver-Transmitter (UART) uas ua kom cov software sib xws nrog cov khoom siv dav siv 16550. Nws ua haujlwm serial-rau-sib piv cov ntaub ntawv hloov dua siab tshiab rau cov khoom siv los ntawm modems lossis lwm yam khoom siv serial thiab ua rau cov ntaub ntawv sib txuas-rau-serial hloov dua siab tshiab rau cov ntaub ntawv xa los ntawm CPU rau cov khoom siv no.
Thaum kis tau tus mob, cov ntaub ntawv raug sau ua ke mus rau hauv UART's transmit First-In, First-Out (FIFO) tsis. Cov ntaub ntawv yog serialized rau cov zis. Thaum tau txais, UART hloov cov ntaub ntawv serial nkag mus rau hauv qhov sib npaug thiab ua kom yooj yim nkag mus rau lub processor.
Ib daim ntawv thov raug cai ntawm 16550 UART yog qhia hauv daim duab hauv qab no.
Daim duab 1. Hom 16550 Daim Ntawv Thov
Table 1. Core16550 Summary
Cov yam ntxwv tseem ceeb
Hauv qab no yog cov yam ntxwv tseem ceeb ntawm Core16550:
- Transmitter thiab receiver yog txhua tus buffered nrog upto 16-byte FIFOs kom txo tau tus naj npawb ntawm interrupts qhia rau CPU.
- Ntxiv lossis strips tus qauv asynchronous kev sib txuas lus (Pib, Nres thiab Parity).
- Independently tswj kev xa tawm, txais, kab xwm txheej thiab cov ntaub ntawv teeb tsa cuam tshuam
- Programmable baud generator
- Modem tswj kev ua haujlwm (CTSn, RTSn, DSRn, DTRn, RIn thiab DCDn).
- Advanced Peripheral Bus (APB) register interface
Nthuav Nta
High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) kev txhawb nqa yuav raug txiav tawm ntawm qhov version no.
Core16550 Hloov Cov Ntaub Ntawv Teev Npe
Tshooj lus no muab cov lus qhia dav davview ntawm cov yam ntxwv tshiab tau koom ua ke, pib nrog kev tso tawm tsis ntev los no.
| Version | Dab tsi tshiab |
| Core16550 v3.4 | Core16550 siv qhov system verilog lo lus tseem ceeb "so" raws li sau npe npe uas ua rau muaj teeb meem yuam kev syntax. Lo lus tseem ceeb yog hloov nrog lwm lub npe los daws qhov teeb meem no.
Ntxiv PolarFire® kev txhawb nqa tsev neeg |
| Core16550 v3.3 | Ntxiv Radiation-tolerant FPGA (RTG4™) tsev neeg txhawb nqa |
- Functional Block Description (Nug ib lo lus nug)
Tshooj lus no muab cov lus piav qhia luv luv rau txhua lub hauv paus ntawm daim duab thaiv sab hauv raws li pom hauv daim duab hauv qab no.
Daim duab 1-1. Core16550 Block Diagram
Cov ntsiab lus ntawm Internal Block Diagram (Nug ib lo lus nug)
Cov ntu hauv qab no muab cov ntaub ntawv hais txog cov ntsiab lus ntawm cov duab thaiv sab hauv.
- RWControl (Nug ib lo lus nug)
RWControl thaiv yog lub luag haujlwm los tuav cov kev sib txuas lus nrog tus processor (parallel) sab ntawm lub kaw lus. Tag nrho cov kev sau ntawv thiab nyeem ntawm Internal registers yog ua tiav los ntawm qhov thaiv no. - UART_Reg (Nug ib lo lus nug)
UART_Reg thaiv tuav tag nrho cov cuab yeej Internal registers. - RXBlock (Nug ib lo lus nug)
Qhov no yog lub receiver thaiv. RXBlock tau txais cov lus serial tuaj. Nws yog programmable kom paub cov ntaub ntawv dav, xws li 5, 6, 7 lossis 8 khoom; ntau qhov chaw sib xws, xws li txawm, khib lossis tsis sib xws; thiab sib txawv nres cov khoom, xws li 1, 1½ thiab 2 khoom. RXBlock tshuaj xyuas qhov ua yuam kev hauv cov ntaub ntawv nkag, xws li overrun yuam kev, thav duab yuam kev, parity yuam kev thiab tawg yuam kev. Yog hais tias cov lus tuaj tsis muaj teeb meem, nws muab tso rau hauv tus txais FIFO. - Interrupt Control (Nug ib lo lus nug)
Kev cuam tshuam kev thaiv thaiv xa cov teeb liab cuam tshuam rov qab mus rau lub processor, nyob ntawm lub xeev ntawm FIFO thiab nws tau txais thiab xa cov ntaub ntawv. Daim ntawv teev npe cuam tshuam cuam tshuam muab cov theem ntawm kev cuam tshuam. Kev cuam tshuam raug xa mus rau qhov khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob khoob - Baud Rate Generator (Nug ib lo lus nug)
Qhov thaiv no siv lub tswv yim PCLK thiab faib nws los ntawm tus nqi programmed (los ntawm 1 txog 216 - 1). Qhov tshwm sim yog muab faib los ntawm 16 los tsim lub moos kis tau tus mob (BAUDOUT). - TXBlock (Nug ib lo lus nug)
Lub Transmit thaiv tswj kev sib kis ntawm cov ntaub ntawv sau rau Transmit FIFO. Nws ntxiv qhov yuav tsum tau pib, Parity thiab Nres cov khoom rau cov ntaub ntawv raug xa mus kom cov khoom tau txais tuaj yeem ua qhov yuam kev tuav thiab tau txais.
Software Interface (Nug ib lo lus nug)
Core16550 sau npe cov ntsiab lus thiab chaw nyob daim ntawv qhia tau piav qhia hauv ntu no. Cov lus hauv qab no qhia txog kev sau npe ntawm Core16550.
| PADDR [4:0]
(chaw nyob) |
Divisor Latch Access Bit1
(DLAB) |
Lub npe | Cim | Default (rov pib dua) Tus nqi | Tsis muaj Bits | Nyeem/Sau |
| 00 | 0 | Txais Cov Npe Tsis Muaj Npe | RBR | XX | 8 | R |
| 00 | 0 | Transmitter Holding Register | THR | XX | 8 | W |
| 00 | 1 | Divisor Latch (LSB) | DLR | 01h ib | 8 | R/W |
| 04 | 1 | Divisor Latch (MSB) | DMR | 00h ib | 8 | R/W |
| 04 | 0 | Interrupt Enable Register | IER | 00h ib | 8 | R/W |
| 08 | X | Interrupt Identification Register | IIR | c1 ua | 8 | R |
| 08 | X | FIFO Control Register | FCR | 01h ib | 8 | W |
| 0C | X | Kab Control Sau Npe | LCR | 00h ib | 8 | R/W |
| 10 | X | Modem Control Register | MCR | 00h ib | 8 | R/W |
| 14 | X | Kab xwm txheej sau npe | LSR | 60h ib | 8 | R |
| 18 | X | Modem Status Register | MSR | 00h ib | 8 | R |
| 1C | X | Kos npe | SR | 00h ib | 8 | R/W |
Tseem ceeb
DLAB yog MSB ntawm Line Control Register (LCR ntsis 7).
Txais Cov Npe Tsis Muaj Npe (Nug ib lo lus nug)
Cov Npe Txais Txais Cov Ntawv Sau Npe yog txhais hauv cov lus hauv qab no.
Table 1-2. Register Buffer (Nyeem nkaus xwb)—Address 0 DLAB 0
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 7..0 ib | RBR | XX | 0.. xf | Tau txais cov ntaub ntawv me ntsis. Bit 0 yog LSB, thiab yog thawj qhov tau txais me ntsis. |
Transmitter Holding Register (Nug ib lo lus nug)
Lub Transmitter Holding register yog txhais nyob rau hauv cov lus hauv qab no.
Table 1-3. Transmitter Holding Register—Sau nkaus xwb
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 7..0 ib | THR | XX | 0.. xf | Xa cov ntaub ntawv me me. Bit 0 yog LSB, thiab kis tau ua ntej. |
FIFO Control Register (Nug ib lo lus nug)
Daim ntawv teev npe FIFO Control yog txhais hauv cov lus hauv qab no.
| Ib (7:0) | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 0 | 1 | 0, 1 | Enables ob Transceiver (Tx) thiab Receiver (Rx) FIFOs. Qhov me ntsis no yuav tsum tau teem rau 1 thaum lwm cov khoom FCR tau sau rau lossis lawv yuav tsis raug programmed.
0: Neeg xiam 1: Enabled |
| 1 | 0 | 0, 1 | Tshem tag nrho cov bytes hauv Rx FIFO thiab rov pib dua nws cov logic logic. Lub npe Shift tsis tau tshem tawm.
0: Neeg xiam 1: Enabled |
| 2 | 0 | 0, 1 | Clears tag nrho bytes hauv Tx FIFO thiab rov pib dua nws cov logic counter. Lub npe Shift tsis tau tshem tawm.
0: Neeg xiam 1: Enabled |
| 3 | 0 | 0, 1 | 0: Ib qho hloov pauv DMA: Hloov pauv ntawm CPU caij tsheb npav
1: Multi-transfer DMA: Hloov ua kom txog thaum Rx FIFO khoob lossis Transmission System Operator (TSO) Transmit (XMIT) FIFO puv. FCR[0] yuav tsum tau teem rau 1 los teeb FCR[3] rau 1. |
| 4, 5 | 0 | 0, 1 | Khaws cia rau yav tom ntej siv. |
| 6, 7 | 0 | 0, 1 | Cov khoom siv no yog siv los teeb tsa theem ua rau Rx FIFO cuam tshuam. 7 6 Rx FIFO Trigger Level (bytes)
0 0 01 ib 0 1 04 ib 1 0 08 ib 1 1 14 ib |
Tus Divisor Control Registers (Nug ib lo lus nug)
Lub moos Baud Rate (BR) yog tsim los ntawm kev faib cov tswv yim siv moos (PCLK) los ntawm 16 thiab tus nqi divisor.
Cov lus hauv qab no teev tus example ntawm divisor qhov tseem ceeb rau qhov xav tau BR thaum siv 18.432 MHz siv moos.
Table 1-5. Divisor Latch (LS thiab MS)
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 7..0 ib | DLR | 01h ib | 01.. xf | LSB divisor tus nqi |
| 7..0 ib | DMR | 00h ib | 00.. xf | MSB ntawm tus nqi divisor |
Table 1-6. Baud Tus Nqi thiab Tus Nqi Them Nqi rau 18.432 MHz Siv Clock
| Baud Rate | Decimal Divisor (Tus nqi Divisor) | Feem pua yuam kev |
| 50 | 23040 | 0.0000% |
| 75 | 15360 | 0.0000% |
| 110 | 10473 | -0.2865% |
| 134.5 | 8565 | 0.0876% |
| 150 | 7680 | 0.0000% |
| 300 | 3840 | 0.0000% |
| 600 | 1920 | 0.0000% |
| 1,200 | 920 | 4.3478% |
| 1,800 | 640 | 0.0000% |
| Baud Rate | Decimal Divisor (Tus nqi Divisor) | Feem pua yuam kev |
| 2,000 | 576 | 0.0000% |
| 2,400 | 480 | 0.0000% |
| 3,600 | 320 | 0.0000% |
| 4,800 | 240 | 0.0000% |
| 7,200 | 160 | 0.0000% |
| 9,600 | 120 | 0.0000% |
| 19,200 | 60 | 0.0000% |
| 38,400 | 30 | 0.0000% |
| 56,000 | 21 | -2.0408% |
Interrupt Enable Register (Nug ib lo lus nug)
Lub Interrupt Enable register yog txhais nyob rau hauv cov lus hauv qab no.
Table 1-7. Interrupt Enable Register
| Cov khoom | Lub npe | Default State | Lub Xeev muaj tseeb | Muaj nuj nqi |
| 0 | ERBFI | 0 | 0, 1 | Ua kom "Tau txais cov ntaub ntawv muaj cuam tshuam" 0: Disabled
1: Enabled |
| 1 | ETBEI | 0 | 0, 1 | Ua kom lub "Transmitter Holding Register Empty Interrupt" 0: Disabled
1: Enabled |
| 2 | ELSI | 0 | 0, 1 | Ua kom "Receiver Line Status Interrupt" 0: Disabled
1: Enabled |
| 3 | EDSSI | 0 | 0, 1 | Ua kom "Modem Status Interrupt" 0: Disabled
1: Enabled |
| 7..4 ib | Khaws tseg | 0 | 0 | Ib txwm 0 |
Interrupt Identification Register (Nug ib lo lus nug)
Daim ntawv teev npe Interrupt Identification muaj nyob rau hauv cov lus hauv qab no. Table 1-8. Interrupt Identification Register
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 3..0 ib | IIR | 1h | 0.. Ch | cuam tshuam kev txheeb xyuas cov khoom. |
| 5..4 ib | Khaws tseg | 00 | 00 | Ib txwm 00 |
| 7..6 ib | Hom | 11 | 11 | 11: FIFO hom |
Daim ntawv teev npe Interrupt Identification yog txhais hauv cov lus hauv qab no.
Table 1-9. Interrupt Identification Register Field (IIR)
| Tus nqi IIR [3: 0)] | Qib ua ntej | Interrupt Hom | Interrupt Source | Interrupt Reset Control |
| 0110 | Siab tshaj | Txais kab xwm txheej | Overrun yuam kev, parity yuam kev, framing yuam kev los yog tawg cuam tshuam | Nyeem kab xwm txheej sau npe |
| 0100 | Thib ob | Tau txais cov ntaub ntawv muaj | Txais cov ntaub ntawv muaj | Kev nyeem cov neeg txais kev tso npe tsis txaus lossis FIFO poob qis hauv qab theem pib |
| Rooj 1-9. Interrupt Identification Register Field (IIR) (txuas ntxiv) | ||||
| Tus nqi IIR [3: 0)] | Qib ua ntej | Interrupt Hom | Interrupt Source | Interrupt Reset Control |
| 1100 | Thib ob | Cov cim timeout qhia | Tsis muaj cov cim tau nyeem los ntawm Rx FIFO thaum lub sijhawm plaub lub cim dhau los thiab muaj tsawg kawg yog ib tus cim hauv nws lub sijhawm no. | Nyeem daim ntawv sau npe txais tsis pub dhau |
| 0010 | Peb | Transmitter Holding sau npe khoob | Transmitter Holding sau npe khoob | Nyeem IIR lossis sau rau hauv Transmitter Holding register |
| 0000 | Plaub | Modem xwm txheej | Nthuav xa, Cov Ntaub Ntawv Npaj Npaj, Ntiv Nplhaib Qhia lossis Cov Ntaub Ntawv Tshawb Pom | Nyeem Daim Ntawv Teev Npe Niaj Hnub No |
Line Control Register (Nug ib lo lus nug)
Daim Ntawv Sau Npe Tswj Kab yog teev nyob rau hauv cov lus hauv qab no. Table 1-10. Kab Control Sau Npe
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 1..0 ib | WLS | 0 | 0.. 3 h | Lo lus Length Xaiv 00: 5 ntsis
01:6 ib 10:7 ib 11:8 ib |
| 2 | STB | 0 | 0, 1 | Number of Stop Bits 0: 1 Nres me ntsis
1: 1½ Nres cov khoom thaum WLS = 00 2: Nres cov khoom hauv lwm qhov xwm txheej |
| 3 | PEN | 0 | 0, 1 | Parity Enable 0: Disabled
1: Enabled. Parity tau ntxiv rau hauv kev sib kis thiab kuaj xyuas hauv kev txais. |
| 4 | EPS | 0 | 0, 1 | Txawm Parity Xaiv 0: Qhov sib txawv txawv
1: Txawm tias parity |
| 5 | SP | 0 | 0, 1 | Stick Parity 0: Disabled
1: Enabled Hauv qab no yog cov ntsiab lus parity, thaum stick parity enabled: Khoom 4..3 11: 0 yuav raug xa raws li Parity me ntsis, thiab kos npe rau hauv tau txais. 01: 1 yuav raug xa raws li Parity me ntsis, thiab kos npe rau hauv tau txais. |
| 6 | SB | 0 | 0, 1 | Teem caij 0: Ua tsis taus
1: teem caij so. SOUT raug yuam kom 0. Qhov no tsis muaj kev cuam tshuam rau transmitter logic. Kev so yog neeg xiam los ntawm kev teeb tsa lub ntsis rau 0. |
| 7 | DLAB | 0 | 0, 1 | Divisor Latch Access Bit
0: Neeg xiam. Hom Chaw Nyob Ib txwm siv. 1: Enabled. Ua kom nkag mus rau Divisor Latch sau npe thaum lub sijhawm nyeem lossis sau ua haujlwm rau chaw nyob 0 thiab 1. |
Modem Control Register (Nug ib lo lus nug)
Cov npe ntawm Modem Control tau teev nyob rau hauv cov lus hauv qab no.
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 0 | DTR | 0 | 0, 1 | Tswj cov ntaub ntawv Terminal Ready (DTRn) tso zis. 0: DTRn <= 1
1: DTRn <= 0 |
| 1 | RTS | 0 | 0, 1 | Tswj cov lus thov xa (RTSn) tso zis. 0: RTSn <= 1
1: RTSn <= 0 |
| 2 | Tawm 1 | 0 | 0, 1 | Tswj lub teeb liab Output1 (OUT1n). 0: OUT1n <= 1
1: OUT1n <= 0 |
| 3 | Tawm 2 | 0 | 0, 1 | Tswj lub teeb liab Output2 (OUT2n). 0: OUT2n <= 1
1: OUT2n <= 0 |
| 4 | Loop | 0 | 0, 1 | Loop pab me ntsis 0: Disabled
1: Enabled. Cov hauv qab no tshwm sim hauv Loop hom: SOUT yog teem rau 1. Lub SIN, DSRn, CTSn, RIn thiab DCDn inputs raug txiav. Cov zis ntawm Transmitter Shift register yog looped rov qab rau hauv Receiver Shift register. Lub modem tswj outputs (DTRn, RTSn, OUT1n thiab OUT2n) yog txuas sab hauv mus rau lub modem tswj inputs, thiab lub modem tswj cov zis pins yog teem rau ntawm 1. Nyob rau hauv Loopback hom, cov ntaub ntawv kis tau tam sim ntawd tau txais, tso cai rau lub CPU mus xyuas lub lag luam ntawm UART. Cov kev cuam tshuam yog ua haujlwm hauv Loop hom. |
| 7..4 ib | Khaws tseg | 0h | 0 | Khaws tseg |
Line Status Register (Nug ib lo lus nug)
Daim ntawv teev npe kab xwm txheej tau txhais hauv cov lus hauv qab no.
Table 1-12. Line Status Register—Nyeem nkaus xwb
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 0 | DR | 0 | 0, 1 | Cov ntaub ntawv Ready indicator
1 thaum cov ntaub ntawv byte tau txais thiab khaws cia hauv qhov txais tsis tau lossis FIFO. DR raug tshem tawm mus rau 0 thaum CPU nyeem cov ntaub ntawv los ntawm qhov txais tsis tau lossis FIFO. |
| 1 | OE | 0 | 0, 1 | Overrun yuam kev qhia
Qhia tias cov byte tshiab tau txais ua ntej CPU nyeem cov byte los ntawm qhov tau txais tsis, thiab tias cov ntaub ntawv dhau los byte raug rhuav tshem. OE raug tshem tawm thaum CPU nyeem kab xwm txheej sau npe. Yog tias cov ntaub ntawv txuas ntxiv mus sau FIFO dhau ntawm qhov ua rau theem, qhov yuam kev overrun tshwm sim thaum FIFO puv thiab cov cim tom ntej tau ua tiav. tau txais hauv daim ntawv teev npe ua haujlwm. Tus cwj pwm hauv daim ntawv teev npe ua haujlwm tau sau dua, tab sis nws tsis hloov mus rau FIFO. |
| 2 | PE | 0 | 0, 1 | Parity yuam kev qhia
Qhia tias qhov tau txais byte muaj qhov yuam kev parity. PE raug tshem tawm thaum CPU nyeem kab xwm txheej sau npe. Qhov yuam kev no tau tshwm sim rau CPU thaum nws cov cim cuam tshuam nyob rau saum FIFO. |
| 3 | FE | 0 | 0, 1 | Framing yuam kev qhia
Qhia tias qhov tau txais byte tsis muaj qhov siv tau Stop bit. FE raug tshem tawm thaum CPU nyeem kab xwm txheej sau npe. UART yuav sim rov ua dua tom qab qhov yuam kev framing. Txhawm rau ua qhov no, nws xav tias qhov yuam kev framing yog vim qhov pib tom ntej me ntsis, yog li nws yogamples no Pib me ntsis ob zaug, thiab tom qab ntawd pib tau txais cov ntaub ntawv. Qhov yuam kev no tau tshwm sim rau CPU thaum nws cov cim cuam tshuam nyob rau saum FIFO. |
| Table 1-12. Line Status Register—Nyeem nkaus xwb (txuas ntxiv) | ||||
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 4 | BI | 0 | 0, 1 | Break Interrupt indicator
Qhia tias cov ntaub ntawv tau txais yog nyob ntawm 0, ntev tshaj li lub sij hawm xa mus tag nrho (Pib me ntsis + Cov ntaub ntawv khoom + Parity + Nres cov khoom). BI raug tshem tawm thaum CPU nyeem kab xwm txheej sau npe. Qhov yuam kev no tau tshwm sim rau CPU thaum nws cov cim cuam tshuam nyob rau saum FIFO. Thaum tawg tshwm sim, tsuas yog ib tus cim xoom raug thauj mus rau hauv FIFO. |
| 5 | THOV | 1 | 0, 1 | Transmitter Holding Register Empty (THRE) qhia
Qhia tias UART tau npaj xa cov ntaub ntawv tshiab byte. THRE ua rau muaj kev cuam tshuam rau CPU thaum me ntsis 1 (ETBEI) hauv Interrupt Enable register yog 1. Qhov me ntsis no tau teeb tsa thaum TX FIFO khoob. Nws raug tshem tawm thaum tsawg kawg ib byte sau rau TX FIFO. |
| 6 | TEMT | 1 | 0, 1 | Transmitter Empty indicator
Qhov no me ntsis yog teem rau 1 thaum ob lub transmitter FIFO thiab Shift registers yog khoob. |
| 7 | FIER | 0 | 1 | Qhov no me ntsis yog teem thaum muaj tsawg kawg yog ib qho yuam kev parity, framing yuam kev los yog tawg qhia nyob rau hauv FIFO. FIER raug tshem tawm thaum CPU nyeem LSR yog tias tsis muaj qhov yuam kev tom ntej hauv FIFO. |
Modem Status Register (Nug ib lo lus nug)
Cov npe ntawm Modem Status tau teev nyob rau hauv cov lus hauv qab no.
Table 1-13. Modem Status Register—Nyeem nkaus xwb
| Cov khoom | Lub npe | Default State | Cov teb chaws muaj tseeb | Muaj nuj nqi |
| 0 | DCTS | 0 | 0, 1 | Delta Clear to Send indicator.
Qhia tias CTSn cov tswv yim tau hloov pauv lub xeev txij li lub sijhawm kawg nws tau nyeem los ntawm CPU. |
| 1 | DDSR | 0 | 0, 1 | Delta Data Set Ready indicator
Qhia tias DSRn cov tswv yim tau hloov pauv lub xeev txij li lub sijhawm kawg nws tau nyeem los ntawm CPU. |
| 2 | TERI | 0 | 0, 1 | Trailing Ntug ntawm Ring Indicator detector. Qhia tias RI input tau hloov ntawm 0 mus rau 1. |
| 3 | DDCD | 0 | 0, 1 | Delta Data Carrier Detect indicator Qhia tias DCD cov tswv yim tau hloov lub xeev.
Nco tseg: Thaum twg me ntsis 0, 1, 2 lossis 3 raug teeb tsa rau 1, Modem Status cuam tshuam yog tsim. |
| 4 | CTS | 0 | 0, 1 | Ntshiab xa
Qhov sib ntxiv ntawm CTSn input. Thaum me ntsis 4 ntawm Modem Control Register (MCR) yog teem rau 1 (loop), qhov me me no sib npaug rau DTR hauv MCR. |
| 5 | DSR | 0 | 0, 1 | Cov Ntaub Ntawv Npaj Npaj
Qhov sib ntxiv ntawm DSR cov tswv yim. Thaum me ntsis 4 ntawm MCR tau teem rau 1 (loop), qhov me me no sib npaug rau RTSn hauv MCR. |
| 6 | RI | 0 | 0, 1 | Ring Indicator
Qhov sib ntxiv ntawm RIn input. Thaum me ntsis 4 ntawm MCR tau teeb tsa rau 1 (lub voj), qhov me me no sib npaug rau OUT1 hauv MCR. |
| 7 | DCD | 0 | 0, 1 | Data Carrier Detect
Qhov sib ntxiv ntawm DCDn cov tswv yim. Thaum me ntsis 4 ntawm MCR tau teeb tsa rau 1 (lub voj), qhov me me no sib npaug rau OUT2 hauv MCR. |
Scratch Register (Nug ib lo lus nug)
Daim ntawv sau npe Scratch tau txhais hauv cov lus hauv qab no.
| Cov khoom | Lub npe | Default State | Muaj nuj nqi |
| 7..0 ib | SCR | 00h ib | Nyeem / Sau npe rau CPU. Tsis muaj kev cuam tshuam rau kev ua haujlwm UART. |
Tool Flows (Nug ib lo lus nug)
Tshooj lus no muab cov ntsiab lus hais txog cov cuab yeej ntws.
SmartDesign (Nug ib lo lus nug)
Core16550 muaj rau rub tawm hauv SmartDesign IP xa tawm ib puag ncig tsim. Cov tub ntxhais tau teeb tsa siv GUI teeb tsa hauv SmartDesign, saib cov duab hauv qab no.
Yog xav paub ntxiv txog yuav ua li cas siv SmartDesign kom instantiate, teeb tsa, txuas thiab tsim cov cores, saib SmartDesign User Guide.
Daim duab 2-1. Core16550 Configuration
Simulation Flows (Nug ib lo lus nug)
Tus neeg siv testbench rau Core16550 suav nrog hauv txhua qhov kev tshaj tawm.
Txhawm rau khiav simulations, xaiv Cov Neeg Siv Testbench Flow xaiv hauv SmartDesign thiab nyem Tsim Tsim nyob rau hauv SmartDesign ntawv qhia zaub mov. Tus neeg siv testbench raug xaiv los ntawm Core Testbench Configuration GUI.
Thaum SmartDesign tsim Libero SoC qhov project, nws nruab rau tus neeg siv testbench files.
Txhawm rau khiav tus neeg siv testbench, teeb tsa lub hauv paus tsim rau Core16550 instantiation hauv Libero SoC Design Hierarchy pane thiab nyem qhov Simulation icon hauv SoC Design Flow window. Qhov no invokes ModelSim® thiab cia li khiav lub simulation.
Synthesis hauv Libero SoC (Nug ib lo lus nug)
Nyem qhov Synthesis icon hauv Libero SoC. Lub qhov rais Synthesis tshwm. Qhov project Synplify®. Teem Synplify siv tus qauv Verilog 2001 yog tias siv Verilog. Txhawm rau khiav Synthesis, nyem qhov Khiav icon.
Qhov chaw-thiab-Route hauv Libero SoC (Nug ib lo lus nug)
Txhawm rau teeb tsa txoj kev tsim kom tsim nyog thiab khiav Synthesis, nyem qhov Layout icon hauv Libero SoC thiab hu rau Designer. Core16550 tsis tas yuav muaj qhov tshwj xeeb qhov chaw-thiab-kev teeb tsa.
Core16550 (Nug ib lo lus nug)
Tshooj lus no muab cov ntaub ntawv hais txog cov tsis siv nyob rau hauv cov tub ntxhais no.
Parameters (Nug ib lo lus nug)
Core16550 tsis txhawb nqa ib qho kev ntsuas saum toj kawg nkaus.
Core Interfaces (Nug ib lo lus nug)
Tshooj lus no muab cov ntsiab lus tawm tswv yim thiab tso tawm.
I/O Signal Description (Nug ib lo lus nug)
Cov hauv qab no teev cov ntsiab lus ntawm Core16550 I/O.
| Lub npe | Hom | Polarity | Kev piav qhia |
| PRESETN | Tswv yim | Tsawg | Master pib dua |
| PCLK | Tswv yim | — | Tswv moos
PCLK muab faib los ntawm tus nqi ntawm Divisor sau npe. Qhov tshwm sim yog muab faib los ntawm 16 los tsim tus nqi baud. Lub teeb liab tshwm sim yog BAUDOUT teeb liab. Lub nce ntug ntawm tus pin no yog siv los strobe tag nrho cov tswv yim thiab cov teeb liab tawm. |
| PWRITE | Tswv yim | Siab | APB sau / nyeem ua haujlwm, nquag-siab.
Thaum HIGH, cov ntaub ntawv raug sau rau qhov chaw nyob qhov chaw nyob. Thaum LOW, cov ntaub ntawv raug nyeem los ntawm qhov chaw nyob uas tau teev tseg. |
| PADDR [4:0] | Tswv yim | — | APB Chaw Nyob
Lub npav no muab qhov txuas rau CPU mus rau qhov chaw nyob ntawm kev sau npe ntawm Core16550 kom nyeem los yog sau rau. |
| PSEL | Tswv yim | Siab | APB xaiv
Thaum qhov no yog HIGH nrog rau PENABLE, nyeem thiab sau ntawv rau Core16550 tau qhib. |
| PWDATA [7:0] | Tswv yim | — | Cov ntaub ntawv nkag tsheb npav
Cov ntaub ntawv ntawm lub npav no yuav raug sau rau hauv daim ntawv teev npe nyob rau lub sijhawm sau ntawv. |
| PENABLE | Tswv yim | Siab | APB pab
Thaum qhov no yog HIGH nrog rau PSEL, nyeem ntawv thiab sau ntawv rau Core16550 tau qhib. |
| PEB [7:0] | Tso zis | — | Cov ntaub ntawv tso zis tsheb npav
Lub npav no tuav tus nqi ntawm qhov chaw nyob hauv lub sijhawm nyeem ntawv. |
| CTSn | Tswv yim | Tsawg | Ntshiab xa
Lub teeb liab ua haujlwm-tsawg no yog ib qho kev tawm tswv yim qhia thaum lub cuab yeej txuas nrog (modem) npaj los txais cov ntaub ntawv. Core16550 kis cov ntaub ntawv no mus rau CPU los ntawm Modem Status register. Daim ntawv teev npe no tseem qhia tau tias yog CTSn teeb liab tau hloov txij li lub sijhawm dhau los, cov ntawv sau npe tau nyeem. |
| DSRn | Tswv yim | Tsawg | Cov Ntaub Ntawv Npaj Npaj
Qhov teeb meem tsis tshua muaj zog no yog cov lus qhia qhia thaum lub cuab yeej txuas nrog (modem) npaj los teeb tsa qhov txuas nrog Core16550. Core16550 kis cov ntaub ntawv no mus rau CPU los ntawm Modem Status register. Daim ntawv teev npe no tseem qhia tau tias DSRn teeb liab tau hloov pauv txij li lub sijhawm kawg ntawm kev sau npe tau nyeem. |
| DCDn | Tswv yim | Tsawg | Data Carrier Detect
Lub teeb liab tsis tshua muaj zog no yog cov lus qhia qhia thaum lub cuab yeej txuas nrog (modem) tau kuaj pom tus cab kuj. Core16550 kis cov ntaub ntawv no mus rau CPU txawm tias Modem Status sau npe. Daim ntawv teev npe no tseem qhia tau tias DCDn teeb liab tau hloov txij li lub sijhawm kawg ntawm kev sau npe tau nyeem. |
| SIN | Tswv yim | — | Serial Input Data
Cov ntaub ntawv no tau xa mus rau Core16550. Nws yog synchronized nrog PCLK input tus pin. |
| RIN | Tswv yim | Tsawg | Ring Indicator
Lub teeb liab ua haujlwm-tsawg no yog ib qho kev tawm tswv yim qhia thaum lub cuab yeej txuas nrog (modem) tau hnov lub suab nrov ntawm kab xov tooj. Core16550 kis cov ntaub ntawv no mus rau CPU los ntawm Modem Status register. Daim ntawv teev npe no kuj qhia tau tias thaum twg RIn trailing ntug tau hnov. |
| SOUT | Tso zis | — | Serial tso zis cov ntaub ntawv
Cov ntaub ntawv no tau kis los ntawm Core16550. Nws yog synchronized nrog BAUDOUT tso zis tus pin. |
| RTSn | Tso zis | Tsawg | Thov xa
Lub teeb liab ua haujlwm qis-tsawg yog siv los qhia rau cov khoom txuas nrog (modem) tias Core16550 npaj xa cov ntaub ntawv. Nws yog programmed los ntawm CPU los ntawm Modem Control register. |
| Table 4-1. I/O Cov Ntsiab Lus Qhia Txog (ntxiv) | |||
| Lub npe | Hom | Polarity | Kev piav qhia |
| DTRn | Tso zis | Tsawg | Cov ntaub ntawv Terminal Npaj
Qhov kev ua haujlwm qis-tso tawm teeb liab qhia rau cov cuab yeej txuas nrog (modem) tias Core16550 tau npaj los tsim kev sib txuas lus. Nws yog programmed los ntawm CPU los ntawm Modem Control register. |
| OUT 1 n | Tso zis | Tsawg | Rau cov zis 1
Qhov no active-tsawg tso zis yog ib tug neeg siv-txhais teeb liab. CPU cov kev pab cuam no teeb liab los ntawm lub Modem Control register thiab yog teem rau tus nqi opposite. |
| OUT 2 n | Tso zis | Tsawg | Rau cov zis 2
Qhov kev ua haujlwm-tsawg tso zis teeb liab no yog lub teeb liab uas tus neeg siv tau teev tseg. Nws yog programmed los ntawm CPU los ntawm Modem Control register thiab teem rau tus nqi rov qab. programmed. |
| INTR | Tso zis | Siab | Interrupt Pending
Qhov kev ua haujlwm siab-siab tso zis teeb liab yog lub teeb liab cuam tshuam los ntawm Core16550. Nws yog programmed los ua haujlwm rau qee yam xwm txheej, ceeb toom rau CPU tias qhov xwm txheej zoo li no tau tshwm sim, (kom paub meej ntxiv, saib Interrupt Identification Register). CPU mam li ua qhov tsim nyog. |
| BAUDOUTn | Tso zis | Tsawg | Baud tawm
Qhov no yog ib qho kev tso zis moos teeb liab muab los ntawm lub moos input rau synchronizing cov ntaub ntawv tso zis ntws los ntawm SOUT. |
| RXRDYN | Tso zis | Tsawg | Receiver npaj tau txais kev sib kis.
Lub CPU tau qhia los ntawm qhov kev ua haujlwm qis-tsawg lub teeb liab uas tau txais ntu ntawm Core16550 muaj rau cov ntaub ntawv los nyeem. |
| TXRDYN | Tso zis | Tsawg | Transmitter npaj xa cov ntaub ntawv.
Qhov teeb meem tsis tshua muaj zog no qhia rau CPU tias cov khoom xa tawm ntawm Core16550 muaj qhov chaw sau cov ntaub ntawv rau kev sib kis. |
| rxfifo_empty | Tso zis | Siab | Txais FIFO khoob.
Cov teeb liab no mus HIGH thaum tau txais FIFO khoob. |
| rxffo_full | Tso zis | Siab | Tau txais FIFO tag nrho.
Qhov teeb liab no mus siab thaum tau txais FIFO puv. |
Timing Diagrams (Nug ib lo lus nug)
Tshooj lus no muab cov duab kos lub sijhawm ntawm lub hauv paus no.
Cov Ntaub Ntawv Sau Cycle thiab Cov Ntaub Ntawv Nyeem Cycle (Nug ib lo lus nug)
Daim duab 5-1 thiab daim duab 5-2 qhia txog kev sau lub voj voog thiab nyeem lub voj voog sij hawm sib raug zoo nrog rau APB system moos, PCLK.
Sau npe Sau (Nug ib lo lus nug)
Cov duab hauv qab no qhia tau hais tias qhov chaw nyob, Xaiv thiab Ua kom cov teeb liab raug latched thiab yuav tsum siv tau ua ntej nce ntug ntawm PCLK. Kev sau ntawv tshwm sim ntawm qhov nce ntawm ntug ntawm PCLK teeb liab.
Sau npe Nyeem (Nug ib lo lus nug)
Cov duab hauv qab no qhia tau hais tias qhov chaw nyob, Xaiv thiab Ua kom cov teeb liab raug latched thiab yuav tsum siv tau ua ntej nce ntug ntawm PCLK. Kev nyeem ntawv tshwm sim ntawm qhov nce ntawm ntug ntawm PCLK teeb liab. 
Yog xav paub ntxiv txog cov lus piav qhia thiab lub sij hawm waveforms, saib AMBA specification.
Receiver Synchronization (Nug ib lo lus nug)
Thaum tus receiver pom lub xeev qis hauv cov ntaub ntawv nkag, nws synchronizes rau nws. Tom qab pib ntug, UART tos 1.5 × (qhov ntev me ntsis). Qhov no ua rau txhua qhov txuas ntxiv los nyeem ntawm nruab nrab ntawm nws qhov dav. Cov duab hauv qab no qhia txog cov txheej txheem synchronization.
Daim duab 5-3. Tus txais synchronization
Testbench Operation (Nug ib lo lus nug)
Tsuas yog ib qho testbench yog muab nrog Core16550: Verilog neeg siv testbench. Qhov no yog ib qho yooj yim-rau-siv testbench sau hauv Verilog. Qhov testbench no yog npaj rau kev hloov kho cov neeg siv khoom.
User Testbench (Nug ib lo lus nug)
Daim duab hauv qab no qhia txog daim duab thaiv ntawm tus example user design and testbench.
Daim duab 6-1. Core16550 User Testbench
Tus neeg siv testbench suav nrog ib qho yooj yim example tsim uas ua haujlwm raws li kev siv rau cov neeg siv uas xav siv lawv tus kheej tsim.
Testbench rau example, tus neeg siv tsim siv lub subset ntawm functionality kuaj nyob rau hauv qhov tseeb testbench, kom paub meej ntxiv, saib User Testbench. Conceptually, raws li qhia nyob rau hauv daim duab 6-1, lub instantiation ntawm Core16550 yog simulated siv tus cwj pwm microcontroller thiab ib tug simulated loopback kev twb kev txuas. Rau example, tus neeg siv testbench qhia txog kev xa tawm thiab tau txais los ntawm tib Core16550 chav tsev, yog li koj tuaj yeem nkag siab yooj yim ntawm kev siv cov tub ntxhais no.
Tus neeg siv testbench qhia txog kev teeb tsa yooj yim, xa tawm thiab tau txais cov haujlwm ntawm Core16550. Tus neeg siv testbench ua cov kauj ruam hauv qab no:
- Sau rau cov ntawv sau npe.
- Xyuas cov ntaub ntawv tau txais.
- Tig rau kis thiab txais.
- Nyeem cov npe tswj.
- Xa thiab tau txais ib byte.
Kev siv thiab kev ua haujlwm ntawm cov cuab yeej (Nug ib lo lus nug)
Cov lus hauv qab no teev cov ntaub ntawv siv Core16550 thiab kev ua haujlwm. Table 7-1. Core16550 Kev Siv thiab Kev Ua Haujlwm PolarFire thiab PolarFire SoC
| Ntaus yam lus qhia | Cov peev txheej | RAM | |||
| Tsev neeg | Ntaus ntawv | 4 LOJ | DFF | Logic Elements | μSRAM |
| PolarFire® | MPF100T-FCSG325I | 752 | 284 | 753 | 2 |
| PolarFire® SoC | MPFS250TS-FCSG536I | 716 | 284 | 720 | 2 |
| RTG 4™ | RT4G150-1CG1657M | 871 | 351 | 874 | 2 |
| IGLO® 2 | M2GL050TFB GA896STD | 754 | 271 | 1021 | 2 |
| SmartFusion® 2 | M2S050TFG A896STD | 754 | 271 | 1021 | 2 |
| SmartFusion® | A2F500M3G- STD | 1163 | 243 | 1406 | 2 |
| IGLOO®/IGLOOE | AGL600-STD/AGLE600 V2 | 1010 | 237 | 1247 | 2 |
| fusion | AFS600-STD | 1010 | 237 | 1247 | 2 |
| ProASIC® 3/E | A3P600-STD | 1010 | 237 | 1247 | 2 |
| ProASIC Plus® | APA075-STD | 1209 | 233 | 1442 | 2 |
| RTAX-S | RTAX 250S- STD | 608 | 229 | 837 | 2 |
| Axcelerator® | AX125-STD | 608 | 229 | 837 | 2 |
Cov teeb meem daws teeb meem (Nug ib lo lus nug)
Cov lus hauv qab no teev tag nrho cov teeb meem daws teeb meem rau ntau yam Core16550 tawm.
Table 8-1. Kev daws teeb meem
| Version | Hloov |
| v3.4 ua | Core16550 siv System Verilog Lo lus tseem ceeb "lov" raws li sau npe npe uas ua rau muaj teeb meem yuam kev syntax. Qhov no tau raug kho los ntawm kev hloov lo lus tseem ceeb nrog lwm lub npe. Ntxiv PolarFire® kev txhawb nqa tsev neeg |
Revision History (Nug ib lo lus nug)
Cov ntaub ntawv kho dua tshiab piav qhia txog cov kev hloov pauv uas tau ua hauv daim ntawv. Cov kev hloov pauv tau teev tseg los ntawm kev kho dua tshiab, pib nrog kev tshaj tawm tam sim no.
Microchip FPGA Kev them nyiaj yug
Microchip FPGA cov khoom lag luam pab pawg txhawb nqa nws cov khoom nrog ntau yam kev pabcuam, suav nrog Kev Pabcuam Cov Neeg Siv Khoom, Lub Chaw Pabcuam Cov Neeg Siv Khoom, a website, thiab chaw muag khoom thoob ntiaj teb. Cov neeg siv khoom raug pom zoo kom mus ntsib Microchip cov peev txheej online ua ntej hu rau kev txhawb nqa vim nws muaj feem ntau tias lawv cov lus nug tau teb lawm.
Hu rau Technical Support Center los ntawm website ntawm www.microchip.com/support Hais txog FPGA Ntaus Tus lej, xaiv cov ntaub ntawv tsim nyog, thiab xa cov qauv tsim files thaum tsim rooj plaub kev txhawb nqa.
Hu rau Lub Chaw Pabcuam Cov Neeg Siv Khoom rau kev txhawb nqa cov khoom lag luam uas tsis yog khoom siv, xws li cov nqi khoom, kev hloov khoom dua tshiab, cov ntaub ntawv hloov tshiab, kev txiav txim raws li txoj cai, thiab kev tso cai.
- Los ntawm North America, hu rau 800.262.1060
- Los ntawm lwm lub ntiaj teb, hu rau 650.318.4460
- Fax, los ntawm txhua qhov chaw hauv ntiaj teb, 650.318.8044
Cov ntaub ntawv Microchip
Cov cim lag luam
Lub npe "Microchip" thiab lub logo, "M" logo, thiab lwm lub npe, lub logo, thiab cov npe tau sau npe thiab tsis tau sau npe ua lag luam ntawm Microchip Technology Incorporated lossis nws cov koom tes thiab / lossis cov koom tes hauv Tebchaws Meskas thiab / lossis lwm lub tebchaws ("Microchip Cov cim lag luam”). Cov ntaub ntawv hais txog Microchip Trademarks tuaj yeem nrhiav tau ntawm https://www.microchip.com/en-us/about/legal-information/microchip-trademarks
ISBN:
Daim Ntawv Ceeb Toom
- Cov ntawv tshaj tawm no thiab cov ntaub ntawv ntawm no tsuas yog siv nrog cov khoom siv Microchip nkaus xwb, suav nrog tsim, sim, thiab sib xyaw cov khoom siv Microchip nrog koj daim ntawv thov. Kev siv cov ntaub ntawv no
nyob rau hauv lwm yam kev ua txhaum cov nqe lus no. Cov ntaub ntawv hais txog cov ntawv thov ntaus ntawv tsuas yog muab rau koj yooj yim thiab tuaj yeem hloov pauv los ntawm kev hloov tshiab. Nws yog koj lub luag haujlwm los xyuas kom meej tias koj daim ntawv thov ua tau raws li koj cov lus qhia tshwj xeeb. Hu rau koj lub chaw muag khoom Microchip hauv zos rau kev txhawb nqa ntxiv lossis, tau txais kev txhawb nqa ntxiv ntawm www.microchip.com/en-us/support/design-help/client-support-services - Cov ntaub ntawv no yog muab los ntawm microchip "raws li yog". MICROCHIP tsis muaj kev sawv cev lossis kev lav phib xaub ntawm txhua yam txawm hais tias nthuav tawm lossis txhais, sau lossis hais lus, kev cai lij choj lossis lwm yam, cuam tshuam rau cov ntaub ntawv suav nrog tab sis tsis txwv rau WARNING TSIS TXAUS SIAB, Kev muag khoom, thiab kev nyab xeeb rau lub hom phiaj tshwj xeeb, lossis kev lav phib xaub cuam tshuam txog nws qhov xwm txheej, zoo, lossis kev ua tau zoo.
- TSIS MUAJ IB TUG MICROCHIP yuav raug lav rau txhua qhov kev cuam tshuam, tshwj xeeb, raug nplua, xwm txheej, lossis cuam tshuam rau kev poob, kev puas tsuaj, nqi, lossis kev siv nyiaj ntawm txhua yam kev cuam tshuam rau kev hloov pauv, lossis kev siv nyiaj txiag, MICROCHIP tau qhia txog qhov ua tau lossis qhov kev puas tsuaj yog FORESEEABLE. YUAV TSUM TAU TXAIS NTAWM LEEJ TWG, MICROCHIP TAG NRHO LUB SIJ HAWM NTAWM TXOJ CAI NTAWM TXOJ HAUJ LWM HAUV QHOV CHAW UA HAUJ LWM HAUJ LWM HAUJ LWM HAUJ LWM los yog nws siv yuav tsis pub tshaj tus nqi ntawm cov nqi, yog tias muaj, yog tias koj tau txais cov nyiaj tau los Xov xwm.
- Kev siv cov khoom siv Microchip hauv kev txhawb nqa lub neej thiab / lossis daim ntawv thov kev nyab xeeb yog tag nrho ntawm tus neeg yuav khoom qhov kev pheej hmoo, thiab tus neeg yuav khoom pom zoo tiv thaiv, them nyiaj thiab tuav Microchip tsis raug mob los ntawm ib qho thiab tag nrho cov kev puas tsuaj, kev thov, foob, lossis cov nuj nqis uas tshwm sim los ntawm kev siv. Tsis muaj ntawv tso cai raug xa tawm, tsis hais los yog lwm yam, raws li cov cai ntawm Microchip cov cuab yeej cuab tam tshwj tsis yog hais tias lwm yam.
Microchip Devices Code Protection Feature
Nco ntsoov cov ntsiab lus hauv qab no ntawm cov cai tiv thaiv ntawm cov khoom siv Microchip:
- Cov khoom siv microchip ua tau raws li cov lus qhia tshwj xeeb uas muaj nyob rau hauv lawv cov ntaub ntawv Microchip tshwj xeeb.
- Microchip ntseeg hais tias nws tsev neeg ntawm cov khoom muaj kev ruaj ntseg thaum siv raws li lub hom phiaj, nyob rau hauv kev khiav hauj lwm specifications, thiab nyob rau hauv ib txwm tej yam kev mob.
- Microchip muaj nuj nqis thiab tiv thaiv nws txoj cai kev txawj ntse. Kev sim ua txhaum cai tiv thaiv cov yam ntxwv ntawm Microchip cov khoom raug txwv nruj heev thiab tej zaum yuav ua txhaum txoj cai Digital Millennium Copyright Act.
- Tsis yog Microchip lossis lwm lub chaw tsim khoom semiconductor tuaj yeem lav qhov kev ruaj ntseg ntawm nws cov cai. Kev tiv thaiv Code tsis txhais hais tias peb tau lees tias cov khoom yog "tsis tawg". Kev tiv thaiv code yog hloov zuj zus mus tas li. Microchip tau cog lus tias yuav txhim kho cov cai tiv thaiv cov yam ntxwv ntawm peb cov khoom tsis tu ncua.
Cov neeg siv phau ntawv qhia
© 2025 Microchip Technology Inc. thiab nws cov koom haum
Cov ntaub ntawv / Cov ntaub ntawv
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MICROCHIP Core16550 Universal Asynchronous Receiver Transmitter [ua pdf] Cov neeg siv phau ntawv qhia v3.4, v3.3, Core16550 Universal Asynchronous Receiver Transmitter, Core16550, Universal Asynchronous Receiver Transmitter, Asynchronous Receiver Transmitter, Txais Transmitter, Transmitter |