Nā Punawai IP RX DisplayPort Tx

Hōʻike i ka Port RX IP alakaʻi hoʻohana

Hoʻolauna (E ninau mai)

Hoʻolālā ʻia ʻo DisplayPort Rx IP e loaʻa i nā wikiō mai nā kumu DisplayPort Tx. Kuhi ʻia ia no ka PolarFire® Nā noi FPGA a hoʻokō ʻia ma muli o ka Video Electronics Standards Association (VESA) DisplayPort Standard 1.4 protocol. No ka ʻike hou aku e pili ana i ka protocol VESA, e ʻike VESA. Kākoʻo ia i nā helu maʻamau o 1.62, 2.7, 5.4, a me 8.1 Gbps no nā hōʻike.

Hōʻuluʻulu manaʻo (E ninau mai)

Hāʻawi ka papa ma lalo i kahi hōʻuluʻulu o nā hiʻohiʻona DisplayPort Rx IP.

Papa 1. Hōʻuluʻulu manaʻo

Manaʻo kumu	Pili kēia palapala iā DisplayPort Rx v2.1.
Nā ʻohana mea i kākoʻo ʻia	PolarFire® SoC PolarFire
Kākoʻo ʻia ka holo ʻana o ka hāmeʻa	Pono ʻo Libero® Hoʻokuʻu ʻia ʻo SoC v12.0 a i ʻole.
Laikini	Hoʻopaʻa laikini ʻia ke kumu no ka RTL kikokikona maʻemaʻe. Kākoʻo ia i ka hanauna o RTL i hoʻopili ʻia no ka mana Verilog o ke kumu me ka laikini ʻole.

Nā hiʻohiʻona (E ninau mai)

Ua helu ʻia nā hiʻohiʻona nui o DisplayPort Rx penei:

• Kākoʻo 1, 2, a i ʻole 4 Alanui
• Kākoʻo iā 6, 8, a me 10 Bits no kēlā me kēia ʻāpana
• Kākoʻo a hiki i 8.1 Gbps i kēlā me kēia Alanui
• Kākoʻo iā DisplayPort 1.4 Protocol
• Kākoʻo wale i ke kahawai wikiō hoʻokahi a i ʻole ke ʻano SST, a ʻaʻole kākoʻo ʻia ke ʻano MST
• ʻAʻole kākoʻo ʻia ka hoʻoili leo

Ka hoʻohana ʻana a me ka hana ʻana (E ninau mai)

Hōʻike ka papa ma lalo i ka hoʻohana ʻana a me ka hana o ka mea hana.

Papa 2. Ka hoʻohana ʻana a me ka hana ʻana

ʻOhana	Mea lako	LUTs	DFF	Hana (MHz)	LSRAM	µSRAM	Palaka Math	Chip Global
PolarFire®	MPF300T	30652	14123	200	28	32	0	2

Ke alakaʻi hoʻohana

DS50003546A – 1

© 2023 Microchip Technology Inc. a me kāna mau lālā

Hoʻokō Paʻa Paʻa

1. Hoʻokō Paʻa Paʻa (E ninau mai)

Hōʻike kēia kiʻi i ka hoʻokō DisplayPort Rx IP.

Helu 1-1. Hoʻokomo ʻia ʻo DisplayPort Rx IP

Aia ka DisplayPort Rx IP i kēia mau mea:

• Module Descrambler
• Module hoʻokipa ʻaoʻao
• Module hoʻopaʻa wikiō Stream
• module AUX_CH

Hoʻopau ʻo Descrambler i ka ʻikepili alahele hoʻokomo. Hoʻopau ʻo Lane receiver i nā ʻano ʻikepili āpau ma kēlā me kēia ala. Loaʻa i ka Video Stream Receiver nā pika wikiō mai ka mea hoʻokipa ala, hoʻihoʻi ia i ka hōʻailona kahawai wikiō. Loaʻa ka module AUX_CH i ke kauoha AUX Noi mai ka hāmeʻa kumu DisplayPort a hoʻouna i ka pane AUX i ka hāmeʻa kumu DisplayPort.

1.1 Ka wehewehe hana (E ninau mai)

Hōʻike kēia ʻāpana i ka wehewehe hana o ka DisplayPort Rx IP.

HPD

Hoʻopuka ka DisplayPort Rx IP i ka hōʻailona HPD e like me ka hoʻonohonoho ʻana i nā polokalamu noi noi DisplayPort. Ma hope o ka mākaukau ʻana o ka DisplayPort Rx IP, pono e hoʻonohonoho ka polokalamu noi ʻo DisplayPort sink i ka hōʻailona HPD i ka 1. Ke manaʻo ʻo ia e heluhelu hou ka mea punawai DisplayPort i ke kūlana o ka mea hoʻoheheʻe a i ʻole ke aʻo hou ʻana, pono e hoʻonohonoho ka polokalamu noi ʻo DisplayPort sink i kahi HPD e hana i ka hōʻailona hoʻopau HPD.

Kanal AUX

Hōʻike ka hāmeʻa kumu DisplayPort i ka pahu DisplayPort ma o kahi AUX Channel. ʻO ka mīkini kumu e hoʻouna ana i ke kālepa noi i ka mea hoʻoheheʻe a me ka mea hoʻokomo e hoʻouna ana i ke kālepa pane i ka Pūnaewele kumu. Hoʻokomo ʻo DisplayPort Rx i ka transmitter transaction AUX a mea hoʻokipa. No ka mea hoʻouna pāʻoihana AUX, hāʻawi ka polokalamu noi ʻo DisplayPort sink i nā bytes maʻiʻo AUX a pau, ʻo ka DisplayPort Rx IP e hoʻopuka i ka bitstream transaction. No ka mea hoʻokipa kālepa AUX, loaʻa iā DisplayPort Rx IP ka hana a unuhi i nā byte a pau i ka polokalamu noi DisplayPort. Pono e hoʻokō ʻia ka Link Policy Maker a me Stream Policy Maker ma ka polokalamu noi DisplayPort.

Hoʻouna ʻia ke kahawai wikiō

Kākoʻo ka DisplayPort Rx IP i ka RGB 4: 4: 4, a kākoʻo wale i kahi kahawai wikiō hoʻokahi. Ma hope o ka hoʻomaʻamaʻa ʻana a mākaukau ke kahawai wikiō, hoʻomaka ka DisplayPort Rx IP e hoʻouna i ke kahawai wikiō. Ma hope o ke aʻo ʻana, pono e ʻae ʻia ka DisplayPort Rx IP no ka loaʻa wikiō. ʻAʻole komo ka DisplayPort Rx IP i kahi hana hoʻihoʻi wikiō wikiō. Pono ka mea hoʻohana e hoʻihoʻi i ka uaki wikiō ma waho o ka DisplayPort Rx IP a i ʻole e hoʻohana i ka uaki alapine kiʻekiʻe e hoʻopuka i ka ʻikepili kahawai wikiō.

Ke alakaʻi hoʻohana
DS50003546A – 4
© 2023 Microchip Technology Inc. a me kāna mau lālā

Papahana IP DisplayPort Rx

2. Papahana IP DisplayPort Rx (E nīnau i kahi nīnau) Hōʻike kēia kiʻi i ka noi DisplayPort Rx IP maʻamau.

Helu 2-1. Ka noi maʻamau no DisplayPort Rx IP

E like me ka mea i hōʻike ʻia ma ke kiʻi ma mua, loaʻa i ka poloka transceiver ka ʻikepili ʻehā ala. ʻEhā FIFO asynchronous e hoʻopili i nā ʻikepili alahele a pau i loko o kahi kikowaena uaki hoʻokahi. Hoʻololi ʻia kēia mau ʻikepili ala ʻehā i ke code 8B ma nā modula decoder 8B10B. Loaʻa i ka DisplayPort Rx IP nā alahele 8B ʻikepili a hoʻopuka i ka ʻikepili kahawai wikiō; hana pū me ka polokalamu RISC-V e hoʻopau i ke aʻo ʻana a me Link Policy Maker. Hoʻoponopono ʻia ka ʻikepili kahawai wikiō i hoʻihoʻi ʻia i ka module Processing Image a hoʻopuka i ka hopena ma ke kikowaena puka RGB.

Ke alakaʻi hoʻohana
DS50003546A – 5
© 2023 Microchip Technology Inc. a me kāna mau lālā

Nā Hōʻike Hōʻikeʻike Rx a me nā hōʻailona Interface

3. Nā Hōʻike Hōʻikeʻike Rx a me nā hōʻailona Interface (E nīnau i kahi nīnau) 

Kūkākūkā kēia ʻāpana i nā ʻāpana i ka DisplayPort Tx GUI configurator a me nā hōʻailona I/O. 

3.1 Hoʻonohonoho hoʻonohonoho (E nīnau i kahi nīnau)

Hōʻike ka papa ma lalo nei i ka wehewehe ʻana i nā ʻāpana hoʻonohonoho i hoʻohana ʻia i ka hoʻokō ʻana i ka hāmeʻa o DisplayPort Rx. He mau palena maʻamau kēia a ʻokoʻa e like me ke koi o ka noi.

Papa 3-1. Nā ʻāpana hoʻonohonoho

inoa	Paʻamau	wehewehe
Hohonu Line Buffer	2048	Ka hohonu hoʻopaʻa laina puka Pono ia ma mua o ka helu pixel laina
Ka helu o nā alahele	4	Kākoʻo 1, 2, a me 4 ala

3.2 Nā hōʻailona hoʻokomo a me nā mea hoʻopuka (E nīnau i kahi nīnau)

Hōʻike ka papa ma lalo i nā awa komo a me nā puka puka o DisplayPort Rx IP.

Papa 3-2. ʻO nā awa hoʻokomo a me nā puka puka o DisplayPort Rx IP

Ikepili	Laulā		Ka wehewehe kuhikuhi
vclk_i	1	Hookomo	Uaki wikiō
dpclk_i	1	Hookomo	DisplayPort IP hana uaki ʻO ia ka DisplayPortLaneRate/40 No example, ʻo 2.7 Gbps ka nui o ke alahele DisplayPort, ʻo dpclk_i he 2.7 Gbps/40 = 67.5 MHz
aux_clk_i	1	Hookomo	ʻO ka uaki Channel AUX, ʻo ia ka 100 MHz
pclk_i	1	Hookomo	Uaki interface APB
prst_n_i	1	Hookomo	ʻO ka hōʻailona hoʻihoʻi haʻahaʻa haʻahaʻa i hoʻonohonoho ʻia me pclk_i
paddr_i	16	Hookomo	APB helu wahi
pwrite_i	1	Hookomo	APB kākau hōʻailona
psel_i	1	Hookomo	APB koho hōʻailona
penable_i	1	Hookomo	APB hiki i ka hōʻailona
pwdata_i	32	Hookomo	APB kākau ʻikepili
prdata_o	32	Hoʻopuka	APB heluhelu ʻikepili
pready_o	1	Hoʻopuka	APB heluhelu ʻikepili mākaukau hōʻailona
int_o	1	Hoʻopuka	Hoʻopau i ka hōʻailona i ka CPU
vsync_o	1	Hoʻopuka	VSYNC no ke kahawai wikiō hoʻopuka Ua hui pū ʻia me vclk_i.
hsync_o	1	Hoʻopuka	HSYNC no ke kahawai wikiō hoʻopuka Ua hui pū ʻia me vclk_i.
pixel_val_o	1/2/4	Hoʻopuka	Hōʻike i ka hōʻoia ʻana o nā pika ma ke awa pixel_data_o, i hui pū me vclk_i

Ke alakaʻi hoʻohana
DS50003546A – 6
© 2023 Microchip Technology Inc. a me kāna mau lālā

Nā Hōʻike Hōʻikeʻike Rx a me nā hōʻailona Interface

……..hoomau  ʻO ka wehewehe ʻana i ka ʻaoʻao ākea ākea
pixel_data_o	48/96/192	Hoʻopuka	E hoʻopuka i ka ʻikepili kahawai wikiō, hiki ke 1, 2, a i ʻole 4 mau pika like. ua hui pū me vclk_i. No 4 mau pika like, • bit[191:144] no 1st pika • bit[143:96] no 2nd pika • bit[95:48] no 3rd pika • bit[47:0] no 4th pika Hoʻohana kēlā me kēia pika i nā ʻāpana 48, no RGB, bit[47:32] R, bit[31:16] G, bit[15:0] B. Hoʻohana kēlā me kēia ʻāpana kala i nā bit BPC haʻahaʻa loa. No example, RGB me 24 mau bit no ka pika, bit[7:0] B, bit[23:16] G, bit[39:32] R, mālama ʻia nā ʻāpana ʻē aʻe.
hpd_o	1	Hoʻopuka	Hōʻailona puka HPD
aux_tx_en_o	1	Hoʻopuka	Hiki i ka ʻikepili AUX Tx ke hōʻailona
aux_tx_io_o	1	Hoʻopuka	ʻIkepili AUX Tx
aux_rx_io_i	1	Hookomo	ʻIkepili AUX Rx
dp_lane_k_i	Ka helu o nā alahele * 4	Hookomo	Hōʻike hōʻike hōʻike hōʻike hōʻike hōʻike ala ala komo Ua hui pū ʻia me dpclk_i. • Bit[15:12] no Lane0 • Bit[11:8] no Lane1 • Bit[7:4] no Lane2 • Bit[3:0] no Lane3
dp_lane_data_i	Helu o alanui*32	Hookomo	Hōʻike i nā ʻikepili alahele hoʻokomo Ua hui pū ʻia me dpclk_i. • Bit[127:96] no Lane0 • Bit[95:64] no Lane1 • Bit[63:32] no Lane2 • Bit[31:0] no Lane3
mvid_val_o	1	Hoʻopuka	Hōʻike inā loaʻa ka mvid_o a me nvid_o, ua hui pū me dpclk_i.
mvid_o	24	Hoʻopuka	Mvid Ua hui pū ʻia me dpclk_i.
nvid_o	24	Hoʻopuka	Nvid Ua hui pū ʻia me dpclk_i.
	xcvr_rx_ready_i Ka helu o nā alahele	Hookomo	Nā hōʻailona mākaukau o ka transceiver
pcs_err_i	Ka helu o nā alahele	Hookomo	Nā hōʻailona hewa decoder Core Pcs
pcs_rstn_o	1	Hoʻopuka	Hoʻihoʻi hou ʻia ʻo Core Pcs decoder
lane0_rxclk_i	1	Hookomo	Lane0 uaki mai Transceiver
lane1_rxclk_i	1	Hookomo	Lane1 uaki mai Transceiver
lane2_rxclk_i	1	Hookomo	Lane2 uaki mai Transceiver
lane3_rxclk_i	1	Hookomo	Lane3 uaki mai Transceiver

Ke alakaʻi hoʻohana
DS50003546A – 7
© 2023 Microchip Technology Inc. a me kāna mau lālā

Nā Kiʻikuhi manawa

4. Nā Kiʻikuhi manawa (E nīnau i kahi nīnau)

E like me ka mea i hōʻike ʻia ma ke kiʻi, hōʻike ʻia ka hsync_o no kekahi mau pōʻai ma mua o kēlā me kēia laina. Inā he n laina i loko o ke kiʻi wikiō, aia nā n hsync_o i ʻōlelo ʻia. Ma mua o ka laina mua a me ka hsync_o i hōʻoia mua ʻia, ua ʻōlelo ʻia ʻo vsync_o no kekahi mau pōʻai. Hoʻonohonoho ʻia ke kūlana a me ka laulā o VSYNC a me HSYNC e ka polokalamu.

Helu 4-1. Kiʻikuhi manawa no ka hōʻailona Interface Stream Video

Hōʻike ʻia ʻo DisplayPort Rx IP

5. Hōʻike ʻia ʻo DisplayPort Rx IP (E nīnau i kahi nīnau)

Hōʻike kēia ʻāpana i nā ʻāpana hoʻonohonoho IP DisplayPort Rx IP.

5.1 HPD (E nīnau i kahi nīnau)

Ke mākaukau a hoʻopili ʻia ka mea hoʻoheheʻe DisplayPort i ka hāmeʻa kumu DisplayPort, pono e hoʻokomo ka polokalamu noi ʻo DisplayPort sink i ka hōʻailona HPD i ka 1 ma ke kākau ʻana i ka 0x01 i loko o ka papa inoa 0x0140. Pono ka polokalamu noi ʻo DisplayPort sink e nānā i ke kūlana o ka mea hoʻoheheʻe. Inā makemake ka mea hoʻoheheʻe i kahi mea kumu e heluhelu ai i nā papa inoa DPCD, pono e hoʻouna ka polokalamu ʻauamo i kahi hoʻopā HPD ma ke kākau ʻana i ka 0x01 i loko o ka papa inoa 0x0144, a laila e kākau i ka 0x00 i 0x0144.

5.2 Loaʻa i ka ʻoihana noi AUX (E nīnau i kahi nīnau)

I ka wā i loaʻa ai i ka DisplayPort Rx IP kahi kālepa AUX Request a hoʻopau ʻia, pono e loaʻa ka polokalamu i ka NewAuxReply event interrupt. Pono ka polokalamu e hana i kēia mau ʻanuʻu e heluhelu ai i ke kālepa AUX Request i loaʻa mai ka DisplayPort IP:

1. E heluhelu i ka papa inoa 0x012C e ike i ka loihi (RequestBytesNum) o ke kuai AUX i loaa.

2. E heluhelu i ka papa inoa 0x0124 RequestBytesNum mau manawa e kiʻi i nā byte a pau o ka hana AUX i loaʻa.

3. ʻO AUX Request transaction COMM[3:0] ka helu helu helu helu mua [7:4].

4. ʻO ka helu helu DPCD ((FirstByte[3:0]<<16) | (SecondByte[7:0]<<8) | (ThirdByte[7:0])).

5. AUX Noi Length kahua ʻo FourthByte[7:0].

6. No ka DPCD kākau Noi kaʻina hana, nā byte a pau ma hope o ka lōʻihi kahua ke kākau 'ikepili. 5.3 Hoʻouna i ka hana pane AUX (E nīnau i kahi nīnau)

Ma hope o ka loaʻa ʻana o kahi kālepa noi AUX, pono e hoʻonohonoho ka polokalamu i ka DisplayPort Rx IP e hoʻouna i kahi kālepa AUX Reply i ka hiki. Na ka polokalamu ke kuleana e hoʻoholo i nā bytes pānaʻi pane a pau, me ka ʻano pane.

No ka hoʻouna ʻana i kahi pane AUX, pono e hana nā polokalamu i kēia mau hana:

1. Inā kūʻai ʻo AUX Reply me ka ʻikepili heluhelu DPCD, e kākau i nā ʻikepili heluhelu a pau i loko o ka papa inoa 0x010C byte byte. Inā ʻaʻohe ʻikepili heluhelu DPCD e hoʻouna ʻia, e kāpae i kēia kaʻina.

2. E hoʻoholo i ka nui o ka DPCD heluhelu paita (AuxReadBytesNum). Inā ʻaʻohe helu helu DPCD, ʻo AuxReadBytesNum ka 0.

3. E hoʻoholo i ke ʻano pane AUX (ReplyComm).

4. Kākau ((AuxReadBytesNum<<16) | ReplyComm) i loko o ka papa inoa 0x0100.

5.4 Hoʻomaʻamaʻa ʻia ʻo DisplayPort Lanes (E nīnau i kahi nīnau)

Ma ke aʻo mua stage, hoʻouna ka mea punawai DisplayPort i ka TPS1 e hana i ka mea hoʻokomo DisplayPort i hoʻopili ʻia e loaʻa iā LANEx_CR_DONE.

Ma ke aʻo lua stage, hoʻouna ke kumu punawai DisplayPort iā TPS2/TPS3/TPS4 e kiʻi i ka hāmeʻa pahu DisplayPort i hoʻopili ʻia no ka loaʻa ʻana o LANEx_EQ_DONE, LANEx_SYMBOL_LOCKED, a me INTERLANE_ALIGN_DONE.

Hōʻike ʻo LANEx_CR_DONE ua laka ʻia ka FPGA Transceiver CDR. Hōʻike ʻo LANEx_SYMBOL_LOCKED i ka unuhi pololei ʻana o ka decoder 8B10B i 8B bytes.

Ma mua o ke kaʻina hana hoʻomaʻamaʻa, pono e ʻae ka polokalamu noi ʻo DisplayPort sink i ka hāmeʻa kumu. Kākoʻo ka DisplayPort Rx IP iā TPS3 a me TPS4.

Ke hoʻouna nei ke kumu kumu i ka TPS3/TPS4 (kākau ke kumu kumu i ka DPCD_0x0102 e hōʻike i ka hoʻouna ʻana iā TPS3/ TPS4), pono e hana ka polokalamu i kēia mau ʻanuʻu e nānā inā ua pau ke aʻo ʻana:

Ke alakaʻi hoʻohana
DS50003546A – 9
© 2023 Microchip Technology Inc. a me kāna mau lālā

Hōʻike ʻia ʻo DisplayPort Rx IP

1. Kākau i ka helu alahele i hoʻopaʻa inoa ʻia 0x0000.

2. Kākau i ka 0x00 i loko o ka papa inoa 0x0014 e hoʻopau i ka descrambler no TPS3. Kākau i ka 0x01 e hiki ai i ka descrambler no TPS4.

3. E kali ana a hiki i ka heluhelu ʻana o ka hāmeʻa kumu i nā papa inoa DPCD_0x0202 a me DPCD_0x0203 DPCD.

4. Heluhelu i ka papa inoa 0x0038 e ʻike inā ua loaʻa iā TPS3 nā alana IP DisplayPort Rx. E hoʻonoho i ka LANEx_EQ_DONE i ka 1 ke loaʻa iā TPS3.

5. E heluhelu i ka papa inoa 0x0018 no ka ike ina ua kulike na alahele a pau. E hoʻonoho iā INTERLANE _ALIGN_DONE i ka 1 inā pili nā ala āpau.

Ma ke kaʻina hana hoʻomaʻamaʻa, pono paha ka polokalamu e hoʻonohonoho i nā hoʻonohonoho Transceiver SI a me ka laina ala Transceiver.

5.5 Loaʻa i ke kahawai wikiō (E nīnau i kahi nīnau)

Ma hope o ka pau ʻana o ka hoʻomaʻamaʻa ʻana, pono ka DisplayPort Rx IP e hiki ai i ka mea hoʻokipa wikiō wikiō. I mea e hiki ai i ka mea hoʻokipa wikiō, pono e hana ka polokalamu i kēia hoʻonohonoho:

1. Kākau i ka 0x01 i loko o ka papa inoa 0x0014 e hiki ai i ka descrambler.

2. Kākau i ka 0x01 i loko o ka papa inoa 0x0010 e hiki ai i ka mea hoʻopaʻa kahawai wikiō.

3. E heluhelu i ka MSA mai ka papa inoa 0x0048 a e kakau i ka 0x006C a hiki i ka loaa ana o na waiwai MSA.

4. Kākau i ka FrameLinesNumber i loko o ka papa inoa 0x00C0. Kākau i ka LinePixelsNumber i ka papa inoa 0x00D8. No exampʻAe, inā ʻike mākou he 1920 × 1080 wikiō wikiō mai MSA, a laila e kākau i ka 1080 i loko o ke kākau inoa 0x00C0 a kākau i ka 1920 i ka hoʻopaʻa inoa 0x00D8.

5. E heluhelu i ka papa inoa 0x01D4 e nānā inā ua manaʻo ke kiʻi kahawai wikiō i ka HWidth a me ka VHeight.

6. Heluhelu i ka papa inoa 0x01F0 e holoi a hoolei i ka waiwai heluhelu no ka mea, ua kakau keia kakau i ke kulana mai ka heluhelu hope ana.

7. E kali ana ma kahi o 1 kekona a i ʻole kekahi mau kekona, e heluhelu hou i ka papa inoa 0x01F0. Ke nānā nei i ka bit [5] e nānā inā ua laka ʻia ke kahawai wikiō HWidth. ʻO 1 ke ʻano o ka wehe ʻana a ʻo ka 0 ʻo ia ka laka. Ke nānā nei i ka bit [21] e nānā inā hoʻihoʻi ʻia ke kahawai wikiō VHeight ua laka ʻia. ʻO 1 ke ʻano o ka wehe ʻana a ʻo ka 0 ʻo ia ka laka.

5.6 Ka wehewehe wehewehe (E nīnau i kahi nīnau)

Hōʻike ka papa ma lalo i nā papa inoa kūloko i wehewehe ʻia ma DisplayPort Tx IP.

Papa 5-1. Hoʻopaʻa inoa IP DisplayPort Rx

Nā Bits Wahi		inoa		ʻAno paʻamau	wehewehe
0x0000	[2:0]	Enabled_Lanes_Number	RW	0x4	Nā ala i hoʻohana ʻia he 4 ala, 2 ala, a i ʻole 1 ala
0x0004	[2:0]	Out_Parallel_Pixel_Number	RW	0x4	ʻO ka helu o nā pika like ʻole ma ke kahawai puka wikiō
0x0010	[0]	Video_Stream_Enable	RW	0x0	E ho'ā i ka mea hoʻopaʻa kahawai wikiō
0x0014	[0]	Descramble_Enable	RW	0x0	E ho'ā i ka descrambler
0x0018	[0]	InterLane_Alignment_Status RO		0x0	E hōʻike ana inā pololei nā alahele
0x001C.	[1]	Alignment_Error	RC	0x0	Hōʻike inā he hewa i ke kaʻina hana alignment
	[0]	Hou_Alignement	RC	0x0	Hōʻike inā he hanana alignment hou. Ke hoʻolike ʻole ʻia nā alahele, manaʻo ʻia kahi hoʻoponopono hou. Ke hoʻopololei ʻia nā alahele a loaʻa kahi alaloa hou, ʻo ia hoʻi, ʻaʻohe ala o nā alahele a hoʻopaʻa hou ʻia.
0x0038		[14:12] Alanui3_RX_TPS_Mode	RO	0x0	Ua loaʻa iā Lane3 ke ʻano TPSx. ʻO 2 ke ʻano o TPS2, 3 ʻo ia ka TPS3, a ʻo 4 ke ʻano o TPS4.

Ke alakaʻi hoʻohana
DS50003546A – 10
© 2023 Microchip Technology Inc. a me kāna mau lālā

Hōʻike ʻia ʻo DisplayPort Rx IP

……..hoomau  ʻAno ʻAno Paʻamau ka wehewehe ʻana
	[10:8]	Lane2_RX_TPS_Mode	RO	0x0	Ua loaʻa iā Lane2 ke ʻano TPSx
	[6:4]	Lane1_RX_TPS_Mode	RO	0x0	Ua loaʻa iā Lane1 ke ʻano TPSx
	[2:0]	Lane0_RX_TPS_Mode	RO	0x0	Ua loaʻa iā Lane0 ke ʻano TPSx
0x0044	[7:0]	Rx_VBID	RO	0x00	Loaʻa iā VBID
0x0048	[15:0]	MSA_HTotal	RO	0x0	Loaʻa iā MSA_HTotal
0x004C.	[15:0]	MSA_VTotal	RO	0x0	Loaʻa iā MSA_VTotal
0x0050	[15:0]	MSA_HStart	RO	0x0	Loaʻa iā MSA_HStart
0x0054	[15:0]	MSA_VStart	RO	0x0	Loaʻa iā MSA_VStart
0x0058	[15]	MSA_VSync_Polarity	RO	0x0	Loaʻa iā MSA_VSYNC_Polarity
	[14:0]	MSA_VSync_Width	RO	0x0	Loaʻa iā MSA_VSYC_Width
0x005C.	[15]	MSA_HSync_Polarity	RO	0x0	Loaʻa iā MSA_HSYNC_Polarity
	[14:0]	MSA_HSync_Width	RO	0x0	Loaʻa iā MSA_HSYNC_Width
0x0060	[15:0]	MSA_HWidth	RO	0x0	Loaʻa iā MSA_HWidth
0x0064	[15:0]	MSA_VHeight	RO	0x0	Loaʻa iā MSA_VHeight
0x0068	[7:0]	MSA_MISC0	RO	0x0	Loaʻa iā MSA_MISC0
0x006C.	[7:0]	MSA_MISC1	RO	0x0	Loaʻa iā MSA_MISC1
0x00C0	[15:0]	Helu_Line_Vidio	RW	0x438	Ka helu o nā laina i loko o ke kiʻi wikiō i loaʻa
0x00C4	[15:0]	Video_VSYNC_Width	RW	0x0004	Wehewehe i ka laulā wikiō VSYNC i nā pōʻai vclk_i
0x00C8	[15:0]	Video_HSYNC_Width	RW	0x0004	Wehewehe i ka laulā wikiō HSYNC i nā pōʻai vclk_i
0x00CC	[15:0]	VSYNC_To_HSYNC_Width	RW	0x0008	Wehewehe i ka mamao ma waena o VSYNC a me HSYNC ma nā pōʻai vclk_i
0x00D0	[15:0]	HSYNC_To_Pixel_Width	RW	0x0008	Wehewehe i ka mamao ma waena o HSYNC a me ka laina mua pixel i nā pōʻai
0x00D8	[15:0]	Nā wikiō_line_pixels	RW	0x0780	Ka helu o nā pika ma kahi laina wikiō i loaʻa
0x0100		[23:16] AUX_Tx_Data_Byte_Num	RW	0x00	ʻO ka helu o nā paina ʻikepili heluhelu DPCD ma ka pane AUX
	[3:0]	Kauoha AUX_Tx	RW	0x0	ʻO ke Komikina[3:0] ma ka pane AUX (Ke ʻano pane)
0x010C.	[7:0]	AUX_Tx_Writing_Data	RW	0x00	Kākau i nā bytes ʻikepili heluhelu DPCD āpau no ka pane AUX
0x011C.	[15:0]	Tx_AUX_Reply_Num	RC	0x0	Ka helu o nā kālepa AUX Reply e hoʻouna ʻia
0x0120	[15:0]	Rx_AUX_Noi_Num	RC	0x0	ʻO ka helu o nā kālepa noi AUX e loaʻa
0x0124	[7:0]	AUX_Rx_Read_Data	RO	0x00	Heluhelu i nā bytes a pau o ka ʻoihana noi AUX i loaʻa
0x012C.	[7:0]	AUX_Rx_Noi_Length	RO	0x00	ʻO ka helu o nā bytes i loaʻa iā AUX Request transaction
0x0140	[0]	HPD_Status	RW	0x0	E hoʻonoho i ka waiwai hoʻopuka HPD
0x0144	[0]	Hoʻouna_HPD_IRQ	RW	0x0	Kākau iā 1 no ka hoʻouna ʻana i kahi pilikia HPD
0x0148	[19:0]	HPD_IRQ_Width	RW		0x249F0 Wehewehe i ka HPD IRQ haʻahaʻa pulse laula i nā pōʻai aux_clk_i
0x0180	[0]	IntMask_Total_Interrupt	RW	0x1	Interrupt Mask: hoʻopau piha
0x0184	[1]	IntMask_NewAuxRequest	RW	0x1	Interrupt Mask: Loaʻa i kahi noi AUX hou
	[0]	IntMask_TxAuxDone	RW	0x1	Interrupt Mask: Hoʻouna ʻia ka pane AUX
0x01A0	[15]	Int_TotalInt	RC	0x0	Interrupt: huina pau
	[1]	Int_NewAuxRequest	RC	0x0	Interrupt: Loaʻa i kahi noi AUX hou
	[0]	Int_TxAuxDone	RC	0x0	Hoʻopau: Hoʻouna ʻia ka pane AUX
0x01D4		[31:16] Video_Output_LineNum	RO	0x0	Ka helu o nā laina i loko o ke kiʻi wikiō puka
	[15:0]	Video_Output_PixelNum	RO	0x0	Ka helu o nā pika ma kahi laina wikiō puka
0x01F0	[21]	Video_LineNum_Unlock	RC	0x0	1 'o ia ho'i, 'a'ole i laka 'ia ka helu laina laina pahu wikiō
	[5]	Video_PixelNum_Wehe	RC	0x0	1 'o ia ho'i, 'a'ole laka 'ia ka helu o nā pika wikiō ho'opuka

Ke alakaʻi hoʻohana
DS50003546A – 11
© 2023 Microchip Technology Inc. a me kāna mau lālā

Hōʻike ʻia ʻo DisplayPort Rx IP

5.7 Hoʻonohonoho Hoʻokele (E nīnau i kahi nīnau)

Hiki iā ʻoe ke loaʻa ka mea hoʻokele files ma keia hope aku

ala: ..\\component\Microchip\SolutionCore\dp_receiver\\Driver.

Ke alakaʻi hoʻohana
DS50003546A – 12
© 2023 Microchip Technology Inc. a me kāna mau lālā

Papa hōʻike

6. Papa hōʻike (E nīnau i kahi nīnau)

Hāʻawi ʻia ʻo Testbench e nānā i ka hana o ka DisplayPort Rx IP. Hoʻohana ʻia ʻo DisplayPort Tx IP e hōʻoia i ka hana DisplayPort Rx IP.

6.1 Nā lālani hoʻohālike (E nīnau i kahi nīnau)

No ka hoʻohālikelike ʻana i ke kumu me ka hoʻohana ʻana i ka testbench, e hana i kēia mau hana:

1. Ma ka Libero SoC Catalog (View > Windows > Heluhelu), hoʻonui Hoʻonā-wikiō , kauo-a-kau i ka HōʻikePort Rx, a laila kaomi OK. E nana i keia kii.

Helu 6-1. Hōʻike Manaʻo ma Libero SoC Catalog

2. Aia ka SmartDesign i nā pilina DisplayPort Tx a me DisplayPort Rx. No ka hana ʻana i ka SmartDesign no ka hoʻohālikelike IP DisplayPort Rx, kaomi Pāhana Libero > Hoʻokō palapala. Huli i ka palapala ..\\component\Microchip\SolutionCore\dp_receiver\ \scripts\Dp_Rx_SD.tcl, a laila kaomi Holo .

Helu 6-2. E hoʻokō i ka palapala no DisplayPort Rx IP

Hōʻike ʻia ka SmartDesign. E nana i keia kii.

Ke alakaʻi hoʻohana
DS50003546A – 13
© 2023 Microchip Technology Inc. a me kāna mau lālā

Papa hōʻike

Helu 6-3. Kiʻi kiʻi SmartDesign

3. Ma ka Files pā, kaomi hoʻolikelike > Lawe mai Files. Helu 6-4. Lawe mai Files

dp_receiver_C0

prdata_o_0[31:0] pready_o_0

4. Lawe mai i ka tc_rx_videostream.txt, tc_rx_tps.txt, tc_rx_hpd.txt, tc_rx_aux_request.txt, a me tc_rx_aux_reply.txt file mai ka

alahele ma hope: ..\\component\Microchip\SolutionCore\ dp_receiver\\Stimulus.

5. E lawe mai i kahi ʻokoʻa file, e nānā i ka waihona i loaʻa ka mea e pono ai file, a kaomi Wehe. ʻO ka mea i lawe ʻia mai file ua helu ʻia ma lalo o ka simulation, e ʻike i kēia kiʻi.

 Ke alakaʻi hoʻohana

DS50003546A – 14

© 2023 Microchip Technology Inc. a me kāna mau lālā

Papa hōʻike

Helu 6-5. Lawe ʻia mai Files Papa inoa ma ka Simulation Folder

6. Ma ka Hoʻonaʻauao hoʻoulu pā, kaomi displayport_rx_tb (displayport_rx_tb. v). Lae i ka Hoʻohālike i ka Pre-Synth Design, a laila kaomi Wehe Interactive

Helu 6-6. Hoʻohālike i ka Testbench

Hoʻomaka ʻo ModelSim me ka papa hōʻike file e like me ka mea i hoikeia ma keia kii.

Ke alakaʻi hoʻohana
DS50003546A – 15
© 2023 Microchip Technology Inc. a me kāna mau lālā

Papa hōʻike

Helu 6-7. Hōʻike Hōʻike Rx ModelSim Waveform

mea nui: Inā hoʻopau ʻia ka simulation ma muli o ka palena runtime i ʻōlelo ʻia ma ka DO file, hoʻohana i ka holo -a pau kauoha e hoʻopau i ka simulation.

 Ke alakaʻi hoʻohana

DS50003546A – 16

© 2023 Microchip Technology Inc. a me kāna mau lālā

Moolelo Hooponopono

7. Moolelo Hooponopono (E nīnau i kahi nīnau)

Hōʻike ka mōʻaukala hoʻoponopono i nā loli i hoʻokō ʻia ma ka palapala. Ua helu ʻia nā hoʻololi e ka loiloi, e hoʻomaka ana me ka paʻi hou loa.

Papa 7-1. Moolelo Hooponopono

Hoʻoponopono	Lā	wehewehe
A	06/2023	Hoʻokuʻu mua ʻia o ka palapala.

Ke alakaʻi hoʻohana

DS50003546A – 17

© 2023 Microchip Technology Inc. a me kāna mau lālā

Kākoʻo FPGA Microchip 

Hoʻihoʻi ka hui huahana Microchip FPGA i kāna mau huahana me nā lawelawe kākoʻo like ʻole, me ka Customer Service, Customer Technical Support Center, a webkahua, a me nā keʻena kūʻai honua. Manaʻo ʻia nā mea kūʻai aku e kipa i nā kumuwaiwai pūnaewele Microchip ma mua o ka hoʻopili ʻana i ke kākoʻo no ka mea ua pane ʻia kā lākou mau nīnau.

E hoʻokaʻaʻike i ke kikowaena kākoʻo ʻenehana ma o ka webkahua ma www.microchip.com/support. E haʻi i ka helu ʻāpana Mea Hana FPGA, koho i ka māhele hihia kūpono, a hoʻouka i ka hoʻolālā files i ka hana ʻana i kahi hihia kākoʻo ʻenehana.

Hoʻokaʻaʻike i ka Customer Service no ke kākoʻo huahana ʻole, e like me ke kumu kūʻai huahana, hoʻonui huahana, ʻike hou, kūlana kauoha, a me ka ʻae.

• Mai ʻAmelika ʻĀkau, kelepona 800.262.1060

• Mai ke koena o ka honua, e kelepona 650.318.4460

• Fax, mai nā wahi a pau o ka honua, 650.318.8044

ʻIkepili Microchip 

ʻO ka Microchip Webpaena

Hāʻawi ʻo Microchip i ke kākoʻo pūnaewele ma o kā mākou webkahua ma www.microchip.com/. ʻO kēia webhoʻohana ʻia ka pūnaewele e hana files a me ka 'ike maʻalahi i nā mea kūʻai mai. Aia kekahi o nā mea i loaʻa:

• Kākoʻo Huahana - Nā pepa ʻikepili a me nā hewa, nā palapala noi a me nā sampnā papahana, nā kumuwaiwai hoʻolālā, nā alakaʻi a me nā palapala kākoʻo ʻenehana, nā hoʻokuʻu polokalamu hou loa a me nā polokalamu waihona

• Kākoʻo ʻenehana nui - Nā nīnau i nīnau pinepine ʻia (FAQ), nā noi kākoʻo ʻenehana, nā hui kūkākūkā pūnaewele, ka papa inoa o nā lālā o ka papahana hoʻolālā Microchip.

• ʻOihana o Microchip - Ka mea koho huahana a me nā alakaʻi kauoha, nā hoʻolaha paʻi Microchip hou loa, ka papa inoa o nā seminar a me nā hanana, nā papa inoa o nā keʻena kūʻai Microchip, nā mea hoʻolaha a me nā ʻelele hale hana.

Hana Hoʻolaha Hoʻololi Huahana

Kōkua ka lawelawe hoʻolaha hoʻololi huahana a Microchip e mālama i nā mea kūʻai aku i nā huahana Microchip. E loaʻa ka leka uila i ka poʻe kākau inoa inā loaʻa nā loli, nā mea hou, nā hoʻoponopono a i ʻole nā ​​hewa e pili ana i kahi ʻohana huahana kikoʻī a i ʻole nā ​​​​mea hana hoʻomohala hoihoi.

No ka hoʻopaʻa inoa, hele i www.microchip.com/pcn a hahai i na kuhikuhi kakau inoa. Kākoʻo mea kūʻai aku

Hiki i nā mea hoʻohana o nā huahana Microchip ke loaʻa ke kōkua ma o kekahi mau ala: • Distributor a i ʻole Lunamakaʻāinana

• Keena Kūʻai Kūloko

• ʻEnekinia Hoʻoponopono Hoʻopili (ESE)

• Kākoʻo ʻenehana

Pono nā mea kūʻai aku e hoʻokaʻaʻike i kā lākou mea hoʻolaha, ʻelele a i ʻole ESE no ke kākoʻo. Loaʻa nā keʻena kūʻai kūloko e kōkua i nā mea kūʻai aku. Aia kekahi papa inoa o nā keʻena kūʻai a me nā wahi i loko o kēia palapala.

Loaʻa ke kākoʻo ʻenehana ma o ka webkahua ma: www.microchip.com/support Nā hiʻohiʻona pale code microchip

E nānā i nā kikoʻī aʻe o ka hiʻohiʻona pale code ma nā huahana Microchip:

 Ke alakaʻi hoʻohana

DS50003546A – 18

© 2023 Microchip Technology Inc. a me kāna mau lālā

• Hoʻokō nā huahana Microchip i nā kikoʻī i loko o kā lākou Pepa ʻIkepili Microchip.

• Manaʻo ʻo Microchip ua paʻa kona ʻohana o nā huahana ke hoʻohana ʻia ma ke ʻano i manaʻo ʻia, i loko o nā kikoʻī hana, a ma lalo o nā kūlana maʻamau.

• Nā waiwai Microchip a pale ikaika i kona pono waiwai naʻauao. Ua pāpā loa ʻia ka hoʻāʻo ʻana e uhaki i nā hiʻohiʻona pale code o ka huahana Microchip a hiki ke hōʻeha i ke Digital Millennium Copyright Act.

• ʻAʻole hiki i ka Microchip a i ʻole kekahi mea hana semiconductor ke hōʻoia i ka palekana o kāna code. ʻAʻole manaʻo ka pale code e hōʻoiaʻiʻo ana mākou i ka huahana "unbreakable". Ke ulu mau nei ka pale code. Ua kūpaʻa ʻo Microchip i ka hoʻomaikaʻi mau ʻana i nā hiʻohiʻona pale code o kā mākou huahana.

Hoolaha Kanawai

Hiki ke hoʻohana ʻia kēia hoʻolaha a me ka ʻike ma ʻaneʻi me nā huahana Microchip, me ka hoʻolālā, hoʻāʻo, a hoʻohui i nā huahana Microchip me kāu noi. ʻO ka hoʻohana ʻana i kēia ʻike ma nā ʻano ʻē aʻe e kūʻē i kēia mau ʻōlelo. Hāʻawi ʻia ka ʻike e pili ana i nā noi hāmeʻa no kou ʻoluʻolu wale nō a hiki ke pani ʻia e nā mea hou. Nau ke kuleana e hōʻoia i ka hoʻokō ʻana o kāu noi me kāu mau kikoʻī. E kelepona i kāu keʻena kūʻai Microchip kūloko no ke kākoʻo hou a i ʻole, e kiʻi i ke kākoʻo hou ma www.microchip.com/en-us/support/design-help/client-support-services.

HOʻolako ʻia kēia ʻike e MICROCHIP "AS IS". ʻAʻole hana ʻo MICROCHIP i nā hōʻike a i ʻole nā ​​palapala hōʻoia o kēlā me kēia ʻano inā he hōʻike a i ʻole i ʻōlelo ʻia, kākau ʻia a waha, kānāwai a i ʻole nā ​​​​mea ʻē aʻe, e pili ana i ka ʻike me ka ʻaʻole i kaupalena ʻia i nā palapala hōʻoia ʻole o ka waiwai ʻole, ka hoʻopaʻa ʻole ʻana. KUMUMANA, A I OLE PALAPALA E PILI ANA I KONA KULANA, KA ANOAI, A I OLE KA HANA.

ʻAʻole e kuleana ʻo MICROCHIP no kekahi mea ʻole, kūikawā, PUNITIVE, INCIDENTAL, a i ʻole nā ​​hopena hopena, ʻino, kumu, a i ʻole nā ​​lilo o kēlā me kēia ʻano mea e pili ana i ka ʻike a i ʻole kona hoʻohana ʻana, akā naʻe, ua hana ʻia, ʻoiai he hewa. HIKI A I OLE E IKE AUANEI NA POINO. I KA LOA LOA I A'E IA E KE KANAWAI, AOLE E OI KA NUI O NA KUKU, IA ANA, A IA KAU I UKU pololei aku ai ia MICROCHIP.

ʻO ka hoʻohana ʻana i nā polokalamu Microchip i ke kākoʻo ola a / a i ʻole nā ​​noi palekana e pili ana i ka mea kūʻai aku, a ʻae ka mea kūʻai aku e pale, hoʻopaʻa a hoʻopaʻa ʻole i ka Microchip mai nā pōʻino, nā koi, nā hoʻopiʻi, a me nā lilo i hopena mai ia hoʻohana. ʻAʻole hāʻawi ʻia nā laikini, ma ke ʻano a i ʻole, ma lalo o nā kuleana waiwai naʻauao Microchip ke ʻole ka ʻōlelo ʻē aʻe.

Nā hōʻailona

ʻO ka inoa a me ka hōʻailona Microchip, ka logo Microchip, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom , SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, a me XMEGA he mau inoa inoa inoa o Microchip Technology Incorporated ma USA a me nā ʻāina ʻē aʻe.

AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed ​​Control, HyperLight Load, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, ʻO SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, a me ZL he mau inoa inoa inoa o Microchip Technology Incorporated ma USA.

Kāohi kī pili, AKS, Analog-no-ka-Digital Makahiki, Kekahi Capacitor, AnyIn, AnyOut, Hoʻololi i hoʻonui ʻia, BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic

 Ke alakaʻi hoʻohana

DS50003546A – 19

© 2023 Microchip Technology Inc. a me kāna mau lālā

Hoʻohālikelike Awelika, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, IntelliMOS, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, KoD, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB hōʻoia logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX , RTG4, SAM ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, Trust Time, TSHARC, USBCheck, VariSense, VectorBlo , VeriPHY, ViewʻO Span, WiperLock, XpressConnect, a me ZENA nā hōʻailona o Microchip Technology Incorporated ma USA a me nā ʻāina ʻē aʻe.

ʻO SQTP kahi hōʻailona lawelawe o Microchip Technology Incorporated ma USA

ʻO ka logo Adaptec, Frequency on Demand, Silicon Storage Technology, a me Symmcom he mau inoa inoa inoa o Microchip Technology Inc. ma nā ʻāina ʻē aʻe.

He hōʻailona inoa inoa ʻo GestIC o Microchip Technology Germany II GmbH & Co. KG, he lālā o Microchip Technology Inc., ma nā ʻāina ʻē aʻe.

ʻO nā hōʻailona ʻē aʻe a pau i ʻōlelo ʻia ma ʻaneʻi, he waiwai ia o kā lākou hui. © 2023, Microchip Technology Incorporated a me kāna mau lālā. Mālama ʻia nā kuleana a pau. ISBN: 978-1-6683-2664-0

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