UG0644 DDR AXI Arbiter
Bayanin samfur
DDR AXI Arbiter shine kayan masarufi wanda ke ba da a
64-bit AXI master interface zuwa DDR-SDRAM masu kula da guntu.
An fi amfani da shi a aikace-aikacen bidiyo don buffering da
sarrafa bayanan pixel na bidiyo. Jagorar mai amfani da samfur yana bayarwa
cikakken bayani da umarni kan aiwatar da hardware,
kwaikwayo, da kuma amfani da albarkatu.
Aiwatar Hardware
An tsara DDR AXI Arbiter don yin mu'amala tare da DDR-SDRAM
masu kula da kan-chip. Yana ba da 64-bit AXI master interface
wanda ke ba da damar sarrafa bayanan pixel na bidiyo da sauri. Mai amfani da samfur
Jagora yana ba da cikakken bayanin ƙira na DDR AXI
Arbiter da aiwatar da kayan aikin sa.
kwaikwayo
Jagorar mai amfani da samfur yana ba da umarni akan simintin
DDR AXI Arbiter ta amfani da MSS SmartDesign da kayan aikin Testbench. Wadannan
kayan aikin suna ba mai amfani damar tabbatar da daidaiton ƙira da
tabbatar da aikin da ya dace na bangaren hardware.
Amfani da Albarkatu
DDR AXI Arbiter yana amfani da albarkatun tsarin kamar dabaru
sel, tubalan ƙwaƙwalwar ajiya, da albarkatun sarrafa kayan aiki. Mai amfani da samfur
manual yana ba da cikakken rahoton amfani da albarkatu wanda
yana fayyace buƙatun albarkatun DDR AXI Arbiter. Wannan
za a iya amfani da bayanai don tabbatar da cewa bangaren hardware na iya
za a aiwatar a cikin albarkatun tsarin da ake da su.
Umarnin Amfani da samfur
Umurnai masu zuwa suna ba da jagora kan yadda ake amfani da
DDR AXI Arbiter:
Mataki 1: Aiwatar da Hardware
Aiwatar da bangaren kayan aikin DDR AXI Arbiter don dubawa
tare da masu sarrafa DDR-SDRAM akan-chip. Bi zane
bayanin da aka bayar a cikin littafin mai amfani don tabbatar da dacewa
aiwatar da bangaren hardware.
Mataki 2: Kwaikwayo
Yi kwaikwayon ƙirar DDR AXI Arbiter ta amfani da MSS SmartDesign da
Kayan aikin Testbench. Bi umarnin da aka bayar a cikin samfurin
littafin mai amfani don tabbatar da daidaiton ƙira da tabbatarwa
daidai aiki na hardware bangaren.
Mataki 3: Amfani da Albarkatu
Review rahoton amfani da albarkatun da aka bayar a cikin samfurin
Jagorar mai amfani don ƙayyade buƙatun albarkatun DDR AXI
Mai yanke hukunci. Tabbatar cewa za a iya aiwatar da bangaren hardware
a cikin albarkatun tsarin da ake da su.
Ta bin waɗannan umarnin, zaku iya amfani da DDR yadda ya kamata
Bangaren kayan aikin AXI Arbiter don buffer bayanan pixel na bidiyo da
aiki a aikace-aikacen bidiyo.
Jagorar mai amfani UG0644
DDR AXI Arbiter
Fabrairu 2018
DDR AXI Arbiter
Abubuwan da ke ciki
1 Bita Tarihin …………………………………………………………………………………………………………………………………………………
1.1 Bita 5.0……………………………………………………………………………………………………………………………………………………………………………………… 1 1.2 Bita 4.0……………………………………………………………………………………………………………………………………………………………… 1 1.3 Bita 3.0……………………………………………………………………………………………………………………………………………………………………… 1 1.4 Bita 2.0……………………………………………………………………………………………………………………………………………………………… 1 1.5 Bita 1.0……………………………………………………………………………………………………………………………………………………………………… 1
2 Gabatarwa ………………………………………………………………………………………………………………………….. 2 3 Hardware Aiwatarwa………………………………………………………………………………………………………………………………………………………………………
3.1 Bayani Halita .......................................................................................................3 fastoci ………………………………………………………………………………………………………………………………………………………….. 3.2 5 Ma'aunin Kanfigaretin …………………………………………………………………………………………………………. 3.3 13 Zane-zane na Lokaci……………………………………………………………………………………………………………………………………………………………… 3.4 14 Testbench……………………………………………………………………………………………………………………………………………………………… 3.5
3.5.1 Simulating MSS SmartDesign ………………………………………………………………………………………………………………………………………………… 25 3.5.2 Gwajin Kwaikwayo……………………………………………………………………………………………………………………………………………………… 30 3.6 Amfani da Albarkatu……………………………………………………………………………………………………………………………………………………………………….. 31
UG0644 Jagorar Mai Amfani 5.0
DDR AXI Arbiter
1
Tarihin Bita
Tarihin bita ya bayyana canje-canjen da aka aiwatar a cikin takaddar. Canje-canjen an jera su ta bita, farawa da mafi kyawun ɗaba'ar.
1.1
Bita 5.0
A cikin bita 5.0 na wannan takarda, sashin Amfani da Albarkatu da Rahoton Amfani da Albarkatu
an sabunta su. Don ƙarin bayani, duba Amfani da Albarkatu (duba shafi na 31).
1.2
Bita 4.0
Mai zuwa shine taƙaitaccen canje-canje a cikin bita 4.0 na wannan takaddar.
Ƙara ma'auni na daidaitawar testbench a cikin tebur. Don ƙarin bayani, duba Ma'auni na Kanfigareshan (duba shafi na 16)..Ƙara bayani don kwaikwayi ainihin ta amfani da testbench. Don ƙarin bayani, duba Testbench (duba shafi na 16). An sabunta Amfani da Albarkatu don ƙimar DDR AXI Arbiter a cikin tebur. Don ƙarin bayani, duba Amfani da Albarkatu (duba shafi na 31).
1.3
Bita 3.0
Mai zuwa shine taƙaitaccen canje-canje a cikin bita 3.0 na wannan takaddar.
Ƙara bayanin 8-bit don rubuta tashar 1 da 2. Don ƙarin bayani, duba Bayanin Zane (duba shafi na 3). An sabunta sashin Testbench. Don ƙarin bayani, duba Testbench (duba shafi na 16).
1.4
Bita 2.0
A cikin bita 2.0 na wannan takarda, an sabunta adadi da tebura a cikin sashin Testbench.
Don ƙarin bayani, duba Testbench (duba shafi na 16).
1.5
Bita 1.0
Bita 1.0 shine farkon buga wannan takarda
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
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Gabatarwa
Memories wani bangare ne na kowane irin aikace-aikacen bidiyo da zane-zane. Ana amfani da su don adana bayanan pixel na bidiyo. Daya gama-gari na buffering example shi ne nunin firam ɗin buffer wanda a ciki ake adana cikakken bayanan pixel na bidiyo na firam a cikin ƙwaƙwalwar ajiya.
Dual data rate (DDR) -DRAM synchronous (SDRAM) ɗaya ne daga cikin abubuwan da aka saba amfani da su a aikace-aikacen bidiyo don buffering. Ana amfani da SDRAM saboda saurin sa wanda ake buƙata don sarrafa sauri a cikin tsarin bidiyo.
Adadi na gaba yana nuna tsohonample na zane-zane na matakin-tsari na ƙwaƙwalwar DDR-SDRAM tare da aikace-aikacen bidiyo.
Hoto 1 · DDR-SDRAM Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwa
A cikin Microsemi SmartFusion®2 System-on-Chip (SoC), akwai masu kula da kan-chip DDR guda biyu tare da 64-bit Advanced Extensible interface (AXI) da 32-bit bas na babban aiki (AHB) musaya na bawa zuwa filin shirye-shirye. Ƙofar Array (FPGA) masana'anta. Ana buƙatar babban siginar AXI ko AHB don karantawa da rubuta ƙwaƙwalwar DDR-SDRAM da aka haɗa zuwa masu sarrafa kan-chip DDR.
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
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Aiwatar Hardware
3.1
Bayanin Zane
DDR AXI Arbiter yana ba da 64-bit AXI master interface zuwa DDR-SDRAM akan masu sarrafa guntu na
SmartFusion2 na'urorin. DDR AXI Arbiter yana da tashoshin karantawa huɗu da tashoshi biyu na rubuta zuwa ga
mai amfani dabaru. Toshe yana yin sulhu tsakanin tashoshin karantawa guda huɗu don ba da dama ga karatun AXI
tashar ta hanyar zagaye-robin. Muddin tashar karanta tashar 1 buƙatun karatun maigida yana da girma, AXI
karanta tashar an kasafta masa. Karanta tashar 1 yana da ƙayyadaddun bayanan fitarwa na 24-bit. Karanta tashoshi 2, 3,
kuma 4 za a iya daidaita shi azaman 8-bit, 24-bit, ko 32-bit fadin fitarwa bayanai. An zaɓi wannan ta duniya
sigar daidaitawa.
Har ila yau, toshe yana yin sulhu tsakanin tashoshi biyu na rubuta don samar da damar shiga tashar rubutun AXI ta hanyar zagaye-robin. Duk tashoshi na rubuta suna da fifiko iri ɗaya. Rubutun tashar 1 da 2 za a iya daidaita su azaman 8-bit, 24-bit, ko 32-bit bayanai nisa.
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Hoton da ke gaba yana nuna zane-zanen matakin-fita na DDR AXI Arbiter. Hoto na 2 · Tsarin Toshe Babban Matsayi na DDR AXI Arbiter Block
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Hoto mai zuwa yana nuna zane na babban matakin toshe na tsari tare da toshe DDR AXI Arbiter da aka aika cikin na'urar SmartFusion2. Hoto 3 · Tsarin-Tsarin Toshe Tsari na DDR AXI Arbiter akan Na'urar SmartFusion2
3.2
Abubuwan shigarwa da fitarwa
Tebur mai zuwa yana lissafin shigarwar da tashoshin fitarwa na DDR AXI Arbiter.
Tebura 1 · Mashigai da Tashoshin fitarwa na DDR AXI Arbiter
Sunan siginar RESET_N_I
Shigar da Hanyar
Nisa
SYS_CLOCK_NA BUFF_KARANTA_CLOCK_I
Shigar da Shigar
rd_req_1_na rd_ack_o
Fitarwa
rd_yi_1_ka fara karanta_addr_1_i
Fitarwa Input
bytes_don karanta_1_i
Shigarwa
video_rdata_1_o
Fitowa
[(g_AXI_AWIDTH-1):0] [(g_RD_CHANNEL1_AXI_BUFF_ AWIDTH + 3) - 1 : 0] [(g_RD_CHANNEL1_VIDEO_DATA_WIDTH1):0]Bayani
Ƙaramar siginar sake saitin asynchronous mai aiki don ƙira
Agogon tsarin
Rubuta agogon karatun buffer na ciki, dole ne ya ninka mitar SYS_CLOCK_I
Karanta bukatar Jagora 1
Amincewa da mai yanke hukunci don karanta buƙatu daga Jagora 1
Karanta kammalawa ga Jagora 1
Adireshin DDR daga inda za a fara karantawa don karanta tashar 1
Bytes da za a karanta daga tashar karantawa 1
Fitowar bayanan bidiyo daga tashar karantawa 1
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Sunan siginar rdata_valid_1_o rd_req_2_i rd_ack_2_o
rd_yi_2_ka fara karanta_addr_2_i
bytes_don karanta_2_i
video_rdata_2_o
rdata_valid_2_o rd_req_3_i rd_ack_3_o
rd_yi_3_ka fara karanta_addr_3_i
bytes_don karanta_3_i
video_rdata_3_o
rdata_valid_3_o rd_req_4_i rd_ack_4_o
rd_yi_4_ka fara karanta_addr_4_i
bytes_don karanta_4_i
video_rdata_4_o
rdata_valid_4_o wr_req_1_i wr_ack_1_o
wr_done_1_ka fara_write_addr_1_i
bytes_don_rubuta_1_i
bidiyo_wdata_1_i
wdata_valid_1_i wr_req_2_i
Fitowar Fitar da Fitowar Jagora
Fitarwa Input
Shigarwa
Fitowa
Fitar da Fitarwa
Fitarwa Input
Shigarwa
Fitowa
Fitar da Fitarwa
Fitarwa Input
Shigarwa
Fitowa
Fitar da Fitarwa
Fitarwa Input
Shigarwa
Shigarwa
Shigar da Shigar
Nisa
[(g_AXI_AWIDTH-1):0] [(g_RD_CHANNEL2_AXI_BUFF_AWIDTH + 3) - 1 : 0] [(g_RD_CHANNEL2_VIDEO_DATA_WIDTH1):0] [(g_AXI_AWIDTH-1):0] [(g_AXI_AWIDTH-3):3] : 1] [(g_RD_CHANNEL0_VIDEO_DATA_WIDTH3 ):1] [(g_AXI_AWIDTH-0):1] [(g_RD_CHANNEL0_AXI_BUFF_AWIDTH + 4) - 3 : 1] [(g_RD_CHANNEL0_VIDEO_DATA_WIDTH4):1] [(g_WIDTH-0):1] 0:1 ku ] [(g_WR_CHANNEL3_VIDEO_DATA_WIDTH1):0]
Bayanin karanta bayanan da suka dace daga tashar karantawa 1 Karanta buƙatun daga Jagora 2 Ƙaddamarwar Arbiter don karanta buƙatar daga Jagora 2 Karanta kammala zuwa Jagora 2 adireshin DDR daga inda za a fara karantawa don karanta tashar 2 Bytes da za a karanta daga tashar karantawa 2 Bayanan bidiyo Fitarwa daga tashar karantawa 2 Karanta bayanai masu inganci daga tashar karantawa 2 Karanta buƙata daga Jagora 3 Amincewar karantawa don karanta buƙatun daga Jagora 3 Karanta kammalawa zuwa Jagora 3 adireshin DDR daga inda za a fara karantawa don karanta tashar 3 Bytes da za a karanta daga karantawa. Tashar 3 Fitowar bayanan bidiyo daga tashar karantawa 3 Karanta bayanai masu inganci daga tashar karantawa 3 Karanta buƙatu daga Jagora 4 Yarda da Arbiter don karanta buƙata daga Jagora 4 Karanta kammalawa zuwa Jagora 4 adireshin DDR daga inda za a fara karantawa don karanta tashar karantawa daga tashar karantawa 4 Fitowar bayanan bidiyo daga tashar karantawa 4 Karanta bayanai masu inganci daga tashar karantawa 4 Rubuta buƙatun daga Jagora 4 Yarda da Arbiter don rubuta buƙata daga Jagora Bytes da za a rubuta daga rubuta tashar 1 Bayanan bidiyo Shigarwa don rubuta tashar 1
Rubuta bayanai masu inganci don rubuta tashar 1 Rubuta buƙatun daga Jagora 1
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Sunan siginar wr_ack_2_o
Fitowar Hanya
wr_done_2_ka fara_write_addr_2_i
Fitarwa Input
bytes_don_rubuta_2_i
Shigarwa
bidiyo_wdata_2_i
Shigarwa
wdata_valid_2_i AXI I/F sigina na karanta Adireshin m_arid_o
Fitarwa
m_araddr_o
Fitowa
m_arlen_o
Fitowa
m_arsize_o m_arburst_o
Fitowar Fitowa
m_arlock_o
Fitowa
m_arcache_o
Fitowa
m_arprot_o
Fitowa
Nisa
[(g_AXI_AWIDTH-1):0] [(g_WR_CHANNEL2_AXI_BUFF_AWIDTH + 3) - 1 : 0] [(g_WR_CHANNEL2_VIDEO_DATA_WIDTH1):0]
Bayanin Yarda da Arbiter don rubuta buƙatu daga Jagora 2 Rubuta kammala zuwa Jagora 2 adreshin DDR wanda dole ne a rubuta shi daga tashar rubutawa.
Rubuta bayanan inganci don rubuta tashar 2
Karanta ID address. Ganewa tag don rukunin sigina na adireshin karantawa.
Karanta adireshin. Yana ba da adireshin farko na fashewar ciniki. Adireshin farawa ne kawai aka bayar.
Tsawon fashe. Yana ba da ainihin adadin canja wuri a cikin fashe. Wannan bayanin yana ƙayyade adadin canja wurin bayanai da ke da alaƙa da adireshin
Girman fashewa. Girman kowane canja wuri a cikin fashe
Nau'in fashewa. Haɗe tare da girman bayanin, cikakkun bayanai yadda ake ƙididdige adireshin kowane canja wuri a cikin fashe.
Kafaffen zuwa 2'b01 à Ƙaramar adireshin fashe
Nau'in Kulle. Yana ba da ƙarin bayani game da halayen atomic na canja wuri.
Kafaffen zuwa 2'b00 à Normal Access
Nau'in cache. Yana ba da ƙarin bayani game da halayen cacheable na canja wuri.
Kafaffen zuwa 4'b0000 à Mara cacheable kuma mara bufferable
Nau'in kariya. Yana ba da bayanin sashin kariya don ma'amala.
Kafaffen zuwa 3'b000 à Al'ada, amintaccen samun damar bayanai
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Sunan siginar m_arvalid_o
Fitowar Hanya
Nisa
m_shirya_i
Shigarwa
Karanta Tashar Bayanai
m_rid_i
Shigarwa
[3:0]m_rdata_i m_rresp_i
m_rlast_i m_rvalid_i
Shigar da Shigar
[(g_AXI_DWIDTH-1):0] [1:0]Shigar da Shigar
m_ shirya_o
Fitowa
Tashar adireshin Rubutun
m_awid_o
Fitowa
m_awaddr_o
Fitowa
[3:0] [(g_AXI_AWIDTH-1):0]UG0644 Jagorar Mai Amfani 5.0
Bayanin adireshin karanta yana aiki.
Lokacin da HIGH, adireshin karantawa da bayanin sarrafawa suna aiki kuma suna da girma har sai siginar da adireshin ya yarda, m_arready, yayi girma.
`1' = Adireshi da bayanan sarrafawa suna aiki
`0′ = Adireshi da bayanin sarrafawa ba su da inganci. Karanta adireshin shirye. Bawan yana shirye ya karɓi adireshi da siginonin sarrafawa masu alaƙa:
1 = bawa ya shirya
0 = bawa bai shirya ba.
Karanta ID tag. ID tag na rukunin bayanan da aka karanta na sigina. Ƙimar m_rid bawa ne ya samar da ita kuma dole ne ya dace da ƙimar m_arid na ma'amalar karantawa wanda yake amsawa. Karanta bayanai. Karanta amsa.
Matsayin canja wurin karantawa. Amsoshin da aka yarda sune OKAY, EXOKAY, SLVERR, da DECERR. Karanta karshe.
Canja wurin ƙarshe a cikin fashewar karantawa. Karanta inganci. Ana samun bayanan karatun da ake buƙata kuma canja wurin karatun na iya kammala:
1 = karanta bayanai akwai
0 = karanta bayanai ba samuwa. Karanta a shirye. Jagora na iya karɓar bayanan karantawa da bayanan amsawa:
1= maigida ya shirya
0 = malam bai shirya ba.
Rubuta ID address. Ganewa tag don rukunin sigina na rubuta adireshin. Rubuta adireshin. Yana ba da adireshin canja wuri na farko a cikin fashe ma'amala. Ana amfani da siginar sarrafawa masu alaƙa don ƙayyade adiresoshin sauran canja wuri a cikin fashe.
8
DDR AXI Arbiter
Sunan siginar m_awlen_o
Fitowar Hanya
Nisa [3:0]
m_awsize_o
Fitowa
[2:0]m_awburst_o
Fitowa
[1:0]m_awlock_o
Fitowa
[1:0]m_awcache_o
Fitowa
[3:0]m_awprot_o
Fitowa
[2:0]m_awvalid_o
Fitowa
Bayani
Tsawon fashe. Yana ba da ainihin adadin canja wuri a cikin fashe. Wannan bayanin yana ƙayyade adadin canja wurin bayanai da ke da alaƙa da adireshin.
Girman fashewa. Girman kowane canja wuri a cikin fashe. Tasirin layin byte yana nuna daidai waɗanne hanyoyin byte don ɗaukakawa.
Kafaffen zuwa 3'b011 à 8 bytes ta hanyar canja wurin bayanai ko canja wurin 64-bit
Nau'in fashewa. Haɗe tare da girman bayanin, cikakkun bayanai yadda ake ƙididdige adireshin kowane canja wuri a cikin fashe.
Kafaffen zuwa 2'b01 à Ƙaramar adireshin fashe
Nau'in Kulle. Yana ba da ƙarin bayani game da halayen atomic na canja wuri.
Kafaffen zuwa 2'b00 à Normal Access
Nau'in cache. Yana nuna abin bufferable, cacheable, rubuta-ta, rubuta- baya, da ware sifofin ma'amala.
Kafaffen zuwa 4'b0000 à Mara cacheable kuma mara bufferable
Nau'in kariya. Yana nuna matakin kariya na yau da kullun, gata, ko amintaccen matakin ma'amala da ko ma'amalar hanyar samun bayanai ce ko hanyar koyarwa.
Kafaffen zuwa 3'b000 à Al'ada, amintaccen samun damar bayanai
Rubuta adireshin inganci. Yana nuna ingantaccen adireshi da sarrafawa
akwai bayanai:
1 = adireshi da bayanan sarrafawa akwai
0 = adireshi da bayanin kulawa ba su samuwa. Adireshin da bayanan sarrafawa suna tsayawa har sai an tabbatar da siginar adreshin, m_awready, yana KYAU.
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Sunan siginar m_awready_i
Shigar da Hanyar
Nisa
Rubutun Channel Data
m_wid_o
Fitowa
[3:0]m_wdata_o m_wstrb_o
Fitowar Fitowa
[(g_AXI_DWIDTH-1):0] AXI_DWDITH siga[7:0]
m_wlast_o m_wvalid_o
Fitowar Fitowa
m_wready_i
Shigarwa
Rubuta Siginan Tashar Amsa
m_bid_i
Shigarwa
[3:0]m_bresp_i m_bvalid_i
Shigarwa
[1:0]Shigarwa
m_bready_o
Fitowa
Bayanin Rubuta adireshin shirye. Yana nuna cewa bawan a shirye yake ya karɓi adireshi da alamun sarrafawa masu alaƙa:
1 = bawa ya shirya
0 = bawa bai shirya ba.
Rubuta ID tag. ID tag na rubuta canja wurin bayanai. Dole ne ƙimar m_wid ta dace da ƙimar m_awid na ma'amalar rubutu. Rubuta bayanai
Rubuta strobes. Wannan siginar yana nuna waɗanne hanyoyin byte don ɗaukakawa a ƙwaƙwalwar ajiya. Akwai strobe guda ɗaya don kowane rago takwas na bas ɗin rubuta bayanai Rubuta na ƙarshe. Canja wurin ƙarshe a fashewar rubutu. Rubuta inganci. Akwai ingantattun bayanan rubutu da strobes:
1 = rubuta bayanai da strobes samuwa
0 = rubuta bayanai da strobes ba samuwa. Rubuta shirye. Bawa na iya karɓar bayanan rubutawa: 1 = bawa yana shirye
0 = bawa bai shirya ba.
ID na amsawa. A ganewa tag na mayar da martani. Ƙimar m_bid dole ne ta yi daidai da ƙimar m_awid na rubutun ciniki wanda bawa yake amsawa. Rubuta amsa. Matsayin rubutun ciniki. Amsoshin da aka yarda sune OKAY, EXOKAY, SLVERR, da DECERR. Rubuta amsa mai inganci. Akwai ingantacciyar amsa ta rubuta:
1 = rubuta amsa akwai
0 = rubuta amsa ba samuwa. An shirya martani. Jagora na iya karɓar bayanin amsawa.
1 = master shirye
0 = malam bai shirya ba.
Hoton da ke gaba yana nuna zanen toshe na ciki na DDR AXI arbiter.
UG0644 Jagorar Mai Amfani 5.0
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DDR AXI Arbiter
Hoton da ke gaba yana nuna zanen toshe na ciki na DDR AXI arbiter. Hoto na 4 · Tsare-tsare na Ciki na DDR AXI Arbiter
Kowace tashar karantawa tana tasowa lokacin da ta sami babban siginar shigarwa akan shigarwar read_req_(x) _i. Sannan shi
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DDR AXI Arbiter
Kowace tashar karantawa tana tasowa lokacin da ta sami babban siginar shigarwa akan shigarwar read_req_(x) _i. Sai samples adireshin farawa na AXI da bytes don karanta abubuwan da aka shigar waɗanda suke shigarwa daga maigidan waje. Tashar ta yarda da babban malamin waje ta hanyar kunna read_ack_(x)_o. Tashar tana aiwatar da abubuwan shigarwa kuma tana haifar da ma'amalar AXI da ake buƙata don karanta bayanai daga DDR-SDRAM. Bayanan da aka karanta a cikin tsarin 64-bit AXI ana adana su cikin buffer na ciki. Bayan an karanta bayanan da ake buƙata kuma an adana su cikin ma'ajin ciki, an kunna tsarin un-packer. Modul ɗin un-packer yana buɗe kowace kalma 64-bit a cikin tsayin bit ɗin bayanan fitarwa da ake buƙata don takamaiman tashar don tsohon.ampIdan tashar an saita ta azaman 32-bit fitarwa bayanai nisa, kowace kalma 64-bit ana aika shi azaman kalmomi guda biyu na fitarwa 32-bit. Don tashar 1 wacce tashar 24-bit ce, un-packer yana buɗe kowace kalma 64-bit cikin bayanan fitarwa 24-bit. Kamar yadda 64 ba nau'in 24 ba ne, un-packer don karanta tashar 1 yana haɗa rukuni na kalmomi 64-bit guda uku don samar da kalmomi takwas na 24-bit. Wannan yana sanya takura kan karanta tashar 1 cewa bayanan bytes ɗin da maigidan na waje ya buƙaci ya kamata a raba su ta 8. Karanta tashoshi 2, 3, da 4 ana iya daidaita su azaman 8-bit, 24bit, da faɗin 32-bit, wanda shine an ƙaddara ta g_RD_CHANNEL(X) _VIDEO_DATA_WIDTH siga daidaitawar duniya. Idan an saita su azaman 24-bit, ƙayyadaddun da aka ambata a sama za su yi amfani da kowane ɗayan su kuma. Amma idan an saita su azaman 8-bit ko 32-bit, babu irin wannan ƙuntatawa kamar yadda 64 ke da yawa na 32 da 8. A cikin waɗannan lokuta, kowace kalma 64-bit tana buɗewa cikin ko dai kalmomin bayanai 32-bit guda biyu ko takwas 8. -bit data kalmomi.
Karanta Channel 1 yana buɗe kalmomin bayanan 64-bit waɗanda aka karanta daga DDR-SDRAM zuwa kalmomin bayanan fitarwa na 24-bit a cikin batches na kalmomin 48 64-bit, wato duk lokacin da 48 64-bit kalmomi ke samuwa a cikin buffer na ciki na tashar karantawa 1, un-packer ya fara kwashe su don ba da bayanan fitarwa 24-bit. Idan bayanan bayanan da ake buƙata don karantawa sun gaza kalmomi 48 64-bit, un-packer ana kunna shi ne kawai bayan an karanta cikakkun bayanai daga cikin DDR-SDRAM. A cikin ragowar tashoshi uku da aka karanta, un-packer yana fara aika bayanan karantawa kawai bayan an karanta cikakken adadin bytes da aka nema daga DDR-SDRAM.
Lokacin da aka saita tashar karantawa don faɗin fitarwa 24-bit, adireshin farawa dole ne a daidaita shi zuwa iyakar 24-bytes. Ana buƙatar wannan don gamsar da ƙaƙƙarfan cewa un-packer yana buɗe rukuni na kalmomi 64-bit guda uku don samar da kalmomi takwas na fitarwa 24-bit.
Duk tashoshin da aka karanta suna haifar da fitowar da aka karanta zuwa ga maigidan na waje bayan an aika bytes ɗin da aka nema zuwa maigidan na waje.
Idan akwai tashoshi na rubutu, maigidan na waje dole ne ya shigar da bayanan da ake buƙata zuwa takamaiman tashar. Tashar rubuta tana ɗaukar bayanan shigarwa kuma ta tattara su cikin kalmomi 64-bit kuma tana adana su a cikin ma'ajiyar ciki. Bayan an adana bayanan da ake buƙata, maigidan na waje dole ne ya samar da buƙatun rubuta tare da adireshin farawa da bytes don rubutawa. Na sampLokacin da waɗannan abubuwan shigar, tashar rubuta ta yarda da maigidan na waje. Bayan wannan, tashar tana haifar da AXI rubuta ma'amala don rubuta bayanan da aka adana a cikin DDR-SDRAM. Duk tashoshi na rubutu suna samar da fitarwar da aka yi ga maigidan waje da zarar an rubuta bytes ɗin da aka nema cikin DDR-SDRAM. Bayan an ba da buƙatar rubutawa ga kowane tashar rubutu, ba dole ba ne a rubuta sabbin bayanai a cikin tashar rubuta ba, har sai an nuna ƙarshen ciniki na yanzu ta hanyar tabbatar da wr_done_(x)_o
Rubutun tashoshi 1 da 2 za a iya daidaita su azaman 8-bit, 24-bit, da 32-bit data faɗin, wanda g_WR_CHANNEL(X) _VIDEO_DATA_WIDTH sigar daidaitawa ta duniya ta ƙaddara. Idan an saita su azaman 24bit, to, bytes ɗin da za a rubuta dole ne su kasance masu yawa na takwas kamar yadda ma'ajin na ciki ya ƙunshi kalmomin bayanai 24-bit guda takwas don samar da kalmomin bayanai 64-bit guda uku. Amma idan an saita su azaman 8-bit ko 32-bit, babu irin wannan ƙuntatawa.
Don tashar 32-bit, dole ne a karanta mafi ƙarancin kalmomi 32-bit guda biyu. Don tashar 8-bit, ana buƙatar karanta mafi ƙarancin kalmomi 8-bit, saboda babu wani padding ɗin da arbiter module ya bayar. A cikin duk tashoshi na karantawa da rubutawa, zurfin maƙallan ciki yana da yawa na nuni a kwance. An ƙididdige zurfin buffer na ciki kamar haka:
g_RD_CHANNEL(X)_HORIZONTAL_RESOLUTION* g_RD_CHANNEL(X)_VIDEO_DATA_WIDTH * g_RD_CHANNEL(X)_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
Ina, X = Lambar tashar
An ƙayyade faɗin buffer na ciki ta hanyar faɗin bas ɗin bayanan AXI wato, siginar daidaitawa
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An ƙayyade faɗin buffer na ciki ta hanyar faɗin bas ɗin bayanan AXI wato, sigar daidaitawa g_AXI_DWIDTH.
Ana yin ma'amala da karantawa da rubuta AXI bisa ga ƙayyadaddun ARM AMBA AXI. An daidaita girman ma'amala don kowane canja wurin bayanai zuwa 64-bit. Toshe yana haifar da ma'amalar AXI na tsayayyen fashe tsawon bugun 16. Har ila yau, toshe yana bincika ko wani fashe ɗaya ya ketare iyakar adireshin AXI na 4 KByte. Idan fashe guda ɗaya ya ketare iyakar KByte 4, fashewar ta rabu zuwa 2 fashe a iyakar KByte 4.
3.3
Ma'aunin Kanfigareshan
Tebur mai zuwa yana lissafin sigogin sanyi da aka yi amfani da su wajen aiwatar da kayan aikin DDR AXI Arbiter. Waɗannan sigogi ne na gabaɗaya kuma ana iya bambanta dangane da buƙatun aikace-aikacen.
Tebur 2 · Ma'aunin Kanfigareshan
Suna g_AXI_AWIDTH g_AXI_DWIDTH g_RD_CHANNEL1_AXI_BUFF_AWIDTH
g_RD_CHANNEL2_AXI_BUFF_AWIDTH
g_RD_CHANNEL3_AXI_BUFF_AWIDTH
g_RD_CHANNEL4_AXI_BUFF_AWIDTH
g_WR_CHANNEL1_AXI_BUFF_AWIDTH
g_WR_CHANNEL2_AXI_BUFF_AWIDTH
g_RD_CHANNEL1_HORIZONTAL_RESOLUTION g_RD_CHANNEL2_HORIZONTAL_RESOLUTION g_RD_CHANNEL3_HORIZONTAL_RESOLUTION g_RD_CHANNEL4_HORIZONTAL_RESOLUTION g_WR_CHANNELTION g_WR_CHANNEL1_WR_CHANNEL2_HORIZONTAL RESOLUTION g_RD_CHANNEL1_VIDEO_DATA_WIDTH g_RD_CHANNEL2_VIDEO_DATA_WIDTH g_RD_CHANNEL3_VIDEO_DATA_WIDTH g CHANNEL4_BUFFER_LINE_STORAGE
Bayani
Faɗin adireshin bas ɗin AXI
Faɗin bas ɗin bayanan AXI
Adireshin faɗin bas ɗin don karanta tashar tashoshi 1 na ciki, wanda ke adana bayanan karanta AXI.
Adireshin faɗin bas ɗin don karanta tashar tashoshi 2 na ciki, wanda ke adana bayanan karanta AXI.
Adireshin faɗin bas ɗin don karanta tashar tashoshi 3 na ciki, wanda ke adana bayanan karanta AXI.
Adireshin faɗin bas ɗin don karanta tashar tashoshi 4 na ciki, wanda ke adana bayanan karanta AXI.
Adireshin faɗin bas ɗin don rubutaccen buffer na ciki na Channel 1, wanda ke adana bayanan rubuta AXI.
Adireshin faɗin bas ɗin don rubutaccen buffer na ciki na Channel 2, wanda ke adana bayanan rubuta AXI.
Nunin bidiyo a kwance don karanta Channel 1
Nunin bidiyo a kwance don karanta Channel 2
Nunin bidiyo a kwance don karanta Channel 3
Nunin bidiyo a kwance don karanta Channel 4
Nuna ƙudurin bidiyo a kwance don rubuta Channel 1
Nuna ƙudurin bidiyo a kwance don rubuta Channel 2
Read Channel 1 video fitarwa bit nisa
Read Channel 2 video fitarwa bit nisa
Read Channel 3 video fitarwa bit nisa
Read Channel 4 video fitarwa bit nisa
Rubuta tashoshi 1 bidiyo Faɗin shigarwar bit.
Rubuta tashoshi 2 bidiyo Faɗin shigarwar bit.
Zurfin buffer na ciki don karanta Channel 1 dangane da adadin nuni a kwance. Zurfin buffer shine g_RD_CHANNEL1_HORIZONTAL_RESOLUTION * g_RD_CHANNEL1_VIDEO_DATA_WIDTH * g_RD_CHANNEL1_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
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3.4
Sunan g_RD_CHANNEL2_BUFFER_LINE_STORAGE g_RD_CHANNEL3_BUFFER_LINE_STORAGE g_RD_CHANNEL4_BUFFER_LINE_STORAGE g_WR_CHANNEL1_BUFFER_LINE_STORAGE g_WR_CHANNEL2_BUFFER_LINE
Bayani
Zurfin buffer na ciki don karanta Channel 2 dangane da adadin nuni a kwance. Zurfin buffer shine g_RD_CHANNEL2_HORIZONTAL_RESOLUTION * g_RD_CHANNEL2_VIDEO_DATA_WIDTH * g_RD_CHANNEL2_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
Zurfin buffer na ciki don karanta Channel 3 dangane da adadin nuni a kwance. Zurfin buffer shine g_RD_CHANNEL3_HORIZONTAL_RESOLUTION * g_RD_CHANNEL3_VIDEO_DATA_WIDTH * g_RD_CHANNEL3_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
Zurfin buffer na ciki don karanta Channel 4 dangane da adadin nuni a kwance. Zurfin buffer shine g_RD_CHANNEL4_HORIZONTAL_RESOLUTION * g_RD_CHANNEL4_VIDEO_DATA_WIDTH * g_RD_CHANNEL4_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
Zurfin buffer na ciki don rubuta Channel 1 dangane da adadin layukan kwance. Zurfin buffer shine g_WR_CHANNEL1_HORIZONTAL_RESOLUTION * g_WR_CHANNEL1_VIDEO_DATA_WIDTH * g_WR_CHANNEL1_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
Zurfin buffer na ciki don rubuta Channel 2 dangane da adadin layukan kwance. Zurfin buffer shine g_WR_CHANNEL2_HORIZONTAL_RESOLUTION * g_WR_CHANNEL2_VIDEO_DATA_WIDTH * g_WR_CHANNEL2_BUFFER_LINE_STORAGE) / g_AXI_DWIDTH
Jadawalin lokaci
Hoto na gaba yana nuna haɗin abubuwan shigar da karatu da rubuta buƙatun, fara adireshin ƙwaƙwalwar ajiya, bytes don karantawa ko rubuta bayanai daga maigidan waje, karantawa ko rubuta yarda, da karanta ko rubuta abubuwan da aka gama da mai yanke hukunci.
Hoto na 5 · Tsare-tsare na lokaci don Sigina da Aka Yi Amfani da su a Rubutu/Karanta Ta hanyar Interface AXI
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DDR AXI Arbiter
Hoton da ke gaba yana nuna alaƙa tsakanin shigar da bayanan rubutawa daga maigidan waje tare da shigar da bayanan da ke aiki ga tashoshin rubutu guda biyu. Hoto 6 · Jadawalin lokaci don Rubutu cikin Ma'ajiyar Ciki
Hoto na 2 · Tsarin lokaci don Bayanan da aka karɓa ta hanyar DDR AXI Arbiter don Karanta Tashoshi 3, 4. ,kuma 7
Hoton da ke gaba yana nuna alaƙa tsakanin bayanan da aka karanta don karanta Channel 1 lokacin da g_RD_CHANNEL 1_HORIZONTAL_RESOLUTION ya fi 128 girma (a wannan yanayin = 256). Hoto 8 · Jadawalin lokaci don Bayanan da aka karɓa ta hanyar DDR AXI Arbiter Read Channel 1 (fiye da 128 bytes)
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DDR AXI Arbiter
Hoton da ke gaba yana nuna haɗin tsakanin bayanan da aka karanta don tashar tashar 1 da aka karanta lokacin da g_RD_CHANNEL 1_HORIZONTAL_RESOLUTION bai kai ko daidai da 128 ba (a wannan yanayin = 64). Hoto 9 · Jadawalin lokaci don Bayanan da aka karɓa ta DDR AXI Arbiter Read Channel 1 (kasa da ko daidai da 128 bytes)
3.5
Testbench
An tanadar da testbench don duba ayyukan DDR Arbiter core. Tebur mai zuwa yana lissafin sigogi waɗanda za'a iya daidaita su gwargwadon aikace-aikacen.
Tebur 3 · Ma'auni na Kanfigareshan Testbench
Suna IMAGE_1_FILE_NAME IMAGE_2_FILE_NAME g_DATA_WIDTH WIDTH HEIGHT
Bayanin Shigarwa file Sunan hoton da za a rubuta ta hanyar rubuta tasha 1 Input file Sunan hoton da za a rubuta ta hanyar rubutawa 2 Faɗin bayanan bidiyo na tashar karantawa ko rubutawa Tsararriyar hoton da za a rubuta da karantawa ta hanyar rubutu da karantawa Tsayar da hoton da za a rubuta da karantawa ta hanyar rubutu da karantawa. tashoshi
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Matakan da ke biyo baya sun bayyana yadda ake amfani da testbench don yin kwaikwayon ainihin ta hanyar Libero SoC. 1. A cikin Design Flow taga, danna-dama Create SmartDesign kuma danna Run don ƙirƙirar SmartDesign.
Hoto 10 · Ƙirƙiri SmartDesign
2. Shigar da sunan sabon zane a matsayin video_dma a cikin Ƙirƙiri Sabon SmartDesign akwatin maganganu kuma danna Ok. An ƙirƙiri SmartDesign, kuma ana nuna zane a dama na Fane ɗin Zane.
Hoto 11 · Sunan SmartDesign
3. A cikin Catalog taga, fadada Solutions-Video da ja-da-drop SF2 DDR Memory Arbiter a cikin SmartDesign canvas.
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DDR AXI Arbiter
Hoto na 12 · Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwa ) ne na Libero ya yi
Ana nuna DDR Memory Arbiter Core, kamar yadda aka nuna a cikin adadi mai zuwa. Danna maɓallin tsakiya sau biyu don saita mai yanke hukunci idan an buƙata.
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Hoto 13 · DDR Memory Arbiter Core a cikin SmartDesign Canvas
4. Zaɓi duk tashar jiragen ruwa na core kuma danna-dama sannan danna Promote to Top Level, kamar yadda aka nuna a cikin
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4. Zaɓi duk tashar jiragen ruwa na core kuma danna-dama sannan danna Promote to Top Level, kamar yadda aka nuna a cikin wannan adadi. Hoto 14 · Haɓaka zuwa Zaɓin Babban Matsayi
Tabbatar da haɓaka duk tashoshin jiragen ruwa zuwa saman matakin kafin danna gunkin abubuwan samar da kayan aiki a cikin kayan aiki.
5. Danna gunkin Ƙirƙirar Ƙa'idar Ƙarfafa a cikin SmartDesign Toolbar, kamar yadda aka nuna a cikin wannan adadi.
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5. Danna gunkin Ƙirƙirar Ƙa'idar Ƙarfafa a cikin SmartDesign Toolbar, kamar yadda aka nuna a cikin wannan adadi. An samar da bangaren SmartDesign. Hoto na 15 · Ƙirƙirar Abun Ciki
6. Kewaya zuwa View > Windows > Files. The Filean nuna akwatin maganganu. 7. Danna-dama babban fayil ɗin simulation kuma danna Import Files, kamar yadda aka nuna a cikin adadi mai zuwa.
Hoto 16 · Shigowa File
8. Don Shigo da motsin hoton file, kewaya da shigo da ɗayan waɗannan abubuwan files kuma danna Buɗe.
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DDR AXI Arbiter
8. Don Shigo da motsin hoton file, kewaya da shigo da ɗayan waɗannan abubuwan files kuma danna Buɗe. a. A sampda RGB_in.txt file An bayar da shi tare da testbench a hanya mai zuwa:
..Project_namecomponentMicrosemiSolutionCore ddr_memory_arbiter 2.0.0Stimulus
Don shigo da sampdon gwada hoton shigar da benci, bincika zuwa sample testbench shigar da hoton file, kuma danna Buɗe, kamar yadda aka nuna a cikin adadi mai zuwa. Hoto 17 · Hoton Shigarwa File Zabi
b. Don shigo da hoto daban, lilo zuwa babban fayil ɗin da ke ɗauke da hoton da ake so file, kuma danna Buɗe. Ƙamar hoton da aka shigo da ita file An jera a ƙarƙashin littafin simulation, kamar yadda aka nuna a cikin adadi mai zuwa. Hoto 18 · Hoton Shigarwa File a cikin Simulator Directory
9. Shigo da ddr BFM files. Biyu files wanda yayi daidai da
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kuma
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DDR AXI Arbiter
9. Shigo da ddr BFM files. Biyu files wanda yayi daidai da DDR BFM - ddr3.v da ddr3_parameters.v ana tanadar su tare da testbench a hanya mai zuwa: ..Project_namecomponentMicrosemiSolutionCoreddr_memory_arbiter 2.0.0Stimulus. Danna-dama babban fayil mai kara kuzari kuma zaɓi Shigo Files zaɓi, sannan zaɓi BFM da aka ambata files. DDR BFM da aka shigo da shi files an jera su a ƙarƙashin abin ƙarfafawa, kamar yadda aka nuna a cikin adadi mai zuwa. Hoto 19 · Shigo File
10. Kewaya zuwa File > Shigowa > Wasu. Shigowar Filean nuna akwatin maganganu. Hoto 20 · Shigo da Testbench File
11. Shigo da testbench da bangaren MSS files (top_tb.cxf, mss_top_sb_MSS.cxf, mss_top.cxf, da mss
..Project_namecomponentMicrosemiSolutionCoreddr_memory_arbiter 2.0.0Stimulus
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11.
DDR AXI Arbiter
Hoto 21 · Shigo da Testbench da MSS Bangaren Files
Hoto 22 · top_tb An Ƙirƙiri
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3.5.1
Simulating MSS SmartDesign
Umurnai masu zuwa suna bayyana yadda ake kwaikwayon MSS SmartDesign:
1. Danna shafin Tsara Tsara kuma zaɓi Bangaren daga jerin abubuwan da aka saukar. Ana nuna MSS SmartDesign da aka shigo dashi.
2. Dama danna mss_top a ƙarƙashin Aiki kuma danna Buɗe Bangaren, kamar yadda aka nuna a cikin wannan adadi. Ana nuna bangaren mss_top_sb_0.
Hoto 23 · Buɗe Bangaren
3. Danna-dama akan bangaren mss_top_sb_0 sannan ka danna Configure, kamar yadda aka nuna a adadi mai zuwa.
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DDR AXI Arbiter
3. Danna-dama akan bangaren mss_top_sb_0 sannan ka danna Configure, kamar yadda aka nuna a adadi mai zuwa. Hoto 24 · Sanya Abun Ciki
Ana nuna taga Kanfigareshan MSS, kamar yadda aka nuna a adadi mai zuwa. Hoto 25 · Tagar Kanfigareshan MSS
4. Danna gaba ta duk shafukan daidaitawa, kamar yadda aka nuna a hoton da ke gaba.
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DDR AXI Arbiter
4. Danna gaba ta duk shafukan daidaitawa, kamar yadda aka nuna a hoton da ke gaba. Hoto 26 · Shafukan Kanfigareshan
An saita MSS bayan an saita shafin Tsagewa. Hoto mai zuwa yana nuna ci gaban Kanfigareshan MSS. Hoto 27 · Tagar Kanfigareshan MSS Bayan Kanfigareshan
5. Danna Next bayan an gama daidaitawa. Ana nuna taga taswirar ƙwaƙwalwar ajiya, kamar yadda aka nuna a adadi mai zuwa.
Hoto 28 · Taswirar Ƙwaƙwalwa
6. Danna Gama.
7. Danna Generate Component daga SmartDesign Toolbar don samar da MSS, kamar yadda aka nuna a cikin
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7. Danna Generate Component daga SmartDesign Toolbar don samar da MSS, kamar yadda aka nuna a cikin wannan adadi. Hoto 29 · Ƙirƙirar Ƙarfafawa
8. A cikin taga Design Hierarchy, danna-dama mss_top a karkashin Work kuma danna Set As Tushen, kamar yadda aka nuna a cikin wannan adadi. Hoto 30 · Sanya MSS azaman Tushen
9. A cikin Tagar Tsarin Zane, faɗaɗa Tabbatar da Ƙirƙirar Ƙirƙirar Ƙira, danna-dama
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9. A cikin Tagar Zane na Zane, faɗaɗa Tabbatar da Pre-synthesized Design ƙarƙashin Ƙirƙiri Design, danna-dama Simulate kuma danna Buɗe Interactively. Yana simulators MSS. Hoto na 31 · Kwaikwayi Tsarin da aka riga aka haɗa
10. Danna A'a idan an nuna saƙon faɗakarwa don haɗa abin ƙarfafa Testbench tare da MSS. 11. Rufe Modelsim taga bayan an gama simulation.
Hoto na 32 · Tagar kwaikwayo
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3.5.2
Simulating Testbench
Umurnai masu zuwa suna bayyana yadda ake simulate testbench:
1. Zaɓi top_tb SmartDesign Testbench kuma danna Generate Component daga SmartDesign Toolbar don samar da testbench, kamar yadda aka nuna a cikin adadi mai zuwa.
Hoto na 33 · Samar da wani Abu
2. A cikin ma'auni na Stimulus, danna-dama top_tb (top_tb.v) testbench file kuma danna Saita azaman mai kara kuzari. An kunna abin ƙarfafa don bench_tb testbench file.
3. A cikin Tagar Ƙarfafawa, danna dama-dama top_tb (
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DDR AXI Arbiter
3. A cikin ma'auni na Stimulus, danna-dama top_tb (top_tb.v) testbench file kuma danna Buɗe Interactively daga Simulate Pre-Synth Design. Wannan yana simulators na ainihin firam ɗaya. Hoto 34 · Yin Simulating Pre-Synthesis Design
4. Idan an katse simulation saboda iyakar lokacin aiki a cikin DO file, yi amfani da run-duk umarnin don kammala simulation. Bayan an gama simintin, kewaya zuwa View > Files > kwaikwayo zuwa view hoton fitowar benci na gwaji file a cikin babban fayil na kwaikwayo.
Fitar da simulation rubutu daidai da firam ɗaya na hoton, ana adana shi a cikin Read_out_rd_ch(x).txt rubutu file dangane da tashar karantawa da aka yi amfani da ita. Ana iya canza wannan zuwa hoto kuma a kwatanta shi da ainihin hoton.
3.6
Amfani da Albarkatu
An aiwatar da toshewar DDR Arbiter akan M2S150T SmartFusion®2 System-on-Chip (SoC) FPGA a cikin
Kunshin FC1152) da PolarFire FPGA (MPF300TS_ES - fakitin 1FCG1152E).
Tebur 4 · Amfani da Albarkatu don DDR AXI Arbiter
Abubuwan DFFs 4-input LUTs MACC RAM1Kx18
Amfani 2992 4493 0 20
(Don:
g_RD_CHANNEL(X)_HORIZONTAL_RESOLUTION = 1280
g_RD_CHANNEL(X)_BUFFER_LINE_STORAGE = 1
g_WR_CHANNEL(X)_BUFFER_LINE_STORAGE = 1
g_AXI_DWIDTH = 64
g_RD_CHANNEL(X)_VIDEO_DATA_WIDTH = 24
RAM64x18
g_WR_CHANNEL(X)_VIDEO_DATA_WIDTH = 32) 0
UG0644 Jagorar Mai Amfani 5.0
31
DDR AXI Arbiter
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50200644
UG0644 Jagorar Mai Amfani 5.0
32
Takardu / Albarkatu
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Microchip UG0644 DDR AXI Arbiter [pdf] Jagorar mai amfani UG0644 DDR AXI Arbiter, UG0644, DDR AXI Arbiter, AXI Arbiter |
