ELMICRO ChipS12 Miniaturized Controller Module User Manual

Q: Q: Can I program the ChipS12 using third-party software?

A: The manufacturer recommends using the provided tool software for programming the ChipS12 to ensure compatibility and optimal performance.

Q: A: The manufacturer recommends using the provided tool software for programming the ChipS12 to ensure compatibility and optimal performance.

A: The manufacturer's liability is limited to return of price paid, repair, or replacement of the product as per their discretion. Please refer to the warranty terms provided with the product.

Q: Q: Does the ChipS12 support external peripherals?

A: Yes, the ChipS12 has a range of peripheral function blocks including SCI, SPI, CAN, Timer, PWM, ADC, and General-Purpose-I/Os to support interfacing with external peripherals.

Contents hide

1 ELMICRO ChipS12 Miniaturized Controller Module

2 Overview

3 Technical Data

4 Development Package Contents

5 Module Pinout

6 Components Location Diagram

7 Jumpers and Solder Bridges

8 Mechanical Dimensions

14 Documents / Resources

14.1 References

ELMICRO ChipS12 Miniaturized Controller Module

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Phone: +49-(0)341-2118354
Fax: +49-(0)341-2118355
Email: support@elmicro.com
Web: http://elmicro.com

This manual and the product described herein were designed carefully by the manufacturer. We have made every effort to avoid mistakes, but we cannot guarantee that it is 100% free of errors. The manufacturer’s entire liability and your exclusive remedy shall be, at the manufacturer’s option, return of the price paid or repair or replacement of the product. The manufacturer disclaims all otherwarranties, either expressed or implied, including but not limited toimplied warranties of merchantability and fitness for a particular purpose, with respect to the product, including accompanying written material, hardware, and firmware. In no event shall the manufacturer or its supplier be liable for any damages whatsoever (including, without limitation, damages for loss of business profits, business interruption, loss of business information, orother pecuniary loss) arising out of the use of or inability to use theproduct, even if the manufacturer has been advised of the possibility ofsuch damages.

The product is not designed, intended or authorized fouse in applications in which the failure of the product could create a situation where personal injury or death may occur. Should you use the product for any such unintended or unauthorized application, you shallindemnify and hold the manufacturer and its suppliers harmless against all claims, even if such claim alleges that the manufacturer was negligent regarding the design or implementation of the product. Product features and prices may change without notice. All trademarks are the property of their respective holders.

Overview

ChipS12 is a miniaturized controller module based on a powerful 16-bit HCS12 microcontroller. It can be easily plugged into a DIP40 socket on the user’s application PCB. The module can be operated with either 3.3V or 5V. It is specified for the extended temperature range (-40..+85°C), which makes it suited for a wide range of industrial applications. A complete development package is available to kick start yourdevelopment work. It contains a ChipS12 controller module, a carrier board including a large number of useful peripherals (such as LEDs, buttons, buzzer, and LC-display), and a set of cables. Tool software, documentation, and example programs are provided on a CD-ROM.The ChipS12 is equipped with an MC9S12C32 microcontroller unit (MCU). It contains a 16-bit HCS12 CPU, 32KB of Flash memory, 2KBRA, M, and a large amount of peripheral function blocks, such as SCI, SPI, CAN, Timer, PWM, ADC and General-Purpose-I/Os. The MC9S12C32 has full 16-bit data paths throughout. An integratedPLL-circuit allows adjusting performance vs. current consumption according to the needs of the user application. For HCS12 microcontrollers, a wide range of software tools (monitors, C-compilers, BDM-debuggers) is available to accelerate the development process.

Technical Data

MCU MC9S12C32 with LQFP112 package (SMD)
HCS12 16-bit CPU uses the same programming model and command set as the HC12
16 MHz crystal clock, up to 25 MHz bus clock using PLL
32 KB Flash
2 KB RAM
16 KBit serial EEPROM
1x SCI – asynch. serial interface (incl. RS232 drivers)
1x SPI – sync. serial interface
1x msCAN module (CAN 2.0A/B-compatible)
8x 16-bit Timer (Input Capture/Output Compare)
5x PWM (Pulse Width Modulator)
8-channel 10-bit A/D-Converter
BDM – Background Debug Mode Interface, 6-pin connector
Integrated LVI-circuit (Reset Controller)
Indicator LED
Option: CAN bus driver (type according to operating voltage)
Option: Real Time Clock providing time of day, calendar, alarm function, and automatic switch-over to ext. backup battery
Up to 26 general-purpose I/Os available (depends on usage of other on-board functions)
Operating voltage is either 3.3V or 5V
Current consumption typ. 25mA
Extended temperature range (-40..+85°C)
high-quality multilayer PCB
2.0″ x 0.7″ x 0.5″ module size
DIP40 footprint

Development Package Contents

ChipS12 Controller Module with MC9S12C32, incl. Real Time Clock and 5V CAN bus driver
TwinPEEKs Monitor (in the MCU’s Flash memory)
Carrier Board with DIP40 socket for the ChipS12 module, LC-display, and a large number of peripheral functions
RS232 cable (Sub-D9)
BDM cable between ChipS12 and Carrier Board
User manual (this document)
Schematic Diagrams
CD-ROM: contains assembler software, data sheets, CPU12
Reference Manual, code examples, C-compiler (evaluation version), etc

Quick Start
Nobody likes to read big manuals. For that reason, we will summarize the most important things in the following section briefly. If you need additional information, please refer to the more detailed sections of this manual.

Here is how you can start with the development package:

Please check the board for any damage due to transportation
Check if the ChipS12 module is mounted correctly on the carrier board (red BDM connectors adjacent to each other)
Connect the device via RS232 (connector K1 on the carrier board) to your PC. Use the serial cable (Sub-D9, 1:1) which comes in the box.
On the PC, start a Terminal Program. An easy-to-use Terminal Program is OC-Console, which is available at no charge fromour Website!
Select a baudrate of 19200 Bd. Disable all hardware or software protocols.
Connect a power supply to K4, delivering approx 9V (8..12V, polarity does not matter)
Please note: wall plug power supplies are usually not stabilized, and they provide a voltage that is higher than the nominal (full-load) voltage. Therefore, in order to get “real” 9V, a “nominal” settinmg of 6V or 7.5V is usually sufficient.
The higher the input voltage, the more heat will be produced by VR1.
Once powered up, LD1 on the carrier board and D1 on the ChipS12 module will turn on, and the Monitor program will start, displaying a message and awaiting your commands.

We hope you will enjoy working with ChipS12!

Module Pinout

Components Location Diagram

Jumpers and Solder Bridges

Jumpers
There are no jumpers on the ChipS12 module.

Solder Bridges
The following solder bridges are located on the bottom side of the PCB

BR1: VRHAn

open external supply of VRH is required
closed* VRH connected to VDDA (VCC) on-board

BR2: R1OUT

1-2* enable RS232 receiver output R1OUT (drives PS0 of MCU)
2-3 disable (tristate) RS232 receiver output R1OUT (Port pin PS0 freely available)

BR3: SHDN

1-2* enable RS232 transceiver IC2 permanently
2-3 PE4 of MCU controls the suspend mode of IC2

BR4: RRTC
open* disable reset by RTC, /VDCC output of RTC (IC6) not in useclosed /VDCC output of RTC connected to /RESET; provides additional LVI-function: RTC causesreset if battery-switchover is activated (see RTC data sheet) * = factory default

Mechanical Dimensions

The ChipS12 module fits on a standard DIP40-socket. The pin spacing is 0.1″ (2.54 mm), and the distance between pin rows is 0.6″ (15.24 mm).
The outline dimensions of the module are 2.0″ (50.8 mm) x 0.7″ (17.78 mm).

Circuit Description
In this section, several details will be presented on how to work with the HCS12 in general and the ChipS12 Controller Module in particular. Please be aware that, even if this manual can provide some specific hints, it is impossible to cover all kinds of knowledge and techniques required to design a microcontroller application. Please refer to the data sheets of the silicon vendors and to the manuals of your software tools to get additional information. The software demos included in this paragraph are for demonstration purposes only. Please note that we cannot guarantee the correctness and fitness for a particular purpose.

Schematic Diagram
To ensure the best visibility of all details, the schematic diagram of the ChipS12 is provided as a separate document.

Controller Core, Power Supply
The MCU (IC1) has three supply pin pairs: VDDR/VSSR, VDDX/VSSX, and VDDA/VSSA. The nominal operating voltage (designated as VCC in the schematic diagram) of the MC9S12C32 is in the range of 3V to 5V. Internally, the MCU uses a core voltage of only 2.5V. The necessary voltage regulator is already included in the chip, aswell as I/O-buffers for all general-purpose input/output pins. Therefore, the MCU behaves like a 5V or 3.3V device from an external point of view. There is just one exception: the signals for oscillator and PLL arebased on the core voltage and must not be driven by an external voltage. The three terminal pairs mentioned above must be decoupledcarefully. A ceramic capacitor of 100nF is connected directly at each pair (C15, C16, C17), plus an additional 10µF tantalum capacitor (C5). Special care must be taken with VDDA, since this is the reference point for the internal voltage regulator.

The internal core voltage appears at the pin pairs VDD1/VSS1 and VDDPLL/VSSPLL in order to allow adding decoupling capacitors here as well (C7A, C7B, C14). A static current drawn from these terminals is not allowed. This is especially true for VDDPLL, which serves as the reference point for the external PLL loop filter combination (R3, C3, C4). There are two MCU pins (VRH/VRL) to define the upper and lower voltage limits for the internal analog-to-digital (ATD) converter. While VRL is grounded, VRH is connected to VDDA via solder bridge BR1. C18 is used for decoupling. VRH can be supplied externally after opening the solder bridge BR1. This can be useful if the main supply is not in the desired tolerance band or if the ATD should work with a reference value lower than VCC. VRH must not exceed VDDA, regardless of the selected supply mode. The TEST pin is used for factory testing only; in an application circuit, this pin always has to be grounded.

Reset Generation
/RESET is the MCU’s active low bidirectional reset pin. As an input, it initializes the MCU asynchronously to a known start-up state. As an open-drain output it indicates that a system reset (internal to the MCU) has been triggered. The HCS12 MCUs already contain on-chipreset generation circuitry, including power-on reset, COP watchdog timer, and clock monitor. Additionally, the MC9S12C32 is equippedwith a Low Voltage Inhibit (LVI) circuit. The task of this LVI circuit isto issue a stable reset condition if the power supply falls below the level required for proper MCU operation. To further increase system reliability, IC4 can be added as anexternal LVI circuit. IC4 has an open-drain output in order to preventcollisions with the MCU’s bidirectional reset pin. The /RESET signal ishigh ithe n inactive state because IC4 contains an integrated pull-up resistor (approx. 5kOhm). Therefore, R1 is not needed if the optional IC4 is equipped.

The reset pulse issued by IC4 has a typical duration of 250ms (minimum is 140ms). It is important to note that this pulse will only beapplied during a power cycle event. IC4 will not stretch pulses comingfrom the MCU’s internal reset sources. This is essentially important, since otherwise the MCU would not be able to detect the source of areset. This would finally lead to a wrong reset vector fetch and couldresult in a system software crash. Please be aware that a capacitor on the reset line would also cause the same fatal effect. External circuitry connected to the /RESET pin of an HC12/HCS12 MCU should never include a large capacitance!

Clock Generation and PLL
The on-chip oscillator of the MC9S12Cxx can generate the primary clock (OSCCLK) using a quartz crystal (Q1) connected between the EXTAL and XTAL pins. The allowed frequency range is 0.5 to 16MHz. As usual, two load capacitors are part of the oscillator circuit(C1, C2). However, this circuit is modified compared to the standard Pierce oscillator that was widely used for the HC11 and HC12.On the ChipS12, the MC9S12Cxx uses a Colpitts oscillator with a translated ground scheme. The main advantage is a very low current consumption, though the component selection is more critical. The ChipS12 circuit uses a high-quality quartz crystal together with two load capacitors of only a few picofarad. Furthermore, special care was taken for the PCB design to introduce as little stray capacitance as possible with respect to XTAL and EXTAL. With an OSCCLK of 16 MHz, the internal bus speed (ECLK) becomes 8 MHz by default. To realize higher bus clock rates, the PLL has to be engaged.

The MC9S12Cxx can be operated with a bus speed of up to 25MHz, though most designs use 24MHz because this value is a better basis to generate a wide range of SCI baud rates. A passive external loop filter must be placed on the XFC pin. The filter (R3, C3, C4) is a second-order, low-pass filter to eliminate the VCO input ripple. The value of the external filter network and the reference frequency determine the speed of the corrections and the stability of the PLL. If PLL usage is not required, the XFC pin should be pulled up to the VDDPLL level. The choice of filter component values is always a compromise over lock time and stability of the loop. 5 to 10kHz loop bandwidth and a damping factor of 0.9 are a good starting point for the calculations.

With a quartz frequency of 16MHz and a desired bus clock of 24MHz, a possible choice is R3 = 4.7k and C3 = 22nF. C4 should be approximately (1/20..1/10) x C3, e.g. 2.2nF in our case. These values are suitable for a reference frequency of 1MHz (Note: to be defined in example file S12_CRG.H). The according reference divider register value is REFDV=15, and the synthesizer register setting becomes SYNR=23. Please refer to the chapter “XFC Component Selection” in the MC9S12DP256B Device User Guide for a detailed description of how to calculate values for other system configurations.

The following source listing shows the steps required to initialize the PLL:

R4 is used to pull /XCLKS high during reset, which will select Colpitts configuration of the oscillator. If /XCLKS were low during reset, the oscillator would assume Pierce mode, which would require an alternate circuitry. However, this mode could be used to apply an external clock signal to the EXTAL pin of the MC9S12Cxx. Please note that different derivatives of the HCS12 have different functionality regarding the /XCLKS pin.

Operating Modes, BDM Support
Three pins of the HCS12 are used to select the MCU operating mode: MODA, MODB, and BKGD (=MODC). While MODA and MODB are internally pulled low to select Single Chip Mode, BKGD is pulled high (R2) by default. As a consequence, the MCU will start in Normal Single Chip Mode, which is the most common operating mode for application code running on the HCS12. The HCS12 operating mode used for download and debugging is called Background Debug Mode (BDM). BDM is active immediately out of reset if the mode pins MODA/MODB/BKGD are configured for Special Single Chip Mode. This is done by pulling the BKGD pin lowduring reset, while MODA and MODB are pulled-down as well. Because only the BKGD level is different for the two modes, it is quite easy to change over. However, there is no need to switch the BKGD line manually via a jumper or solder bridge because this can be done by a BDM-Pod (such as ComPOD12) attached to connector X1. A BDM-Pod is required for BDM-based download and/or debugging anyway, so it can handle this task automatically, usually controlled by a PC-based debugging program.

Integrated A/D-Converter
The MC9S12C32 contains a 10-bit Analog-to-Digital Converter module. This module (ATD) provides eight multiplexed input channels. VRH is the upper reference voltage for all A/D-channels. On theChipS12, VRH is connected to VDDA (VCC) through solder bridgeBR1. After opening BR1, it is possible to use an external reference voltage, connected to X0/31. The following example program shows the initialization sequence for the A/D-converter module ATD and a single-channel conversion routine. The source file S12_ATD.C also contains some additional functions for the integrated ATD module.

Indicator LED
Port pin PE7 drives a single indicator LED (D1). To control this LED, some simple macros can be used, as shown in the following C header file:

RS232 Interface
The MC9S12Cxx contains an asynchronous serial interface (SCI0) including one receive line and one transmit line (RXD0, TXD0). Handshake lines are not provided by the SCI module; they can be added by using general-purpose I/O port lines if required. On the ChipS12, the SCI signal lines are connected to an RS232 transceiver circuit (IC2). If the RS232 interface is not needed in an application, the output R1OUT of IC2 can be tri-stated by connecting contacts 2-3 of the solder bridge BR2. As a consequence, the MCU signals PS0 and PS1 can be used as additional general-purpose I/Os. To reduce current consumption, IC2 can be brought into suspend mode by setting the solder bridge BR3 to position 2-3. Now, the MCU signal PE4 can be used to control the /SHDN input of the RS232 transceiver chip. Low-level activates power-saving suspend mode. Please note: PE4 can be configured as a clock output (ECLK) by software. Avoid doing so while PE4 is used for suspend control!

The following code example shows how to use SCI0 in polling mode:

SPI Bus
The MC9S12C32 contains one SPI module (SPI0), which can be used for synchronous serial communication with external SPI chips. SPI0 consists of four individual signals: MISO, MOSI, SCK, and /SS (MCU port pins PM2 .. PM5). These signals are not used on board the ChipS12. They can be accessed at connector X0. The following listing demonstrates some basic functions (initialization, 8-bit data transfer) for the SPI-Port SPI0 (chip select signal handling not included):

IIC-Bus
The MC9S12C32 does not contain an IIC hardware module. To control the on-board peripherals IC5 (RTC) and IC6 (serial EEPROM), a simplified software implementation of the IIC bus protocol can be used (for example, please refer to file S12_SIIC.S.) The MCU signal PA0 is used as a bidirectional data line (SDA), while PB4 provides the clock (SCL). Both signals can also be used to access external IIC slaves.

Serial EEPROM
On the ChipS12, extra non-volatile storage space can be provided by IC6. This serial EEPROM device has a capacity of 16 Kbit. Optionally, larger devices can be used (up to 256Kbit). IC6 communicates over an IIC interface. The file CHIPS12_SEEP.C shows how to control the device using the software IIC module described above:

Please note: The serial EEPROM is an ordering option.

Real Time Clock
The ChipS12 can be optionally equipped with a R2051 Real Time Clock (RTC) from Ricoh. This chip has an IIC interface and providestime reference and calendar information. Interrupts can be generated by the R2051 in different ways. Theperiodic interrupt system is configured to generate interrupt signals witha user-selectable rate. Furthermore, two alarm interrupts can be generated at preset times. The /INTR pin of the RTC is brought out to X0/16 as signal /IRTC. It can be connected externally to one of the MCU’s interrupt inputs (/IRQ, /XIRQ, or some general-purpose I/O-pin). A backup battery can be connected to the module’s VBAT pin (X0/17) to provide a backup supply in case the main power (VCC) fails. For this purpose, the use of a 3V LiMn primary battery is recommended. The switchover to backup power is accomplished when VCC falls below 2.4V. In this state, the /VDCC output of the RTC is driven low. By closing BR4, this signal can be used as an additional system reset source. Example routines showing how to drive the RTC of ChipS12 are contained in the file CHIPS12_RTC.C.

CAN Interface
The MC9S12C32 contains one CAN-Module, designated as CAN0. It utilizes port pins PM0 and PM1. IC3 (option) serves as a physical CAN bus interface. The CAN-bus signals CANH and CANL areavailable at connector X0. If the ChipS12 is the last node in a CAN bus chain, an externaltermination resistor is required. Use a resistor of 120 Ohm between CANH and CANL. R6 determines the slope control setting. The standard value (10k) must be modified for high-speed communication according to the datasheet of the manufacturer. The device type used for IC3 must match the supply voltage of the module. Please check the part numbers mentioned in the schematic diagram.

Application Hints

Behaviour after Reset
As soon as the reset input of the microcontroller is released, the MCU reads the Interrupt Vector at memory address $FFFE/F and then jumps to the address found there. In the default delivery condition of the ChipS12, the Flash module of the MCU contains the TwinPEEKs Monitor Program. The reset vector points to the start of this Monitor Software. As a result, the monitor will start immediately after reset.

Startup Code
Every Microcontroller firmware starts with several hardware initialization commands. For the ChipS12, only setting up the stack pointer is crucial. While it was important for HC12 derivatives to disable the Watchdog, the COP Watchdog of HCS12 devices is already disabled out of reset.

Additional Information on the Web
Additional information about the ChipS12 Controller Module will be published on our Website, as it becomes available: http://elmicro.com/chips12.html

TwinPEEKs Monitor

Serial Communication
TwinPEEKs communicates over the RS232 interface using a line speed of 19200 Baud. Settings are: 8N1, no hardware or software handshake, no protocol.

Autostart Function
After reset, the TwinPEEKs monitor checks whether port pins PT2 and PT3 (X0/9+10) are connected. If this is the case, the monitor immediately jumps to address $8000. This feature allows to start an application program automatically without modifying the reset vector, which is located in the protected Flash Boot Block.

Write Access to Flash EEPROM
The CPU can read every single byte of the microcontroller’s resources – the type of memory does not matter. However, for write accesses, two rules are important: Flash EEPROM has to be erased before any write attempt. Programming is done by writing words (two bytes at a time) to aligned addresses. To form such aligned words, two subsequent bytes have to be combined. TwinPEEKs is aware of this, but the following problem cannot be avoided by the monitor: The monitor is processing each S-Record line separately. If the last address of such an S-Record is even, the 2nd byte to form a complete word is missing. TwinPEEKs will append an $FF byte in this case, so it can perform the word write. The problem occurs if the byte stream continues with the following S-Record line. The byte that was missing in the first attempt would require a second write access to the same (word) address, which is not allowed. As a consequence, a write error (“not erased”) will be issued. To avoid this problem, it is necessary to align all S-Record data before programming. This can be done using the freely available Motorola Tool SRECCVT: SRECCVT -m 0x00000 0xfffff 32 -o. A detailed description of this tool is contained in the SRECCVT Reference Guide (PDF).

Redirected Interrupt Vectors
The interrupt vectors of the HCS12 are located at the end of the 64KB memory address range, which falls within the protected monitor code space. Therefore, the application program can not modify the interrupt vectors directly. To provide an alternative way, the monitorredirects all vectors (except the reset vector) to RAM. The procedure issimilar to how the HC11 behaved in Special Bootstrap Mode. The application program can set the required interrupt vectorsduring runtime (before global interrupt enable!) by placing a jump instruction into the RAM pseudo vector.

The following example shows the steps to utilize the IRQ interrupt:

ldaa #$06 ; JMP opcode to
staa $0FEE ; IRQ pseudo vector
ldd #isrFunc ; ISR address to
std $0FEF ; IRQ pseudo vector + 1

For a C program, the following sequence could be used:

// install IRQ pseudo vector in RAM
// (if running with TwinPEEKs monitor)
((unsigned char *)0x0fee) = 0x06; // JMP opcode
((void (**)(void))0x0fef) = isrFunc;

The following assembly listing is part of the monitor program. It shows the original vector addresses (1st column from the left) as well as the redirected addresses in RAM (2nd column).

Please note: the actual vector usage depends on the particular HCS12 derivative (see Device Guide).

Usage: A TwinPEEKs command is comprised of a single character, followed by several arguments (as required). All numbers are hexadecimal numbers without a prefix or a suffix. Both upper and lower case letters are allowed. The CPU’s visible address range is 64KB; address arguments are not longer than 4 digits. An end address always refers to the following (not included) address. For example, the command “D 1000 1200” will display the address range from $1000 to (including) $11FF. User input is handled by a line buffer. Valid ASCII codes are in the range from $20 to $7E. Backspace ($08) will delete the character left of the cursor. The key ($0A) is used to conclude the input. The monitor prompt always displays the current program page (i.e., the contents of the PPAGE register).

Monitor Commands

Blank Check
Syntax: B Blank check whole Flash Memory (ex. monitor code space). If Flash memory is not blank, then display the number of the first page containing a byte not equal to $FF.

Dump Memory
Syntax: D [adr1 [adr2]] Display memory contents from address adr1 until address adr2. If the end address adr2 is not given, display the following $40 bytes. Memory location adr1 will be highlighted in the listing.

Edit Memory Syntax: E [addr {byte}] Edit memory contents. In the command line, the start address addr can be followed by up to four data bytes {byte}, thus allowing byte, word, and doubleword writes. The write access will be performed immediately, and then the function will return to the input prompt. If the command line did not contain any data {byte}, the interactive mode will be started. The monitor can identify memory areas which can only be changed on a word-by-word basis (Flash EEPROM). In such cases, the monitor always awaits and uses 16-bit data. To exit the interactive mode, simply type “Q” . Additional commands are: next address – previous address = same address. exit (like Q)

Fill Memory
Syntax: F adr1 adr2 byte Fill memory area starting at address adr1 and ending before adr2 with the value byte.

Goto Address
Syntax: G [addr] Call the application program at address addr. Note: there is noregular way for the application program to return to the monitor.

Help
Syntax: H Display a brief command overview.

System Info
Syntax: I Display system information. This includes the address range of the register block, RAM, EEPROM, and Flash, and the MCU identifier (PARTID).

Load
Syntax: L Load an S-Record file into memory. Data records of type S1 (16-bit MCU addresses) and S2 (linear 24-bit addresses) can be processed. S0-Records (comment lines) will be skipped. S8- and S9-Records are recognized as an end-of-file mark. S2-Records use linear addresses according to Motorola guidelines. The valid address range for the MC9S12C32 starts at 0xF8000 (0x3E * 16KB) and ends at 0xFFFFF (0x40 * 16 KB – 1). Before loading into non-volatile memory (Flash EEPROM), this kind of memory must always be erased. Also, only word writes can be used in this case. It may be required to prepare S-Record data accordingly, before it can be downloaded (see instructions above). The sending terminal program (such as OC-Console) must wait for the acknowledge byte (*) before starting the transmission of another line. This way, the transmission speed of both sides (PC and MCU) is synchronized.

Move Memory
Syntax: M adr1 adr2 adr3 Copy a memory block starting at address adr1 and ending at adr2 (not included) to the area starting at address adr3.

Select PPAGE
Syntax: P [page] Select a program page (PPAGE). This page will become visible in the 16KB page window from $8000 to $BFFF.

Erase Flash
Syntax: X [page] Erase one page (16KB) of Flash memory. If the page is not specified, the whole Flash memory (ex. monitor code space) will be erased after user confirmation. To remove (erase) themonitor code, a BDM tool such as ComPOD12/StarProg is required.

Memory Map

The memory map of the MC9S12C32 is initialized by the TwinPEEKs monitor as follows:

Begin	End	Ressource
$0000	$03FF	Control Registers
$0800	$0FFF	2KB RAM TwinPEEKs uses the top 512 bytes
$4000	$7FFF	16KB Flash (equals Page $3E)
$8000	$BFFF	16KB Flash Page $3E (Page $3E or $3F selectable using PPAGE)
$C000	$FFFF	16KB Flash (equals Page $3F) TwinPEEKs uses the top 4KB

Carrier Board

Parts Location Plan

Jumpers and Connectors

J0	1-2	ChipS12 supply voltage VCC=3.3V (ICC<0.1A!)
J0	2-3*	ChipS12 supply voltage VCC=5V
J1	not equip’d	Connection (solder pads) to ChipS12 pin 21..40
J2	not equip’d	Connection (solder pads) to ChipS12 pin 3..20
J3	not equip’d	optional; same pin-out as J4; may be used as I2C-bus connection (requires software driver)
J4	open*	1=VCC, 2=PT2, 3=PT3, 4=GND if pin 2 and 3 are connected during reset, the monitor autostart becomes active
J5	open*	close to activate CAN bus termination by R5 (required at both bus endpoints)
J6	open*	close to connect the supply voltage VIN to K2/9, can be used to share the power supply with another CAN bus node
J7	open*	close to connect backup battery BAT1 to the VBAT input of ChipS12 (RTC backup supply)
K1		RS232 connector (use Sub-D9 1:1 cable to PC)
K2		CAN connector Sub-D9
K3	not equ.	optional; may be used as SPI-port
K4		Connector for (wall) power supply, polarity does not matter, input ca. 8..15Volt DC
K5		BDM connection to ChipS12 module
K6		BDM connector for debugger (BDM-pod)
LCD1		Connector for alphanum. LC-display

factory default

Schematic Diagram
To ensure the best visibility of all details, the schematic diagram of the ChipS12 Carrier Board is provided as a separate document.

Notes on Power Supply
On the carrier board, the voltage regulator VR2 can deliver up to 100mA (see data sheet of the LE33). This value is more than sufficientfor the ChipS12 Module alone. However, if additional external componets are connected, the limit could easily be exceeded. In this case thetotal current consumption should be monitored (e.g., on jumper J8, pins 1 and 2)! The LC-display LCD1 is always 5V-powered, even if the controller module is operated with 3.3V. The R/W-input of the LCD is permanently connected to the L-level, so display control is done by write accesses only. The 3.3V-CMOS outputs of the microcontroller deliver sufficient voltage levels to drive the 5V-TTL inputs of the LCD.

FAQs

Q: Can I program the ChipS12 using third-party software?