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VISHAY SUM70030E N-Channel MOSFET

VISHAY-SUM70030E-N-Channel-MOSFET-fig-1

FEATURES

  • TrenchFET® power MOSFET
  • Maximum 175 °C junction temperature
  • Very low Qgd reduces power loss from passing through Vplateau
  • 100 % Rg and UIS tested
  • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

APPLICATIONS

  • Power supply
    Secondary synchronous rectification
  • DC/DC converter
  • Power tools
  • Motor drive switch
  • DC/AC inverter
  • Battery management
  • OR-ing / e-fuse

PRODUCT SUMMARY

VDS (V)100
RDS(on) max. (W) at VGS = 10 V0.00288
RDS(on) max. (W) at VGS = 7.5 V0.00348
Qg typ. (nC)142.4
ID (A)150 d
ConfigurationSingle

ORDERING INFORMATION

PackageTO-263
Lead (Pb)-free and halogen-freeSUM70030E-GE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETERSYMBOLLIMITUNIT
Drain-source voltageVDS100V
Gate-source voltageVGS± 20
Continuous drain current (TJ = 150 °C)TC = 25 °CID150 d 

 

A

TC = 70 °C150 d
Pulsed drain current (t = 100 μs)IDM500
Avalanche currentIAS60
Single avalanche energy aL = 0.1 mHEAS180mJ
Maximum power dissipation aTC = 25 °CPD375 bW
TC = 125 °C125 b
Operating junction and storage temperature rangeTJ, Tstg-55 to +175°C

THERMAL RESISTANCE RATINGS

PARAMETERSYMBOLLIMITUNIT
Junction-to-ambient (PCB mount) cRthJA40 

°C/W

Junction-to-case (drain)RthJC0.4

Notes

  • Duty cycle  1 %
  • See SOA curve for voltage derating
  • When mounted on 1″ square PCB (FR4 material)
  • Package limited

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETERSYMBOLTEST CONDITIONSMIN.TYP.MAX.UNIT
Static
Drain-source breakdown voltageVDSVGS = 0 V, ID = 250 μA100 

V

Gate threshold voltageVGS(th)VDS = VGS, ID = 250 μA24
Gate-body leakageIGSSVDS = 0 V, VGS = ± 20 V± 250nA
 

Zero gate voltage drain current

 

IDSS

VDS = 100 V, VGS = 0 V1 

μA

VDS = 100 V, VGS = 0 V, TJ = 125 °C150
VDS = 100 V, VGS = 0 V, TJ = 175 °C5mA
On-state drain current aID(on)VDS ³ 10 V, VGS = 10 V120A
Drain-source on-state resistance a 

RDS(on)

VGS = 10 V, ID = 30 A0.002400.00288W
VGS = 7.5 V, ID = 20 A0.002900.00348
Forward transconductance agfsVDS = 15 V, ID = 30 A110S
Dynamic b
Input capacitanceCiss 

VGS = 0 V, VDS = 50 V, f = 1 MHz

10 870 

pF

Output capacitanceCoss820
Reverse transfer capacitanceCrss40
Total gate charge cQg 

VDS = 50 V, VGS = 10 V, ID = 20 A

142.4214 

 

nC

Gate-source charge cQgs46.8
Gate-drain charge cQgd18.5
Output chargeQossVDS = 50 V, VGS = 0 V138207
Gate resistanceRgf = 1 MHz0.341.73.4W
Turn-on delay time ctd(on) 

VDD = 50 V, RL = 3 W

ID @ 10 A, VGEN = 10 V, Rg = 1 W

3060 

 

ns

Rise time ctr1326
Turn-off delay time ctd(off)50100
Fall time ctf1530
Drain-Source Body Diode Ratings and Characteristics b (TC = 25 °C)
Pulsed current (t = 100 μs)ISM 250A
Forward voltage aVSDIF = 10 A, VGS = 0 V0.81.5V
Reverse recovery timetrr 

 

IF = 34 A, di/dt = 100 A/μs

76150ns
Peak reverse recovery chargeIRM(REC)4.65.6A
Reverse recovery chargeQrr0.2050.24μC
Reverse recovery fall timeta52ns
Reverse recovery rise timetb24

Notes

  • Pulse test; pulse width  300 μs, duty cycle  2 %
  • Guaranteed by design, not subject to production testing
  • Independent of operating temperature

TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)

VISHAY-SUM70030E-N-Channel-MOSFET-fig-3
VISHAY-SUM70030E-N-Channel-MOSFET-fig-4
VISHAY-SUM70030E-N-Channel-MOSFET-fig-5
VISHAY-SUM70030E-N-Channel-MOSFET-fig-6

THERMAL RATINGS (TA = 25 °C, unless otherwise noted)

VISHAY-SUM70030E-N-Channel-MOSFET-fig-7

Note
The characteristics shown in the two graphs

  • Normalized Transient Thermal Impedance Junction to Ambient (25 °C)
  • Normalized Transient Thermal Impedance Junction to Case (25 °C) is a general guideline only to enable the user to get a “ballpark” indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics developed from empirical measurements. The latter is valid for the part mounted on printed circuit board – FR4, size 1″ x 1″ x 0.062″, double-sided with 2 oz. copper, 100 % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions

TO-263 (D2PAK): 3-LEAD

VISHAY-SUM70030E-N-Channel-MOSFET-fig-8

 

DIM.

INCHESMILLIMETERS
MIN.MAX.MIN.MAX.
A0.1600.1904.0644.826
b0.0200.0390.5080.990
b10.0200.0350.5080.889
b20.0450.0551.1431.397
c*Thin lead0.0130.0180.3300.457
Thick lead0.0230.0280.5840.711
c1Thin lead0.0130.0170.3300.431
Thick lead0.0230.0270.5840.685
c20.0450.0551.1431.397
D0.3400.3808.6369.652
D10.2200.2405.5886.096
D20.0380.0420.9651.067
D30.0450.0551.1431.397
D40.0440.0521.1181.321
E0.3800.4109.65210.414
E10.2456.223
E20.3550.3759.0179.525
E30.0720.0781.8291.981
e0.100 BSC2.54 BSC
K0.0450.0551.1431.397
L0.5750.62514.60515.875
L10.0900.1102.2862.794
L20.0400.0551.0161.397
L30.0500.0701.2701.778
L40.010 BSC0.254 BSC
M0.0020.050
ECN: T13-0707-Rev. K, 30-Sep-13 DWG: 5843

Notes

  1. Plane B includes the maximum features of the heat sink tab and plastic.
  2. No more than 25 % of L1 can fall above the seating plane by max. 8 mils.
  3. Pin-to-pin coplanarity max. 4 mils.
  4. The thin lead is for SUB, and SYB.
    Thick lead is for SUM, SYM, and SQM.
  5. Use inches as the primary measurement.
  6. This feature is for thick lead.

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

VISHAY-SUM70030E-N-Channel-MOSFET-fig-9

Disclaimer

  • ALL PRODUCTS, PRODUCT SPECIFICATIONS, AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION DESIGN OR OTHERWISE.
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Documents / Resources

VISHAY SUM70030E N-Channel MOSFET [pdf] Owner's Manual
SUM70030E, SUM70030E-GE3, SUM70030E N-Channel MOSFET, SUM70030E, N-Channel MOSFET, MOSFET

References

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