Vishay Intertechnology: Passives & Discrete Semiconductorsvishay.com/doc?91000vishay.com/doc?99912
Owner's Manual for VISHAY models including: IRL540PBF, IRL540PbF, IRL540PbF-BE3, IRL540 Power MOSFET, IRL540, Power MOSFET, MOSFET
IRL540PBF Vishay nach Preis ab 0.84 EUR - RADIOMAG GmbH
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DocumentDocumentwww.vishay.com IRL540 Vishay Siliconix Power MOSFET D TO-220AB S D G G S N-Channel MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration 100 VGS = 5.0 V 64 9.4 27 Single 0.077 FEATURES · Dynamic dV/dt rating · Repetitive avalanche rated Available · Logic-level gate drive · RDS(on) specified at VGS = 4 V and 5 V · 175 °C operating temperature Available · Fast switching · Ease of paralleling · Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details DESCRIPTION Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry. ORDERING INFORMATION Package Lead (Pb)-free Lead (Pb)-free and halogen-free TO-220AB IRL540PbF IRL540PbF-BE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-source voltage Gate-source voltage Continuous drain current Pulsed drain current a Linear derating factor Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dV/dt c Operating junction and storage temperature range Soldering recommendations (peak temperature) d VGS at 5 V TC = 25 °C TC = 100 °C TC = 25 °C For 10 s VDS VGS ID IDM EAS IAR EAR PD dV/dt TJ, Tstg Mounting torque 6-32 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. VDD = 25 V, starting TJ = 25 °C, L = 841 H, Rg = 25 , IAS = 28 A (see fig. 12c) c. ISD 28 A, dI/dt 170 A/s, VDD VDS, TJ 175 °C d. 1.6 mm from case LIMIT 100 ± 10 28 20 110 1.0 440 28 15 150 5.5 -55 to +175 300 d 10 1.1 UNIT V A W/°C mJ A mJ W V/ns °C lbf · in N · m S21-1046-Rev. C, 25-Oct-2021 1 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com IRL540 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL Maximum junction-to-ambient Case-to-sink, flat, greased surface Maximum junction-to-case (drain) RthJA RthCS RthJC TYP. - 0.50 - MAX. 62 1.0 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage Gate-source leakage Zero gate voltage drain current Drain-source on-state resistance Forward transconductance Dynamic VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 A Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 A VGS = ± 10 V VDS = 100 V, VGS = 0 V VDS = 80 V, VGS = 0 V, TJ = 150 °C VGS = 5.0 V ID = 17 Ab VGS = 4.0 V ID = 14 Ab VDS = 50 V, ID = 17 A Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off delay time Fall time Internal drain inductance Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD Internal source inductance LS Drain-Source Body Diode Characteristics VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 5.0 V ID = 28 A, VDS = 80 V, see fig. 6 and 13b VDD = 50 V, ID = 28 A, Rg = 9.0 , RD = 1.7 , see fig. 10b Between lead, 6 mm (0.25") from package and center of die contact D G S MIN. TYP. MAX. UNIT 100 - - V - 0.12 - V/°C 1.0 - 2.0 V - - ± 100 nA - - 25 A - - 250 - - 0.077 - - 0.11 12 - - S - 2200 - - 560 - pF - 140 - - - 64 - - 9.4 nC - - 27 - 8.5 - - 170 - ns - 35 - - 80 - - 4.5 - nH - 7.5 - Continuous source-drain diode current Pulsed diode forward current a IS MOSFET symbol showing the integral reverse ISM p - n junction diode D G S - - 28 A - - 110 Body diode voltage VSD TJ = 25 °C, IS = 28 A, VGS = 0 Vb - - 2.5 V Body diode reverse recovery time Body diode reverse recovery charge trr Qrr - 200 260 ns TJ = 25 °C, IF = 28 A, dI/dt = 100 A/sb - 1.7 2.90 C Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width 300 s; duty cycle 2 % S21-1046-Rev. C, 25-Oct-2021 2 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) IRL540 Vishay Siliconix Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 175 °C Fig. 4 - Normalized On-Resistance vs. Temperature S21-1046-Rev. C, 25-Oct-2021 3 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com IRL540 Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area S21-1046-Rev. C, 25-Oct-2021 4 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com Fig. 9 - Maximum Safe Operating Area IRL540 Vishay Siliconix VDS VGS RG RD D.U.T. 5 V Pulse width 1 µs Duty factor 0.1 % +- VDD Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 10b - Switching Time Waveforms Fig. 3 - Maximum Effective Transient Thermal Impedance, Junction-to-Case S21-1046-Rev. C, 25-Oct-2021 5 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com VDS Vary tp to obtain required IAS RG 5 V tp L D.U.T. IAS 0.01 + - V DD Fig. 12a - Unclamped Inductive Test Circuit IRL540 Vishay Siliconix VDS VDS tp VDD IAS Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current VGS QGS VG QG QGD Charge Fig. 13a - Basic Gate Charge Waveform Current regulator Same type as D.U.T. 12 V 50 k 0.2 µF 0.3 µF VGS 3 mA + D.U.T. - VDS IG ID Current sampling resistors Fig. 13b - Gate Charge Test Circuit S21-1046-Rev. C, 25-Oct-2021 6 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com D.U.T. + - Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations · Low stray inductance · Ground plane · Low leakage inductance current transformer - - + IRL540 Vishay Siliconix Rg · dV/dt controlled by Rg + · Driver same type as D.U.T. · ISD controlled by duty factor "D" - VDD · D.U.T. - device under test Driver gate drive P.W. Period D = P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Body diode forward drop Inductor current Ripple 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91300. S21-1046-Rev. C, 25-Oct-2021 7 Document Number: 91300 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Downloaded from Arrow.com. www.vishay.com Disclaimer Legal Disclaimer Notice Vishay ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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