The IGLOO2 FPGA Evaluation Kit user manual provides detailed specifications, hardware features, and instructions for configuring and running demos on the M2GL-EVAL-KIT model. Find resources and online support for Microchip products.
Learn how to configure the HPMS AHB Bus Matrix and arbitration schemes for your Microsemi IGLOO2 design with this user manual. Explore programmable weight and maximum latency options for fixed priority and WRR masters. No memory mapping configuration necessary. Check the Microsemi IGLOO2 Silicon User's Guides for more details.
Learn how to configure the Microsemi IGLOO2 HPMS Single Error Correct Double Error Detect feature from the System Builder SECDED page with this user guide. This guide covers the HPMS DDR controller, EDAC options and product support. Ensure your IGLOO2 system is optimized for performance and reliability with this essential resource.
Learn how to configure the Microsemi IGLOO2 HPMS DDR Controller with ease using System Builder. This user manual provides step-by-step instructions on how to configure the off-chip DDR memory for your HPMS DDR Controller, including selecting DDR Memory Type, Width, ECC, and setting time. No separate configuration is required, and the eNVM stores the register configuration data. Perfect for IGLOO2 users looking to optimize their DDR Controller Configuration.
Learn about the Microsemi IGLOO2 HPMS DDR Bridge Configuration options in this user manual. Optimize reads and writes to external DDR memory with this data bridge between four AHB bus masters and a single AXI bus slave. Discover how to enable write combining buffers and set non-bufferable address regions. Find complete details in the Microsemi IGLOO2 User's Guide.
Learn how to transmit low speed data rates over the IGLOO2 High Speed SERDES interface using 3x Oversampling Design. Read the Microsemi IGLOO2 High Speed SERDES 3x Oversampling Design User Guide for more information.
