CC13xx/CC26xx Hardware Configuration and PCB Design Considerations (Rev. G)

Application Notes

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Table of Contents

Application Note
CC13xx/CC26xx Hardware Configuration and PCB Design Considerations

ABSTRACT
This application report provides design guidelines for the CC13xx/CC26xx SimpleLinkTM ultra-low-power wireless MCU platform. There is an overview of the different reference designs followed by RF front end, schematic, PCB, and antenna design considerations. The document also covers crystal oscillator tuning, optimum load impedance as well as a brief explanation of the different power supply configurations. At the end there is a summary of steps to carry out at board bring-up.

Table of Contents
1 Reference Design................................................................................................................................................................... 2 1.1 Sub-1 GHz LaunchPads.................................................................................................................................................... 2 1.2 2.4 GHz LaunchPads......................................................................................................................................................... 3 1.3 Dual-Band LaunchPads..................................................................................................................................................... 3 1.4 Reference Design Overview.............................................................................................................................................. 6
2 Front-End Configurations...................................................................................................................................................... 7 2.1 CC13xx/CC26xx.................................................................................................................................................................7 2.2 Configuring Front-End Mode..............................................................................................................................................8 2.3 CC13xx Single-Ended Mode..............................................................................................................................................9 2.4 CC26xx............................................................................................................................................................................ 10
3 Schematic.............................................................................................................................................................................. 11 3.1 Schematic Overview.........................................................................................................................................................11 3.2 Bootloader Pins................................................................................................................................................................13 3.3 AUX Pins..........................................................................................................................................................................14 3.4 JTAG Pins........................................................................................................................................................................ 15
4 PCB Layout............................................................................................................................................................................15 4.1 Board Stack-Up................................................................................................................................................................15 4.2 Balun................................................................................................................................................................................ 15 4.3 LC Filter............................................................................................................................................................................16 4.4 Decoupling Capacitors..................................................................................................................................................... 17 4.5 Placement of Crystal Load Capacitors.............................................................................................................................17 4.6 Current Return Path......................................................................................................................................................... 17 4.7 DC/DC Regulator............................................................................................................................................................. 18 4.8 Antenna Matching Components.......................................................................................................................................18 4.9 Transmission Lines.......................................................................................................................................................... 18 4.10 Electromagnetic Simulation............................................................................................................................................18
5 Antenna..................................................................................................................................................................................19 5.1 Single-Band Antenna....................................................................................................................................................... 19 5.2 Dual-Band Antenna..........................................................................................................................................................19
6 Crystal Tuning....................................................................................................................................................................... 23 6.1 CC13xx/CC26xx Crystal Oscillators.................................................................................................................................23 6.2 Crystal Selection.............................................................................................................................................................. 23 6.3 Tuning the LF Crystal Oscillator....................................................................................................................................... 23 6.4 Tuning the HF Oscillator...................................................................................................................................................24
7 TCXO Support....................................................................................................................................................................... 26 7.1 Hardware..........................................................................................................................................................................26 7.2 Software........................................................................................................................................................................... 26 7.3 Example: Usage of TCXO on CC1312R Launchpad....................................................................................................... 27
8 Integrated Passive Component (IPC)..................................................................................................................................27 9 Optimum Load Impedance...................................................................................................................................................28

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10 PA Table............................................................................................................................................................................... 30 11 Power Supply Configuration..............................................................................................................................................31
11.1 Introduction.....................................................................................................................................................................31 11.2 DC/DC Converter Mode................................................................................................................................................. 31 11.3 Global LDO Mode...........................................................................................................................................................32 11.4 External Regulator Mode................................................................................................................................................33 12 Board Bring-Up................................................................................................................................................................... 34 12.1 Power On....................................................................................................................................................................... 34 12.2 RF Test: SmartRF Studio............................................................................................................................................... 34 12.3 RF Test: Conducted Measurements...............................................................................................................................34 12.4 Software Bring-Up..........................................................................................................................................................35 12.5 Hardware Troubleshooting............................................................................................................................................. 35 13 References.......................................................................................................................................................................... 37 14 Revision History................................................................................................................................................................. 38
Trademarks
SimpleLinkTM, LaunchPadTM, and SmartRFTM are trademarks of Texas Instruments. Bluetooth® is a registered trademark of Bluetooth SIG, Inc and used by Motorola, Inc. under license. All trademarks are the property of their respective owners.
1 Reference Design
A TI LaunchPadTM is the main development platform for CC13xx and CC26xx devices. A LaunchPad includes optimized external RF components on-board, PCB antenna and built-in debugger providing an easy-to-use development environment with a single core software development kit (SDK) and rich tool set. Each CC13xx/ CC26xx family member is featured on a dedicated LaunchPad with RF matching network and an antenna optimized for operation at one or more of the supported ISM bands. All TI LaunchPad design files, including Gerber-files and CAD source, are available for download at ti.com and can be used as a reference design when integrating CC13xx/CC26xx into custom hardware.
1.1 Sub-1 GHz LaunchPads
This section provides the different LaunchPad designs and which design to follow for a specific CC13xx/CC26xx device and ISM band.
1.1.1 LAUNCHXL-CC1310

Featured device: ISM band: Antenna: RF front end: Design files:

CC1310 868 MHz and 915 MHz Monopole PCB Antenna with Single or Dual Band Option Differential, external bias LAUNCHXL-CC1310 Design Files

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1.1.2 LAUNCHXL-CC1312R
Featured device: ISM band: Antenna: RF front end: Design files:
1.2 2.4 GHz LaunchPads 1.2.1 LAUNCHXL-CC2640R2
Featured device: ISM band: Antenna: RF front end: Design files:
1.2.2 LAUNCHXL-CC26x2R
Featured device: ISM band: Antenna: RF front end: Design files:

Reference Design
CC1312R 868 MHz and 915 MHz Monopole PCB Antenna with Single or Dual Band Option Differential, external bias SimpleLink Sub-1 GHz CC1312R Wireless (MCU) LaunchPad Dev Kit 868MHz/915MHz App
CC2640R2F 2.4 GHz 2.4-GHz Inverted F Antenna Differential, internal bias LAUNCHXL-CC2640R2 Design Files
CC2652R 2.4 GHz 2.4-GHz Inverted F Antenna Differential, internal bias CC26x2R LaunchPad Design Files

This LaunchPad can also be used for development with CC2642R.
1.3 Dual-Band LaunchPads 1.3.1 LAUNCHXL-CC1350EU/US
This LaunchPad uses an RF switch to select either the 868 MHz/915 MHz RF front end and antenna or the 2.4 GHz front end and antenna. Note that the LaunchPad comes in two different versions: EU and US. The only difference between the two is the antenna matching components that are optimized for either 868 MHz (EU) or 915 MHz (US) operation.

Featured device: ISM band: Antenna:

CC1350 868 MHz/915 MHz and 2.4 GHz
· Miniature Helical PCB Antenna for 868 MHz or 915/920 MHz · 2.4-GHz Inverted F Antenna

RF front end: Design files:

Differential, external bias LAUNCHXL-CC1350 Design Files

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1.3.2 LAUNCHXL-CC1350-4
This LaunchPad uses an RF switch to select either the 433 MHz RF front end and antenna or the 2.4 GHz front end and antenna.

Featured device: ISM band: Antenna:

CC1350 433 MHz and 2.4 GHz
· Miniature Helical PCB Antenna for 868 MHz or 915/920 MHz · 2.4-GHz Inverted F Antenna

RF front end: Design files:

Differential, external bias CC1350 Dual Band Launchpad for 433 MHz/ 2.4 GHz Band Rev A

1.3.3 LAUNCHXL-CC1352R
Revision A of this LaunchPad uses an RF switch to route either the 868 MHz/915 MHz or 2.4 GHz RF front end into the shared tri-band antenna. For more information about the antenna, see Section 5.2.1. Revision B of this LaunchPad uses a diplexer instead of a switch to combine the two RF paths into the shared antenna, which frees up one DIO as a control signal for the switch is no longer needed.

Featured device: ISM band: Antenna: RF front end: Design files:

CC1352R 868 MHz, 915 MHz and 2.4 GHz Based on Monopole PCB Antenna with Single or Dual Band Option Differential, external bias CC1352R LaunchPad Design Files

1.3.4 LAUNCHXL-CC1352P1
This LaunchPad has an 868 MHz/915 MHz RF front end at the high power PA port, which enables up to +20 dBm output power in the respective ISM bands. The regular sub-1 GHz port also has an 868 MHz/915 MHz RF front end to be able to receive and transmit at up to +14 dBm output power in the 868 MHz/915 MHz bands. Also, a 2.4 GHz RF front end is available at the 2.4 GHz port to be able to receive and transmit at up to +5 dBm output power in the 2.4 GHz band. All three paths share the same antenna and an RF switch selects which RF path to connect to the antenna. The switch has an insertion loss of approximately 0.5 dB. This is accounted for in the CC1352P SimpleLinkTM High-Performance Dual-Band Wireless MCU With Integrated Power Amplifier Data Sheet RF performance figures. For more information about the antenna, see Section 5.2.1.

Featured device: ISM band: Antenna: RF front end: Design files:

CC1352P 868 MHz, 915 MHz and 2.4 GHz Based on Monopole PCB Antenna with Single or Dual Band Option Differential, external bias CC1352R LaunchPad Design Files

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Reference Design

1.3.5 LAUNCHXL-CC1352P-2
This LaunchPad has a 2.4 GHz RF front end at the high power PA port, which enables up to +20 dBm output power in the respective ISM band. The regular 2.4 GHz port has a 2.4 GHz RF front end to be able to receive and transmit at up to +5 dBm output power in the 2.4 GHz band. Also, an 868 MHz/915 MHz RF front end is available at the sub-1 GHz port to be able to receive and transmit up to +14 dBm output power in the 868 MHz/915 MHz bands. All three paths share the same antenna and an RF switch selects which RF path to connect to the antenna. The switch has an insertion loss of approximately 0.5 dB. This is accounted for in the CC1352P SimpleLinkTM High-Performance Dual-Band Wireless MCU With Integrated Power Amplifier Data Sheet RF performance figures. For more information about the antenna, see Section 5.2.1.

Featured device: ISM band: Antenna: RF front end: Design files:

CC1352P 868 MHz, 915 MHz and 2.4 GHz Based on Monopole PCB Antenna with Single or Dual Band Option Differential, external bias LAUNCHXL-CC1352P-2 Design Files

1.3.6 LAUNCHXL-CC1352P-4
This LaunchPad has a 2.4 GHz RF front end on the high power PA port. On this launchpad, the high power PA is biased from VDDR giving low power consuption in TX up to +10 dBm using this RF path. The regular sub-1 GHz port has an RF front end to be able to receive and transmit at up to +13 dBm output power in the 433 MHz band. Also, a 2.4 GHz RF front end is available to be able to receive and transmit at up to +5 dBm output power in the 2.4 GHz band. All three paths share the same antenna and an RF switch that selects which RF path to connect to the antenna. The switch has an insertion loss of approximately 0.5 dB. This is accounted for in the CC1352P SimpleLinkTM High-Performance Dual-Band Wireless MCU With Integrated Power Amplifier Data Sheet RF performance figures. The antenna is dual-band and supports operation at one sub-1 GHz frequency in addition to 2.4 GHz. The antenna is tuned to work with 433 MHz and 2.4 GHz. For more information, see the device-specific design files. For more information about the antenna, see Section 5.2.2.

Featured device: ISM band: Antenna: RF front end: Design files:

CC1352P 433 MHz and 2.4 GHz Based on Monopole PCB Antenna with Single or Dual Band Option Differential, external bias LAUNCHXL-CC1352P-4 Design Files

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1.4 Reference Design Overview

When designing a custom board, the reference design should be followed as much as possible. Not all combinations of CC13xx/CC26xx devices and ISM bands are covered by a reference design, but it is possible to use an RF front end from one reference design and combine it with a compatible CC13xx/CC26xx device. Table 1-1 shows which CC13xx/CC26xx reference design to use for a given ISM band.

As an example, if the application requires operation in the 433 MHz band, but does not need 2.4 GHz operation or +20 dBm transmit power, the CC1312R device can be used instead of CC1352P. Then, the LAUNCHXLCC1352P-4 reference design should be followed, but only the RF front end on the SUB-1_GHZ_RF_P/N pins is required.

Frequency Band 433 MHz 470 MHz 510 MHz 779 MHz 868 MHz 915 MHz
2.4 GHz

Table 1-1. CC13xx/CC26xx Reference Design Overview

Supported Device Reference Design

Comment

CC1310

CC13xxEM-7XD-4251

CC1312R

LAUNCHXL-CC1352P-4

Use the 433 MHz front end from the CC1352P reference design

CC1310

LAUNCHXL-CC1310

For other reference designs, see the following link

CC1312R

LAUNCHXL-CC1312R1

CC26x0
CC2640R2 CC2642R CC2652R CC1350 CC1352P

CC2650EM-7ID
CC2650EM-5XD
CC2650EM-4XS
CC2650EM-4XS_Ext_Reg LAUNCHXL-CC2640R2 CC2640EM-CXS LAUNCHXL-CC26x2R1 CC26x2REM-7ID LAUNCHXL-CC1350-4 LAUNCHXL-CC1352P-4

Characterization board for CC26x0. Using the 7x7 QFN in combination with differential RF, internal bias.
Characterization board for CC26x0. Using the 5x5 QFN in combination with differential RF, external bias.
Characterization board for CC26x0. Using the 4x4 QFN in combination with single ended RF, internal bias.
Characterization board for CC26x0. Using the 4x4 QFN in External Regulator mode configuration.
Evaluation and development platform.
Characterization board for the CC2640R2F WCSP.
Evaluation and development platform.
Characterization board.
· 433 MHz · 2.4 GHz

Multi band

CC1350 CC1352R
CC1352P

LAUNCHXL-CC1350 LAUNCHXL-CC1352R1 CC1352REM-XD7793-XD24 LAUNCHXL-CC1352P1
CC1352PEM-XD7793-XD24-PA9093

· 868 / 915 MHz · 2.4 GHz
· 868 / 915 MHz @ 20 dBm · 2.4 GHz @ 5 dBm

LAUNCHXL-CC1352P-2 CC1352PEM-XD7793-XD24-PA24

· 868 / 915 MHz @ 14 dBm · 2.4 GHz @ 20 dBm

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Front-End Configurations

2 Front-End Configurations 2.1 CC13xx/CC26xx
CC13xx and CC26xx have the following front-end modes:
· Single ended: Either the RF_P pin or the RF_N pin is used as the RF path. · Differential: Both RF_P and RF_N are used as a differential RF interface. · Internal or external bias of the LNA: The LNA can be biased by an internal or external inductor. Both types of
biasing can be selected for single-ended and differential configuration.
Figure 2-1 shows the front-end options. Components and connections in red color are not required if internal bias is used. The component values depend on the frequency band of operation.

Pin 3 (RX_TX)

Antenna (50 ohm)

Pin 2 (RF_N) Pin 1 (RF_P)

Differential operation Pin 3 (RX_TX) or pin 2 (RF_N) Pin 1 (RF_P)
Single-ended operation Pin 3 (RX_TX)
Pin 2 (RF_N)

Antenna (50 ohm)
Antenna (50 ohm)
Antenna (50 ohm)

Pin 1 (RF_P)
Single-ended operation with antenna diversity or dual band
Figure 2-1. CC13xx/CC26xx Front-End Options (red = required if external bias is used)

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Figure 2-2 summarizes the pros and cons of the different solutions. All numbers in the figure are compared to a differential front end and external biasing.

External Bias

Internal Bias

Differential

Pros x Best RX performance x Best TX performance

Pros x Slightly smaller footprint x Slightly lower BOM cost

Cons x Biggest footprint x Highest BOM cost
Pros x Small footprint x Lower BOM cost

Cons x 1 dB lower sensitivity
Pros x Smallest footprint x Lowest BOM cost

Single-Ended

Cons x 1 dB lower sensitivity x 3 dB lower output power

Cons x 2 dB lower sensitivity x 3 dB lower output power

Figure 2-2. Comparison of CC13xx/CC26xx Front-End Options

2.2 Configuring Front-End Mode
The front-end mode is set in the CMD_RADIO_SETUP command:
· Config.frontEndMode = 0x00: Differential mode · Config.frontEndMode = 0x01: Single-ended mode RFP · Config.frontEndMode = 0x02: Single-ended mode RFN
For single-ended operation that uses one RF pin in RX and the other RF pin in TX, an additional override has to be set:

ADI_HALFREG_OVERRIDES(0, 16, 0x7, x)

(1)

where, x = 1 configures the PA output on RFP and x = 2 configures the PA output on RFN.
For single-ended operation, the pin set by CMD_RADIO_SETUP Config.frontEndMode will be used in RX and the pin set by the ADI_HALFREG_OVERRIDE override will be used in TX.
The LNA biasing is set in the CMD_RADIO_SETUP command:
· config.biasMode = 0: Internal bias · config.biasMode = 1: External bias

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Front-End Configurations

2.3 CC13xx Single-Ended Mode 2.3.1 Single-Ended RX/TX

A typical sub-1 GHz design usually requires long range and a differential design is typically used. For lower cost and a smaller footprint, a single-ended design can be used at the expense of shorter range shown in Section 2.3.1

If CC13xx is interfaced to a front-end module (FEM) with dedicated 50  ports for RX and TX, fewer components than in the single-ended RX/TX design are needed. This is covered in Section 2.3.2 and Section 2.3.3 for TX and RX only.

SMA

4

3

5

2

RF PIN RX_TX

C2 120 pF
1
L1 68 nH 2

C3 5.6 pF

1

2

L2

6.8 nH

1
C4 2.7 pF

C1 120 pF

Figure 2-3. Single-Ended CC13xx Tx and Rx with external bias (868/915 MHz)
2.3.2 Single-Ended TX Only Load pull measurements show that maximum output power can be achieved if the single-ended RF pin sees 14 ­ j20. A suggested matching network is shown in Figure 2-4.
Note Single-ended measurements have not been done for 433 MHz

4 5

RF PIN

C2 120 pF

C3 5.6 pF

1

2

L2 6.8 nH

SMA 3 2
1
C4 2.7 pF

Figure 2-4. Single-Ended CC13xx TX Only (868/915 MHz)

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2.3.3 Single-Ended RX Only
Source pull measurements show that best sensitivity can be achieved if the single-ended RF pin sees 47 + j26. A suggested matching network is shown Figure 2-5. Using this match gives sensitivity of -110 dBm (measured on 3 units at 25°C, 3.0 V, 868 MHz). Note that single-ended measurements have not been done for 433 MHz.

SMA

4

3

5

2

RF PIN

1

2

1

L2

L1

10 nH

68 nH

1
C1 1.0 pF

Figure 2-5. Single-Ended Rx Only with External Bias (868/915 MHz)

SMA

4

3

5

2

1

RF PIN

1

2

L2 10 nH

C1

C2

1.0 pF 120 pF

Figure 2-6. Single-Ended Rx Only with Internal Bias (868/915 MHz)

2.3.4 Single-Ended 2.4 GHz

For CC13x2, the single-ended configuration shown can be used for the 2.4 GHz path.

SMA

4

3

5

2

RF_P

L11 15 nH

L12 2.8 nH
C11 1.5 pF

1
C12 C15 1.5 pF 12 pF

2.4 CC26xx

RF_N

2

For CC26xx, a single-ended configuration is recommended when maximum output power is not needed. For 0 dBm output power using single-ended mode, the current consumption and component count will be lower than for the corresponding differential mode.

Reference designs for both single-ended and differential configurations are available.

1. Go to: http://www.ti.com/product/CC2640R2F/technicaldocuments. 2. Scroll down to "Design Files". 3. The designs are named 4XS, 5XD and 7ID. The first number indicate the packet size, X - External bias, I -
Internal bias, S ­ Single-ended, D ­ Differential.

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3 Schematic 3.1 Schematic Overview
Figure 3-1 shows the different components discussed in the following sub-sections.
VDDS

nRESET
C41 12pF

R351 100k
C351 0.1uF
Y1 32.768kHz

VDDS VDDR

JTAG_TMS JTAG_TCK
DCDC_SW

U1A

24 25

JTAG_TMSC

35 JTAG_TCKC

RESET_N

33 DCDC_SW

4 5

X32K_Q1

X32K_Q2

13

VDDS2 VDDS3
VDDS

22 44 34

VDDS_DCDC 45

VDDR 48

VDDR_RF

RF_P RF_N

1 2 3

RX_TX

C51 12pF

C231 1uF

23 49 DCOUPL
EGP CC1312R1F3RGZ

46 X48M_N 47 X48M_P

C11 3.6pF

1

2

1
L11 27nH 2

L12 7.5nH
C22

1
L21 3.6pF 7.5nH 2

Y2 48MHz

1

3

C21 100pF

C473 7.5pF

24

C461 7.5pF

L13

1

2

6.8nH C12 2.7pF

Schematic

L14

1

2

6.8nH C13 6.2pF

C15
C14 100pF 3pF

Using external crystal load capacitors instead of internal: C461 and C473: 7.5 pF
Figure 3-1. CC1312R 7x7 RF Part Schematic Overview
3.1.1 24/48 MHz Crystal
A 24/48 MHz crystal is required as the frequency reference for the radio.
For CC26x2/CC13x2, there will be spurs at N x 48 MHz offset from the carrier. These spurs are caused by the current going back and forth between the crystal and the XOSC tuning capacitors (which form the oscillator tank together with off-chip capacitances). This current is quite large due to the high Q of the crystal tank and will create an IR drop on the power rails that are shared with the PA and VCO. Setting the XOSC tuning capacitors to zero reduces the spurs by approximately 5 dB for the largest spur compared to the default setting.
The internal capacitor array can be used in most use cases, but it is recommended to use external crystal loading capacitors and setting the internal XOSC tuning capacitors to zero for systems targeting compliance with ARIB STD T-108 and Chinese regulations in 470 ­ 510 MHz frequency band as well as when using the +20 dBm PA. For information on how to set the internal XOSC tuning capacitors, see Section 6.4.
3.1.2 32.768 kHz Crystal
The 32.768-kHz crystal is optional. The internal low-speed RC oscillator (32-kHz) can be used as a reference if the low-power crystal oscillator is not used. The RC oscillator can be calibrated automatically to provide a sleep timer accurate enough for Bluetooth® Low Energy. Using an external crystal has the advantage that it increases sleep clock accuracy and reduces the power consumption for Bluetooth Low Energy (shorter RX windows around connection events). An external crystal is required for time synchronous protocols such as TI 15.4-Stack and wM-Bus.

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3.1.3 Balun

A balun is a network that transforms from a balanced (differential) to an unbalanced (single-ended) signal, hence the name balun. The balun has a ±90° phase shift implemented by using a low-pass filter and a high-pass filter. The important part is to keep the balun as symmetrical as possible. If only one of the RF pins is used for RF output/input no balun is required. In this case, a filter is required between the chip and the antenna. For details, see Section 2.3.

3.1.4 Filter

An LC filter is placed between the balun and the antenna. The filter has two functions: attenuate harmonics and perform impedance transformation to 50 . The latter is important since measuring equipment such as spectrum analyzers and RF signal generators provide a 50  load. The word filter balun is sometimes used to describe all the components necessary to implement a balun, filter and to ensure proper impedance matching between the radio and the antenna.

3.1.5 RX_TX Pin

This pin is not present on all CC26x0/CC13x0 and CC26x2/CC13x2 devices. This pin provides ground connection for the input LNA in RX. This is referred to as external bias and improves sensitivity by approximately 1 dB compared to using internal biasing of the LNA.

3.1.6 Decoupling Capacitors

In the reference design, there are several decoupling capacitors. The schematic tells which supply pin the decoupling capacitor is supposed to decouple.

VDD_EB FL1
BLM18HE152SN1

VDDS VDDS Decoupling Capacitors

Pin 13

Pin 22 Pin 44

Pin 34

C1 22uF

C131 0.1uF

C221 0.1uF

C441 0.1uF

C341 22uF

C342 0.1uF

DCDC_SW

L331 6.8uH

VDDR VDDR Decoupling Capacitors

Pin 45

Pin 48

C331 22uF

C451 0.1uF

C481 0.1uF

Place L331 and C331 close to pin 33. Low inductance ground for C331
Figure 3-2. CC1312R 7x7 Decoupling Capacitors

3.1.7 Antenna Components

A pi-match network is recommended between the LC filter and the antenna for antenna impedance matching. For more information, see Section 5.1.

3.1.8 RF Shield

An RF shield is used on some of the TI reference designs to reduce the radiation of spurious signals. Most notably is the 3rd harmonic emission.

3.1.9 I/O Pins Drive Strength

The I/O pins have configurable drive strength and maximum current. All I/O pins support 2 mA and 4 mA, while five pins support up to 8 mA.

Table 3-1. CC26x0/CC13x0 and CC26x2/CC13x2 Pins With up to 8 mA Drive Strength

7 × 7 QFN (RGZ)

5 × 5 QFN (RHB)

WCSP (YFV)

4 × 4 QFN (RSM)

DIO5

DIO2

DIO2

DIO0

DIO6

DIO3

DIO3

DIO1

DIO7

DIO4

DIO4

DIO2

DIO16

DIO5

DIO5

DIO3

DIO17

DIO6

DIO6

DIO4

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Schematic

3.2 Bootloader Pins

The bootloader communicates with an external device over a 2-pin universal asynchronous receiver/transmitter (UART) or a 4-pin SSI interface. The SSI0 port has the advantage of supporting higher and more flexible data rates, but it also requires more connections to the CC13xx/CC26xx devices. The UART0 has the disadvantage of having slightly lower and possibly less flexible rates. However, the UART0 requires fewer pins and can be easily implemented with any standard UART connection. The serial interface signals are configured to specific DIO's. These pins are fixed and cannot be reconfigured.

Signal UART0 RX UART0 TX
SSI0 CLK SSI0 FSS SSI0 RX SSI0 TX

Table 3-2. CC13x0/CC26x0: Configuration of Signal Interfaces

Pin Configuration
Input with pull-up
No pull (output when selected)
Input with pull-up
Input with pull-up
Input with pull-up
No pull (output when selected)

7 × 7 QFN (RGZ) DIO2 DIO3
DIO10 DIO11 DIO9 DIO8

5 × 5 QFN (RHB) DIO1 DIO0
DIO10 DIO9 DIO11 DIO12

4 × 4 QFN (RSM) DIO1 DIO2
DIO8 DIO7 DIO9 DIO0

2.7 × 2.7 WCSP (YFV) DIO1 DIO0
DIO10 DIO9 DIO11 DIO12

Table 3-3. CC1311Rx, CC1312Rx, CC2651Rx, CC2652Rx: Configuration of Signal Interfaces

Signal

Pin Configuration

UART0 RX

Input with pull-up

DIO2

UART0 TX

No pull (output when selected)

DIO3

SSI0 CLK

Input with pull-up

DIO10

SSI0 FSS

Input with pull-up

DIO11

SSI0 RX

Input with pull-up

DIO9

SSI0 TX

No pull (output when selected)

DIO8

Table 3-4. CC1311Px, CC1352Rx, CC1352Px, CC2651Px, CC2652Px: Configuration of Signal Interfaces

Signal

Pin Configuration

UART0 RX

Input with pull-up

DIO12

UART0 TX

No pull (output when selected)

DIO13

SSI0 CLK

Input with pull-up

DIO10

SSI0 FSS

Input with pull-up

DIO11

SSI0 RX

Input with pull-up

DIO9

SSI0 TX

No pull (output when selected)

DIO8

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3.3 AUX Pins 3.3.1 CC26x2/CC13x2 AUX Pins

There are up to 32 signals (AUXIO0 to AUXIO31) in the sensor controller domain (AUX Domain). These signals can be routed to specific DIO pins given in Table 3-5. The signals AUXIO19 to AUXIO26 have analog capability, but can also be used as digital I/Os. All the other AUXIOn signals are digital only.

DIO DIO30 DIO29 DIO28 DIO27 DIO26 DIO25 DIO24 DIO23 DIO22 DIO21 DIO20

Table 3-5. CC13x2/CC26x2 Pin Mapping

AUX Domain I/O

DIO

AUX Domain I/O

19

DIO19

30

20

DIO18

31

21

DIO17

1

22

DIO16

2

23

DIO15

3

24

DIO14

4

25

DIO13

5

26

DIO12

6

27

DIO11

7

28

DIO10

8

29

DIO9

9

DIO DIO8 DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0

AUX Domain I/O 10 11 12 13 14 15 16 17 18

3.3.2 CC26x0/CC13x0 AUX Pins

There are up to 16 signals (AUXIO0 to AUXIO15) in the sensor controller domain (AUX). These signals can be routed to specific pins given in Table 3-6. AUXIO0 to AUXIO7 have analog capability, but can also be used as digital I/Os, while AUXIO8 to AUXIO15 are digital only.

7 × 7 QFN (RGZ) DIO30 DIO29 DIO28 DIO27 DIO26 DIO25 DIO24 DIO23 DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0

Table 3-6. CC13x0/CC26x0 Pin Mapping

5 × 5 QFN (RHB)

WCSP (YFV)

4 × 4 QFN (RSM)

DIO14

DIO13

DIO13

DIO12

DIO12

DIO11

DIO11

DIO9

DIO9

DIO9

DIO8

DIO10

DIO10

DIO7

DIO8

DIO8

DIO6

DIO7

DIO7

DIO5

DIO4

DIO4

DIO2

DIO3

DIO3

DIO1

DIO2

DIO2

DIO0

DIO1

DIO1

DIO0

DIO0

AUX Domain I/O 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

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3.4 JTAG Pins

The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface. The 2-pin cJTAG mode using only TCK and TMS I/O pads is the default configuration after power up. The 4-pin JTAG uses TCK, TMS, TDI, and TDO.

Signal TCK TMS TDI TDO

Table 3-7. CC26x0/CC13x0 and CC26x2/CC13x2 JTAG Pins

7 × 7 QFN (RGZ)

5 × 5 QFN (RHB)

WCSP (YFV)

Pin 25

Pin 14

Pin F2

Pin 24

Pin 13

Pin E4

DIO17

DIO6

DIO6

DIO16

DIO5

DIO5

4 × 4 QFN (RSM) Pin 14 Pin 13 DIO4 DIO3

4 PCB Layout 4.1 Board Stack-Up
Board stack-up is in the reference design zip file (see Design_Name_mechanical.pdf). Most important is the distance from the top layer to the ground layer. Deviating from the recommended board stack-up will change the parasitics and might in some cases lead to a re-design of the filter balun for optimum performance.

Figure 4-1. CC1312R Board Stack Up
4.2 Balun
The important part is to keep the balun as symmetrical as possible with regard to the RF ports. Therefore, the trace length from the single ended port to each of the RF pins should be equal to achieve best amplitude and phase balance in the balun. For a good balun PCB layout, see Figure 4-2. An unbalance in the balun causes higher harmonic level, especially at the 2nd and 4th harmonic. Another effect of having an unsymmetrical balun is reduced output power at the single ended side of the balun. Both component values and component placement is important to achieve best possible symmetry in the balun. Amplitude imbalance should be maximum 1.5 dB and the phase imbalance maximum 10°.
To ensure proper performance it is important to implement the same layout of the balun, match, and filter as in the reference design. Changing the placement of these parts might require tuning on the component values to obtain the desired performance. Tuning requires advanced RF skills and the proper equipment.
There must be an uninterrupted and solid ground plane under all the RF components, stretching from the antenna and all the way back to the ground vias in the chip exposed ground pad (EGP). There must not be any traces under the RF path.

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Figure 4-2. CC1312R Balun and LC Filter PCB Layout
4.3 LC Filter
The LC filter should be laid out so that crosstalk between the shunt components is minimized. Figure 4-3 shows three different layouts from worse to best. The advantage with the layout to the right is that the parasitic inductance in the PCB track (in black) between the shunt capacitor and the series inductor is in series with the inductor. In the middle figure, the parasitic inductance is in series with the shunt capacitor forming a series LC circuit. The placement of C12, L13, C13, L14, and C14 in Figure 4-2 shows good design practice.
If the design cannot use the reference design as is (for example, use of a different component size) the filter balun will most likely have to be re-tuned. Simulate both the TI reference design and the custom design using an electromagnetic simulator. The two designs should have the same S21/S22.

Worse

Best

Figure 4-3. LC Filter PCB Layout Design Guideline

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4.4 Decoupling Capacitors

General rules for decoupling capacitors:

· Ensure decoupling capacitors are on same layer as the active component for best results · Route power into the decoupling capacitor and then into the active component · Each decoupling capacitor should have a separate via to ground to minimize noise coupling (see Figure 4-4) · The decoupling capacitor should be placed close to the pin it is supposed decouple (see Figure 3-2) · Ground current return path between decoupling capacitor and chip should be short and direct (low
impedance). For details, see Section 4.6.

Supply

Supply

Supply

Supply

Via to GND

Via to GND

Figure 4-4. Decoupling Capacitors and VIA to Ground
The figure to the right that uses separate vias to ground, has less noise coupling.
4.5 Placement of Crystal Load Capacitors
The main oscillation loop current is flowing between the crystal and the load capacitors. Keep this signal path (crystal to CL1 to CL2 to crystal) as short as possible and use a symmetrical layout. Hence, both the capacitors' ground connections should always be as close as possible. Never route the ground connection between the capacitors or all around the crystal, because this long ground trace is sensitive to crosstalk and EMI.
4.6 Current Return Path
There should be a solid ground plane from the capacitor ground pad back to the chip. Figure 4-5 illustrates this. Failure to follow this may lead to reduced RF performance and higher spurious emission.

Figure 4-5. Current Return Path

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4.7 DC/DC Regulator
The DCDC components must be placed close to the DCDC_SW pin. The capacitor at the DC/DC regulator output (DCDC_SW pin) must have a short and direct ground connection to the chip (low impedance). Keep a solid ground plane from the capacitor ground pad back to the chip as shown for C331 in Figure 4-6.

Figure 4-6. CC1312R DC/DC Regulator PCB Layout
4.8 Antenna Matching Components
A pi-network is recommended for antenna impedance matching. The antenna matching components should be placed as close to the antenna as possible.
4.9 Transmission Lines
Traces in the balun and LC filter are too short to be considered transmission lines, but longer traces, such as from the LC filter, towards the antenna should have a 50  impedance. TXLine is a free tool for PCB trace impedance calculations: TXLine Transmission Line Calculator.
4.10 Electromagnetic Simulation
If the design does not follow the reference design (for example, different filter balun component placement or component size), it is recommended to use Advanced Design System (ADS) or similar to simulate and then compare the impedances and S-parameters of the custom design with the reference design. Changes to the filter balun component values might be required if the custom design deviates too much from the reference design.

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Antenna

5 Antenna 5.1 Single-Band Antenna
The existing antenna documentation available at TI is mainly orientated towards antennas that operate at a single frequency. Two antenna selection guides are available: the Antenna Selection Quick Guide and a comprehensive Antenna Selection Guide. In addition to the documentation, there is a CC-Antenna-DK2 and Antenna Measurements Summary available on TI's eStore, as well, with complete documentation. All antenna documentation that is available from TI can be accessed from the Antenna Selection Quick Guide since it contains hyperlinks to all antenna documentation, antenna measurement reports, and all antenna reference designs.
It is always advised to include an antenna matching network in order to tune and to reduce the mismatch losses of the antenna. For a single-band antenna, the recommendation is to always include a pi-match network prior to the antenna, see Figure 5-1. Only two of the three footprints/components are required. The impedance of the antenna will determine if footprint/component ANT1 or ANT3 is used. ANT2 will always be used and even if the antenna is perfectly matched, then this can just be set as a 0  resistor.
Antenna

Radio

ANT2

ANT1

ANT3

Figure 5-1. Recommended Antenna PI-Match Network for Single-Band Antennas
5.2 Dual-Band Antenna
The introduction of dual-band operation with advantages of Bluetooth Low Energy combined with long-range advantages of sub-1 GHz sets the need of dual-band antennas. Separate antennas can be used for each of the bands, but physical space is normally limited on most handheld devices that promote usage of dual-band antennas. The most popular dual-band configurations are shown below:
· 863-928 MHz and 2.4 GHz · 433-450 MHz and 2.4 GHz · 470-510 MHz and 2.4 GHz
For dual-band operation that contains a low-band and a high-band, the antenna pi-match shown in Figure 5-1 is not recommended. It is recommended to use an LC, CL match network instead as shown in Figure 5-2. The LC part is used to match the high-band and the CL part is used for the low-band. Therefore, the LC section will be denoted as LHIGH CHIGH and the CL section as CLOW LLOW in order to identify the components.
Antenna

Radio

Lhigh Chigh

Clow Llow

Figure 5-2. Recommended Antenna Match Network for Dual-Band Antennas

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5.2.1 Dual-Band Antenna Match Example: 863-928 MHz and 2.4 GHz
This example is based on LaunchPad-CC1352P1.
· Assemble LHIGH: 0  and CLOW : 0 ; CHIGH: NC and LLOW : NC · Measure initial impedance with a network analyzer (VNA) at the low-band (868 MHz) and high-band (2440
MHz) ­ 868 MHz: 54 + j30, VSWR: 1.78:1 ­ 2.44 GHz: 14 - j32, VSWR: 5.05:1 (This is not required at this stage but included for documentation
purposes to note the delta). · Match the low-band with only the CLOW and LLOW components
­ CLOW: 5.6 pF and LLOW: NC; see Figure 5-3

Figure 5-3. Matching the Low-Band With CLOW: 5.6 pF and LLOW: NC · Confirm the low-band is matched by measuring the impedances again:
­ 868 MHz: 42 + j2, VSWR: 1.18:1. Good match at the low-band ­ 2.44 GHz: 16+j34, VSWR: 5.38:1 · Match the high-band with only the CHIGH and LHIGH components ­ LHIGH : 2.2 nH and CHIGH: NC; see Figure 5-4

Figure 5-4. Matching the High-Band With an Ideal Value of LHIGH: 2.2 nH and CHIGH: NC

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Antenna

· LHIGH : 2.2 nH was not sufficient when measured and a value of 3.3 nH was used instead. The antenna match components are based on ideal components with no parasitics. The match is not ideal but the CHIGH component could not be used due to the impedance position in the Smith chart.
· Measure final impedance with a network analyzer (VNA) at the low-band (868 MHz) and high-band (2440 MHz),
­ 868 MHz: 37 + j8, VSWR: 1.36:1 Good match at the low-band ­ 2.44 GHz: 16+j8, VSWR: 3.18:1 Reasonable match at the high-band but would prefer VSWR < 2.00:1;
see Figure 5-5 and Figure 5-6.

Figure 5-5. Smith Chart With Final Match Values of LHIGH: 3.3 nH and CLOW: 5.6 pF

Figure 5-6. VSWR Chart With Final Match Values of LHIGH: 3.3 nH and CLOW: 5.6 pF · With the matching components, the antenna match was improved by:
­ 868 MHz: VSWR: 1.78:1 ­> 1.36:1 ­ 2.44 GHz: VSWR: 5.05:1 ­> 3.18:1
The example shown above used a low-band of 868 MHz but a main requirement of the LaunchPad-CC1352P-1 was for good operation for the complete 863 ­ 928 MHz band since it was important to cover both ETSI (863-870 MHz) and FCC bands (902-928 MHz). The antenna length on CC1352P1 has a natural resonance of approximately 900 MHz with no matching components.

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If the performance at 2.44 GHz is more important than supporting both 868 MHz and 915 MHz ISM bands, then the length of the antenna can be increased so the natural resonance will be around 813 MHz (2440 MHz/3). This would give very good performance at 868 MHz and 2.4 GHz but the 915 MHz band would suffer. A common antenna match for dual-bands is a compromise of performance between the high-band and low-band.

5.2.2 Dual-Band Antenna Match: 433-510 MHz and 2.4 GHz

This antenna design is based on LaunchPad-CC1352P-4 that utilises the "433 MHz to 930 MHz and 2.4 GHz BOM Tunable PCB Antenna". This BOM Tunable Antena is fully documented in application note swra730.

In order to cover the frequency band 433 ­ 510 MHz, an external component (LANT) is added to the antenna structure normally used for 863-928 MHz and 2.4 GHz. This is required to keep the antenna relatively small and to maintain a high efficiency. The LANT component extends the length of the antenna structure with the extra inductance added. It is difficult to cover the entire frequency band of 433 ­ 510 MHz with just one BOM due to the wide bandwidth so the frequency range is divided up into the several regions. An additional antenna structure has also been added that also extends the length of the standard antenna, see Figure 5-7.

Value of LANT component for 433-510 MHz operation:
· 51 nH: 433 MHz · 39 nH: 470 MHz · 33 nH: 490 MHz

433-510 MHz 2.4 GHz

Radio

Lhigh Chigh

Clow Llow

Lant

Figure 5-7. Recommended Antenna Match Network for Dual-Band Antennas (433-510 MHz & 2.4 GHz)
Once the LANT component has been chosen then the matching procedure is similar as shown in the previous example. After the antenna matching process, the final values of the antenna match components can be fixed. As can be seen in Figure 5-8, the matching of 490 MHz and 2.4 GHz are both below VSWR 1.90 :1, which are good results.

Figure 5-8. VSWR Chart With Final Match Values of LANT: 33 nH LHIGH: 3.9 nH and CLOW: 0 

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Crystal Tuning

Matching the antenna should be performed in the final casing of the product including all surrounding components such as batteries, displays, and so forth. Casing can affect the antenna's resonance even if the material choice is plastic. The positioning of the antenna or body effects will also affect the antenna's resonance. The antenna is always detuned by a shift downwards in frequency. Therefore, if there are two different environments for the antenna such as handheld and stand-alone on a wooden desk, then it is preferable to have the stand-alone resonance slightly higher so the antenna's bandwidth can be utilized when detuned by body effects/metal objects, and so forth.
6 Crystal Tuning
6.1 CC13xx/CC26xx Crystal Oscillators

The CC13xx/CC26xx devices have two crystal oscillators as shown in Figure 6-1. The high frequency crystal oscillator (HFXOSC), running at 24 MHz for CC13x0/CC26x0 and 48 MHz for CC13x2/CC26x2, is mandatory to operate the radio. The low frequency crystal oscillator (LFXOSC) is used for RTC timing and only required when accurate RTC timing is necessary, for example for synchronous protocols such as Bluetooth Low Energy.

C41 12pF

Y1

32.768kHz

C51 12pF

U1A

24

25 35

JTAG_TMSC JTAG_TCKC

RESET_N

33 DCDC_SW

4 5 X32K_Q1
X32K_Q2

VDDS2

13 22

VDDS3 44

VDDS VDDS_DCDC

34 45

VDDR 48

VDDR_RF

RF_P

1 2

RF_N 3

RX_TX

23 49 DCOUPL
EGP

46 X48M_N 47 X48M_P

CC1312R1F3RGZ

Y2 48MHz

1

3

24

Figure 6-1. CC1312R With 32 kHz and 48 MHz Crystals

Both crystal oscillators are pierce type oscillators that can be seen in Figure 6-2. In this type of oscillator, the crystal and the load capacitors form a pi-filter providing a 180° phase shift to the internal amplifier keeping the oscillator locked at the specified frequency. For this frequency to be correct, the load capacitance must be dimensioned properly based on the crystal´s capacitive load (CL) parameter.
U1

R1

CL1

CL2

Figure 6-2. Pierce Type Oscillator
A key difference between the oscillators is that the high frequency oscillator has internal variable load capacitance inside the IC and does in most cases not require external load capacitors. For details on when it is required to use external capacitors instead of the internal variable load capacitance, see Section 3.1.1. The low frequency oscillator on the other hand needs to have external capacitors to operate properly.
6.2 Crystal Selection
When selecting a crystal part, it is important to look at the device-specific CC13xx/CC26xx data sheets that lists requirements for the crystal parameters. All of these requirements must be fulfilled to ensure proper operation of the oscillator(s) and proper operation of the device.
6.3 Tuning the LF Crystal Oscillator
The frequency of the 32-kHz crystal oscillator is set by properly dimensioning the load capacitors relative to the crystal´s wanted load capacitance, CL. From the crystal´s point of view, the two capacitors are placed in series, which means that the "resistor parallel" equation to calculate the resulting total capacitance must be used. Also keep in mind that the PCB traces and the pads add some parasitic capacitance. Equation 2 shows how to calculate the right load capacitance value.

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CL

C1u C2 C1 C2

C parasitic

|

load

capacitor 2

value

C parasitic

(2)

The last simplification requires that C1 and C2 are equal.
The best way to measure the frequency accuracy of the oscillator is to output the clock signal on an I/O pin. This way the frequency can be measured using a frequency counter without affecting the oscillator. The following Driverlib calls will output the selected 32-kHz clock source in all power states except Shutdown:

#include <driverlib/aon_ioc.h> IOCPortConfigureSet(IOIDn, IOC_PORT_AON_CLK32K, IOC_STD_OUTPUT); AONIOC32kHzOutputEnable();

6.4 Tuning the HF Oscillator
The HF oscillator has internal variable load capacitors (cap-array) in the IC and does not require external capacitors to be mounted. There are some exceptions. For details on when it is required to use external capacitors instead of the internal cap-array, see Section 3.1.1.
The load capacitance is set in CCFG.c through the following defines:

#ifndef SET_CCFG_MODE_CONF_XOSC_CAP_MOD // #define SET_CCFG_MODE_CONF_XOSC_CAP_MOD #define SET_CCFG_MODE_CONF_XOSC_CAP_MOD #endif #ifndef SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA #define SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA modifying trimmed XOSC cap-array value #endif

0x0 0x1 0xFF

// Apply cap-array delta // Don't apply cap-array delta // Signed 8-bit value, directly

The SET_CCFG_MODE_CONF_XOSC_CAP_MOD defines tells the system whether it should use the default value or use an offset from the default value set by SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA. The default cap-array values are 9 pF for CC13x0/CC26x0 QFN, 5 pF for CC2640R2F WCSP, and 6.7 pF for CC13x2/CC26x2.

The cap-array delta value is an offset from the default value that can be either negative or positive. Table 6-1 shows the resulting total capacitance measured on an evaluation board versus cap-array delta values. Note that the resulting capacitance value includes parasitic capacitances, which is why the lowest setting is not 0 pF. Using a delta value equal to or lower than the most negative value in the table completely disables the internal load capacitor array.

The best way to measure the accuracy of the HF crystal oscillator is to output an unmodulated carrier wave from the radio and measuring the frequency offset from the wanted frequency using a spectrum analyzer. The relative offset of crystal frequency, typically stated in Parts per Million (ppm), is the same as the relative offset of the RF carrier.

For testing purposes cap-array delta values can be adjusted in SmartRFTM Studio. This simplifies tuning greatly by allowing on-the-fly updates of the load capacitance. The optimum value found in SmartRF Studio can then be entered into CCFG in the applicable software project.

Measured Capacitance on Reference Board 2,1 2,1 2,2 2,3 2,4 2,5 2,6 2,7

Table 6-1. Cap-Array Delta

CCFG Delta Value for CC13x0/ CC26x0 QFN

CCFG Delta Value for CC2640R2F WCSP

< -55

< -28

-55

-28

-54

-27

-53

-26

-52

-25

-51

-24

-50

-23

-49

-22

CCFG Delta Value for CC13x2/ CC26x2 QFN < -40 -40 -39 -38 -37 -36 -35 -34

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Measured Capacitance on Reference Board 2,7 2,8 2,9 3,0 3,1 3,2 3,3 3,4 3,4 3,6 3,7 3,8 3,9 4,0 4,1 4,3 4,4 4,5 4,6 4,7 4,8 5,0 5,1 5,2 5,3 5,5 5,6 5,8 5,9 6,1 6,2 6,4 6,5 6,7 6,8 7,0 7,1 7,3 7,4 7,6 7,7 7,9 8,2 8,4 8,6 8,8

Table 6-1. Cap-Array Delta (continued)

CCFG Delta Value for CC13x0/ CC26x0 QFN

CCFG Delta Value for CC2640R2F WCSP

-48

-21

-47

-20

-46

-19

-45

-18

-44

-17

-43

-16

-42

-15

-41

-14

-40

-13

-38

-12

-37

-11

-36

-10

-35

-9

-34

-8

-33

-7

-32

-6

-31

-5

-30

-4

-29

-3

-28

-2

-27

-1

-26

0

-25

1

-24

2

-23

3

-21

4

-20

5

-19

6

-18

7

-17

8

-16

9

-15

10

-14

11

-13

12

-12

13

-11

14

-10

15

-9

16

-8

17

-7

18

-6

19

-5

21

-4

22

-3

23

-2

24

-1

25

Crystal Tuning
CCFG Delta Value for CC13x2/ CC26x2 QFN -33 -32 -31 -30 -29 -28 -27 -26 -25 -24 -23 -22 -21 -20 -19 -18 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12

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Measured Capacitance on Reference Board 9,0 9,2 9,4 9,6 9,8 10,1 10,3 10,5 10,7 10,9 11,1 11,1

Table 6-1. Cap-Array Delta (continued)

CCFG Delta Value for CC13x0/ CC26x0 QFN

CCFG Delta Value for CC2640R2F WCSP

0

26

1

27

2

28

3

29

4

30

5

31

6

32

7

33

8

34

9

35

10

36

> 10

> 36

www.ti.com
CCFG Delta Value for CC13x2/ CC26x2 QFN 13 14 15 16 17 18 19 20 21 22 23 > 23

7 TCXO Support
CC13x0 and CC26x0 do not support a TCXO as clock source. The CC13x2 family of devices has support for TCXO. Two types of TCXO are supported: clipped sine wave and CMOS output. The TCXO output should be connected to the X48M_P input. If a clipped sine wave type is used, a series cap is required since internal common mode bias is used in this case. The data sheet for the selected TCXO should be checked for the recommended value for the series cap.
7.1 Hardware
For reference design, see the design files for the CC1312R Launchpad. It is important that the TCXO comply with the requirements in the data sheet. Note the maximum output voltage.
7.2 Software
SDK version 4.10 or newer has to be used. TCXO usage is enabled in syscfg. Under TI Devices  Device Configuration, select "External 48 MHz TCXO" as HF Clock source. When TCXO is selected as source, select the TCXO type and the TCXO Max Startup Time. It is important that this time is set correctly. If a too short time is set, the chip could attempt to switch to the TCXO before this is stable, which again could cause the chip to malfunction.
When a TCXO is used, the internal load capacitors have to be reduced to avoid loading the TCXO. The required setting will be dependent on the selected TCXO. Turning off the capacitor array could cause the output swing to be too large from some TCXOs. In these cases, the capacitor in the capacitor array will help reducing the voltage swing. The capacitor array should be set to a value where the swing on the X48M_P is within the value set in the CC13x2 data sheet, both for minimum and maximum swing. Care has to be taken when doing the measurement to avoid that the measurement does not increase the load on this node, which will impact the measurement result.
In syscfg go to TI Devices  Device Configuration and tick the box next to "Enable XOSC Cap array modification" and set the wanted value.
The power driver contains a function hook PowerCC26X2_Config.enableTCXOFxn that has to be added to the code. If this function is not defined, the code will compile but it will hang when the system requests the radio to turn on. The function hook makes it possible to power the TCXO from a DIO and turn off the TCXO when the CC13x2 is in standby and turn it on again in time for a RF operation.

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TCXO Support

The following code snippet show how this function could look like when the TCXO is powered by a DIO:

void Power_enableTCXO(bool turnOn) {
if ( turnOn ) { // Set corresponding DIO high to enable the TCXO GPIO_write(GPIO_TCXO_PIN, 1);
} else {
// Set the corresponding DIO low to disable the TCXO GPIO_write(GPIO_TCXO_PIN, 0); } }

SmartRF Studio 2.17 or earlier does not support TCXO.

7.3 Example: Usage of TCXO on CC1312R Launchpad

The CC1312R Launchpad has a TCXO mounted but the crystal is used by default. To select the TCXO the following changes have to be done on the board:

· Remove R5 and R6 · Mount 0  resistors for R7 and R8.

In syscfg:

1. Go to TI Devices  Device configuration. 2. Set the following:
a. Enable XOSC Cap array modification: Tick to enable b. XOSC Cap Array Delta: 0xE7 c. HF Clock Source: External 48 MHz TCXO d. TCXO Type: Clipped Sine Type e. TCXO Max Start-up Time: 0x14
8 Integrated Passive Component (IPC)

An Integrated Passive Component (IPC) is a matched-filter balun component specially designed or matched to the RF section. The IPC reduces the component count that saves space and reduces pick-and-place assembly costs. In addition, there is less risk of a poor RF layout with an IPC since the RF crosstalk is minimized. Table 8-1 lists the available IPC's.

Chip Family
CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430
CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430
CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430
CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430
CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430
CC1120, CC1121, CC1175, CC1200, CC1201
CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430

Frequency (MHz) 430 - 435

Table 8-1. Available IPC's

Vendor

Part Number

Johanson Technology

0433BM15A0001

430 - 435

Johanson Technology

0433BM15A0001E-AEC*1

863 - 873

Johanson Technology

0868BM15C0001

863 - 873

Johanson Technology

0868BM15C0001E-AEC*1

863 - 928

Johanson Technology

0896BM15A0001

863 - 928

Johanson Technology

0900PC15J0013

902 - 928

Johanson Technology

0915BM15A0001

Application Report SWRA520 SWRA520 SWRA520 SWRA520 SWRA520 SWRA407 SWRA297

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Optimum Load Impedance
Chip Family CC1101, CC1111, CC1110, CC110L, CC113L, CC115L, CC430 CC13xx CC13xx CC13xx CC1352R, CC1352P
CC1352R, CC1352P
CC1352R, CC1352P
CC2420 CC2430 CC2430, CC2480 CC2520 CC2500, CC2510 CC1352R, CC1352P, CC2620, CC2630, CC2640, CC2650 CC1352R, CC1352P, CC2620, CC2630, CC2640, CC2650 CC1352R, CC1352P, CC2620, CC2630, CC2640, CC2650 CC13xP, CC26xP For HPA port, TX only.

Table 8-1. Available IPC's (continued)

Frequency (MHz)

Vendor

Part Number

902 - 928

Johanson Technology

0915BM15A0001E-AEC*1

430-510 770-928 770-928 863 ­ 928 2400 - 2480 430 - 435, 2400 -
2480 863 ­ 928 2400 - 2480 2400 - 2480 2400 - 2480 2400 - 2480 2400 - 2480 2400 - 2480 2400 - 2480

Walsin Murata Johanson Technology Murata
Murata
Johanson Technology
Anaren Anaren Johanson Technology Johanson Technology Johanson Technology Murata

RFBLN2520090YC3T10 LFB18868MBG9E212 0850BM14E0016 LFB21868MDZ5E757
LFB21433MDZ6F112
0900PC15A0036
BD2425N50200A00 BD2425N50200A00
2450BM15A0001 2450BM15B0002 2450BM15B0003 LFB182G45BG5D920

2400 - 2480

Johanson Technology

2450BM14G0011

2400 - 2480

Johanson Technology

2400 - 2480

Murata

LFB182G45BGEF296

www.ti.com Application Report
SWRA297 SWRA524 SWRA524 SWRA524 SWRA629 SWRA629 SWRA629 SWRA155 SWRA156
SWRA572
SWRA729

9 Optimum Load Impedance
CC13xx/CC26xx supports several front-end configurations, both differential and single-ended operation with either internal or external bias. The different RF front-end configurations are presented in more details in Section 2. TI offers several reference designs for CC13xx/CC26xx showing recommendations for the different RF front-end configuration. Note that the different RF front-end configurations from the different reference designs do not follow the package sizes (7x7 mm, 5x5 mm and 4x4 mm) and can be mixed as wanted.
CC13xx/CC26xx impedance changes with the state of the chip (TX/RX) and the output/input signal level. When operated in receive, the LNA gain is adjusted according to the input signal level and is thus not constant. This results in that the LNA operates with different configuration for the different gain setting. The PA impedance is further different from the receive impedance. It changes with the configured output power level and is not linear. The term output impedance is used for linear amplifiers or amplifiers that can be approximated by a linear equivalent. Output impedance is normally used to design complex conjugate impedance matching between amplifier and load. For linear amplifiers this is sufficient to secure optimum power transfer. This method is thus not valid for the CC13xx/CC26xx series.
CC13xx/CC26xx operations are heavily dependent upon filter-balun impedance up to at least the forth harmonic for sub-1 GHz and up to at least the third harmonic for 2.4 GHz. Matching load impedance only at fundamental frequency could easily result in high current consumption, low output power and high spurious/harmonics.
To get the optimal performance with a CC13xx/CC26xx design, it is highly recommended to follow the reference designs (schematic, layout and stack-up). TI have found the recommended balun and matching circuits through simulations and load- and source-pull measurements over the full operational range. The RF circuits are designed to give best overall TX and RX performance (output power, sensitivity, current consumption, and harmonic and spurious emission).

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Optimum Load Impedance

Note that impedance calculated based on analyzing the data sheet and reference design schematic often deviate from the optimum load impedance given by TI. PCB parasitic and component imperfections generally accounts for these differences. When operating at high frequencies, PCB traces have to be modeled to account for phase shift, skin effect increased resistance, inductive and capacitive effects. Manufacturers of passives normally provide linear LCR models and/or S-parameter models representing their components at higher frequencies. Be aware to check the valid frequency range for the models, and only use them within this range. Simulators often extrapolate the model data without warnings and simulation results become invalid. Remember that valid frequency range is the range up to the highest significant frequency component within your circuit.

There are designs that cannot use the reference design as is (for example, use of a different component size). In this case, it is recommended to simulate both the TI reference design and the customer design in ADS. The two designs should have the same S21/ S22.

CC26xx

· Differential External Bias target load impedance: 45 + j43  · Differential Internal Bias target load impedance: 42 + j21  · Single-ended Internal Bias target load impedance: 38 + j5 

CC1310, CC1312

· 863-928 MHz
­ 868 MHz target load impedance: 40 + j15  · 2440 MHz target load impedance: 25 ­ j10 

CC1352R, CC1352P

· 863-928 MHz
­ 898 MHz Tx/Rx target load impedance: 37-j8  ­ 898 MHz Rx only optimized target load impedance: 47+j1  · 2450 MHz target load impedance: 33+j11  · 2440 MHz high power PA target load impedance:
­ Load impedance fundamental: 26+j25  ­ 2nd harmonic impedance: 4+j15  ­ 2nd harmonic attenuation: 45 dB_min ­ 3rd harmonic impedance: 406-j19  ­ 3rd harmonic attenuation: 60 dB_min · 863-928 MHz high power PA target load impedance:
­ Load impedance fundamental: 92+j84  ­ 2nd harmonic impedance: 8-j77  ­ 2nd harmonic attenuation: 45 dB_min ­ 3rd harmonic impedance: 3+j37  ­ 3rd harmonic attenuation: 60 dB_min

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PA Table

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10 PA Table
The PA table for the various devices is provided in SmartRF Studio. The txpower values used in the table are selected to provide as low as possible device to device variation. In addition, the txpower setting has a built-in temperature compensation giving a very low output variation as a function of temperature.
The PA used is designed to be highly effective on maximum power. With maximum power the PA is in saturation and due to this the device to decive variation is low. For lower power settings, the PA is in the linear region and the output power will therefore be dependent on the transistor gain, which will have a higher device to device variation. For the output powers not covered by the PA table provided by SmartRF Studio, it has not been possible to find a txpower setting that gives a low device to device variation or a stable output power over temperature.
It's possible for customers to generate a custom PA table if that is needed. The output power of a FEM will typically not be constant as a function of temperature and it could be possible to find a txpower value that gives a more constant output power over temperature when using a FEM.
The parameter txPower contains temp. coefficient setting, gain setting, IB setting and the TX BOOST bit:
· txPower[15:9]: temp coefficient · txPower[8]: TX BOOST bit · txPower[7:6]: Gain · txPower[5:0]: IB
The temperature coefficient is applied to automatically compensate the IB setting based on the temperature readout of AON_BATMON_TEMP.
There are three different gain settings and for each gain setting the IB can be adjusted from 0x0 to 0x3F resulting in 64*3 192 available settings for TX output power. The temperature coefficient is given as an input in addition to the requested gain and IB setting.Based on the readout from the temperature sensor and the temperature coefficient setting the IB is adjusted. IB is adjusted based on Equation 3.

Temperature 25q ~ temcoeff

lb lbrequested

256

(3)

A custom TX power table should be generated by the following method (to obtain constant Tx power over temperature for a certain Tx parameter value):
1. Room temp setting: Adjust the gain and IB setting to get the requested output power level at room temperature with temperature compensation disabled. This setting will be the Ib_requested.
2. Low temp setting: Use the same gain setting and adjust the IB setting to get the closest output power level from step 1 at low temperature. This setting will be the Ib_low_temp.
3. High temp setting: Use the same gain setting and adjust the IB setting to get the closest output power level from step 1 at high temperature. This setting will be the Ib_high_temp.
4. Calculate temp coefficient. Use the IB settings from the low and high temperature measurements to calculate the temperature coefficients. The temp coefficient is based on a linear approximation between the two temperature extremes and calculated as shown in Equation 4.

lb _ high _ temp lb _ low _ temp

temp _ coeff 256 ~

high _ temp low _ temp

(4)

Ib

= Ibrequested + Temperature

- 25 deg · temcoeff 256

(5)

temp_coeff

=

256 ·

Ib_ig_temp - Ib_low_temp ig_temp - low_temp

(6)

5. Repeat step 1-3 for all the desired power levels.

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Power Supply Configuration

11 Power Supply Configuration
11.1 Introduction
The CC13xx/CC26xx devices have three power rails that are exposed on external pins: VDDS, VDDR and DCOUPL. VDDS is the main power source for the wireless microcontroller and must be supplied externally with 1.8 V to 3.8 V. VDDR is an internal power rail that is supplied from the internal DC/DC converter, or the internal Global LDO, but can be powered from an external supply. VDDR is regulated to approximately 1.68 V, or 1.95 V when running in boost mode for maximum output power in sub-1 GHz bands. In boost mode, a minimum VDDS voltage of 2.1 V is required. DCOUPL is supplied internally by either Digital LDO or Micro LDO depending on the power state. This power rail is trimmed to approximately 1.28 V and requires an external decoupling capacitor of 1 µF.
11.2 DC/DC Converter Mode

CDEC

VDDS

POR / BOD / Misc

1.8 to 3.6 V VDDS

CBULK

CDEC

1.68 to 1.95 V VDDR LDCDC CBULK

CDEC CDEC

Global LDO

IOs VDDS2
IOs VDDS3
IOs

VDDS_DCDC

DCDC_SW

DC/DC Converter

CDEC CDEC

VDDR VDDR_RF

CDEC/BULK 1.28 V

DCOUPL

Oscillators RF LDOs

Digital LDO Micro LDO

VDD

AON_VD MCU_VD

Figure 11-1. DC/DC Mode
Maximum efficiency is obtained by using the internal DC/DC converter, and it requires an external inductor (LDCDC) and capacitor (CDCDC). The components should be placed as close as possible to the CC13xx/ CC26xx device and it is important to have a short current return path for from the CDCDC ground to the pad on the chip (see Section 4.7). In addition, the bulk capacitor on VDDS should be placed close to the VDDS_DCDC-pin. The actual value of LDCDC, CDCDC and CBULK vary from device to device. For the actual values, see the device-specific reference design.
When operating in DC/DC mode, the power system dynamically switches between the Global LDO and DC/DC converter depending on the required load to achieve maximum efficiency. If VDDS drops below 2.0 V, the DC/DC converter will be less efficient than the LDO and the device will run in global LDO mode. For systems operating with VDDS less than 2.0 V, consider either global LDO or external regulator mode to save component cost and board area.

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Power Supply Configuration
The following software setup is required in the CCFG to use the DC/DC converter:

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#ifndef SET_CCFG_MODE_CONF_DCDC_RECHARGE #define SET_CCFG_MODE_CONF_DCDC_RECHARGE // #define SET_CCFG_MODE_CONF_DCDC_RECHARGE powerdown #endif #ifndef SET_CCFG_MODE_CONF_DCDC_ACTIVE #define SET_CCFG_MODE_CONF_DCDC_ACTIVE // #define SET_CCFG_MODE_CONF_DCDC_ACTIVE #endif

0x0 // Use the DC/DC during recharge in powerdown 0x1 // Do not use the DC/DC during recharge in 0x0 // Use the DC/DC during active mode 0x1 // Do not use the DC/DC during active mode

11.3 Global LDO Mode

CDEC

VDDS

POR / BOD / Misc

1.8 to 3.6 V VDDS

CBULK

CDEC

1.68 to 1.95 V VDDR CBULK

CDEC CDEC
No Correct

Global LDO

IOs VDDS2
IOs VDDS3
IOs

VDDS_DCDC

DCDC_SW

DC/DC Converter

CDEC CDEC

VDDR VDDR_RF

CDEC/BULK ~1.28 V

DCOUPL

Oscillators RF LDOs

Digital LDO Micro LDO

VDD

AON_VD MCU_VD

Figure 11-2. Global LDO Mode
To save cost and PCB area the DC/DC inductor can be removed and VDDR can be supplied from the Global LDO at the cost of higher power consumption. In this mode a bulk capacitor on VDDR is still required and should be placed close to the VDDR pin. The VDDS_DCDC-pin must be connected to VDDS and the DCDC_SW should be left floating to avoid short circuiting VDDS if the DC/DC converter is mistakenly enabled from software. The VDDS bulk capacitor does not need to be close to the VDDS_DCDC pin and should rather be placed close to the VDDS pin.

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Power Supply Configuration

The following software setup is required in the CCFG to disable the DC/DC converter and supply VDDR from Global LDO:

#ifndef SET_CCFG_MODE_CONF_DCDC_RECHARGE // #define SET_CCFG_MODE_CONF_DCDC_RECHARGE #define SET_CCFG_MODE_CONF_DCDC_RECHARGE powerdown #endif #ifndef SET_CCFG_MODE_CONF_DCDC_ACTIVE // #define SET_CCFG_MODE_CONF_DCDC_ACTIVE #define SET_CCFG_MODE_CONF_DCDC_ACTIVE #endif

0x0 // Use the DC/DC during recharge in powerdown 0x1 // Do not use the DC/DC during recharge in 0x0 // Use the DC/DC during active mode 0x1 // Do not use the DC/DC during active mode

11.4 External Regulator Mode

CDEC

VDDS

POR / BOD / Misc

1.68 to 1.95 V VDDS CBULK

CDEC CDEC

VDDS2 VDDS3
VDDS_DCD C
DCDC_SW

Global LDO IOs IOs IOs
DC/DC Converter

Digital LDO Micro LDO

VDD

AON_VD MCU_VD

CDEC CDEC

VDDR VDDR_RF

CDEC/BULK ~1.28 V

DCOUPL

Oscillators RF LDOs

Figure 11-3. External Regulator Mode
In external regulator mode, neither the Global LDO nor the DC/DC is active and both VDDS and VDDR must be powered from the same rail. The regulators are disabled by connecting VDDS_DCDC to ground. Note that the maximum voltage level on the external regulator is limited by VDDR and should not exceed the absolute maximum rating defined in the device-specific data sheet. To achieve maximum output power for the sub-1 GHz PA, the supply voltage should be set to 1.95 V.
Note
External Regulator Mode is only supported on CC26x0 devices.

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Board Bring-Up

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12 Board Bring-Up
Before starting to develop software or doing range testing, It is recommended to do conducted measurements to verify that the board has the expected performance. Typically, the sensitivity, output power, harmonics, and current consumption should be measured to verify the hardware design.
The required measurements depend on the type of board and application. If it is a design with 10 m range requirement the checkout does not need to be as detailed as for a design with a range extender. For the latter, and other designs that require high performance, having access to a spectrum analyzer and a signal generator with the option to send RF packets is highly recommended.
Different measurement methods are discussed in the following sections. It is up to the reader to select the methods applicable for their board.
12.1 Power On
When powering on the board for the first time, check that the voltages on the following pins are as expected.
CC13xx and CC26xx
· VDDR = 1.68 V for CCFG_FORCE_VDDR_HH = 0 · VDDR = 1.95 V for CCFG_FORCE_VDDR_HH = 1 · DCOUPL = 1.27 V
Do NOT measure directly on the X24M_P and X24M_N nor X48M_P and X48M_N pins since this could brick the device.
12.2 RF Test: SmartRF Studio
In order to use SmartRF Studio for testing, the board needs a connector that enables a debugger to be connected directly to the RF chip:
· For the CC13xx and CC26xx, an XDS100v3, XDS110 or XDS200 should be used.
The required pins in cJTAG-mode are VDDS, GND, RESET, TCK and TMS.
1. Connect a debugger to the board. Open SmartRF Studio and verify that the device is visible in the list of connected devices.
2. Place two good known boards with 2 m distance. In this context "good known boards" are EM's or LaunchPads from TI. Use a predefined PHY setting in SmartRF Studio that is a closest match to the PHY that will be used in the final product
3. Set one board to PacketRX and the other to PacketTX and transmit 100 packets. Confirm that the packets are received and note the RSSI for the received packets.
4. Replace the board used in TX with the device under test (DUT). Repeat the test described in 3. 5. Replace the board used in RX with the DUT. Replace the board used in TX with a good known board.
Repeat the test described in 3. 6. If possible, the measurements should be done with a good known antenna first and then repeated with the
antenna that is going to be used in the final design later. A poorly tuned antenna could cause a significant loss in sensitivity/output power. 7. If the results are satisfactory, change the settings from the predefined setting to the RF settings planned to be used in the final product. Repeat the tests described in 3 to 5 with the wanted RF settings.
If the RSSI deviates from the reference, the schematic and layout should be reviewed. Note that if the network between the RF ports and the antenna on the customer board is different from the TI evaluation board, the losses due to SAW filters and switches must be to be taken into consideration.
12.3 RF Test: Conducted Measurements
For high performance designs it is highly recommended to perform conducted measurements to verify the performance before setting up an RF link.

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Board Bring-Up

12.3.1 Sensitivity
1. Disconnect the antenna and perform conducted measurements at the SMA connector or solder a semi rigid coax cable at the 50  point.
2. Configure the board under test and use the PacketRX option in SmartRF Studio similar to the test described in Section 12.2. In PacketRX mode, you can set an expected packet count.
3. Preferred: Use a signal generator that is capable of transmitting data packets. Remember to set up the sync word and CRC correctly.
4. If a signal generator is not available, use an EM/LaunchPad as a transmitter. Use coax cables and attenuation between the EM/LauncPad SMA connector and the 50  point on the custom board.

Note It is difficult to get an accurate number using this method since the exact values of output power and attenuation are normally not known. Some energy will also travel over the air from the EM to the DUT. In addition, background noise could impact the results. To get more accurate results, the receiver should be placed in a shielded box. 5. SmartRF Studio will calculate the packet error rate (PER) and bit error rate (BER).
If the wanted RF settings are different from the predefined setting, PER vs level should be run in addition. The input power level should be increased in 1- 2 dB steps from the sensitivity limit to around 0 dBm. For each power level, transmit at least 100 packets and record the PER. If the AGC settings are not optimal it is common that the PER for some of the steps will be above 0 (residual PER) and if that is the case the AGC settings have to be reviewed.
If the conducted sensitivity is poor:
· Are the settings the same as the recommended values from SmartRF Studio? If the sensitivity is good when using SmartRF Studio and not with the settings used for the project the settings have to be reviewed.
· What is the frequency difference between the DUT and the signal source? Frequency offset can be measured by transmitting an un-modulated continuous wave
· Is the schematic, including all component values, in accordance with the reference design? · Is the layout in accordance with the reference design?
12.3.2 Output Power
1. Disconnect the antenna and perform conducted measurements at the SMA connector or solder a semi-rigid coax cable at the 50  point.
2. Preferred: Use a spectrum analyzer (SA). Use 1 MHz RBW for measuring output power. 3. If an SA is not available use an EM or Launchpad with a SMA connection point. Use coax cables and
attenuation between the EM/LaunchPad SMA connector and the 50  point on the custom board. Use SmartRF Studio and set the EM/Launchpad in continuous RX and read the RSSI. Note that the RSSI has a given tolerance so the measurement will not be as accurate as the preferred method.
12.4 Software Bring-Up
For CC13xx:
Basic examples for RF and other drivers can be found under TI Drivers under software -> Examples -> Development Tools -> <Development board in question> at http://dev.ti.com/tirex/#/. Before starting to write own software it is recommended to run the RF examples that are closest to the wanted application unmodified and verify that they work. Then, if required, change the RF settings to the wanted data rate, and so forth.
For CC26xx and Bluetooth Low Energy:
For more information, see Initial Board Bring Up on recommended software images to run initially.
Basic examples for RF and other drivers can be found under TI Drivers under software -> Examples -> Development Tools -> <Development board in question> at http://dev.ti.com/tirex/#/.
12.5 Hardware Troubleshooting
This section covers some of the common causes for poor performance.

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Board Bring-Up

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12.5.1 No Link: RF Settings
To get a link between two RF chips the two RF chips have to operate on the same frequency and with the same RF settings. This means that the two have to use the same data rate, deviation and modulation format. A common mistake is that the sync word has been set differently on the two devices, they have to be equal.
12.5.2 No Link: Frequency Offset
For narrow band systems a too large frequency offset between the TX and RX devices could result in no link or a very poor link.
The minimum required RX bandwidth to ensure reception is given by:

RX BW = Signal Bandwidth + 4*ppm Crystal * RF Frequency of Operation

(7)

For FSK the signal bandwidth can be approximated as data rate + 2*frequency deviation (Carson's rule).
For CC13x0: For low data rates, the bit repetition patch CC13x0 Low Data Rate Operation should be used. If this patch is not used, the frequency offset tolerance could be under 10 ppm, which could cause loss of link with a normal crystal tolerance.
12.5.3 Poor Link: Antenna
An antenna needs a matching network in order to tune and reduce the mismatch losses of the antenna. If the antenna is not tuned, energy will be lost both in TX and RX and the link budget will be lower. For more details, see Section 5.
12.5.4 Bluetooth Low Energy: Device Does Advertising But Can Not Connect
If using the 32 kHz crystal oscillator as RTC source:
· Incorrect load capacitors for the 32.768 kHz crystal ­ causes frequency offset · 32 kHz crystal does not start up (incorrect load capacitors, crystal missing, soldering issues) ­ the device
defaults to run the RTC from the 48 MHz RC oscillator at 31.25 kHz. For more information, see the PRCM chapter in the CC13x0, CC26x0 SimpleLinkTM Wireless MCU Technical Reference Manual and the C13x2, CC26x2 SimpleLinkTM Wireless MCU Technical Reference Manual.
If using the 32 kHz RC oscillator as RTC source:
· Calibration is not configured correctly. For more information, see the Bluetooth Low Energy Stack User's Guide that is provided with the SDK.
Incorrect RTC frequency will lead to the device missing the connection events and thus breaking the link with the central device.
To debug this problem, the 32 kHz clock can be output on an I/O pin and measured with a frequency counter. For more information on how to do this, see the I/O chapter in the CC13x0, CC26x0 SimpleLinkTM Wireless MCU Technical Reference Manual and the C13x2, CC26x2 SimpleLinkTM Wireless MCU Technical Reference Manual. By outputting the clock on a pin, you will always measure the _selected_ RTC clock source, as well as be able to measure without affecting the clock source (which probing the crystal for example will do).
If using a 32.768 kHz crystal make sure the crystal part is within the requirements outlined in the device-specific CC13xx/CC26xx data sheets. Also make sure that the load capacitors are dimensioned properly as shown in Section 6.3.
Verify that the BLE-Stack has been configured with the correct Sleep Clock Accuracy. The default setting is 40 ppm and can be adjusted with the HCI_EXT_SetSCACmd API, see hci.h or the TI Vendor Specific API Guide included in the SDK.
12.5.5 Poor Sensitivity: DCDC Layout
It is highly recommended to follow the reference design when it comes to the components connected to the DCDC_SW pin. The shunt capacitor following the series inductor from the DCDC_SW pin has to have a short return path to chip ground from the ground pad (see Section 4.7). A poor DCDC layout could cause more than 5 dB loss in sensitivity. To check if the sensitivity is limited by the DCDC, turn off the DCDC in the CCFG.c file.

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Board Bring-Up

12.5.6 Poor Sensitivity: Background noise
A RF channel will receive all radio traffic in the selected frequency span. In addition to the wanted signal the channel will also receive background noise. Part of the background noise is other RF traffic on the selected band. To receive a RF packet the received signal has to have a given SNR. If the background noise increases, the practical sensitivity will be poorer.
Example: If the conducted sensitivty is -110 dBm, the required SNR is 7 dB and the background noise is -100 dBm, the practical radiated sensitivity will be - 93 dBm.
Before doing a range test the background noise should be measured. One method is to turn off all known TX sources, attach a Launchpad or a known good board to SmartRF Studio, select the "Continuous RX" tab and press play. The average of the resulting graph could be used as an input to find the practical sensitivity.

12.5.7 High Sleep Power Consumption
· Note that the chip is not going into the lowest power modes when a debugger is connected · Software: Use the pinStandby or pinShutdown examples in the relevant SDK · When measuring current draw on a Launchpad, remove all jumpers. · Ensure that every IC on the board is powered down. · If the application is configured to use the 32 kHz crystal (set in CCFG.c), check that this is connected and that
the oscillator is running.
13 References
· TXLine Transmission Line Calculator · Texas Instruments: Antenna Selection Quick Guide · Texas Instruments: Antenna Selection Guide · CC-Antenna-DK2 · Texas Instruments: CC-Antenna-DK2 and Antenna Measurements Summary · Texas Instruments: CC13x0 Low Data Rate Operation · Texas Instruments: Monopole PCB Antenna with Single or Dual Band Option · Texas Instruments: LAUNCHXL-CC1310 Design Files · Texas Instruments: SimpleLink Sub-1 GHz CC1312R Wireless (MCU) LaunchPad Dev Kit 868MHz/915MHz
App · Texas Instruments: 2.4-GHz Inverted F Antenna · Texas Instruments: LAUNCHXL-CC2640R2 Design Files · Texas Instruments: CC26x2R LaunchPad Design Files · Texas Instruments: Miniature Helical PCB Antenna for 868 MHz or 915/920 MHz · Texas Instruments: LAUNCHXL-CC1350 Design Files · Texas Instruments: Monopole PCB Antenna with Single or Dual Band Option · Texas Instruments: 2.4-GHz Inverted F Antenna · Texas Instruments: CC1352R LaunchPad Design Files · Texas Instruments: LAUNCHXL-CC1352P-2 Design Files · Texas Instruments: LAUNCHXL-CC1352P-4 Design Files · Texas Instruments: CC1350STK Design Files · Texas Instruments: CC1125 BoosterPackTM for 868/915 MHz BOOSTXL-CC1125 · Texas Instruments: Matched Integrated Passive Component for 868 / 915 MHz operation with the CC112x,
CC117x & CC12xx high performance radio series · Texas Instruments: Johanson Technology, Inc. Highly temperature-stable Impedance Matched RF Front End
Differential Balun-Band Pass Filter Integrated Ceramic Component · Texas Instruments: CC1310 Integrated Passive Component for 779-928 MHz · Texas Instruments: Matched Filter Balun for CC1352 and CC1352P · Texas Instruments: Anaren 0404 (BD2425N50200A00) balun optimized for Texas Instruments CC2420
Transceiver · Texas Instruments: Anaren 0404 (BD2425N50200A00) balun optimized for Texas Instruments CC2430
Transceiver · Texas Instruments: Johanson Balun for the CC26xx Device Family · Texas Instruments: CC13x0, CC26x0 SimpleLinkTM Wireless MCU Technical Reference Manual

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Revision History
· Texas Instruments: C13x2, CC26x2 SimpleLinkTM Wireless MCU Technical Reference Manual

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14 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (February 2022) to Revision G (September 2022)

Page

· Figure and content updates in Section 2.3.1 through Section 2.3.4 .................................................................. 9

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