Description
The PAMS5803 is a fully integrated, high-efficiency, stereo Class-D audio amplifier with digital inputs. The application circuit requires few passive components to operate with 4.5V to 17V PVDD supply and 3.3V or 1.8V DVDD supply. It can drive 2x24W output power into BTL 4Ω and 1x40W into PBTL 2Ω at 1% THD+N.
The PAMS5803 features a novel PWM modulation architecture that adjusts the PWM common duty cycle during the start-up phase to avoid startup pop clicks. Spread spectrum technology provides lower EMI noise, allowing for inductor-free applications under specified output power conditions. The advanced audio effect tuning capability offers a highly integrated solution, enabling flexible control over individual blocks, including EQ and volume adjustments to maintain audio headroom.
The PAMS5803 is packaged in a TSSOP-28EP (Type TH-1).
Applications
- Portable speakers: Bluetooth, smart speakers with voice assistant
- Home audio: TV, sound-bar, STB (set-top box), HTiB (home theatre in a box)
- PCs and laptops
Features
Flexible Power Supply Configurations
- PVDD: 4.5V to 17V
- DVDD and I/O: 3.3V or 1.8V
Various Output Configurations
- 2x14W, Stereo Mode (4Ω, 12V, THD+N = 1%)
- 2x24W, Stereo Mode (4Ω, 16V, THD+N = 1%)
Excellent Audio Performance
- THD+N ≤ 0.02% at 1W, 1kHz, PVDD = 12V
- 107 dB A-Weighted Signal-to-Noise Ratio (SNR)
- Idle Switching A-Weighted Noise 35µVRMS
- 17mA Low Quiescent Current
- 90% Efficiency into 6Ω Load at 12V
Configurable Digital Audio Interface
- I2C Control with Up to 4 Selectable Addresses
- I2S, Left-Justified, Right-Justified, TDM Audio Format
- 3-Wire Digital Audio Interface without MCLK Required
- 32kHz, 44.1kHz/48kHz Input Sample Rate
- SDOUT for Acoustic Echo Cancellation (AEC) or 1.1/2.1 System Sub-Channel Signal Routing
Advanced Audio Effect Tuning
- Flexible Digital and Analog Gain Adjustment
- High Pass Filter for DC Blocking
- Input Signal Router for Left and Right Channel
- 2x10 BQs to Support Enhanced Audio Frequency Tuning
- Dynamic Range Boost (DRB)
- Full-Band AGL to Limit Output Power
Analog Protections
- FAULT Status Report through GPIO and I2C Registers
- Overcurrent and Direct Current Protection
- Overtemperature Protection
- Undervoltage and Overvoltage Protection
- Clock Error Protection
Package and Compliance
- TSSOP-28EP (Type TH-1) Package
- Lead-Free Finish; RoHS Compliant (Notes 1 & 2)
- Halogen and Antimony Free. "Green" Device (Note 3)
For automotive applications requiring specific change control (e.g., parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact Diodes or your local representative. https://www.diodes.com/quality/product-definitions/
Notes:
1. EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. All applicable RoHS exemptions applied.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated's definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green" products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
Pin Descriptions
| Pin No. | Name | Type | Description |
|---|---|---|---|
| 1 | DGND | PWR | Digital ground. |
| 2 | DVDD | PWR | Digital power supply input: 3.3V or 1.8V. |
| 3 | ADR/GPIO2 | DIO | I2C address selection/ GPIO2: FAULT/WARNING/SDOUT... |
| 4 | VREG_DVDD | AOUT | Digital regulator output. |
| 5 | GPIO3 | DIO | GPIO3: FAULT/WARNING/SDOUT... Default setting is allowed to directly short to GND. |
| 6 | FSYNC | DIN | Word select clock for the digital signal. |
| 7 | BCLK | DIN | Bit clock for the digital signal. |
| 8 | SDIN | DIN | Serial data input. |
| 9 | GPIO1 | DIO | GPIO1: FAULT/WARNING/SDOUT... |
| 10 | SDA | DIO | I2C serial data. |
| 11 | SCL | DIN | I2C clock. |
| 12 | PDN | DIN | Shut down, low active. |
| 13 | VREG_AVDD | AOUT | Analog regulator output. |
| 14 | AGND | PWR | Analog ground. |
| 15 | PVDD | PWR | Power stage supply input. |
| 16 | PVDD | PWR | Power stage supply input. |
| 17 | OUT_R+ | AOUT | Right channel positive output of H-bridge. |
| 18 | BST_R+ | AIN | Bootstrap capacitor for OUT_R+. |
| 19 | PGND | PWR | Power stage ground. |
| 20 | OUT_R- | AOUT | Right channel negative output of H-bridge. |
| 21 | BST_R- | AIN | Bootstrap capacitor for OUT_R-. |
| 22 | BST_L- | AIN | Bootstrap capacitor for OUT_L-. |
| 23 | OUT_L- | AOUT | Left channel negative output of H-bridge. |
| 24 | PGND | PWR | Power stage ground. |
| 25 | BST_L+ | AIN | Bootstrap capacitor for OUT_L+. |
| 26 | OUT_L+ | AOUT | Left channel positive output of H-bridge. |
| 27 | PVDD | PWR | Power stage supply input. |
| 28 | PVDD | PWR | Power stage supply input. |
The device is available in a TSSOP-28EP (Type TH-1) package. The top view diagram shows the pinout.
Functional Block Diagram
The functional block diagram illustrates the PAMS5803's architecture. It includes a Digital Regulator and Analog Regulator that supply power to various blocks. The Digital Audio Interface (I2S/TDM/LJ/RJ) connects to Audio Effect Tuning, which feeds into a DAC and Σ-Δ Class-D Modulator. This modulator drives a Full Bridge Power Stage. The output is monitored by a Closed Loop system. Fault Handling (OC/OT/DC/OVUV/Clock Error) is managed and reported via GPIO and I2C. Control signals like PDN, ADR, SDA, SCL, FSYNC, BCLK, SDIN, and GPIOs are also shown, along with connections for bootstrap capacitors (BST_L+/-, BST_R+/-) and output terminals (OUT_L+/-, OUT_R+/-).
Device Family Comparison
| Device Name | RDSON | PVDD | Output Power |
|---|---|---|---|
| PAMS5803 | 110mΩ | 4.5V to 17V | Stereo 2x24W (4Ω, 16V, THD+N = 1%) |
| PAMS5804 | 135mΩ | 4.5V to 26.4V | Stereo 2x33W (6Ω, 22V, THD+N = 1%) |
| PAMS5825 | 75mΩ | 4.5V to 21V | Stereo 2x33W (6Ω, 21V, THD+N = 1%) |
| PAMS5826 | 95mΩ | 4.5V to 26.4V | Stereo 2x40W (6Ω, 24V, THD+N = 1%) |
| PAMS5827 | 75mΩ | 4.5V to 26.4V | Stereo 2x41W (6Ω, 24V, THD+N = 1%) |
Typical Application Circuits
The document provides example application circuits for both stereo and mono configurations. These circuits detail the necessary passive components (capacitors, inductors, resistors) and their connections to the PAMS5803 pins for audio input, power supply, outputs, and control signals. The stereo circuit shows connections for left and right channels, while the mono circuit shows a configuration suitable for a woofer.
Note 4: Both 0.47µF or 0.22µF are suitable for BST caps.
Note 5: GPIO3 default setting is allowed to directly short to GND.
Ordering Information
The PAMS5803 is available under the part number PAMS5803T28ZE-13. It comes in a TSSOP-28EP (Type TH-1) package, identified by code T28ZE. The standard packing quantity is 3000 units on a 13" Tape and Reel carrier.
For packaging details, visit https://www.diodes.com/design/support/packaging/diodes-packaging/.
Marking Information
The device marking includes the logo, the part number "PAMS5803", and a code "YYWWXXE". YY indicates the year (e.g., 25, 26, 27~), WW indicates the week (01 to 52, representing weeks 52 and 53), XX is an internal code, and E denotes an exposed pad. A top view diagram illustrates the pin 1 indicator and the marking layout.
Package Outline Dimensions
The PAMS5803 is housed in a TSSOP-28EP (Type TH-1) package. Detailed dimensions for the package outline are provided in millimeters, including parameters like A, A1, A2, A3, b, c, D, D2, E, E1, E2, e, L, L1, and θ. A link is provided for the latest version of package outlines: http://www.diodes.com/package-outlines.html.
| Dim | Min | Max | Typ |
|---|---|---|---|
| A | -- | 1.20 | -- |
| A1 | 0.05 | 0.15 | -- |
| A2 | 0.80 | 1.00 | -- |
| A3 | 0.39 | 0.49 | 0.44 |
| b | 0.20 | 0.29 | -- |
| c | 0.13 | 0.18 | -- |
| D | 9.60 | 9.80 | 9.70 |
| D2 | 5.40 | 5.60 | 5.50 |
| E | 6.20 | 6.60 | 6.40 |
| E1 | 4.30 | 4.50 | 4.40 |
| E2 | 2.60 | 2.80 | 2.70 |
| e | 0.65BSC | ||
| L | 0.45 | 0.75 | 0.60 |
| L1 | 1.00BSC | ||
| θ | 0° | 8° | -- |
All Dimensions in mm.
Suggested Pad Layout
A suggested pad layout for the TSSOP-28EP (Type TH-1) package is provided, including dimensions for X, X1, X2, X3, Y, Y1, Y2, and Y3. A link is available for the latest version of package outlines: http://www.diodes.com/package-outlines.html.
| Dimensions | Value (in mm) |
|---|---|
| C | 0.650 |
| X | 0.345 |
| X1 | 5.600 |
| X2 | 4.398 |
| X3 | 8.795 |
| Y | 1.450 |
| Y1 | 2.800 |
| Y2 | 2.000 |
| Y3 | 6.900 |
Mechanical Data
- Moisture Sensitivity: Level 3 per J-STD-020
- Terminals: Finish - Sn, Solderable per J-STD-002, Test B1
- Weight: 0.15 grams (Approximate)
Important Notice
DIODES INCORPORATED (Diodes) and its subsidiaries make no warranty of any kind, express or implied, with regards to any information contained in this document, including, but not limited to, the implied warranties of merchantability, fitness for a particular purpose or non-infringement of third party intellectual property rights. The information is provided for informational purposes only and is intended for skilled and technically trained engineering customers. Customers and users are responsible for selecting appropriate products, evaluating suitability, and ensuring compliance with applicable legal and regulatory requirements and safety standards. Diodes assumes no liability for application-related information, support, or feedback. Products may be covered by patents and trademarks. Diodes' products are subject to Standard Terms and Conditions of Sale. Diodes' products and technology may not be used in violation of applicable laws and regulations. While efforts have been made to ensure accuracy, the document may contain inaccuracies or errors. Diodes reserves the right to make changes without further notice. The English version of this document is the final and determinative format. Unauthorized copying, modification, distribution, or transmission is prohibited.
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