GitHub - amnemonic/Quansheng UV-K5 Firmware: Quansheng UV-K5 Firmware
First HAM-Radio steps: Quansheng UV-K5(8)/UV-K6 – AlfaExploit
DP32G030
DP32G030
32
Version: 1.23
Action Dynamic Tech.(HK) Trading Co.
6B1111 0755-83134419 0755-82519160 www.dnsj88.com EMAIL:dnsj@dn-ic.com 518031
1 432
..................................................................................................................................................... 1 ............................................................................................................................................... 13 ............................................................................................................................................... 18 ........................................................................................................................................... 19 1. .............................................................................................................................................. 20
1.1 .................................................................................................................................... 20 1.2 ............................................................................................................................21 2. ...................................................................................................................................... 26 3. ..............................................................................................................................27 4. ...................................................................................................................................... 28 4.1 ............................................................................................................................28 4.2 ............................................................................................................................30 4.3 ....................................................................................................................36 5. ...................................................................................................................................... 39 5.1 ....................................................................................................................39 5.2 ....................................................................................................41 5.3 ........................................................................................................................41 5.4 ARM Cortex-M0 .........................................................................................................43
5.4.1 .........................................................................................................................43 5.4.2 .........................................................................................................................43 5.4.3 SYSTICK........................................................................................45 SYST_CTRL 0x00.................................................................................... 47 SYST_LOAD 0x04................................................................................... 47 SYST_VAL 0x08.................................................................................. 48 5.5 PMU............................................................................................................49 5.5.1 .........................................................................................................................49 5.5.2 .........................................................................................................................49 5.5.3 .........................................................................................................49 5.5.4 .................................................................................................................51 ................................................................................................................................... 51 ................................................................................................................................... 52 ....................................................................................................................... 55 ....................................................................................................................... 62 ....................................................................................................................... 63 LPOW_MD 0x00............................................................................................ 63 LPMD_WKEN 0x04........................................................................................ 64 LPMD_WKST 0x08.........................................................................................64 CHIP_RST_ST 0x0C........................................................................................ 65 SRC_CFG 0x10............................................................................................... 65 TRIM_POW0 0x20......................................................................................... 66 TRIM_POW1 0x24.......................................................................................66
DP32G030
TRIM_POW2 0x28......................................................................................... 67 TRIM_POW3 0x2C.........................................................................................67 TRIM_RCHF 0x30...........................................................................................67 TRIM_RCLF 0x34........................................................................................... 68 TRIM_OPA 0x38.............................................................................................68 TRIM_PLL 0x3C..............................................................................................69 TRIM_LOCK 0x80...........................................................................................69 DATA_BAK0 0x100.....................................................................................69 DATA_BAK1 0x104.....................................................................................69 DATA_BAK2 0x108.....................................................................................70 DATA_BAK3 0x10C.................................................................................... 70 5.6 SYSCON.......................................................................................................71 5.6.1 .........................................................................................................................71 5.6.2 .........................................................................................................................71 5.6.3 .........................................................................................................71 5.6.4 .................................................................................................................73 RCHF ......................................................................................................................... 74 PLL ............................................................................................................................ 75 XTAL .......................................................................................................................... 76 RCLF .......................................................................................................................... 77 sys_clk............................................................................................... 78 RTC ............................................................................................................................78 IWDT..............................................................................................79 WWDT........................................................................................... 79 SARADC .............................................................................................................79 .......................................................................................................79 128 ....................................................................................................79 ....................................................................................................................... 80 ....................................................................................................................... 81 CLK_SEL 0x00................................................................................................ 81 DIV_CLK_GATE 0x04......................................................................................82 DEV_CLK_GATE 0x08.....................................................................................82 RC_FREQ_DELTA 0x78................................................................................... 84 VREF_VOLT_DELTA 0x7C............................................................................... 84 CHIP_ID0 0x80...............................................................................................85 CHIP_ID1 0x84...............................................................................................85 CHIP_ID2 0x88...............................................................................................85 CHIP_ID3 0x8C...............................................................................................85 PLL_CTRL 0x180............................................................................................ 85 PLL_ST 0x184.................................................................................................86 5.7 IO PORTCON................................................................................................ 87 5.7.1 .........................................................................................................................87 5.7.2 .........................................................................................................................87 5.7.3 .........................................................................................................88
2 432
DP32G030
5.7.4 .................................................................................................................89 ...................................................................................................94 ....................................................................................................................... 95 PORTA_SEL0 0x00......................................................................................... 95 PORTA_SEL1 0x04......................................................................................... 97 PORTB_SEL0 0x08......................................................................................... 99 PORTB_SEL1 0x0C....................................................................................... 100 PORTC_SEL0 0x10....................................................................................... 102 PORTA_IE 0x100.......................................................................................... 104 PORTB_IE 0x104..........................................................................................104 PORTC_IE 0x108.......................................................................................... 104 PORTA_PU 0x200........................................................................................ 105 PORTB_PU 0x204........................................................................................ 105 PORTC_PU 0x208........................................................................................ 105 PORTA_PD 0x300........................................................................................ 105 PORTB_PD 0x304........................................................................................ 106 PORTC_PD 0x308........................................................................................ 106 PORTA_OD 0x400........................................................................................106 PORTB_OD 0x404........................................................................................107 PORTC_OD 0x408........................................................................................107 PORTA_WKE 0x500..................................................................................... 107 PORTB_WKE 0x504..................................................................................... 107 PORTC_WKE 0x508..................................................................................... 108 PORT_CFG 0x600........................................................................................ 108 PORTA_WK_SEL 0x700................................................................................109 PORTB_WK_SEL 0x704................................................................................109 PORTC_WK_SEL 0x708................................................................................109 5.8 IO(GPIO)...................................................................................................................110 5.8.1 .......................................................................................................................110 5.8.2 .......................................................................................................................110 5.8.3 .......................................................................................................111 5.8.4 ............................................................................................................... 111 GPIODATA 0x00...................................................................... 119 GPIODIR 0x04.............................................................................................. 119 INTLVLTRG 0x08...........................................................................................119 INTBE 0x0C.................................................................................................. 119 INTRISEEN 0x10...........................................................................................120 INTEN 0x14..................................................................................................120 INTRAWSTAUS 0x18.................................................................................... 120 INTSTAUS 0x1C............................................................................................ 121 INTCLR 0x20................................................................................................ 121 5.9 TIMERBASE....................................................................................... 122 5.9.1 ........................................................................................................................122 5.9.2 ........................................................................................................................122
3 432
DP32G030
5.9.3 ........................................................................................................123 5.9.4 ................................................................................................................124 ..................................................................................................................... 129 ..................................................................................................................... 130 TIMERBASE_EN 0x00.................................................................................. 130 TIMERBASE_DIV 0x04................................................................................. 130 TIMERBASE_IE 0x10.................................................................................... 130 TIMERBASE_IF 0x14.................................................................................... 131 HIGH_LOAD 0x20........................................................................................ 131 HIGH_CNT 0x24...........................................................................................131 LOW_LOAD 0x30......................................................................................... 131 LOW_CNT 0x34........................................................................................... 132 5.10 TIMERPLUS......................................................................................... 133 5.10.1 .....................................................................................................................133 5.10.2 .....................................................................................................................134 5.10.3 .....................................................................................................135 5.10.4 .............................................................................................................137 .............................................................................................137 ......................................................................................................................... 138 ......................................................................................................................... 140 ................................................................................................................. 142 HALL ........................................................................................................................144 ................................................................................................................................. 146 ......................................................................................................................... 147 ..................................................................................................................... 158 ..................................................................................................................... 159 TIMERPLUS_EN 0x00...................................................................................159 TIMERPLUS_DIV 0x04................................................................................. 159 TIMERPLUS_CTR 0x08.................................................................................159 TIMERPLUS_IE 0x10.................................................................................... 161 TIMERPLUS_IF 0x14.................................................................................... 162 TIMERPLUS_HIGH_LOAD 0x20....................................................................163 TIMERPLUS_HIGH _CNT 0x24..................................................................... 163 TIMERPLUS_HIGH _CVAL 0x28................................................................... 164 TIMERPLUS_LOW_LOAD 0x30.................................................................... 164 TIMERPLUS_ LOW _CNT 0x34.....................................................................164 TIMERPLUS_ LOW _CVAL 0x38................................................................... 164 HALL_VAL 0x40............................................................................................165 5.11 IWDT...........................................................................................165 5.11.1 .....................................................................................................................165 5.11.2 .....................................................................................................................166 5.11.3 .....................................................................................................167 5.11.4 .............................................................................................................167 ..................................................................................................................... 171
4 432
DP32G030
..................................................................................................................... 171 IWDT_LOAD 0x00........................................................................................171 IWDT_CTRL 0x08.........................................................................................172 IWDT_IF 0x0C.............................................................................................. 172 IWDT_FEED 0x10.........................................................................................172 5.12 WWDT.......................................................................................173 5.12.1 .....................................................................................................................173 5.12.2 ......................................................................................................................173 5.12.3 ......................................................................................................174 5.12.4 ..............................................................................................................175 WWDT ........................................................................................ 175 WWDT ................................................................................................ 176 ..................................................................................................................... 177 ..................................................................................................................... 177 WWDT_LOAD 0x00..................................................................................... 177 WWDT_VALUE 0x04....................................................................................177 WWDT_CTRL 0x08...................................................................................... 178 WWDT_IF 0x0C........................................................................................... 178 WWDT_FEED 0x10...................................................................................... 179 5.13 PWMBASE.................................................................. 180 5.13.1 .....................................................................................................................180 5.13.2 .....................................................................................................................180 5.13.3 .....................................................................................................181 5.13.4 .............................................................................................................183 ..................................................................................................................... 189 ..................................................................................................................... 189 PWMBASE_EN 0x00.................................................................................... 189 PWMBASE_DIV 0x04...................................................................................190 PWMBASE_CON 0x08................................................................................. 190 PWMBASE_PERIOD 0x0C............................................................................ 191 PWMBASE_INTEN 0x10.............................................................................. 191 PWMBASE_IF 0x14......................................................................................192 PWMBASE_CNT 0x18..................................................................................192 PWMBASE_CH0_COMP 0x20..................................................................... 192 PWMBASE_CH1_COMP 0x30..................................................................... 192 PWMBASE_CH2_COMP 0x40..................................................................... 193 5.14 PWMPLUS.................................................................. 194 5.14.1 .....................................................................................................................194 5.14.2 .....................................................................................................................194 5.14.3 .....................................................................................................195 5.14.4 .............................................................................................................198 ..................................................................................................................... 221 PWMPLUS_CFG 0x00.................................................................................. 221 PWMPLUS_GEN 0x04..................................................................................222
5 432
DP32G030
PWMPLUS_CLKSRC 0x08.............................................................................224 PWMPLUS_BRAKE_CFG 0x0c......................................................................225 PWMPLUS_MASK_LEV 0x10....................................................................... 227 PWMPLUS_PERIOD 0x1C............................................................................ 228 PWMPLUS_CH0_COMP 0x20......................................................................228 PWMPLUS_CH1_COMP 0x24......................................................................229 PWMPLUS_CH2_COMP 0x28......................................................................229 PWMPLUS_CH0_DT 0x30............................................................................229 PWMPLUS_CH1_DT 0x34............................................................................230 PWMPLUS_CH2_DT 0x38............................................................................230 PWMPLUS_TRIG_COMP 0x40.....................................................................230 PWMPLUS_TRIG_CFG 0x44........................................................................ 231 PWMPLUS_IE 0x60......................................................................................231 PWMPLUS_IF 0x64......................................................................................232 PWMPLUS_SWLOAD 0x84.......................................................................... 234 PWMPLUS_MASK_EN 0x88........................................................................ 235 PWMPLUS_CNT_ST 0xE0............................................................................ 235 PWMPLUS_BRAKE_ST 0xE4........................................................................ 236 5.15 RTC..........................................................................................................237 5.15.1 ......................................................................................................................237 5.15.2 ......................................................................................................................237 5.15.3 ..........................................................................................................238 5.15.4 ..............................................................................................................239 ............................................................................................................. 239 ......................................................................................................................... 239 ......................................................................................................................... 240 ......................................................................................................................... 241 ......................................................................................................................... 241 ............................................................................................................. 242 ......................................................................................................................... 242 ..................................................................................................................... 244 ..................................................................................................................... 244 RTC_CFG 0x00............................................................................................. 244 RTC_IE 0x04.................................................................................................245 RTC_IF 0x08.................................................................................................246 RTC_PRE 0x10............................................................................................. 247 RTC_TR 0x14................................................................................................247 RTC_DR 0x18............................................................................................... 248 RTC_AR 0x1C............................................................................................... 249 RTC_TSTR 0x20............................................................................................250 RTC_TSDR 0x24........................................................................................... 251 RTC_CNT 0x28............................................................................................. 251 RTC_VALID 0x2C.......................................................................................... 251 5.16 UART UART.................................................................................................. 253
6 432
DP32G030
5.16.1 .....................................................................................................................253 5.16.2 .....................................................................................................................254 5.16.3 .....................................................................................................255 ................................................................................................................................. 256 .............................................................................................256 .............................................................................................257 ..................................................................................................................... 257 ............................................................................................................. 258 ......................................................................................................................... 259 ............................................................................................................. 259 ................................................................................................................. 261 ................................................................................................................................. 262 ..................................................................................................................... 263 ..................................................................................................................... 264 UART_CTRL 0x00......................................................................................... 264 UART_BAUD 0x04....................................................................................... 265 UART_TDR 0x08.......................................................................................... 266 UART_RDR 0x0C.......................................................................................... 266 UART_IE 0x10.............................................................................................. 266 UART_IF 0x14.............................................................................................. 267 UART_FIFO 0x18..........................................................................................269 UART_FC 0x1C............................................................................................. 270 UART_RXTO 0x20........................................................................................ 271 5.17 SPI SPI..................................................................................................272 5.17.1 .....................................................................................................................272 5.17.2 .....................................................................................................................272 5.17.3 .....................................................................................................273 5.17.4 .............................................................................................................274 SPI ................................................................................................................... 274 I/O ...........................................................................................................................275 ................................................................................................................. 277 ......................................................................................................................... 278 DMA ........................................................................................................................284 ......................................................................................................................... 285 ..................................................................................................................... 286 ..................................................................................................................... 286 SPICR 0x00...................................................................................................286 SPIWDR 0x04...............................................................................................288 SPIRDR 0x08................................................................................................ 289 SPIIE 0x10.................................................................................................... 289 SPIIF 0x14.................................................................................................... 289 SPIFIFOST 0x18............................................................................................290 5.18 IIC IIC........................................................................................................... 292 5.18.1 .....................................................................................................................292
7 432
DP32G030
5.18.2 .....................................................................................................................293 5.18.3 .....................................................................................................294 5.18.4 .............................................................................................................294 ......................................................................................................................... 294 SCL SDA................................................................................................................... 298 ......................................................................................................................... 299 ......................................................................................................................... 300 ..................................................................................................................... 312 ..................................................................................................................... 312 IIC_CCFG 0x00..........................................................................................312 IIC_CST 0x04............................................................................................. 313 IIC_CTRANS 0x08.................................................................................... 314 IIC_RXDATA 0x0C....................................................................................315 IIC_TXDATA 0x10.....................................................................................315 IIC_IE 0x14.................................................................................................316 IIC_IF 0x18.................................................................................................316 IIC_MCTRL 0x20...................................................................................... 318 IIC_MSPC 0x24..........................................................................................319 IIC_SCTRL 0x30........................................................................................320 IIC_SADDR 0x34.......................................................................................321 5.19 ADC.....................................................................................................323 5.19.1 .....................................................................................................................323 5.19.2 .....................................................................................................................324 5.19.3 .....................................................................................................326 5.19.4 .............................................................................................................327 ......................................................................................................................... 327 .........................................................................................327 .....................................................................................................328 FIFO............................................................................................................ 333 .................................................................... 334 CPU .............................................................................................334 ................................................................................................................................. 335 ......................................................................................................................... 336 ..................................................................................................................... 337 ..................................................................................................................... 339 ADC_CFG 0x00......................................................................................... 339 ADC_START 0x04......................................................................................... 341 ADC_IE 0x08................................................................................................ 342 ADC_IF 0x0C................................................................................................ 343 ADC_CHx_STAT ................................................................................................... 343 ADC_CHx_DATA .................................................................................................. 343 ADC_FIFO_STAT 0xA0..................................................................................344 ADC_FIFO_DATA 0xA4.................................................................................345 ADC_ EXTTRIG_SEL 0xB0.............................................................................345
8 432
DP32G030
ADC_CALIB_OFFSET 0xF0............................................................................345 ADC_CALIB_KD 0xF4................................................................................... 346 5.20 COMP......................................................................................................... 347 5.20.1 ......................................................................................................................347 5.20.2 ......................................................................................................................347 5.20.3 ......................................................................................................348 5.20.4 ..............................................................................................................349 ................................................................................ 349 ................................................................................................................................. 349 ................................................................................................................................. 350 ................................................................................................................................. 351 ..................................................................................................................... 351 ..................................................................................................................... 352 CMP_CFG 0x120..........................................................................................352 CMP_ST 0x124............................................................................................ 353 5.21 OPAMP............................................................................................... 354 5.21.1 ......................................................................................................................354 5.21.2 ......................................................................................................................354 5.21.3 ..........................................................................................................355 ..................................................................................................................... 355 ..................................................................................................................... 356 OPA_CFG..........................................................................................................................356 5.22 FLASH FLASHCTRL....................................................................................... 357 5.22.1 ......................................................................................................................357 5.22.2 ......................................................................................................................357 5.22.3 ......................................................................................................358 5.22.4 ..............................................................................................................359 ..................................................................................................................... 359 ..................................................................................................................... 359 NVR MAIN ...............................................................................................360 ......................................................................................................................... 360 FLASH ........................................................................................................... 360 ......................................................................................................................... 361 START ....................................................................................................361 ............................................................................................................................. 361 MASK .................................................................................................................... 361 .............................................................................................362 FLASH ................................................................................................... 362 ................................................................................................................. 362 ................................................................................ 362 FLASH ............................................................................................... 363 FLASH ............................................................................................... 363 FLASH ........................................................................................... 365 FLASH ...................................................................................367
9 432
DP32G030
..................................................................................................................... 369 ..................................................................................................................... 369 FLASH_CFG 0x00..................................................................................... 369 FLASH_ADDR 0x04..................................................................................370 FLASH_WDATA 0x08...............................................................................371 FLASH_START 0x10.................................................................................371 FLASH_ST 0x14........................................................................................ 371 FLASH_LOCK 0x18.................................................................................. 372 FLASH_UNLOCK 0x1C........................................................................... 372 FLASH_MASK 0x20................................................................................. 372 FLASH_ERASETIME 0x24...................................................................... 373 FLASH_PROGTIME 0x28........................................................................ 373 5.23 CRC................................................................................................. 375 5.23.1 ......................................................................................................................375 5.23.2 ......................................................................................................................375 5.23.3 ..........................................................................................................376 5.23.4 ..............................................................................................................377 CRC ............................................................................................................. 377 CRC ..................................................................................................................... 378 ......................................................................................................................... 378 ..................................................................................................................... 379 ..................................................................................................................... 379 CRC_CR 0x00............................................................................................... 379 CRC_IV 0x04................................................................................................ 380 CRC_DATAIN 0x08....................................................................................... 381 CRC_DATAOUT 0x0C....................................................................................381 5.24 DMA DMA................................................................................................... 382 5.24.1 ......................................................................................................................382 5.24.2 ......................................................................................................................382 5.24.3 ..................................................................................................383 5.24.4 ..............................................................................................................384 DMA ................................................................................................................384 DMA ............................................................................................................385 DMA ........................................................................................................386 ................................................................................ 388 ......................................................................................................................... 390 DMA ........................................................................................................390 DMA ................................................................................................................393 ..................................................................................................................... 395 ..................................................................................................................... 396 DMA_CTR 0x00........................................................................................... 396 DMA_INTEN 0x04....................................................................................... 396 DMA_INTST 0x08........................................................................................ 397 DMA_CHnCTR 0x100 + 0x20*(n)................................................................ 398
10 432
DP32G030
DMA_CHnMOD 0x100 + 0x20*(n)+ 0x04................................................... 399 DMA_CHnMSADDR 0x100 + 0x20*(n)+ 0x08............................................. 401 DMA_CHnMDADDR 0x100 + 0x20*(n) + 0x0C........................................... 401 DMA_CHn_ST 0x100 + 0x20*(n) + 0x10..................................................... 401 5.25 AES AES....................................................................................................402 5.25.1 ......................................................................................................................402 5.25.2 ......................................................................................................................403 5.25.3 ......................................................................................................403 5.25.4 ..............................................................................................................404 ECB...................................................................................................... 404 CBC...................................................................................................... 406 CTR...................................................................................................... 407 ......................................................................................................................... 409 ......................................................................................................................... 411 ..................................................................................................................... 414 ..................................................................................................................... 414 AES_CR 0x00............................................................................................... 414 AES_SR 0x04................................................................................................416 AES_DINR 0x08............................................................................................416 AES_DOUTR 0x0C........................................................................................417 AES_KEYR0 0x10..........................................................................................417 AES_KEYR1 0x14..........................................................................................418 AES_KEYR2 0x18..........................................................................................418 AES_KEYR3 0x1C......................................................................................... 418 AES_IVR0 0x20............................................................................................ 419 AES_IVR1 0x24............................................................................................ 419 AES_IVR2 0x28............................................................................................ 419 AES_IVR3 0x2C............................................................................................ 420 6. .................................................................................................................................... 421 6.1 ..........................................................................................................................421 6.2 ..............................................................................................................421 6.2.1 ................................................................................................................421 6.2.2 ................................................................................................................421 6.2.3 ................................................................................................................422 6.3 ..........................................................................................................................422 6.3.1 ........................................................................................................422 6.3.2 ........................................................................................422 6.3.3 ....................................................................................422 6.3.4 ........................................................................................................423 6.3.5 ........................................................................................................424 6.3.6 ............................................................................................424 6.3.7 ............................................................................................425 6.3.8 ............................................................................................425 6.3.9 ............................................................................................425
11 432
DP32G030
6.3.10 ..........................................................................................426 6.3.11PLL ...............................................................................................................426 6.3.12FLASH ............................................................................................. 426 6.3.13EMC ............................................................................................................. 427 6.3.14IO ..........................................................................................................427 6.3.15EXTRST ...............................................................................................428 6.3.16ADC ............................................................................................................. 429 6.3.17ADC ............................................................................................................. 429 6.3.18 ..................................................................................................430 6.3.19 ..................................................................................................430 6.3.20 ..........................................................................................................431
12 432
DP32G030
5-1 Cortex-M0 ......................................................................................... 43 5-2 Systick ........................................................................................................45 5-3 systick ........................................................................................................ 46 5-4 ...................................................................................................... 50 5-5 .......................................................................... 53 5-6 .......................................................................................... 54 5-7 SLEEP .....................................................................................59 5-8 DEEPSLEEP ............................................................................ 61 5-9 STOP ...................................................................................... 62 5-10 ........................................................................................................ 72 5-11 ................................................................................ 73 5-12 ........................................................................................ 74 5-13 ................................................................................ 77 5-14 PORTCON ............................................................................................ 88 5-15 IO .............................................................................................89 5-16 IO .............................................................................................90 5-17 IO ...........................................................................................91 5-18 IO ana_signal_b ..................................................... 91 5-19 IO .............................................................................................92 5-20 IO .............................................................................................93 5-21 GPIO .................................................................................................. 110 5-22 GPIO ...................................................................................................111 5-23 GPIO .................................................................................................. 112 5-24 GPIO .......................................................................................... 113 5-25 GPIO .................................................................................. 114 5-26 GPIO .................................................................................. 115 5-27 GPIO .................................................................................. 116 5-28 GPIO .................................................................................. 117 5-29 GPIO ...................................................................................................... 118 5-30 TIMERBASE ........................................................................................122 5-31 TIMERBASE ........................................................................................123 5-32 TIMERBASE ........................................................................... 124 5-33 TIMERBASE ........................................................................... 125 5-34 TIMERBASE ....................................................................... 126 5-35 TIMERBASE ....................................................................... 127 5-36 TIMERBASE ................................................................................................128 5-37 TIMERPLUS ...............................................................................................133 5-38 TIMERPLUS ................................................................................................136 5-39 TIMERPLUS ................................................................................138 5-40 TIMERPLUS pclk ............................................................ 138 5-41 TIMERPLUS ....................................................................139
13 432
DP32G030
5-42 TIMERPLUS ............................................................140 5-43 TIMERPLUS ............................................................141 5-44 TIMERPLUS ................................................................142 5-45 TIMERPLUS ............................................................142 5-46 TIMERPLUS ............................................................143 5-47 TIMERPLUS ................................................................144 5-48 TIMERPLUS HALL ......................................................................... 145 5-49 TIMERPLUS ........................................................................146 5-50 TIMERPLUS ............................................................................148 5-51 TIMERPLUS ............................................................................151 5-52 TIMERPLUS ....................................................................154 5-53 TIMERPLUS HALL ...........................................................................157 5-54 IWDT ..........................................................................................................166 5-55 IWDT ..................................................................................................167 5-56 IWDT ......................................................................................................168 5-57 IWDT ............................................................................. 168 5-58 IWDT ............................................................................. 169 5-59 IWDT ..................................................................................... 170 5-60 WWDT ............................................................................................... 173 5-61 WWDT ............................................................................................... 174 5-62 WWDT ...................................................................................175 5-63 WWDT ................................................................................................... 176 5-64 PWMBASE ......................................................................................... 180 5-65 PWMBASE ......................................................................................... 183 5-66 PWMBASE ..................................................................... 184 5-67 PWMBASE 1 .......................................................................................... 184 5-68 PWMBASE 2 .......................................................................................... 185 5-69 PWMBASE 6 .......................................................................................... 185 5-70 PWMBASE ..................................................................................... 185 5-71 PWMBASE ..................................................................................... 186 5-72 PWMBASE ..................................................................................... 187 5-73 PWMBASE ............................................................................................. 188 5-74 PWMPLUS ................................................................................................. 194 5-75 PWMPLUS ................................................................................................. 197 5-76 PWMPLUS 0 199 5-77 PWMPLUS 1 200 5-78 PWMPLUS 0 201 5-79 PWMPLUS 1 201 5-80 PWMPLUS 0 202 5-81 PWMPLUS 1 202 5-82 PWMPLUS 0 203 5-83 PWMPLUS 1 203 5-84 PWMPLUS 0 204 5-85 PWMPLUS 1 205
14 432
DP32G030
5-86 PWMPLUS 0 205 5-87 PWMPLUS 0 206 5-88 PWMPLUS 0 207 5-89 PWMPLUS 1 207 5-90 PWMPLUS 0 208 5-91 PWMPLUS 1 208 5-92 PWMPLUS ............................................................. 209 5-93 PWMPLUS .............................................209 5-94 PWMPLUS .............................................210 5-95 PWMPLUS ............................................................. 210 5-96 PWMPLUS ............................................................. 211 5-97 PWMPLUS MASK ......................................................... 211 5-98 PWMPLUS MASK ......................................................... 212 5-99 PWMPLUS 0
......................................................................................................................................... 213 5-100 PWMPLUS 1
..................................................................................................................................... 213 5-101 PWMPLUS 0
..................................................................................................................................... 214 5-102 PWMPLUS 1
..................................................................................................................................... 214 5-103 PWMPLUS 0
..................................................................................................................................... 215 5-104 PWMPLUS 1
..................................................................................................................................... 215 5-105 PWMPLUS 0
..................................................................................................................................... 216 5-106 PWMPLUS 1
..................................................................................................................................... 216 5-107 PWMPLUS ............................................................................... 217 5-108 PWMPLUS ................................................................................... 217 5-109 PWMPLUS .......... 218 5-110 PWMPLUS ................................................................................... 220 5-111 RTC .................................................................................................. 237 5-112 RTC .................................................................................................. 238 5-113 RTCCLK ................................................................................................ 239 5-114 RTC .................................................................................. 241 5-115 UART ................................................................................................253 5-116 UART ................................................................................................255 5-117 UART ....................................................................... 256 5-118 UART ....................................................................... 257 5-119 UART ............................................................................... 258 5-120 UART ........................................................................................... 259 5-121 UART ........................................................................................... 260
15 432
DP32G030
5-122 UART ........................................................................................... 260 5-123 UART ........................................................................................... 261 5-124 UART ................................................................................... 261 5-125 UART ................................................................................... 262 5-126 UART ............................................................................... 263 5-127 SPI ....................................................................................................272 5-128 SPI ....................................................................................................273 5-129 SPI /CPHA=0.........................................................................274 5-130 SPI /CPHA=1.........................................................................275 5-131 SPI SSN CPHA=0................................................................................... 275 5-132 SPI Master/SPI Slave ....................................................................................... 277 5-133 SPI ................................................................................... 278 5-134 SPI FIFO .............................................................................................. 279 5-135 SPI FIFO .......................................................................................... 281 5-136 SPI FIFO .......................................................................................... 282 5-137 SPI FIFO .............................................................................................. 283 5-138 SPI ............................................................................................................285 5-139 IIC .................................................................................................... 294 5-140 IIC ........................................................................................................ 295 5-141 IIC 7bit ................................................................296 5-142 IIC ................................................................ 297 5-143 IIC ............................................................................................................ 297 5-144 IIC 10bit ..............................................................297 5-145 IIC 10bit ..............................................................298 5-146 IIC SCL ..........................................................................................................298 5-147 IIC .................................................................................... 299 5-148 IIC ....................................................................................... 301 5-149 IIC ....................................................................................... 303 5-150 IIC ....................................................................................... 306 5-151 IIC ....................................................................................... 309 5-152 SARADC ................................................................................................... 324 5-153 SARADC ............................................................................................... 326 5-154 SARADC ....................................................................................... 327 5-155 SARADC ........................................................................... 328 5-156 SARADC ........................................................................... 329 5-157 SARADC ........................................................................... 330 5-158 SARADC ........................................................................... 332 5-159 SARADC ........................................................................................... 335 5-160 SARADC ................................................................... 335 5-161 SARADC ............................................................................................... 336 5-162 .................................................................................................... 348 5-163 ................................................................................................ 350 5-164 .................................................................... 350 5-165 ............................................................................ 351
16 432
DP32G030
5-166 ............................................................................................ 355 5-167 FLASH .............................................................................................. 358 5-168 ................................................................................................ 364 5-169 ............................................................................................ 366 5-170 .................................................................................... 369 5-171 CRC .................................................................................................. 375 5-172 CRC ...................................................................................................... 376 5-173 CRC .................................................................................................. 377 5-174 CRC ...................................................................................................... 379 5-175 DMA ................................................................................ 382 5-176 DMA ............................................................................................ 384 5-177 DMA ........................................................389 5-178 DMA .................................................................................................... 390 5-179 DMA .................................................................... 390 5-180 DMA ............................................................................ 392 5-181 DMA ........................................................................ 393 5-182 DMA .................................................................................................... 394 5-183 AES .......................................................................................................... 402 5-184 AES .................................................................................................. 404 5-185 AES ...................................................................... 405 5-186 AES ...................................................................... 405 5-187 AES ...................................................................... 406 5-188 AES .................................................................. 407 5-189 AES .............................................................. 408 5-190 AES .............................................................. 409 5-191 AES .......................................................................................................411
17 432
DP32G030
2-1 32G030 MCU ............................................................................................26 4-1 .......................................................................................................................30 4-2 ...............................................................................................................36 5-1 ...............................................................................................................39 5-6 32G030 ......................................................................................................41 5-8 GPIO ........................................................................ 113 5-9 GPIO ........................................................................ 114 5-10 GPIO ...................................................................... 115 5-11 GPIO ...................................................................... 116 1 ........................................................................................................................421 2 ........................................................................................................................421 3 ........................................................................................................................422 4 ............................................................................................................422 5 ................................................................................................422 6 ............................................................................................422 7 ................................................................................................................423
18 432
DP32G030
1.0
2021/11/20
1.1
2021/12/15
1.2
2022/01/20
1.21
2022/02/16
1.22
2022/02/21
1.23
2022/02/21
CMP
19 432
1.
DP32G030
1.1
ARM Cortex M0 72MHz PLL IO 40 IO1 14 12 ADC4 16 6 16 1 20 1 7 6 PWM 6 PWM 2 SPI2 IIC3 UART1 RTC1 CRC3 1 2 1 128bit AES
2.0V-3.6V-40-105
20 432
1.2
DP32G030
32 ARM Cortex M0 72MHz 24 NVIC 32 SWD
64K FLASH 16K RAM
2.0V-3.6V /(POR/PDR)EXTRST 4-32MHz 32768Hz 48MHz RC 32768Hz RC PLL 72MHz
SLEEP DEEPSLEEP STOP
SARADC 14 12bit SARADC 2.4M
21 432
DP32G030
1248 ADC 1248
GPIO 40 IO IO GPIO IO 5V
CRC 81632 CRC CRC CRC x^8+x^2+x+1x^16+x^12+x^5+1x^16+x^15+x^2+1x^32+x^26+x^23+x^22+x^16+ x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x^1+1
AES 128bit AES ECBCBC CTR
DMA 4 816 32bits
22 432
DP32G030
4096
DMA , 3 Rail to Rail 2 Rail to Rail 3MHz bandwidth ADC
2 SPI 4 8 FIFO DMA
23 432
DP32G030
3 UART 8/9 0 1 1 8 FIFO DMA
2 IIC 3 Standard-mode100kbpsFast-mode 400kbpsFast-mode Plus1Mbps clock synchronizationSCL 7 10
6 16 1-65536 4 16 1-65536 HALL 1 20 1 7 6 16 PWM 1-65536
6 16 PWM 1-65536
1 RTC RTC RTC RCLF XTAL
UUID 128
-40-105
24 432
-50-150 MSL3
LQFP48LQFP32TSSOP20
DP32G030
25 432
2.
DP32G030
2-1 32G030 MCU
Part
Voltag e
FLAS RAM
TIM TIM PW PW
H
IO ERB ERP MB MPL IWDT
ADC
UAR SPI
IIC
Package
Number
(KB) (V) (KB)
ASE LUS ASE US
T
2.0V-3.
DP32G030LQ48
64
16 40 3
2
2
2
1
6V
1
3
2
2
LQFP48
2.0V-3.
DP32G030LQ32
64
16 26 3
2
2
2
1
6V
1
3
2
2
LQFP32
2.0V-3.
DP32G030TS20
64
16 16 3
2
2
2
1
6V
1
3
2
2 TSSOP20
26 432
3.
DP32G030
3-1 27 432
4.
4.1
DP32G030
LQFP48(top view)
28 432
DP32G030
LQFP32(top view) TSSOP20(top view)
29 432
4.2
DP32G030
4-1
LQ48 LQ32 TS20
1
1
24
16 VDDIO S
17
48
2.0V~3.6 V
23
16
15 VSSIO S
47
32
9
5
5 VDDA S
2.3V~3.6 V
8
VSSA S
7
4
2 3 4
5
2
6
3
10
6
4
NRST I/O
GPIO_PA0
PA0 GPIO
PWMP1_PLUS0
PWMP1_PLUS0 PWM1 0
PA0 I/O PWMP0_PLUS1
PWMP0_PLUS1 PWM0 1
TM
TMRTC 1/2
WAKEUP0
WAKEUP0 0
GPIO_PA1 PA1 I/O
XTAL_XI
PA1 GPIO XTAL_XI
GPIO_PA2 PA2 I/O
XTAL_XO
PA2 GPIO XTAL_XO
GPIO_PA3
PA3 GPIO
2
PA3 I/O CMP0_VN
CMP0_VN 0 N
XTAH_XI
XTAH_XI
GPIO_PA4
PA4 GPIO
3
PA4 I/O CMP0_VP
CMP0_VP 0 P
XTAH_XO
XTAH_XO
GPIO_PA5
PA5 GPIO
UART1_CTS
UART1_CTS 1 CTS
PWMP1_PLUS1
PWMP1_PLUS1 PWM1 1
6
PA5 I/O
TIMERP1_IN0
TIMERP1_IN0 1 0
TIMERP1_OUT_L TIMERP1_OUT_L 1 L
WAKEUP1
WAKEUP1 1
30 432
DP32G030
SARADC_CH0
SARADC_CH0SARADC 0
GPIO_PA6
PA6 GPIO
UART1_RTS
UART1_RTS 1 RTS
TIMERP1_IN1
TIMERP1_IN1 1 1
11
7
7
PA6 I/O
TIMERP1_OUT_H TIMERP1_OUT_H 1 H
SARADC_CH1
SARADC_CH1SARADC 1
OPA0_OUT
OPA0_OUT 0
GPIO_PA7
PA7 GPIO
UART1_TX
UART1_TX 1
TIMERP0_IN0
TIMERP0_IN0 0 0
12
8
8
PA7 I/O
TIMERP0_OUT_L TIMERP0_OUT_L 0 L
SARADC_CH2
SARADC_CH2SARADC 2
OPA0_VP
OPA0_VP 0 P
GPIO_PA8
PA8 GPIO
UART1_RX
UART1_RX 1
TIMERP0_IN1
TIMERP0_IN1 0 1
13
9
9
PA8 I/O
TIMERP0_OUT_H TIMERP0_OUT_H 0 H
SARADC_CH3
SARADC_CH3SARADC 3
OPA0_VN
OPA0_VN 0 N
GPIO_PA9
PA9 GPIO
SPI0_SSN
SPI0_SSN:SPI0
TIMERP1_IN0
TIMERP1_IN0 1 0
14
10
10
PA9 I/O TIMERP1_OUT_L TIMERP1_OUT_L 1 L
TM
TMRTC 1/2
SARADC_CH4
SARADC_CH4SARADC 4
CMP1_VN
CMP1_VN 1 N
GPIO_PA10
PA10 GPIO
SPI0_CLK
15
11
11
PA10 I/O
SARADC_CH5
SPI0_CLKSPI0 SARADC_CH5SARADC 5
CMP1_VP
CMP1_VP 1 P
GPIO_PA11
PA11 GPIO
SPI0_ MISO
SPI0_MISOSPI0
PWMB0_CH0
PWMB0_CH0 PWM0 0
16
12
12
PA11 I/O PWMP0_BRK0
PWMP0_ BRK0 PWM0 BRAKE0
TIMERP1_IN1
TIMERP1_IN1 1 1
TIMERP1_OUT_H TIMERP1_OUT_H 1 H
SARADC_CH6
SARADC_CH6SARADC 6
GPIO_PA12
PA12 GPIO
SPI0_MOSI
17
13
13
PA12 I/O
PWMB0_CH1
SPI0_MOSISPI0 PWMB0_CH1 PWM0 1
PWMP0_CH0N
PWMP0_CH0N PWM0 0N
31 432
DP32G030
TIMERP0_IN0 TIMERP0_OUT_L SARADC_CH7
TIMERP0_IN0 0 0 TIMERP0_OUT_L 0 L SARADC_CH7SARADC 7
GPIO_PA13
PA13 GPIO
PWMB0_CH2
PWMB0_CH2 PWM0 2
18
14
PA13 I/O PWMP0_CH1N TIMERP0_IN1
PWMP0_CH1N PWM0 1N TIMERP0_IN1 0 1
TIMERP0_OUT_H TIMERP0_OUT_H 0 H
SARADC_CH8
SARADC_CH8SARADC 8
GPIO_PA14
PA14 GPIO
PWMB1_CH0
PWMB1_CH0 PWM1 0
PWMP0_CH2N
19
15
14
PA14 I/O
TIMERP1_IN0
PWMP0_CH2N PWM0 2N TIMERP1_IN0 1 0
TIMERP1_OUT_L TIMERP1_OUT_L 1 L
SARADC_CH9
SARADC_CH9SARADC 9
GPIO_PA15
PA15 GPIO
PWMB1_CH1
PWMB1_CH1 PWM1 1
20
PA15 I/O PWMP0_CH0
PWMP0_CH0 PWM0 0
TIMERP1_IN1
TIMERP1_IN1 1 1
TIMERP1_OUT_H TIMERP1_OUT_H 1 H
GPIO_PB0
PB0 GPIO
UART2_TX
UART2_TX 2
21
PB0 I/O IIC0_SCL
IIC0_SCLIIC0
PWMB1_CH2
PWMB1_CH2 PWM1 2
PWMP0_CH1
PWMP0_CH1 PWM0 1
GPIO_PB1
PB1 GPIO
UART2_RX
UART2_RX 2
22
PB1 I/O
IIC0_SDA
IIC0_SDAIIC0
PWMP0_CH2
PWMP0_CH2 PWM0 2
GPIO_PB2
PB2 GPIO
SPI1_SSN
SPI1_SSN:SPI1
25
PB2 I/O
PWMP0_BRK1
PWMP0_ BRK1 PWM0 BRAKE1
TIMERP1_HALL0 TIMERP1_HALL0 1 HALL0
GPIO_PB3
PB3 GPIO
SPI1_CLK
SPI1_CLKSPI1
26
PB3 I/O IIC1_SDA
IIC1_SDAIIC1
PWMP0_CH0N
PWMP0_CH0N PWM0 0N
TIMERP1_HALL1 TIMERP1_HALL1 1 HALL1
GPIO_PB4
PB4 GPIO
SPI1_ MISO
SPI1_MISOSPI1
27
PB4 I/O
IIC1_SCL
IIC1_SCLIIC1
PWMP1_CH0
PWMP1_CH0 PWM1 0
32 432
DP32G030
PWMP0_CH1N
PWMP0_CH1N PWM0 1N
TIMERP1_HALL2 TIMERP1_HALL2 1 HALL2
GPIO_PB5
PB5 GPIO
SPI1_MOSI
SPI1_MOSISPI1
PWMP1_CH0N
PWMP1_CH0N PWM1 0N
28
PB5 I/O
PWMP0_CH2N
PWMP0_CH2N PWM0 2N
TIMERP0_IN0
TIMERP0_IN0 0 0
TIMERP0_OUT_L TIMERP0_OUT_L 0 L
GPIO_PB6
PB6 GPIO
29
18
PWMP0_CH0 PB6 I/O
TIMERP0_IN1
PWMP0_CH0 PWM0 0 TIMERP0_IN1 0 1
TIMERP0_OUT_H TIMERP0_OUT_H 0 H
GPIO_PB7
PB7 GPIO
SPI0_SSN
SPI0_SSN:SPI0
30
19
17
UART0_TX PB7 I/O IIC0_SCL
UART0_TX 0 IIC0_SCLIIC0
PWMP1_BRK0
PWMP1_ BRK0 PWM1 BRAKE0
PWMP0_CH1
PWMP1_ BRK0 PWM1 BRAKE0
GPIO_PB8
PB8 GPIO
SPI0_CLK
SPI0_CLKSPI0
UART0_RX
UART0_RX 0
31
20
18
PB8 I/O IIC0_SDA
IIC0_SDAIIC0
PWMB0_CH0
PWMB0_CH0 PWM0 0
PWMP1_BRK1
PWMP1_ BRK1 PWM1 BRAKE1
PWMP0_CH2
PWMP0_CH2 PWM0 2
GPIO_PB9
PB9 GPIO
SPI0_ MISO
SPI0_MISOSPI0
UART0_CTS
UART0_CTS 0 CTS
32
21
PB9 I/O PWMB0_CH1
PWMB0_CH1 PWM0 1
PWMP1_CH0
PWMP1_CH0 PWM1 0
TIMERP1_IN1
TIMERP1_IN1 1 1
TIMERP1_OUT_H TIMERP1_OUT_H 1 H
GPIO_PB10
PB10 GPIO
SPI0_MOSI
SPI0_MOSISPI0
UART0_RTS
UART0_RTS 1 RTS
33
22
PWMB0_CH2 PB10 I/O
PWMP1_CH1
PWMB0_CH2 PWM0 2 PWMP1_CH1 PWM1 1
PWMP0_PLUS0
PWMP0_PLUS0 PWM0 0
TIMERP1_IN0
TIMERP1_IN0 1 0
TIMERP1_OUT_L TIMERP1_OUT_L 1 L
GPIO_PB11
34
23
19
PB11 I/O
SWDIO
PB11 GPIO SWDIO SW
33 432
DP32G030
PWMP1_CH2
PWMP1_CH2 PWM1 2
PWMP0_BRK2
PWMP0_ BRK2 PWM0 BRAKE2
GPIO_PB12
PB12 GPIO
UART1_TX
UART1_TX 1
35
PB12 I/O
IIC1_SCL
IIC1_SCLIIC1
PWMP1_CH0N
PWMP1_CH0N PWM1 0N
GPIO_PB13
PB13 GPIO
UART1_RX
UART1_RX 1
36
PB13 I/O
IIC1_SDA
IIC1_SDAIIC1
PWMP1_CH1N
PWMP1_CH1N PWM1 1N
GPIO_PB14
PB14 GPIO
SWCLK
37
24
20
PB14 I/O
UART2_TX
SWCLK SW UART2_TX 1
PWMP1_CH2N
PWMP1_CH2N PWM1 2N
GPIO_PB15
PB15 GPIO
38
25
PB15 I/O SPI1_SSN
SPI1_SSN:SPI1
UART2_RX
UART2_RX 2
GPIO_PC0
PC0 GPIO
39
26
SPI1_CLK PC0 I/O
UART2_CTS
SPI1_CLKSPI1 UART2_CTS 2 CTS
PWMB1_CH0
PWMB1_CH0 PWM1 0
GPIO_PC1
PC1 GPIO
SPI1_ MISO
SPI1_MISOSPI1
40
27
UART2_RTS PC1 I/O
PWMB1_CH1
UART2_RTS 2 RTS PWMB1_CH1 PWM1 1
TIMERP0_IN0
TIMERP0_IN0 0 0
TIMERP0_OUT_L TIMERP0_OUT_L 0 L
GPIO_PC2
PC2 GPIO
SPI1_MOSI
SPI1_MOSISPI1
41
28
PWMB1_CH2 PC2 I/O
PWMP1_BRK2
PWMB1_CH2 PWM1 2 PWMP1_ BRK2 PWM1 BRAKE2
TIMERP0_IN1
TIMERP0_IN1 0 1
TIMERP0_OUT_H TIMERP0_OUT_H 0 H
GPIO_PC3
PC3 GPIO
UART0_TX
UART0_TX 0
42
29
IIC0_SCL PC3 I/O
PWMP1_CH1N
IIC0_SCLIIC0 PWMP1_CH1N PWM1 1N
TIMERP0_HALL0 TIMERP0_HALL0 0 HALL0
CMP2_VN
CMP2_VN 2 N
GPIO_PC4
PC4 GPIO
43
30
PC4 I/O UART0_RX
UART0_RX 0
IIC0_SDA
IIC0_SDAIIC0
34 432
DP32G030
44
31
1
45
46
PWMP1_CH2N
PWMP1_CH2N PWM1 2N
TIMERP0_HALL1 TIMERP0_HALL1 0 HALL1
CMP2_VP
CMP2_VP 2 P
GPIO_PC5
PC5 GPIO
PC5 I/O TIMERP0_HALL2 TIMERP0_HALL2 0 HALL2
OPA1_VP
OPA1_VP 1 P
GPIO_PC6
PC6 GPIO
IIC1_SCL
IIC1_SCLIIC1
PWMP1_CH1 PC6 I/O
TIMERP1_IN1
PWMP1_CH1 PWM1 1 TIMERP1_IN1 1 1
TIMERP1_OUT_H TIMERP1_OUT_H 1 H
OPA1_VN
OPA1_VN 1 N
GPIO_PC7
PC7 GPIO
IIC1_SDA
IIC1_SDAIIC1
PWMP1_CH2 PC7 I/O
TIMERP1_IN0
PWMP1_CH2 PWM1 2 TIMERP1_IN0 1 0
TIMERP1_OUT_L TIMERP1_OUT_L 1 L
OPA1_OUT
OPA1_ OUT 1
35 432
DP32G030
4.3
4-2
LQ48
SEL000
SEL001
2 PA0 GPIOA0 PWMP1_PLUS0
3 PA1 GPIOA1
XTAL_XI
4 PA2 GPIOA2
XTAL_XO
5 PA3 GPIOA3
CMP0_VN
6 PA4 GPIOA4
CMP0_VP
10 PA5 GPIOA5 UART1_CTS
11 PA6 GPIOA6 UART1_RTS
12 PA7 GPIOA7
UART1_TX
13 PA8 GPIOA8
UART1_RX
14 PA9 GPIOA9
SPI0_SSN
15 PA10 GPIOA10
SPI0_CLK
SEL010
SEL011
SEL100
SEL101
PWMP0_PLUS1
TM
WAKEUP0
XTAH_XI
---
---
XTAH_XO
---
---
PWMP1_PLUS1 TIMERP1_IN0 TIMERP1_OUT_L
TIMERP0_IN0 TIMERP1_OUT_H SARADC_CH1
BREAK_IN1 TIMERP0_OUT_L SARADC_CH2
TIMERP0_IN1 TIMERP0_OUT_H SARADC_CH3
TIMERP1_IN0 TIMERP1_OUT_L
TM
SARADC_CH5
CMP1_VP
--------WAKEUP1 OPA0_OUT OPA0_VP OPA0_VN SARADC_CH4
SEL110 ---
SARADC_CH0
--CMP1_VN
---
SEL111
36 432
DP32G030
16 PA11 GPIOA11 17 PA12 GPIOA12 18 PA13 GPIOA13 19 PA14 GPIOA14 20 PA15 GPIOA15 21 PB0 GPIOB0 22 PB1 GPIOB1 25 PB2 GPIOB2 26 PB3 GPIOB3 27 PB4 GPIOB4 28 PB5 GPIOB5 29 PB6 GPIOB6 30 PB7 GPIOB7 31 PB8 GPIOB8 32 PB9 GPIOB9 33 PB10 GPIOB10 34 PB11 GPIOB11
SPI0_MISO SPI0_MOSI PWMB0_CH2 PWMB1_CH0 PWMB1_CH1 UART2_TX UART2_RX SPI1_SSN SPI1_CLK SPI1_MISO SPI1_MOSI PWMP0_CH0 SPI0_SSN SPI0_CLK SPI0_MISO SPI0_MOSI
SWDIO
PWMB0_CH0 PWMP0_BRAKE0 TIMERP1_IN1 TIMERP1_OUT_H SARADC_CH6
PWMB0_CH1
PWMP0_CH0N
TIMERP0_IN0 TIMERP0_OUT_L SARADC_CH7
PWMP0_CH1N TIMERP0_IN1 TIMERP0_OUT_H SARADC_CH8
---
PWMP0_CH2N TIMERP1_IN0 TIMERP1_OUT_L SARADC_CH9
PWMP0_CH0
TIMERP1_IN1 TIMERP1_OUT_H
---
IIC0_SCL
PWMB1_CH2
PWMP0_CH1
IIC0_SDA
PWMP0_CH2
PWMP0_BRAKE1 TIMERP1_HALL0
IIC1_SDA
PWMP0_CH0N TIMERP1_HALL1
IIC1_SCL
PWMP1_CH0
PWMP0_CH1N TIMERP1_HALL2
PWMP1_CH0N PWMP0_CH2N
TIMERP0_IN0 TIMERP0_OUT_L
TIMERP0_IN1 TIMERP0_OUT_H
UART0_TX
IIC0_SCL
PWMP1_BRAKE0 PWMP0_CH1
UART0_RX
IIC0_SDA
PWMB0_CH0 PWMP1_BRAKE1 PWMP0_CH2
UART0_CTS
PWMB0_CH1
PWMP1_CH0
TIMERP1_IN1 TIMERP1_OUT_H
UART0_RTS
PWMB0_CH2
PWMP1_CH1
PWMP0_PLUS0 TIMERP1_IN0 TIMERP1_OUT_L
PWMP1_CH2 PWMP0_BRAKE2
37 432
DP32G030
35 PB12 GPIOB12 UART1_TX
36 PB13 GPIOB13 UART1_RX
37 PB14 GPIOB14
SWCLK
38 PB15 GPIOB15
SPI1_SSN
39 PC0 GPIOC0
SPI1_CLK
40 PC1 GPIOC1
SPI1_MISO
41 PC2 GPIOC2
SPI1_MOSI
42 PC3 GPIOC3
UART0_TX
43 PC4 GPIOC4
UART0_RX
44 PC5 GPIOC5 TIMERP0_HALL2
45 PC6 GPIOC6
IIC1_SCL
46 PC7 GPIOC7
IIC1_SDA
IIC1_SCL IIC1_SDA UART2_TX UART2_RX UART2_CTS UART2_RTS PWMB1_CH2 IIC0_SCL IIC0_SDA OPA1_VP PWMP1_CH1 PWMP1_CH2
PWMP1_CH0N PWMP1_CH1N PWMP1_CH2N
PWMB1_CH0
PWMB1_CH1
TIMERP0_IN0 TIMERP0_OUT_L
PWMP1_BRAKE2 TIMERP0_IN1 TIMERP0_OUT_H
PWMP1_CH1N TIMERP0_HALL0
CMP2_VN
PWMP1_CH2N TIMERP0_HALL1
CMP2_VP
TIMERP1_IN1 TIMERP1_IN0
TIMERP1_OUT_H TIMERP1_OUT_L
OPA1_VN OPA1_OUT
38 432
5.
DP32G030
5.1
32G030 32 4G
0x00000000 0x20000000 AHB 0x40000000 0x40000800 0x40001000 0x40003000 APB1 0x40060000 0x40060800 0x40061000 0x40064000 0x40064800 0x40065000 0x40067000 0x40067800 0x40069000 0x4006A000 0x4006A800 0x4006B000 0x4006B800
5-1
0x0000FFFF 0x20003FFF
FLASH RAM
0x400007FF 0x40000FFF 0x400017FF 0x400037FF
SYSCON PMU DMA CRC
0x400607FF 0x40060FFF 0x400617FF 0x400647FF 0x40064FFF 0x400657FF 0x400677FF 0x40067FFF 0x400697FF 0x4006A7FF 0x4006AFFF 0x4006B7FF 0x4006BFFF
GPIOA GPIOB GPIOC TIMER_BASE0 TIMER_BASE1 TIMER_BASE2 TIMER_PLUS0 TIMER_PLUS1 RTC IWDT WWDT UART0 UART1
39 432
0x4006C000 0x4006F000 APB2 0x400B0000 0x400B1000 0x400B1800 0x400B4000 0x400B4800 0x400B8000 0x400B8800 0x400B9000 0x400B9800 0x400BA000 0x400BD000
0x4006C7FF 0x4006F7FF
0x400B07FF 0x400B17FF 0x400B1FFF 0x400B47FF 0x400B4FFF 0x400B87FF 0x400B8FFF 0x400B97FF 0x400B9FFF 0x400BA7FF 0x400BD7FF
UART2 FLASH_CTRL
PORTCON PWM_BASE0 PWM_BASE1 PWM_PLUS0 PWM_PLUS1 SPI0 SPI1 IIC0 IIC1 SARADC AES128
DP32G030
40 432
5.2
DP32G030
64KB FLASH 16KB RAM
64KB FLASH 2KB NVR 64KB MAIN NVR TRIM MAIN
16KB RAM
5.3
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
5-6 32G030 WWDT IWDT RTC DMA SARADC TIMER_BASE0 TIMER_BASE1 TIMER_PLUS0 TIMER_PLUS1 PWM_BASE0 PWM_BASE1 PWM_PLUS0 PWM_PLUS1 UART0 UART1 UART2 SPI0 SPI1 IIC0
41 432
DP32G030
19
IIC1
20
CMP
21
TIMER_BASE2
22
GPIOA5
23
GPIOA6
24
GPIOA7
25
GPIOB0
26
GPIOB1
27
GPIOC0
28
GPIOC1
29
GPIOA
30
GPIOB
31
GPIOC
42 432
5.4 ARM Cortex-M0
DP32G030
5.4.1
Cortex-M0 32 RISC AMBA AHB-Lite NVIC Thumb Cortex-M Thread Handler Handler Handler Thread Thread
5-1 Cortex-M0
5.4.2
: Thumb Thumb-2 24-bit SYSTICK 32-bit
43 432
little-endian
DP32G030
/
C C-ABIARMv6-MC-ABI
C
WFI sleepon-exit
NVIC :
32 4
NMI
WIC
PCSR
:
32 AMBA-3 AHB-Lite
DAP(Debug Access Port) 32
44 432
5.4.3 SYSTICK
DP32G030
Cortex-M0 24 SYST_VAL 0SYST_LOAD 0 SYST_CTRL COUNTFLAG
SYST_VAL SYST_LOAD SYST_VAL SYST_LOAD
SYST_LOAD 0 0
24
5-2 Systick
45 432
DP32G030
SYST_VAL 0 SYST_LOAD 0 SYST_CTRL COUNTFLAG
SYST_VAL SYST_LOAD SYST_VAL SYST_LOAD
SYST_LOAD 0 0
SysTick
5-3 systick
SYSTICK SYST_CTRL SYST_LOAD SYST_VAL
BASE:0xE000E010
0x00
R/W
0x04
R/W
0x08
R/W
0x00 0x00 0x00
46 432
SYSTICK SYST_CTRL SYST_LOAD SYST_VAL
BASE:0xE000E010
0x00 0x04 0x08
R/W R/W R/W
DP32G030
0x00
0x00
0x00
SYST_CTRL 0x00
31:17 16 15:2
1
0
RESERVED COUNTFLAG RESERVED
TINKINT
ENABLE
R
0
R
0
0 1
R
0
R/W 0
0 1
R/W 0
0 1
SYST_LOAD 0x04
31:24 23:0
RESERVED RELOAD
R
0
R/W 0
0
47 432
SYST_VAL 0x08
DP32G030
31:24
RESERVED
23:0
VAL
R
0
R/W 0
COUNTFLAG
48 432
5.5PMU
DP32G030
5.5.1
AVDD 2.0-3.6V 1.2V
A/D AVDD_ADC 2.0-3.6V VREF A/D AVDDdouble bonding PIN A/D VREF AVDD bonding PIN
WDTCPU
5.5.2
2.0V-3.6V ADC POR(PDR) normalWFI WFIsleep deepsleepstop
5.5.3
49 432
DP32G030
5-4
//AVDD/AVSS A/D /AVDD_ADC/AVSS_ADC
AVDD AVDD_ADC PIN A/D AVDD_ADC/AVSS_ADC PADVREF_ADC AVDD IO /// RC PLL 1.2V 1.2V 1.2V
50 432
DP32G030
1.2V CPU 1.2V PMU RTC
5.5.4
HM1030 2.0V-3.6V 1.2V ADC
A/D
ADC ADC PCB
ADC AVDD_ADC ADC AVSS_ADC ADC VREF_ADC VREF_ADC AVDD_ADC PIN
1 1.2V
2 WFI CPU CPU NVICSysTick 51 432
DP32G030
3 SLEEP 1.2V
4 DEEPSLEEP 1.2V TRIM_LPLDO
5 STOP
6 CPU IWDTWWDT
PORPDR
PORPDR
52 432
DP32G030
5-5
reset
53 432
DP32G030
5-6
reset
IWDTWWDT CPU
CPU
ARM CORTEX M0 0xe000ed0c 0x05fa0004 CPU
PMU/RTC SYSCON VREF_VOLT_DELTARC_FREQ_DELTADEVICE_ID0DEVICE_ID1DEVICE_ID2DEVICE_ID3
54 432
DP32G030
1
PMU/RTC
/ CPU
CPU
CPU CPU CPU
RC 24MHzCPU
CPU
WFI SLEEP DEEPSLEEP STOP
WFI CPU CPU NVICSYSTICK
SLEEP LDO
RC
RC RTC
55 432
DP32G030
DEEPSLEEP 1.2V CPU 1.2V LDO RC RC RTC
STOP 1.2V
2
WFI
WFI
CPU
SLEEP
LPOW_MD IO SLEEP RTC 1
DEEPSLEEP STOP
LPOW_MD DEEPSLEEP 1
IO RTC
LPOW_MD STOP 1
IO
CPU
RCHF (TRIM_LPLDO)
1.2V RCHF
(TRIM_LPLDO)
RCHF RCLF
56 432
DP32G030
CLK_SEL DIV_CLK_SEL 11.6.1 CLK_SEL
DEV_CLK_GATE
WFI
ARM CPU WFI CPU CPU IO CPU
SLEEP
LPOW_MD SLEEP 1 SLEEP SLEEP ADC TRIM_POW3 LPLDO TRIM_LPLDO
57 432
DP32G030
SLEEP RCHF BG RC RCLF RC RCHF PMU RTC RCLF
SLEEP IO RTC PMU IO RTC SLEEP_MODE 0 SLEEP SLEEP_MODE 0 SLEEP
IO SLEEP 100us SLEEP
58 432
DP32G030
5-7 SLEEP
DEEPSLEEP
LPOW_MD DEEPSLEEP 1 DEEPSLEEP DEEPSLEEP ADC TRIM_LPLDO
DEEPSLEEP RCHF BG RC RCLF
59 432
DP32G030
RC RCHF
1.2V
1.2V PMURTC RCLF
RAM DEEPSLEEP IO RTC PMU IO RTC DEEPSLEEP_MODE 0 DEEPSLEEP DEEPSLEEP_MODE 0 DEEPSLEEP IO DEEPSLEEP 140us DEEPSLEEP
60 432
DP32G030
5-8 DEEPSLEEP
STOP
LPOW_MD STOP 1 STOP STOP 1.2V AVDD STOP IO STOP IO STOP
61 432
350us STOP
DP32G030
5-9 STOP
sleepdeepsleep stop TRIM
62 432
PMU
BASE:0x40000800
LPOW_MD
0x00
R/W
LPMD_WKEN
0x04
R/W
LPMD_WKST
0x08
R/W
CHIP_RST_ST
0x0C
R/W
SRC_CFG
0x10
R/W
TRIM _POW0
0x20
R/W
TRIM _POW1
0x24
R/W
TRIM _POW2
0x28
R/W
TRIM _POW3
0x2C
R/W
TRIM_RCHF
0x30
R/W
TRIM_RCLF
0x34
R/W
TRIM_OPA
0x38
R/W
TRIM_PLL
0x3c
R/W
TRIM_LOCK
0x80
R/W
DATA_BAKE0
0x100
R/W
DATA_BAKE1
0x104
R/W
DATA_BAKE2
0x108
R/W
DATA_BAKE3
0x10C
R/W
DP32G030
0x00 0x00 0x00 0x01 0x03 0x00 0x00 0x00 0x00 0x808 0x810 0x00 0x00 0x00 0x00 0x00 0x00
0x00
POW0 TRIM POW1 TRIM POW2 TRIM POW3 TRIM RCHF TRIM RCLF TRIM OPA TRIM PLL TRIM TRIM 0 1 2
3
LPOW_MD 0x00
63 432
DP32G030
31:4
RESERVED
R
0
3
STOP
R/W 0
2
DEEPSLEEP R/W 0
1
SLEEP
R/W 0
0
RESERVED
R
0
1 STOP 1 1 DEEPSLEEP 1 1 SLEEP 1
LPMD_WKEN 0x04
31:3 2
1 0
RESERVED
R
0
IO_WKEN
R/W 0
RTC_TIM_WK R/W 0
EN RTC_ALA_WK
R/W 0 EN
IO 0 1 1 IO PORTA_WKE PORTB_WKEPORTC_WKE
RTC 1RTC
RTC 1RTC
LPMD_WKST 0x08
31:3
RESERVED
R
0
64 432
DP32G030
IO
1 IO
2
IO_WKST
R/W 0
0 IO
1 1
RTC
RTC_TIM_WK
1
R/W 0
1 RTC
ST
1 1
RTC
RTC_ALA_WK
0
R/W 0
1 RTC
ST
1 1
CHIP_RST_ST 0x0C
31:3 RESERVED
2
WWDT_RST_ST
1
IWDT_RST_ST
0
POR_RST_ST
R R/W
R/W
R/W
0 0
0
1
WWDT 0 WWDT 1 WWDT 1 IWDT 0 IWDT 1 IWDT 1 0 1 1
SRC_CFG 0x10
65 432
31:5
RESERVED
R
0
4
RTC_CLK_SEL R/W 0
3
XTAL_EN
R/W 0
2
XTAH_EN
R/W 0
1
RCHF_FSEL R/W 1
0
RCHF_EN
R/W 1
DP32G030
RTC 0RCLF 1XTAL XTAL 0 XTAL 1 XTAL XTAH 0 XTAH 1 XTAH RCHF 048MHz 124MHz RCHF 0 RCHF 1 RCHF
TRIM_POW0 0x20
31:11 10:8 7:4 3:0
RESERVED
R
0
TRIM_TEMPC R/W 0
O_HPBG
TRIM_I_HP R/W 0
HPBG trim HPBG trim
TRIM_V_HP R/W 0
HPBG trim
TRIM_POW1 0x24
31:8
RESERVED
R
0
66 432
7:4
TRIM_V_LP R/W 0
LPBG trim
TRIM_TEMPC
3:0
R/W 0
O_LPBG
LPBG trim
TRIM_POW2 0x28
31:0
RESERVED
R
0
DP32G030
TRIM_POW3 0x2C
31:4 3
2:1
0
RESERVED
R
0
TRIM_HPLDO R/W 0
_H
TRIM_LPLDO R/W 0
TRIM_PD_UV R/W 0
LO
HPLDO 1.264v 0 1 1.264v
LPLDO trim 001.1V 011.0V 100.9V 110.8V
UVLO33 trim 0 SLEEP 1.8V 0.6uA 1 SLEEP 1.3V+-500mV 0.6uA
TRIM_RCHF 0x30
67 432
31:12 11:8 7:4 3:0
RESERVED TRIM_N RESERVED TRIM_P
R
0
R/W 0x8
R
0
R/W 0x8
RCHF N trim RCHF P trim
DP32G030
TRIM_RCLF 0x34
31:12 11:8 7:5 4:0
RESERVED TRIM_CS RESERVED TRIM_FINE
R
0
R/W 0x8
RCLF CS trim
R
0
R/W 0x10 RCLF FINE trim
TRIM_OPA 0x38
31:20 19:15 14:10 9:5 4:0
RESERVED OPA1_TRIMP OPA1_TRIMN OPA0_TRIMP OPA0_TRIMN
R R/W R/W R/W R/W
0
0
OPA1 P TRIM
0
OPA1 N TRIM
0
OPA0 P TRIM
0
OPA0 N TRIM
68 432
TRIM_PLL 0x3C
DP32G030
31:4 3:0
RESERVED PLL_R_TRSIM
R R/W
0
0
PLL R TRIM
TRIM_LOCK 0x80
31:16 RESERVED 15:8 TRIM_UNLOCK
7:0 TRIM_LOCK
R
0
W0
0xAA TRIM
W0
0x55 TRIM TRIM
DATA_BAK0 0x100
31:0
DATA_BAK0
R/W 0
0
DATA_BAK1 0x104
31:0
DATA_BAK1
R/W 0
1
69 432
DATA_BAK2 0x108
31:0
DATA_BAK2
R/W 0
2
DATA_BAK3 0x10C
31:0
DATA_BAK3 R/W 0
3
DP32G030
70 432
5.6SYSCON
DP32G030
5.6.1
5.6.2
128bit
5.6.3
5 RCHF48MHz RC RCLF32768Hz RC PLL 72MHzXTAH4-32MHz XTAL32768Hz
71 432
DP32G030
5-10
sys_clk 1/2/4/8/16/32
CPU Cortex-M0 FCLKHCLK SCLK sys_clk M0 SYSTICK sys_clk
SARADC CLK_SEL SARADC_SMPL_CLK_SEL sys_clk 1/2/4/8
IWDT RCLF DEV_CLK_GATE IWDT_CLK_GATE
WWDT DEV_CLK_GATE WWDT_CLK_GATE
RTC RCLF XTAL DEV_CLK_GATE RTC_CLK_SEL
72 432
DP32G030
SLEEP DEEPSLEEP RCLF RCLF
5.6.4
XTAH/
/ 1/
XTAH 4-32MHz /
5-11
2 XTAH 48MHz
XI X0
73 432
DP32G030
5-12
XTAH PMU SRC_CFG XTAH_EN 10ms
RCHF
RCHF RC 48MHz PMU SRC_CFG RCHF_EN PMU SRC_CFG RCHF_FSEL 48MHz 24MHz
RCHF RC XTAH
RC RCHF ±1%25 TRIM_RCHF
74 432
DP32G030
RC_FREQ_DELTA RCHF_DELTA RCHF_SIG
RC TRIM_RCHF TRIM_P RCHF
PLL
PLL XTAH RCHF CLK_SEL PLL_CLK_SEL
PLL PLL PLL
PLL PLL PLL
PLL PLL_ST PLL_LOCK PLL PLL PLL 30us
PLL PLL_CTRL PLL_M PLL_N
fpll PLL fin M PLL_M N PLL_N
PLL CLK_SEL PLL_CLK_SEL RCHF XTAH PLL /PLL_M 3MHz-6MHz
75 432
DP32G030
PLL 72MHzPLL_M PLL_N
RCHF RCHF RCHF RCHF RCHF RCHF XTAH XTAH XTAH XTAH XTAH XTAH XTAH XTAH XTAH XTAH
24 24 24 24 24 24 4 8 12 12 16 24 24 24 32 32
PLL_M 8 6 4 6 6 6 1 2 2 4 4 4 6 8 8 8
PLL 3 4 6 4 4 4 4 4 6 3 4 6 4 3 4 4
PLL_N 24 18 12 16 14 12 18 18 12 24 18 12 18 24 18 16
PLL 72 72 72 64 56 48 72 72 72 72 72 72 72 72 72 64
XTAL
XTAL 32768Hz / 32768Hz
XTAL SRC_CFG XTAL_EN 2s
XTAL 32768Hz /
76 432
DP32G030
5-13
RCLF
RCLF RC 32768Hz SLEEP DEEPSLEEP IWDT
RCLF 32768Hz
RC RCLF ±1%25 TRIM_RCLF RC_FREQ_DELTA RCLF_DELTA RCLF_SIG
77 432
DP32G030
RC TRIM_RCLF TRIM_FINE RCLF
sys_clk
sys_clk RCHF RCHF 24MHz
CLK_SEL SYS_CLK_SEL RCHF DIV_CLK
DIV_CLK SYS_CLK_SEL 0 RCHF DIV_CLK_GATE 0 DIV_CLK CLK_SEL SRC_CLK_SEL DIV_CLK_SEL DIV_CLK DIV_CLK_GATE 1 DIV_CLK SYS_CLK_SEL 1 DIV_CLK
RTC
SRC_CFG RTC_CLK_SEL RTCCLK XTAL RCLF
RTC RTC RTC_CLK_SEL 70us
SLEEP DEEPSLEEP
78 432
IWDT
DP32G030
RCLF DEV_CLK_GATE IWDT_CLK_GATE 1 IWDTCLK
WWDT
DEV_CLK_GATE WWDT_CLK_GATE 1 WWDTCLK
SARADC
SARADC CLK_SEL SARADC_SMPL_CLK_SEL 2 4 8
SLEEP DEEPSLEEP RCLF
128
128bit
79 432
DP32G030
( USB )
128bit CHIP_ID0CHIP_ID1CHIP_ID2 CHIP_ID3
SYSCON CLK_SEL
BASE: 0x40000000 0x00
R/W 0x02
DIV_CLK_GATE
0x04 R/W 0x01
DEV_CLK_GATE
0x08 R/W 0x00
RC_FREQ_DELTA
0x78 R/W 0x00 RCHF/RCLF
VREF_VOLT_DELTA
0x7C R/W 0x00 VREF
CHIP_ID0
0x80 R/W 0x00 ID 0
CHIP _ID1 CHIP _ID2 CHIP _ID3 PLL_CTRL PLL_ST
0x84 0x88 0x8C 0x180 0x184
R/W 0x00 ID 1 R/W 0x00 ID 2 R/W 0x00 ID 3 R/W 0x2c8 PLL R/W 0x00 PLL
80 432
CLK_SEL 0x00
DP32G030
31:12 RESERVED
R
11
PLL_CLK_SEL
R
SARADC_SMPL_
11:10
W
CLK_SEL
SARADC_SMPL_
10:9
R
CLK_SEL
8
RESERVED
R
0
PLL
0
0RCHF
1XTAH
SARADC
00 1
0
01 2
10 4
11 8
SARADC
00 1
0
01 2
10 4
11 8
0
7
RESERVED
R
0
7
PLL_CLK_SEL
W
0
6:4 SRC_CLK_SEL
R/W 0
PLL 0RCHF 1XTAH
SRC_CLK 000RCHF 001RCLF 010XTAH 011XTAL 100PLL
81 432
3:1 DIV_CLK_SEL
R/W 01
0
SYS_CLK_SEL
R/W 0
DP32G030
DIV_CLK 000SRC_CLK 1 001SRC_CLK 2 010SRC_CLK 4 011SRC_CLK 8 100SRC_CLK 16 101SRC_CLK 32
0RCHF 1DIV_CLK
DIV_CLK_GATE 0x04
31:1 RESERVED
R
0
1
0
0
DIV_CLK_GATE R/W 0x1
DIV_CLK_SEL SRC_CLK_SEL
RCHF
0 DIV_CLK
DIV_CLK_SEL SRC_CLK_SEL
DEV_CLK_GATE 0x08
31:29 RESERVED 28 AES_CLK_GATE
R
0
R/W 0
AES128
82 432
27 CRC_CLK_GATE
26 RESERVED
25 SARADC_CLK_GATE
24 WWDT_CLK_GATE
23 IWDT_CLK_GATE
22 RTC_CLK_GATE
21 PWM_PLUS1_CLK_GATE
20 PWM_PLUS0_CLK_GATE
19 RESERVED
18 PWM_BASE1_CLK_GATE
17 PWM_BASE0_CLK_GATE
16 TIMER_PLUS1_CLK_GATE
15 TIMER_PLUS0_CLK_GATE
14 TIMER_BASE2_CLK_GATE
13 TIMER_BASE1_CLK_GATE
12 TIMER_BASE0_CLK_GATE
11 SPI1_CLK_GATE
10 SPI0_CLK_GATE
9
RESERVED
8
UART2_CLK_GATE
7
UART1_CLK_GATE
6
UART0_CLK_GATE
5
IIC1_CLK_GATE
R/W 0
R
0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R
0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R
0
R/W 0
R/W 0
R/W 0
R/W 0
DP32G030
CRC SARADC_CTRL WWDT IWDT RTC PWM_PLUS1 PWM_PLUS0 PWM_BASE1 PWM_BASE0 TIMER_PLUS1 TIMER_PLUS0 TIMER_BASE2 TIMER_BASE1 TIMER_BASE0 SPI1 SPI0 UART2 UART1 UART0 IIC1
83 432
4
IIC0_CLK_GATE
3
RESERVED
2
GPIOC_CLK_GATE
1
GPIOB_CLK_GATE
0
GPIOA_CLK_GATE
R/W 0
R
0
R/W 0
R/W 0
R/W 0
DP32G030
IIC0 GPIOC GPIOB GPIOA
RC_FREQ_DELTA 0x78
31 30:11 10 9:0
RCHF_SIG
R/W 0
1 RCHF_DELTA 0 RCHF_DELTA
RCHF_DELTA R/W 0
RCHF 48MHz 48MHz
RCLF_SIG
R/W 0
1 RCLF_DELTA 0 RCLF_DELTA
RCLF_DELTA R/W 0
RCLF 32.768KHz 32.768KHz
VREF_VOLT_DELTA 0x7C
31:7
RESERVED
6
VREF_SIG
5:0
VREF_DELTA
R R/W
R/W
0
1 VREF_DELTA 0
0 VREF_DELTA
VREF
0
mv
84 432
DP32G030
CHIP_ID0 0x80
31:0
CHIP_ID0
R/W
0
ID 0
CHIP_ID1 0x84
31:0
CHIP_ID1
R/W
0
ID 1
CHIP_ID2 0x88
31:0
CHIP_ID2
R/W
0
ID 2
CHIP_ID3 0x8C
31:0
CHIP_ID3
R/W
0
ID 3
PLL_CTRL 0x180
85 432
31:11 10:6
5:1 0
RESERVED PLL_M
PLL_N PLL_EN
R
0
R/W 0xb
R/W 0x4 R/W 0
DP32G030
PLL 000001 000012 000103 000114 ...... 1111031 1111132
PLL Feedback 000002 000014 000106 000118 ...... 1111062 1111164 PLL 0 PLL 1 PLL PLL 30us
PLL_ST 0x184
31:1
0
RESERVED
PLL_LOCK
R
0
R
0
PLL 0 1 PLL
86 432
5.7IO PORTCON
DP32G030
5.7.1
IO PORTx_SELx IO IO
5.7.2
IO IO IO IO IO IO
87 432
5.7.3
DP32G030
5-14 PORTCON
HYS IE IO DS OD IO PU IO PD IO ANA IO DI PAD DO PAD OE DO IO OE OE
88 432
5.7.4
DP32G030
IO PORTx_IE IO 1 IE PAD DI
IO GPIOSPIUART IO PORTx_SELx IO
5-15 IO
func0func1......funcx 89 432
DP32G030
PORTx_SELx IO PORTx_SELx DI func func 0 PORTx_SELx DI IO IE PAD
5-16 IO
func0func1......funcx PORTx_SELx IO PORTx_SELx DO func IO OE PAD PORTx_SELx IO IO OE PORTx_IE 0 IO IE PAD IO IO PORTx_PUPORTx_PD
IO IO
90 432
DP32G030
5-17 IO
ana_signal_aana_signal_bana_signal_c IO abc IO ANA PAD
IO IO ANA IO ana_signal_b
5-18 IO ana_signal_b
/ IO IO PU PD
IO IE PORTx_IE
PORTx_PU 1 IO PU 1 PAD DI 1
91 432
DP32G030
IO IE PORTx_IE PORTx_PD 1 IO PD 1 PAD DI 0
0 IO
IO
IO OE PORTx_OD 0 1 PAD
IO PORTx_OD 0 IO /
5-19 IO
OD = 0 OE = 1 DO 0 PAD 0 DO 1 PAD 1 IO PORTx_OD 1 IO
92 432
DP32G030
5-20 IO
OD = 1 OE = 1 DO 0 PAD 0 DO 1 PAD
IO IO
IO PORTx_WKE
PORT_RIS IO 0RIS 0 1 IO PORT_DS IO 5mA14mA22mA 30mA IO
93 432
DP32G030
IO
PORT_HYS 0 1
IO
IO
PORT_PUR 32k40k 150k
IO
PORT
BASE: 0x400B0000
PORTA_SEL0
0x00 32
PORTA_SEL1
0x04 32
PORTB_SEL0
0x08 32
PORTB_SEL1
0x0C 32
PORTC_SEL0
0x10 32
PORTA_IE
0x100 32
R/W 0x00
PORTA 0
R/W 0x00
PORTA 1
R/W 0xffff0000 PORTB 0
R/W 0x01001000 PORTB 1
R/W 0x00
PORTC 0
R/W 0x00
PORTA
PORTB_IE
0x104 32 R/W 0x4800
PORTB
PORTC_IE PORTA_PU PORTB_PU
0x108 32 0x200 32 0x204 32
R/W 0x20 R/W 0x00 R/W 0x00 94 432
PORTC PORTA PORTB
PORTC_PU
0x208 32
PORTA_PD
0x300 32
PORTB_PD
0x304 32
PORTC_PD
0x308 32
PORTA_OD
0x400 32
PORTB_OD
0x404 32
PORTC_OD
0x408 32
PORTA_WKE
0x500 32
PORTB_WKE
0x504 32
PORTC_WKE
0x508 32
PORT_CFG
0x600 32
PORTA_WK_SEL 0x700 32
PORTB_WK_SEL 0x704 32
PORTC_WK_SEL 0x708 32
R/W 0x00 R/W 0x00 R/W 0x00 R/W 0x20 R/W 0x00 R/W 0x00 R/W 0x00 R/W 0x00 R/W 0x00 R/W 0x00 R/W 0x15 R/W 0x00 R/W 0x00 R/W 0x00
PORTA_SEL0 0x00
DP32G030
PORTC PORTA PORTB PORTC PORTA PORTB PORTC PORTA PORTB PORTC PORT PORTA IO PORTB IO PORTC IO
31:28
PORTA7
R/W
0000GPIOA7
0001UART1_TX
0010TIMERP0_IN0
0
0011TIMERP0_OUT_L
0100SARADC_CH2
0101OPA0_VP
95 432
27:24 PORTA6 R/W 0
23:20 PORTA5 R/W 0
19:16 PORTA4 R/W 0
15:12 PORTA3 R/W 0
11:8
PORTA2 R/W 0
7:4
PORTA1 R/W 0
DP32G030
0000GPIOA6 0001UART1_RTS 0010TIMERP1_IN1 0011TIMERP1_OUT_H 0100SARADC_CH1 0101OPA0_OUT
0000GPIOA5 0001UART1_CTS 0010PWMP1_PLUS1 0011TIMERP1_IN0 0100TIMERP1_OUT_L 0101WAKEUP1 0110SARADC_CH0
000GPIOA4 001CMP0_VP 010XTAH_XO
000GPIOA3 001CMP0_VN 010XTAH_XI
000GPIOA2 001XTAL_XO
000GPIOA1 001XTAL_XI
96 432
DP32G030
0000GPIOA0
0001PWMP1_PLUS0
0010PWMP0_PLUS1
3:0
PORTA0 R/W 0
0011TM
0100WAKEUP0
PORTA_SEL1 0x04
31:28 PORTA15 27:24 PORTA14 23:20 PORTA13
R/W 0 R/W 0 R/W 0
0000GPIOA15 0001PWMB1_CH1 0010PWMP0_CH0 0011TIMERP1_IN1 0100TIMERP1_OUT_H
0000GPIOA14 0001PWMB1_CH0 0010PWMP0_CH2N 0011TIMERP1_IN0 0100TIMERP1_OUT_L 0101SARADC_CH9
0000GPIOA13 0001PWMB0_CH2 0010PWMP0_CH1N 0011TIMERP0_IN1 0100TIMERP0_OUT_H 0101SARADC_CH8
97 432
19:16 PORTA12
R/W 0
15:12 PORTA11
R/W 0
11:8 PORTA10
R/W 0
7:4
PORTA9
R/W 0
DP32G030
0000GPIOA12 0001SPI0_MOSI 0010PWMB0_CH1 0011PWMP0_CH0N 0100TIMERP0_IN0 0101TIMERP0_OUT_L 0110SARADC_CH7
0000GPIOA11 0001SPI0_MISO 0010PWMB0_CH0 0011PWMP0_BRAKE0 0100TIMERP1_IN1 0101TIMERP1_OUT_H 0110SARADC_CH6
0000GPIOA10 0001SPI0_CLK 0010SARADC_CH5 0011CMP1_VP
0000GPIOA9 0001SPI0_SSN 0010TIMERP1_IN0 0011TIMERP1_OUT_L 0100TM 0101SARADC_CH4 0110CMP1_VN
98 432
3:0
PORTA8
R/W 0
DP32G030
0000GPIOA8 0001UART1_RX 0010TIMERP0_IN1 0011TIMERP0_OUT_H 0100SARADC_CH3 0101OPA0_VN
PORTB_SEL0 0x08
31:28 27:24 23:20
PORTB7 PORTB6 PORTB5
R/W R/W R/W
0000GPIOB7
0001SPI0_SSN
0010UART0_TX
0xf
0011IIC0_SCL
0100PWMP1_BRAKE0
0101PWMP0_CH1
0000GPIOB6
0001PWMP0_CH0
0xf
0010TIMERP0_IN1
0011TIMERP0_OUT_H
0000GPIOB5
0001SPI1_MOSI
0010PWMP1_CH0N
0xf
0011PWMP0_CH2N
0100TIMERP0_IN0
0101TIMERP0_OUT_L
99 432
19:16 PORTB4 R/W 0xf
15:12 PORTB3 R/W 0
11:8
PORTB2 R/W 0
7:4
PORTB1 R/W 0
3:0
PORTB0 R/W 0
0000GPIOB4 0001SPI1_MISO 0010IIC1_SCL 0011PWMP1_CH0 0100PWMP0_CH1N 0101TIMERP1_HALL2
0000GPIOB3 0001SPI1_CLK 0010IIC1_SDA 0011PWMP0_CH0N 0100TIMERP1_HALL1
0000GPIOB2 0001SPI1_SSN 0010PWMP0_BRAKE1 0011TIMERP1_HALL0
0000GPIOB1 0001UART2_RX 0010IIC0_SDA 0011PWMP0_CH2
0000GPIOB0 0001UART2_TX 0010IIC0_SCL 0011PWMB1_CH2 0100PWMP0_CH1
DP32G030
PORTB_SEL1 0x0C
100 432
31:28 27:24 23:20 19:16 15:12
11:8
PORTB15 R/W 0 PORTB14 R/W 0x1 PORTB13 R/W 0 PORTB12 R/W 0 PORTB11 R/W 0x1
PORTB10 R/W 0
0000GPIOB15 0001SPI1_SSN 0010UART2_RX
0000GPIOB14 0001SWCLK 0010UART2_TX 0011PWMP1_CH2N
0000GPIOB13 0001UART1_RX 0010IIC1_SDA 0011PWMP1_CH1N
0000GPIOB12 0001UART1_TX 0010IIC1_SCL 0011PWMP1_CH0N
0000GPIOB11 0001SWDIO 0010PWMP1_CH2 0011PWMP0_BRAKE2
0000GPIOB10 0001SPI0_MOSI 0010UART0_RTS 0011PWMB0_CH2 0100PWMP1_CH1 0101PWMP0_PLUS0 0110TIMERP1_IN0 0111TIMERP1_OUT_L
DP32G030
101 432
DP32G030
0000GPIOB9
0001SPI0_MISO
0010UART0_CTS
0011PWMB0_CH1
7:4
PORTB9 R/W 0
0100PWMP1_CH0
0101TIMERP1_IN1
0110TIMERP1_OUT_H
0000GPIOB8
0001SPI0_CLK
0010UART0_RX
0011IIC0_SDA
3:0
PORTB8 R/W 0
0100PWMB0_CH0
0101PWMP1_BRAKE1
0110PWMP0_CH2
PORTC_SEL0 0x10
31:28
27:24
PORTC7
PORTC6
R/W
R/W
0000GPIOC7
0001IIC1_SDA
0010PWMP1_CH2
0
0011TIMERP1_IN0
0100TIMERP1_OUT_L
0101OPA1_OUT
0000GPIOC6
0001IIC1_SCL
0010PWMP1_CH1
0
0011TIMERP1_IN1
0100TIMERP1_OUT_H
0101OPA1_VN
102 432
23:20 PORTC5 R/W 0 19:16 PORTC4 R/W 0
15:12 PORTC3 R/W 0
11:8
PORTC2 R/W 0
7:4
PORTC1 R/W 0
DP32G030
0000GPIOC5 0001TIMERP0_HALL2 0010TM 0011OPA1_VP
0000GPIOC4 0001UART0_RX 0010IIC0_SDA 0011PWMP1_CH2N 0100TIMERP0_HALL1 0101CMP2_VP
0000GPIOC3 0001UART0_TX 0010IIC0_SCL 0011PWMP1_CH1N 0100TIMERP0_HALL0 0101CMP2_VN
0000GPIOC2 0001SPI1_MOSI 0010PWMB1_CH2 0011PWMP1_BRAKE2 0100TIMERP0_IN1 0101TIMERP0_OUT_H
0000GPIOC1 0001SPI1_MISO 0010UART2_RTS 0011PWMB1_CH1 0100TIMERP0_IN0 0101TIMERP0_OUT_L
103 432
DP32G030
0000GPIOC0
0001SPI1_CLK
3:0
PORTC0 R/W 0
0010UART2_CTS
0011PWMB1_CH0
PORTA_IE 0x100
31:16
RESERVED
15:0
PORTA_IE
R
0
R/W 0x00
PORTA 0 1 bit 1 IObit0 A0,bit1 A1
PORTB_IE 0x104
31:16
RESERVED
15:0
PORTB_IE
R
0
PORTB R/W 0x4800 0 1
bit 1 IObit0 B0,bit1 B1
PORTC_IE 0x108
31:8
RESERVED
7:0
PORTC_IE
R
0
R/W 0x20
PORTC 0 1 bit 1 IObit0 C0,bit1 C1
104 432
PORTA_PU 0x200
DP32G030
31:16
RESERVED
15:0
PORTA_PU
R
0
R/W 0
PORTA 0 1 bit 1 IObit0 A0,bit1 A1
PORTB_PU 0x204
31:16
RESERVED
15:0
PORTB_PU
R
0
R/W 0
PORTB 0 1 bit 1 IObit0 B0,bit1 B1
PORTC_PU 0x208
31:8
RESERVED
7:0
PORTC_PU
R
0
R/W 0
PORTC 0 1 bit 1 IObit0 C0,bit1 C1
PORTA_PD 0x300
31:16
RESERVED
R
0
105 432
15:0
PORTA_PD
R/W 0
DP32G030
PORTA 0 1 bit 1 IObit0 A0,bit1 A1
PORTB_PD 0x304
31:16
RESERVED
15:0
PORTB_PD
R
0
R/W 0
PORTB 0 1 bit 1 IObit0 B0,bit1 B1
PORTC_PD 0x308
31:8
RESERVED
7:0
PORTC_PD
R
0
R/W 0x20
PORTC 0 1 bit 1 IObit0 C0,bit1 C1
PORTA_OD 0x400
31:16
RESERVED
15:0
PORTA_OD
R
0
R/W 0
PORTA 0 1 bit 1 IObit0 A0,bit1 A1
106 432
PORTB_OD 0x404
DP32G030
31:16
RESERVED
15:0
PORTB_OD
R
0
R/W 0
PORTB 0 1 bit 1 IObit0 B0,bit1 B1
PORTC_OD 0x408
31:8
RESERVED
7:0
PORTC_OD
R
0
R/W 0
PORTC 0 1 bit 1 IObit0 C0,bit1 C1
PORTA_WKE 0x500
31:16
15:0
RESERVED
PORTA_WKE
R
0
R/W 0
PORTA 0 1 bit 1 IObit0 A0,bit1 A1
PORTB_WKE 0x504
31:16
RESERVED
R
0
107 432
15:0
PORTB_WKE R/W 0
DP32G030
PORTB 0 1 bit 1 IObit0 B0,bit1 B1
PORTC_WKE 0x508
31:8
7:0
RESERVED
PORTC_WKE
R
0
R/W 0
PORTC 0 1 bit 1 IObit0 C0,bit1 C1
PORT_CFG 0x600
31:11 10 9:6 5:4
3:2
RESERVED PORT_HYS RESERVED PORTC_DS
PORTB_DS
R
0
R/W 0
R
0
PORT 0 0.7VDD 0.3VDD 1 0.85VDD 0.15VDD
R/W 0x01 R/W 0x01
PORTC 005mA 0110mA 1015mA 1120mA
PORTB 005mA 0110mA 1015mA 1120mA
108 432
DP32G030
PORTA
005mA
1:0
PORTA_DS R/W 0x01 0110mA
1015mA
1120mA
PORTA_WK_SEL 0x700
31:16
150
RESERVED
R
0
PORTA_WK_S R/W 0
EL
PORTA 0PORTA 1PORTA
PORTB_WK_SEL 0x704
31:16
150
RESERVED
R
0
PORTB_WK_S R/W 0
EL
PORTB 0PORTB 1PORTB
PORTC_WK_SEL 0x708
31:8
70
RESERVED
R
0
PORTC_WK_S R/W 0
EL
PORTC 0PORTC 1PORTC
109 432
5.8 IO(GPIO)
DP32G030
5.8.1
GPIO IO GPIO
5-21 GPIO
5.8.2
40 IO IO
110 432
IO
5.8.3
DP32G030
5-22 GPIO
GPIO gpin sync APB gpin INTRAWSTAUSINTRAWSTAUS gpiomis pclk SYSCON DEV_CLK_GATE
5.8.4
SWD GPIO DIR = 0 GPIO DIRx 0 GPIO
111 432
DP32G030
DATA GPIO 1 GPIO
DATA0 1 GPIO
5-23 GPIO
GPIO GPIO T1 gpiodata[x] 1GPIO gpout[x] T2 gpiodata[x] 0GPIO gpout[x] T3 gpiodata[x] 1GPIO gpout[x] GPIO gpout[x] gpiodata[x]
GPIO
GPIO INTLVLTRG
112 432
DP32G030
GPIO INTRISEEN GPIO INTBE
GPIO INTENGPIO INTRAWSTAUS GPIO RAWINTSTAUSINTEN 1 INTSTAUS NVIC 1 GPIO INTCLR 1
5-24 GPIO
Parameter
5-8 GPIO
INTRAWSTAUS min_PLUS
min >=1pclk
GPIO GPIO T1 gpin[x] INTSTAUS INTSTAUS [x] 1 INTSTAUS [x] T2 gpin[x]INTSTAUS INTSTAUS [x] 0 INTSTAUS [x]
113 432
DP32G030
INTSTAUS gpin min_PLUS pclk INTSTAUS GPIO 2
5-25 GPIO
5-9 GPIO
Parameter
INTRAWSTAUS min_PLUS
min >=1pclk
GPIO GPIO T1 gpin[x] INTSTAUS INTSTAUS [x] 1 INTSTAUS[x] T2 gpin[x]INTSTAUS INTSTAUS [x] 0 INTSTAUS[x]
INTSTAUS gpin min_PLUS pclk INTSTAUS GPIO
114 432
3
DP32G030
5-26 GPIO
5-10 GPIO
Parameter
min_PLUS INTSTAUS
min >=1pclk
GPIO GPIO edge1 gpin[x] edge1 2 pclk INTSTAUS[x] T1 T2 edge2 gpin[x] edge2 2 pclk edge2 INTSTAUS[x] T3
GPIO gpin min_PLUS pclk GPIO INTSTAUS T2 T2-2*Tpclk INTSTAUS T2
4
115 432
DP32G030
5-27 GPIO
5-11 GPIO
Parameter
min_PLUS INTSTAUS
min >=1pclk
GPIO GPIO edge1 gpin[x] edge1 2 pclk INTSTAUS[x] T1 T2 edge2 gpin[x] edge2 2 pclk edge2 INTSTAUS[x] T3
GPIO gpin min_PLUS pclk GPIO INTSTAUS T2 T2-2*Tpclk INTSTAUS T2
5
116 432
DP32G030
5-28 GPIO
GPIO GPIO edge1 gpin[x] edge1 2 pclk T1 INTSTAUS[x] T2 edge1 edge2 gpin[x] edge2 2 pclk T3 INTSTAUS[x] T4 edge2 edge3 gpin[x]GPIO INTSTAUS T2 edge1 T2-2*Tpclk INTSTAUS T2 edge2 T4 T4-2*Tpclk INTSTAUS T4
117 432
DP32G030
5-29 GPIO
GPIO PORT GPIO GPIODIR GPIODATA gpio
118 432
GPIODATA 0x00
DP32G030
31:GPIO_WIDTH RESERVED
GPIO_WIDTH
GPIODATA
RO 0
R/W 0
GPIODIR 0x04
31:GPIO_WIDTH
RESERVED
GPIO_WIDTH
GPIODIR
RO 0 R/W 0
GPIO 1 GPIO 0 GPIO
INTLVLTRG 0x08
31:GPIO_WIDTH
RESERVED
GPIO_WIDTH
INTLVLTRG
RO 0
R/W 0
GPIO 1 GPIO 0 GPIO
INTBE 0x0C
31:GPIO_WIDTH
RESERVED
RO 0
119 432
GPIO_WIDTH
INTBE
R/W 0
DP32G030
GPIO 1 GPIO
0 GPIO INTRISEEN /
INTRISEEN 0x10
31:GPIO_WIDTH
RESERVED
GPIO_WIDTH
INTRISEEN
RO 0
R/W 0
GPIO 1 GPIO /
0 GPIO /
INTEN 0x14
31:GPIO_WIDTH
RESERVED
GPIO_WIDTH
INTEN
RO 0
R/W 0
GPIO 1 GPIO 0 GPIO
INTRAWSTAUS 0x18
31:GPIO_WIDTH RESERVED
RO 0
120 432
GPIO_WIDTH
INTRAWSTAUS R
0
DP32G030
GPIO GPIOIC 1 1 GPIO
() 0 GPIO
INTSTAUS 0x1C
31:GPIO_WIDTH RESERVED
GPIO_WIDTH
INTSTAUS
RO 0
R
0
GPIO GPIOIC 1 1 GPIO
() 0 GPIO
INTCLR 0x20
31:GPIO_WIDTH
GPIO_WIDTH
RESERVED RO 0 INTCLR W 0
1 GPIO INTRAWSTAUS INTSTAUS INTCLR 0
0 0
121 432
5.9 TIMERBASE
DP32G030
5.9.1
16
5-30 TIMERBASE
5.9.2
2 16bit HIGHLOW
16bit
122 432
5.9.3
DP32G030
5-31 TIMERBASE
16bit 1-65536 TIMERBASE_DIV HIGH_LOAD/LOW_LOAD timer_goal timer_int
123 432
5.9.4
DP32G030
5-32 TIMERBASE
T0 T1 T2 pclk SYSCON DEV_CLK_GATE
124 432
DP32G030
5-33 TIMERBASE
T0 T1 T2
125 432
DP32G030
5-34 TIMERBASE
TIMERBASE_DIV 01 prediv
16 Sys Tout Tout = (Tpre + 1)*(Tload + 1)/Sys Tpre Tload 16 16 Sys
126 432
DP32G030
TIMERBASE 2
5-35 TIMERBASE
127 432
DP32G030
5-36 TIMERBASE
TIMERBASE_DIV1-65536, 128 432
DP32G030
HIGH_LOAD LOW_LOAD16bit 16 16
TIMERBASE_IE TIMERBASE_EN 0 0
TIMERBASE_IF
1 HIGH_CNT LOW_CNT
TIMERBASE0 TIMERBASE1 TIMERBASE_EN TIMERBASE_DIV TIMERBASE_IE TIMERBASE_IF HIGH_LOAD HIGH_CNT LOW_LOAD LOW_CNT
BASE: 0x40064000 BASE: 0x40064800
0x00
32 R/W
0x04
32 R/W
0x10
32 R/W
0x14
32 R/W
0x20
32 R/W
0x24
32 R
0x30
32 R/W
0x34
32 R
0x00 0x00 0x00 0x00 0xffff 0x00 0xffff 0x00
TIMER TIMER TIMER TIMER TIMER HIGH TIMER HIGH TIMER LOW TIMER LOW
129 432
DP32G030
TIMERBASE_EN 0x00
31:2 RESERVED
1
HIGH_EN
0
LOW_EN
R R/W R/W
0 0
TIMERBASE HIGH
0
TIMERBASE LOW
TIMERBASE_DIV 0x04
31:16 RESERVED
15:0 DIV
R
R/W
0
TIMERBASE
0x0000 1
0
0x0001 2
......
0xFFFF 65536
TIMERBASE_IE 0x10
31:2 RESERVED
1
HIGH_IE
0
LOW_IE
R
0
R/W 0
TIMERBASE HIGH
R/W 0
TIMERBASE LOW
130 432
DP32G030
TIMERBASE_IF 0x14
31:2 RESERVED
1
HIGH_IF
0
LOW_IF
R
0
R/W 0 R/W 0
TIMERBASE HIGH 1
TIMERBASE LOW 1
HIGH_LOAD 0x20
31:16 RESERVED
15:0 HIGH_LOAD
R
0
R/W 0xffff
TIMERBASE HIGH 16bit
HIGH_CNT 0x24
31:16 RESERVED 15:0 HIGH_CNT
R
0
R
0
TIMERBASE HIGH
LOW_LOAD 0x30
131 432
31:16 RESERVED 15:0 LOW_LOAD
R
0
R/W 0xffff
DP32G030
TIMERBASE LOW 16bit
LOW_CNT 0x34
31:16 RESERVED 15:0 LOW_CNT
R
0
R
0
TIMERBASE LOW
132 432
5.10 TIMERPLUS
DP32G030
5.10.1
16 2 16 HIGH LOW 16 HALL
5-37 TIMERPLUS
TIMERPLUS APB CPU DMA PAD TIMERPLUS PAD timer_incntsrc_inhall_in
133 432
5.10.2
DP32G030
2 16bit HIGH LOW 16bit LOW HALL DMA
134 432
5.10.3
DP32G030
135 432
DP32G030
5-38 TIMERPLUS
136 432
DP32G030
TIMERPLUS 16bit cntsrc pclk TIMERPLUS_PREDIV PCLK_PREDIV 1-65536 cntsrc PAD pclk SYSCON DEV_CLK_GATE
HALL TIMERPLUS_CTR
TIMERPLUS_IE
DMA DMA 1 DMA CPU
timer_goal[1:0] SARADC
5.10.4
cntsrc0 cntsrc1 PAD timer_in PAD IO PAD timer_in PAD cntsrc0 cntsrc1
137 432
DP32G030
5-39 TIMERPLUS
pclk PCLK_PREDIV pclk 1-65536 cntsrc0 cntsrc1 pclk
5-40 TIMERPLUS pclk
cntsrc[0] cntsrc[1]
138 432
DP32G030
16 pclk Tout
Tout = (Tpre + 1)*(Tload + 1)/pclk Tpre Tload 16 16 pclk
5-41 TIMERPLUS
count_clk goal CPU goal_shadow count PLUS_out timer_to T0 T1 T1 0 T2 T1T2 TIMERPLUS_CTR HIGH_PO_MDLOW_PO_MD
139 432
DP32G030
bit PAD PAD
timer_in[0] timer_in[1] pclk
5-42 TIMERPLUS
pclk timer_in count timer_pr timer_in T0 timer_in T1 T2 T3
140 432
DP32G030
5-43 TIMERPLUS
pclk timer_in count timer_pf timer_in T0 timer_in T1 T2 T3
141 432
DP32G030
5-44 TIMERPLUS
pclk timer_in count timer_pr timer_in timer_pf timer_in T0T1T2T3
cntsrc[0] cntsrc[1] timer_in[0] timer_in[1] cval
5-45 TIMERPLUS
142 432
DP32G030
count_clk timer_in count timer_pr timer_in cval T0 timer_in T1 CVALT2 timer_in T3 CVAL
5-46 TIMERPLUS
count_clk timer_in count timer_pf timer_in cval T0 timer_in T1 cval T2 timer_in T3 cval
143 432
DP32G030
5-47 TIMERPLUS
count_clk timer_in count timer_pr timer_in timer_pf timer_in cval cval T0T1T2T3
HALL
LOW HALL cntsrc[0] cntsrc[1] hall_in[0] hall_in[1] hall_in[2] cval LOW
144 432
DP32G030
5-48 TIMERPLUS HALL
hall0hall1 hall2 HALL count hall0_rhall1_r hall2_r HALL hall0_fhall1_f hall0_f HALL low_cval timer_ie timer_int low_cval HALL T1-T7
145 432
TIMERPLUS 12
DP32G030
5-49 TIMERPLUS
146 432
DP32G030
147 432
DP32G030
5-50 TIMERPLUS
148 432
TIMER PLUS
DP32G030
PORT TIMER PLUS
pclk
149 432
DP32G030
150 432
DP32G030
5-51 TIMERPLUS
151 432
TIMERPLUS PORT TIMERPLUS
DP32G030
152 432
DP32G030
153 432
DP32G030
5-52 TIMERPLUS
154 432
DP32G030
TIMER PLUS PORT TIMER PLUS pclk
155 432
HALL
DP32G030
156 432
DP32G030
5-53 TIMERPLUS HALL
157 432
DP32G030
TIMER PLUS PORT TIMER PLUS 16 HALL pclk
TIMERPLUS0 TIMERPLUS1
BASE: 0x40067000 BASE: 0x40067800
TIMERPLUS_EN 0x00 32 R/W 0x00
TIMERPLUS
TIMERPLUS_DIV 0x04 32 R/W 0x00
TIMERPLUS
TIMERPLUS_CTR 0x08 32 R/W 0x600060 TIMERPLUS
TIMERPLUS_IE 0x10 32 R/W 0x00
TIMERPLUS
TIMERPLUS_IF 0x14 32 R/W 0x00
TIMERPLUS
HIGH_GOAL
0x20 32 R/W 0xffff
TIMERPLUS HIGH
HIGH_CNT
0x24 32 R
0x00
TIMERPLUS HIGH
HIGH_CVAL
0x28 32 R
0x00
TIMERPLUS HIGH
LOW_GOAL
0x30 32 R/W 0xffff
TIMERPLUS LOW
LOW_CNT
0x34 32 R
0x00
TIMERPLUS LOW
LOW_CVAL
0x38 32 R
0x00
TIMERPLUS HIGH
HALL_VAL
0x40 32
R
0x00
HALL
158 432
DP32G030
TIMERPLUS_EN 0x00
31:2 RESERVED
R
0
TIMERPLUS_HI
1
R/W 0
GH_EN
TIMERPLUS_LO
0
R/W 0
W_EN
TIMERPLUS 16bit 0 1 TIMERPLUS 16bit 0 1
TIMERPLUS_DIV 0x04
31:16
15:0
RESERVED
R
0
TIMERPLUS_ R/W 0
DIV
TIMERPLUS 0x0000 1 0x0001 2 ...... 0xFFFF 65536
TIMERPLUS_CTR 0x08
31:25 RESERVED
R
0
159 432
24 HIGH_DMA_EN R/W 0
23 HIGH_PO_MD
R/W 0
22:21 HIGH_EXT_EDGE R/W 0x3
20 HIGH_EXT_SEL
R/W 0
19:18 HIGH_CLKSEL
R/W 0
17:16 HIGH_MODE
R/W 0
15:9 RESERVED
R
0
8
LOW_DMA_EN
R/W 0
7
LOW_PO_MD
R/W 0
DP32G030
DMA TIMER HIGH 0CPU 1DMA
TIMER HIGH 0 1
TIMER HIGH 00 01 10 11
TIMER HIGH 0timer_in0 1timer_in1
TIMER HIGH 00PCLK/PREDIV pclk 01CNTSRC0 10CNTSRC1 11
TIMER HIGH 00 01 pclk 10 11
DMA TIMER LOW 0CPU 1DMA
TIMER LOW 0 1
160 432
6:5 LOW_EXT_EDGE R/W 0x3
4
LOW_EXT_SEL
R/W 0
3:2 LOW_CLKSEL
R/W 0
1:0 LOW_MODE
R/W 0
DP32G030
TIMER LOW 00 01 10 11
TIMER LOW 0timer_in0 1timer_in1
TIMER LOW 00PCLK/PREDIV pclk 01CNTSRC0 10CNTSRC1 11
TIMER LOW 00 01 pclk 10 11HALL
TIMERPLUS_IE 0x10
31:22 RESERVED 21 HALL2_F_IE 20 HALL2_R_IE 19 HALL1_F_IE 18 HALL1_R_IE 17 HALL0_F_IE
R
0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
HALL2 HALL2 HALL1 HALL1 HALL0
161 432
16 HALL0_R_IE
15:11 RESERVED
10 HIGH_PF_IE
9
HIGH _PR_IE
8
HIGH _TO_IE
7:3 RESERVED
2
LOW_PF_IE
1
LOW _PR_IE
0
LOW _TO_IE
R/W 0
R
0
R/W 0
R/W 0
R/W 0
R
0
R/W 0
R/W 0
R/W 0
DP32G030
HALL0 TIMERPLUS HIGH TIMERPLUS HIGH TIMERPLUS HIGH TIMERPLUS LOW TIMERPLUS LOW TIMERPLUS LOW
TIMERPLUS_IF 0x14
31:22 RESERVED 21 HALL2_F_IF 20 HALL2_R_ IF 19 HALL1_F_ IF 18 HALL1_R_ IF 17 HALL0_F_ IF 16 HALL0_R_ IF 15:11 RESERVED
R R/W R/W R/W R/W R/W R/W R
0 0 0 0 0 0 0 0
HALL2 1 HALL2 1 HALL1 1 HALL1 1 HALL0 1 HALL0 1
162 432
10 HIGH _PF_ IF
9
HIGH _PR_ IF
8
HIGH _TO_ IF
7:3 RESERVED
2
LOW _PF_ IF
1
LOW _PR_ IF
0
LOW _TO_ IF
R/W
0
R/W
0
R/W
0
R
0
R/W
0
R/W
0
R/W
0
DP32G030
TIMERPLUS HIGH 1 TIMERPLUS HIGH 1 TIMERPLUS HIGH 1
TIMERPLUS LOW 1 TIMERPLUS LOW 1 TIMERPLUS LOW 1
TIMERPLUS_HIGH_LOAD 0x20
31:16 RESERVED
15:0 HIGH_LOAD
R
0
R/W 0xffff
TIMERPLUS HIGH 16bit
HIGH HIGH _TO_ IF timer_goal[1]
TIMERPLUS_HIGH _CNT 0x24
31:16 RESERVED 15:0 HIGH_CNT
R
0
R
0
TIMERPLUS HIGH
163 432
TIMERPLUS_HIGH _CVAL 0x28
DP32G030
31:16 RESERVED 15:0 HIGH_CVAL
R
0
R
0
TIMERPLUS HIGH
TIMERPLUS_LOW_LOAD 0x30
31:16 RESERVED
15:0 LOW_LOAD
R
0
R/W 0xffff
TIMERPLUS LOW 16bit
LOW LOW_TO_ IF timer_goal[0]
TIMERPLUS_ LOW _CNT 0x34
31:16 RESERVED 15:0 LOW _CNT
R
0
R
0
TIMERPLUS LOW
TIMERPLUS_ LOW _CVAL 0x38
31:16 RESERVED 15:0 LOW _CVAL
R
0
R
0
TIMERPLUS LOW
164 432
HALL_VAL 0x40
DP32G030
31:3 RESERVED
2
HALL2_VAL
1
HALL1_VAL
0
HALL0_VAL
R
0
R
0
HALL2
R
0
HALL1
R
0
HALL0
5.11 IWDT
5.11.1
IWDT IWDT
165 432
DP32G030
5-54 IWDT
5.11.2
32
Watchdog
166 432
5.11.3
DP32G030
5-55 IWDT
32bit IWDTLOAD IWDTEN 0 iwdt_int 0 IWDTControl RSTEN 1 RSTEN 0
5.11.4
167 432
DP32G030
5-56 IWDT
IWDT 32BIT IWDTCNT IWDTEN IWDTCNT IWDTLOAD IWDTCNT 0 IWDT WDT_IF
IWDTCNT 0
0 RSTEN IWDTCNT 0 IWDT 1
5-57 IWDT
168 432
DP32G030
IWDTCNT 0 IWDTLOAD T1T2T3 T3 IWDTCNT T4T5 RSTEN IWDTRSTT5
2
5-58 IWDT
IWDTCNT 0 IWDTLOAD T1T2 T2 IWDTCNT T3 T4 RSTEN IWDTRSTT4
169 432
DP32G030
5-59 IWDT
170 432
DP32G030
IWDT IWDTLOAD RSTEN IWDTEN IWDTValue 0
IWDT IWDT_LOAD IWDT_CTRL IWDT_IF IWDT_FEED
BASE: 0x4006A000
0x00 32
R/W
0x08 32
R/W
0x0C 32
R/W
0x10 32
R/W
0xfffff 0x00 0x00 0x00
IWDT IWDT IWDT IWDT
IWDT_LOAD 0x00
31:20 RESERVED
19:0 IWDTLOAD
RO 0
R/W 0xfffff
IWDT IWDT IWDTLOAD 0 IWDTLOAD
0 0 IWDTEN
171 432
IWDT_CTRL 0x08
DP32G030
31:2 RESERVED
1
INTEN
0
IWDTEN
RO 0
R/W 0 R/W 0
IWDT 1 0
IWDT 1 IWDT 0
IWDT_IF 0x0C
31:1 RESERVED
0
IWDT_IF
RO 0
R/W 0
IWDT 0 1
IWDT_FEED 0x10
31:8 RESERVED
7:0 FEED
RO 0 R/W 0
IWDT 0x55 IWDT
172 432
5.12 WWDT
DP32G030
5.12.1
WWDT WWDT
5-60 WWDT
5.12.2
4096
7
173 432
5.12.3
DP32G030
5-61 WWDT
WWDT 7 PCLK CLKDIV WWDTEN 1 0x7f
INT_LOAD WWDT WININT INTEN wwdt_int
RST_LOAD-1 WWDT PRERSTINT PRERSTINTEN wwdt_int
RST_LOAD wwdt_rst_n WWDTFEED 0x55 0x7f
174 432
5.12.4 WWDT
DP32G030
5-62 WWDT
WWDTCNT INT_LOAD T0 WININT WWDTCNT RST_LOAD-1 T1 PRERSTINT WWDTCNT RST_LOAD T2 WWDT_RST_N WWDT 0 T0 T0 T2 WWDTCNT
175 432
WWDT
DP32G030
5-63 WWDT
WWDTCNT INT_LOAD T0 WININT WWDTCNT FeedValue0 T1
WWDTCNT INT_LOAD T2 WININT WWDTCNT RST_LOAD-1 T3 PRERSTINT WWDTCNT FeedValue1 T4
WWDTCNT INT_LOAD T5 WININT WWDTCNT RST_LOAD-1 T6 PRERSTINT WWDTCNT RST_LOAD T7 WWDT_RST_N
176 432
DP32G030
WWDT WWDT_LOAD WWDT_VALUE WWDT_CTRL WWDT_IF WWDT_FEED
BASE: 0x4006A800
0x00
32
0x04
32
0x08
32
0x0C
32
0x10
32
R/W R/W R/W R/W R/W
0x40 0x7f 0x00 0x00 0x00
WWDT WWDT WWDT WWDT WWDT
WWDT_LOAD 0x00
31:14 RESERVED
13:8 RST_LOAD
7
RESERVED
6:0 INT_LOAD
RO R/W RO
R/W
0
0x0
1
2 1
0
1 0x40 2
WWDT_VALUE 0x04
31:7 RESERVED
RO 0
177 432
6:0 VALUE
DP32G030
0x7f
R
0x7f
WWDT_CTRL 0x08
31:5 RESERVED
4
PRERSTINTEN
3
INTEN
2:1 CLKDIV
0
EN
RO 0
R/W 0 R/W 0 R/W 0 R/W 0
1 0
1 0
00 1 01 2 10 4 11 8 4096 WWDT 1 WWDT 0
WWDT_IF 0x0C
31:2 RESERVED
1
PRERSTINT
0
WININT
RO 0
R/W 0 R/W 0
VALUE = RST_LOAD + 1 1
VALUE = INT_LOAD 1
178 432
WWDT_FEED 0x10
DP32G030
31:8 RESERVED
7:0 FEED
RO 0
W
0
WWDT 0x55 WWDT INT_LOAD >VALUE > RST_LOAD
179 432
DP32G030
5.13 PWMBASE 5.13.1
PWMBASE PWMBASE 3 CH0CH1 CH2 PWMBASE PWMBASE PWMNASE APB CPU PWM PAD
5-64 PWMBASE
5.13.2
3 16bit PWM PWM 8bit
180 432
5.13.3
DP32G030
181 432
DP32G030
182 432
5-65 PWMBASE
DP32G030
PWMBASE pclk 8bit div period counter_en PWM_CNT 0 1 0 PWMBASE PWMBASE chx_out_inv chx_out_inv 1 chx_out_inv 0 chx_oe chx_oe 1 PWMBASE chx_oe 0 PWMBASE
chx_oe 1
5.13.4
chx_oe 1 PWMBASE_PERIOD PWM_CHX_COMP 7 0 1 PWM 8 25%PERIOD=0x07
CHx_COMP=0x02 2 PWM 8 87.5%PERIOD =0x07
CHx_COMP=0x07 3 PWM 8 100%PERIOD =0x07
CHx_COMP=0x08 7 183 432
DP32G030
4 PWM 8 0%PERIOD =0x07 CHx_COMP=0x00
5-66 PWMBASE
8bit pwmbase_div
1-256 3 6 12 6
5-67 PWMBASE 1
184 432
DP32G030
5-68 PWMBASE 2
5-69 PWMBASE 6
5-70 PWMBASE
PWMBASE chx chx_oe pwm_outx pwm T0 pwm 0 T0 chx_oe 1 pwm
185 432
DP32G030
0 T1 PAD PAD pwm_outx
5-71 PWMBASE
chx_out_inv 0 T0-T2 pwm T2 chx_out_inv 1 pwm T4 chx_out_inv 0 pwm
186 432
DP32G030
5-72 PWMBASE
T0 chx_oe 1 pwm_ie 0x000f T1 chx_comp_if 1 0 1 T2 T3 pwm_ie 0x0000 T4 T5 T6 chx_oe 0 T7T8
187 432
DP32G030
5-73 PWMBASE
PWMBASE PORT PWMBASE PWMBASE_DIV PWMBASE_CON PWMBASE_INT_EN
188 432
DP32G030
PWMBASEx_PERIODPWMBASEx_CHx_COMP PWMBASE PWMBASE_CON PWMBASE PWMBASE_EN PWMBASE
PWMBASE0 PWMBASE1
BASE: 0x400B1000 BASE: 0x400B1800
PWMBASE_EN
0x00
32 R/W
PWMBASE_DIV
0x04
32 R/W
PWMBASE_CON
0x08
32 R/W
PWMBASE_PERIOD
0x0C
32 R/W
PWMBASE_IE
0x10
32 R/W
PWMBASE_IF
0x14
32 R/W
PWMBASE_CNT
0x18
32 R/W
PWMBASE_CH0_COMP 0x20
32 R/W
PWMBASE_CH1_COMP 0x30
32 R/W
PWMBASE_CH2_COMP 0x40
32 R/W
0x00 0x00 0x00 0x00 0x00 0x00 0xffff 0x00 0x00 0x00
PWMBASE PWMBASE PWMBASE PWMBASE PWMBASE PWMBASE PWMBASE PWMBASE 0 PWMBASE 1 PWMBASE 2
PWMBASE_EN 0x00
31:1
RESERVED
R
0
189 432
DP32G030
PWMBASE
1
CH0/CH1/CH2
0
COUNTER_EN R/W 0
PWM
0 0
PWMBASE_DIV 0x04
31:16 RESERVED
R
15:0 PWMBASE_DIV R/W
0
PWMBASE 0x0000 1 0x0001 2 0 0x0002 3 ...... 0xFFFF 65536
PWMBASE_CON 0x08
31:7 RESERVED
6
CH2_OE
5
CH1_OE
4
CH0_OE
3
RESERVED
R
0
R/W 0 R/W 0 R/W 0
CH2 0 1 CH2
CH1 0 1 CH1
CH0 0 1 CH0
RO 0
190 432
DP32G030
CH2
2
CH2_OUT_INV R/W 0
0CH2
1CH2
CH1
1
CH1_OUT_INV R/W 0
0CH1
1CH1
CH0
0
CH0_OUT_INV R/W 0
0CH0
1CH0
PWMBASE_PERIOD 0x0C
31:16 RESERVED
R
0
15:0 PWMx_PERIOD R/W 0
PWMx 1 0 0 199 PWM 200
PWMBASE_INTEN 0x10
31:4 RESERVED
3
POF_IE
2
CH2_COMP_IE
1
CH1_COMP_IE
0
CH0_COMP_IE
R R/W R/W R/W R/W
0
0
0
CH2
0
CH1
0
CH0
191 432
PWMBASE_IF 0x14
DP32G030
31:4 3 2
1 0
RESERVED POF_IF CH2_COMP_IF
CH1_COMP_IF CH0_COMP_IF
R
0
R/W 0 R/W 0 R/W 0 R/W 0
1
CH2 1 CH1 1 CH0 1
PWMBASE_CNT 0x18
31:16 RESERVED 15:0 PWMBASE_CNT
R
0
R
0xffff PWMBASE
PWMBASE_CH0_COMP 0x20
31:16 RESERVED
15:0 CH1_COMP
R
0
R/W 0
CH0 1 0
PWMBASE_CH1_COMP 0x30
31:16 RESERVED
R
0
192 432
15:0 CH1_COMP
R/W 0
DP32G030
CH1 1 0
PWMBASE_CH2_COMP 0x40
31:16 RESERVED
15:0 CH2_COMP
R
0
R/W 0
CH2 1 0
193 432
DP32G030
5.14 PWMPLUS 5.14.1
PWMPLUS PWM PWMPLUS PWMPLUS PWMPLUS
5-74 PWMPLUS
5.14.2
3 16bit PWM CH0/CH1/CH2 PWM
16bit timer 194 432
DP32G030
PWM CH0/CH0NCH1/CH1NCH2/CH2N
PWM
5.14.3
195 432
DP32G030
196 432
5-75 PWMPLUS
DP32G030
PWMPLUS pclk brakein extPLUS timer tmPLUS pclk extPLUStmPLUS PWMPLUS pwmplus_int pwmplus_trigger pwmplus_out
pclk extPLUS timer tmPLUS pwmplus_clksrc pclk 1-256 extPLUS pwmplus pwmplus_cfg
chx_oe 1 PAD chx_oe 0 PAD counter_en 0 pwm idle idle pwmplus_gen 1 0 counter_en 1 pwm PWMPLUS pwmplus_cfg 1 0 TRIGGER
pwmplus_ie 1 pwmplus_ie 0 pwmplus_trig_cfg
TRIGGER auto_reload (auto_reload+1 ) pwmplus load pwm_period
197 432
DP32G030
pwm_ch0_comppwm_ch1_comppwm_ch2_comppwm_ch0_dtpwm_ch1_dtpwm_ch2_dt trig_comp 8 1 8 load
5.14.4
PWM
chxchxnchx_invchxn_inv chx chx_outinv 0 chx pwmplus chx_inv chx_outinv 1 chx pwmplus chxn chxn_inv
1start=0
198 432
DP32G030
5-76 PWMPLUS 0
counter_en T1 pwmplus IDLE T0 IDLE pwmplus IDLE T1 pwmplus T2 T3 2start=1
199 432
DP32G030
5-77 PWMPLUS 1
3start=0
200 432
DP32G030
5-78 PWMPLUS 0
"C-1" "P" 4start=1
5-79 PWMPLUS 1
"C-1" "P"
chxchxnchx_invchxn_inv chx chx_outinv 0 chx pwm chx_inv chx_outinv 1 chx pwmplus chxn chxn_inv 1 start=0
201 432
DP32G030
5-80 PWMPLUS 0
2 start=1
5-81 PWMPLUS 1
202 432
3 start=0
DP32G030
5-82 PWMPLUS 0
4 start=1
5-83 PWMPLUS 1
chxchxnchx_invchxn_inv chx
203 432
DP32G030
chx_outinv 0 chx pwmplus chx_inv chx_outinv 1 chx pwmplus chxn chxn_inv 1start=0
5-84 PWMPLUS 0
pwmplus p 2start=1
204 432
DP32G030
5-85 PWMPLUS 1
3start=0
5-86 PWMPLUS 0
"C" "P""0"
205 432
4start=1
DP32G030
5-87 PWMPLUS 0
"C" "P""0"
chxchxnchx_invchxn_inv chx chx_outinv 0 chx pwmplus chx_inv chx_outinv 1 chx pwmplus chxn chxn_inv
1 start=0
206 432
DP32G030
5-88 PWMPLUS 0
2 start=1
5-89 PWMPLUS 1
3 start=0 207 432
DP32G030
5-90 PWMPLUS 0
4 start=1
5-91 PWMPLUS 1
PWMPLUS
( )
208 432
DP32G030
5-92 PWMPLUS
PWMPLUS chxn chx T2-T3 T4-T5 CHx_DT CHx_START CHx_COMP
5-93 PWMPLUS
PWMPLUS 0 T3-T4
209 432
DP32G030
5-94 PWMPLUS
PWMPLUS 0 T2-T3
0 1
5-95 PWMPLUS
T0 T1 T2 T3
210 432
2
DP32G030
5-96 PWMPLUS
T0 T1 T2
24 8 BRAKE_FILTER MASK
MASK MASK MASK
MASK MASK 0 1
5-97 PWMPLUS MASK
T0 T1
211 432
2
DP32G030
5-98 PWMPLUS MASK
T0 T1
IDLE 0 PWMPLUS 8 0 75% PERIOD=0x7CHx_COMP=0x2 PWMPLUS 8 0 12.5% PERIOD=0x7CHx_COMP=0x7 PWMPLUS 8 0 0% PERIOD=0x7CHx_COMP=0x8 7 PWMPLUS 8 0 100% PERIOD=0x7CHx_COMP=0x0 PWMPLUS 8 1 25% PERIOD=0x7CHx_COMP=0x2 PWMPLUS 8 1 87.5% PERIOD=0x7CHx_COMP=0x7 PWMPLUS 8 1 100% PERIOD=0x7CHx_COMP=0x8 7 PWMPLUS 8 1 0% PERIOD=0x7CHx_COMP=0x0
212 432
7 1
DP32G030
5-99 PWMPLUS 0
5-100 PWMPLUS 1
2
213 432
DP32G030
5-101 PWMPLUS 0
5-102 PWMPLUS 1
3 214 432
DP32G030
5-103 PWMPLUS 0
5-104 PWMPLUS 1
4 215 432
DP32G030
5-105 PWMPLUS 0
5-106 PWMPLUS 1
PWM
216 432
DP32G030
5-107 PWMPLUS
1 pclk PWM 0
1
5-108 PWMPLUS
brake_ie ch_brake bit bit
217 432
DP32G030
1 T0 ch_brake T1
2
5-109 PWMPLUS
T0 T1 PWM T3 T5 PWMPLUS_TRIG_CFG trigger trigger
218 432
DP32G030
trigger T2T4T5 bit bit pwm_trigger 4
PWMPLUS AUTO_RELOAD TRIGGER AUTO_RELOAD+1
PWMPLUS PWM_PERIODPWM_CH0_COMP PWM_CH1_COMPPWM_CH2_COMPPWM_CH0_DTPWM_CH1_DTPWM_CH2_DT TRIG_COMP 8 LOAD SWLOAD 1 8 load
219 432
DP32G030
5-110 PWMPLUS
PWMPLUS PORT PWMPLUS
220 432
DP32G030
IDLE PWMPLUS PAD IDLE
PWMPLUS_CFG 0x00
31:16 RESERVED
15:8 AUTO_RELOAD
7:4 RESERVED
3
OUT_MODE
2
CNT_REP
R
0
R/W 0
TRIGGER
AUTO_RELOAD+1
R
0
R/W 0 R/W 0
PWM 0 1
PWM 0 1
221 432
DP32G030
1
CNT_TYPE
R/W 0
PWM 0 1
0
COUNTER_EN
R/W 0
1 CH0/CH1/CH2 PWM
IDLE
CH0CH1 CH2
PWMPLUS_GEN 0x04
31:30 RESERVED
29
CH2N_OE
28
CH2_OE
27
CH1N_OE
26
CH1_OE
R
0
R/W 0 R/W 0 R/W 0 R/W 0
CH2N 0 1 CH2N
CH2 0 1 CH2
CH1N 0 1 CH1N
CH1 0 1 CH1
222 432
25
CH0N_OE
R/W 0
24
CH0_OE
R/W 0
23:22 RESERVED
R
0
21
CH2N_OUTINV
R/W 0
20
CH2_OUTINV
R/W 0
19
CH1N_OUTINV
R/W 0
18
CH1_OUTINV
R/W 0
17
CH0N_OUTINV
R/W 0
16
CH0_OUTINV
R/W 0
15:11 RESERVED
R
0
10
CH2_START
R/W 0
DP32G030
CH0N 0 1 CH0N CH0 0 1 CH0
CH2N 0 1 CH2 0 1 CH1N 0 1 CH1 0 1 CH0N 0 1 CH0 0 1
CH2 0 CH2 0 1 CH2 1 CH2N CH2
223 432
9
CH1_START
8
CH0_START
7:6 RESERVED
5
CH2N_IDLE
4
CH2_IDLE
3
CH1N_IDLE
2
CH1_IDLE
1
CH0N_IDLE
0
CH0_IDLE
R/W 0
R/W 0
R
0
R/W 1
R/W 0
R/W 1
R/W 0
R/W 1
R/W 0
DP32G030
CH1 0 CH1 0 1 CH1 1 CH1N CH1 CH0 0 CH0 0 1 CH0 1 CH0N CH0
CH2N 0 CH2N 0 1 CH2N 1 CH1 0 CH1 0 1 CH1 1 CH1N 0 CH1N 0 1 CH1N 1 CH1 0 CH1 0 1 CH1 1 CH0N 0 CH0N 0 1 CH0N 1 CH0 0 CH0 0 1 CH0 1
PWMPLUS_CLKSRC 0x08
224 432
31:16 PREDIV
R/W 0
15:6 RESERVED
R
0
EXTPLUS1_EDGE
5
R/W 0
EXTPLUS0_EDGE
4
R/W 0
3
RESERVED
R
0
2:0 CNT_SRC
R/W 0
DP32G030
pclk 0x0000 pclk 1 0x0001 pclk 2 0x0002 pclk 3 ...... 0xFFFF pclk 65536
ExtPLUS1 0 1
ExtPLUS0 0 1
PWM 000 001 extPLUS[0] 010 extPLUS[1] 011 tmPLUS[0] 100 tmPLUS[1] 101 tmPLUS[2] 110 tmPLUS[3] 111
PWMPLUS_BRAKE_CFG 0x0c
31:26 RESERVED
R
0
225 432
25:24 BRAKE_FILTER
R/W 0
23:22 RESERVED
R
0
21 BRAKE_CH2NPOL R/W 0
20 BRAKE_CH2POL
R/W 0
19 BRAKE_CH1NPOL R/W 0
18 BRAKE_CH1POL
R/W 0
17 BRAKE_CH0NPOL R/W 0
16 BRAKE_CH0POL
R/W 0
15 RESERVED
R
0
14:12 BRAKE_LEV
R/W 0
11:9 RESERVED
R
0
DP32G030
00 01 2 10 4 11 8
CH2N 0 0 1 1 CH2 0 0 1 1 CH1N 0 0 1 1 CH1 0 0 1 1 CH0N 0 0 1 1 CH0 0 0 1 1
BRAKE_LEV Bit2 brakein[2]Bit1 brakein[1]Bit0 brakein[0] 0 1
226 432
DP32G030
8:6 CH2_BRAKE 5:3 CH1_BRAKE 2:0 CH0_BRAKE
R/W 0 R/W 0 R/W 0
CH2/CH2N CH2_BRAKE Bit2 brakein[2]Bit1 brakein[1]Bit0 brakein[0] 0 1
CH1/CH1N CH1_BRAKE Bit2 brakein[2]Bit1 brakein[1]Bit0 brakein[0] 0 1
CH0/CH0N CH0_BRAKE Bit2 brakein[2]Bit1 brakein[1]Bit0 brakein[0] 0 1
PWMPLUS_MASK_LEV 0x10
31:6 RESERVED
5
CH2N_MASK_LEV
4
CH2_MASK_LEV
3
CH1N_MASK_LEV
R R/W
R/W
R/W
0
CH2N
0
0 0
1 1
CH2
0
0 0
1 1
CH1N
0
0 0
1 1
227 432
2
CH1_MASK_LEV
R/W 0
1
CH0N_MASK_LEV
R/W 0
0
CH0_MASK_LEV
R/W 0
DP32G030
CH1 0 0 1 1 CH0N 0 0 1 1 CH0 0 0 1 1
PWMPLUS_PERIOD 0x1C
31:16 RESERVED
15:0 PERIOD
RO 0
R/W 0xffff
PWMPLUS 1 0 0 199 PWM 200 1 1 2
PWMPLUS_CH0_COMP 0x20
31:16 RESERVED
15:0 CH0_COMP
R
0
R/W 0
CH0/CH0N start[0] start[0]
228 432
PWMPLUS_CH1_COMP 0x24
DP32G030
31:16 RESERVED
15:0 CH1_COMP
R
0
R/W 0
CH1/CH1N start[1] start[1]
PWMPLUS_CH2_COMP 0x28
31:16 RESERVED
15:0 CH2_COMP
R
0
R/W 0
CH2/CH2N start[2] start[2]
PWMPLUS_CH0_DT 0x30
31:10 RESERVED
9:0 CH0_DT
R
0
R/W 0
CH0/CH0N 0 0 1 1 2 2 1CH0_START CH0_COMP
229 432
PWMPLUS_CH1_DT 0x34
DP32G030
31:10 RESERVED
9:0 CH1_DT
R
0
R/W 0
CH1/CH1N 0 0 1 1 2 2 1CH1_START CH1_COMP
PWMPLUS_CH2_DT 0x38
31:10 RESERVED
9:0 CH2_DT
R
0
R/W 0
CH2/CH2N
0 0 1 1 2 2
1CH2_START CH2_COMP
PWMPLUS_TRIG_COMP 0x40
31:16 RESERVED 15:0 TRIG_COMP
R
0
R/W 0
230 432
PWMPLUS_TRIG_CFG 0x44
DP32G030
31:4 RESERVED
3:0 TIRGOUT_L_SEL
R
0
R/W 0
trigger0 0000 0001 0010 0011 0100CH0 0101CH0 0110CH0 0111CH1 1000CH1 1001CH1 1010CH2 1011CH2 1100CH2 1101 1110 1111
PWMPLUS_IE 0x60
31:20 RESERVED
19
AUTORELOAD_IE
18
BRAK2_IE
17
BRAK1_IE
R
0
R/W 0
R/W 0
2
R/W 0
1
231 432
16
BRAK0_IE
15:13 RESERVED
R/W 0
R
0
12
DOWN_TRIG_IE
R/W 0
11
DOWN_POF_IE
R/W 0
10
DOWN_CH2COMP_IE R/W 0
9
DOWN_CH1COMP_IE R/W 0
8
DOWN_CH0COMP_IE R/W 0
7:5
RESERVED
R
0
4
UP_TRIG_IE
R/W 0
3
UP_POF_IE
2
UP_CH2COMP_IE
R/W 0 R/W 0
1
UP_CH1COMP_IE
R/W 0
0
UP_CH0COMP_IE
R/W 0
DP32G030
0 TRIGGER CH2 CH1 CH0 TRIGGER CH2 CH1 CH0
PWMPLUS_IF 0x64
31:20 RESERVED
R
19
AUTORELOAD_IF R/W
18
BRAK2_IF
R/W
0
0
1
2
1 0
2
232 432
17
BRAK1_IF
R/W 0
16
BRAK0_IF
R/W 0
15:13 RESERVED
R
0
12
DOWN_TRIG_IF R/W 0
11
DOWN_POF_IF R/W 0
DOWN_CH2COM
10
R/W 0
P_IF
DOWN_CH1COM
9
R/W 0
P_IF
DOWN_CH0COM
8
R/W 0
P_IF
7:5 RESERVED
R
0
DP32G030
1 1 1
0 1 0
TRIGGER 1
1
CH2 1
CH1 1
CH0 1
233 432
4
UP_TRIG_IF
R/W 0
3
UP_POF_IF
R/W 0
2
UP_CH2COMP_IF R/W 0
1
UP_CH1COMP_IF R/W 0
0
UP_CH0COMP_IF R/W 0
DP32G030
TRIGGER 1
1
CH2 1
CH1 1
CH0 1
PWMPLUS_SWLOAD 0x84
31:1 RESERVED
0
SWLOAD
R
R/W
0
PWM LOAD
PWM_PERIODPWM_CH0_COMP
PWM_CH1_COMPPWM_CH2_COMPPWM_CH0_DT
0
PWM_CH1_DTPWM_CH2_DTTRIG_COMP 8
1
8
load
234 432
DP32G030
PWMPLUS_MASK_EN 0x88
31:6 RESERVED
R
0
5
CH2N_MASK_EN R/W 0
CH2N 1 MASK_CFG
4
CH2_MASK_EN
R/W 0
CH2 1 MASK_CFG
3
CH1N_MASK_EN R/W 0
CH1N 1 MASK_CFG
2
CH1_MASK_EN
R/W 0
CH1 1 MASK_CFG
1
CH0N_MASK_EN R/W 0
CH0N 1 MASK_CFG
0
CH0_MASK_EN
R/W 0
CH0 1 MASK_CFG
PWMPLUS_CNT_ST 0xE0
31:18 RESERVED
R
0
235 432
17
CNT_ST
R
0
16
CNT_DIR
R
0
15:0 PWMPLUS_CNT R
0
DP32G030
PWM 0 1 PWM 0 1
PWM
PWMPLUS_BRAKE_ST 0xE4
31:2 RESERVED
1:0 BRAKE_ST
R
0
R
0
BRAKE_ST[1] brake1BRAKE_ST[0] brake0
236 432
5.15 RTC
DP32G030
5.15.1
RTC RCLF XTAL 1/2 RTC
5-111 RTC
5.15.2
237 432
0-99
DP32G030
RTC
RTC
1/2
RTC
BCD
BCD
5.15.3
5-112 RTC
238 432
5.15.4
DP32G030
RTC RTCCLK RC RCLF XTAL
SRC_CFG RTC_CLK_SEL RTCCLK XTAL RCLF RTC RTC
RTCCLK
5-113 RTCCLK
1Hz_time RTC_PRE 1/2
RTC_PRE PRE_ROUND PRE_PERIOD PRE_DECIMAL PRE_PERIOD PRE_DECIMAL 1 ±1ppm
1
239 432
DP32G030
RTC 32767.62Hz PRE_ROUND 32766 0.62*8=4.96 0.62*16=9.92 8 5 16 10 8 PRE_DECIMAL 5PRE_PERIOD 0
1 32767+5/8/32767.62-1 = 0.15ppm 2 RTC 32767.71Hz PRE_ROUND 32766 0.71*8=5.68 0.71*16=11.36 8 6 16 11 16 16 PRE_DECIMAL 11PRE_PERIOD 1 1 32767+11/16/32767.71-1 = -0.68ppm 3 RTC 32770.094Hz PRE_ROUND 32769 0.094*8=0.752 0.094*16=1.504 8 1 16 1 8 8 PRE_DECIMAL 1PRE_PERIOD 0 1 32770+1/8/32770.094-1 = 0.946ppm
1Hz_time RTC
BCD 1 34 2 30 24 01 RTC_IF TIME_ERR LOAD_EN
240 432
DP32G030
RTC
RTC_AR 20 20 63 24 01 RTC_IF ALM_ ERR 0
RTC_IE RTC_IF
5-114 RTC
241 432
DP32G030
SLEEP DEEPSLEEP
RTC PMU PMU LPMD_WKEN LPMD_WKST
1 RTCCLK RTC_PRE 1Hz_time 2 RTC_TR RTC_DR 3 RTC_IF TIME_ERR 4 RTC_CFG LOAD_EN 1 5 RTC_AR 6 RTC_IF ALM_ERR 7 RTC_CFG ALM_EN 1 8 RTC_CFG RTC_EN 1 RTC 2-4 5-7
242 432
DP32G030
1 RTC_TR RTC_DR 2 RTC_IF TIME_ERR 3 RTC_CFG LOAD_EN 1 4RTC RTCCLK
1 RTC_AR 2 RTC_IF ALM_ERR 3 RTC_CFG ALM_EN 1 4
1 RTC_VALID 1 2 RTC_TSTRRTC_TSDR 3 RTC_CNT
1 RTC_IE 6 243 432
2 3 RTC_IF 4 RTC_IF 1
DP32G030
RTC
BASE: 0x40069000
RTC_CFG
0x00 32
R/W
RTC_IE
0x04 32
R/W
RTC_IF
0x08 32
R/W
RTC_PRE
0x10 32
R/W
RTC_TR
0x14 32
R/W
RTC_DR
0x18 32
R/W
RTC_AR
0x1C 32
R/W
RTC_TSTR
0x20 32
RO
RTC_TSDR
0x24 32
RO
RTC_CNT
0x28 32
RO
RTC_VALID 0x2C 32
RO
0x00 0x00 0x00 0x7fff 0x00 0x101 0x00 0x00 0x101 0x00 0x00
RTC RTC RTC RTC RTC RTC RTC RTC RTC RTC RTC
RTC_CFG 0x00
31:3 RESERVED
RO
0x0
244 432
DP32G030
RTC RTC_TR RTC_DR
1
R/W
2
LOAD_EN
0x0
AC
0
RTC_TR RTC_DR RTC_IF
TIME_ ERR 0
RTC
1 ALM_WEEKDAY 0
1
ALM_EN
R/W 0x0
0
RTC_AR RTC_IF ALM_ ERR 0
RTC
0
RTC_EN
R/W 0x0
1 RTC
0 RTC
RTC_IE 0x04
31:6 RESERVED
5
MS_IE
4
ALM_IE
3
DATE_IE
2
HOUR_IE
RO 0x0 R/W 0x0 R/W 0x0 R/W 0x0 R/W 0x0
1/2 1 0 1 0 1 0 1 0
245 432
1
MIN_IE
0
SEC_IE
R/W 0x0 R/W 0x0
1 0 1 0
DP32G030
RTC_IF 0x08
31:10 RESERVED
9
ALM_ ERR
8
TIME_ERR
7:6
RESERVED
5
MS_IF
4
ALM_IF
3
DATE_IF
2
HOUR_IF
1
MIN_IF
0
SEC_IF
RO RO
RO RO
0x0
1 0x0 0 ALM_WEEKDAY 1 0x0 0 BCD_WEEKDAY 7
0x0
RW1C 0x0
1/2 1
RW1C 0x0
1
RW1C 0x0
1
RW1C 0x0
1
RW1C 0x0
1
RW1C 0x0
1
246 432
RTC_PRE 0x10
DP32G030
31:25 RESERVED
24
PRE_PERIOD
23:20 PRE_DECIMAL 19:0 PRE_ROUND
RO 0x0
R/W 0x0
08 116
R/W 0x0
0 1 1/8 1/16 ... 7 7/8 7/16 8 8/16 ... 15 15/16
R/W 0x7fff
1
RTC_TR 0x14
31:27 RESERVED
RO
0x0
247 432
26:24 BCD_WEEK
R/W
23:22 RESERVED
RO
21:20 BCD_HOUR_DEC R/W
19:16 BCD_HOUR
R/W
15
RESERVED
RO
14:12 BCD_MIN_DEC R/W
11:8 BCD_MIN
R/W
7
RESERVED
RO
6:4
BCD_SEC_DEC R/W
3:0
BCD_SEC
R/W
DP32G030
0-6 0
1
2 0x0
3
4
5 6
0x0
0x0
0-2
0x0
0-9
0x0
0x0
0-5
0x0
0-9
0x0
0x0
0-5
0x0
0-9
RTC_DR 0x18
31:24 RESERVED 23:20 BCD_YEAR_DEC 19:16 BCD_YEAR 15:13 RESERVED
R/W 0x0
R/W 0x0
0-9
R/W 0x0
0-9
RO
0x0
248 432
12
BCD_MONTH_DEC R/W 0x0
11:8 BCD_MONTH
R/W 0x1
7:6 RESERVED
RO
0x0
5:4
BCD_DATE_DEC
R/W 0x0
3:0 BCD_DATE
R/W 0x1
DP32G030
0-1 0-9 0-3 0-9
RTC_AR 0x1C
31
RESERVED
RO
30:24 ALM_WEEKDAY R/W
23:22 RESERVED
RO
0x0
bit bit0=1 bit1=1 bit2=1 bit3=1 0x0 bit4=1 bit5=1 bit6=1 0 ALM_EN
0x0
21:20 ALM_HOUR_DEC R/W 0x0
0-2
19:16 ALM_HOUR
R/W 0x0
0-9
15
RESERVED
RO
0x0
14:12 ALM_MIN_DEC R/W 0x0
0-5
11:8 ALM _MIN
R/W 0x0
0-9
7
RESERVED
RO
0x0
249 432
6:4
ALM_SEC_DEC R/W 0x0
3:0
ALM _SEC
R/W 0x0
DP32G030
0-5 0-9
RTC_TSTR 0x20
31:27 RESERVED
26:24 WEEKDAY
23:22 RESERVED
21:20 HOUR_DEC
19:16 HOUR
15
RESERVED
14:12 MIN_DEC
11:8 MIN
7
RESERVED
6:4
SEC _DEC
3:0
SEC
RO 0x0
RO 0x0 RO 0x0
0-6 0 1 2 3 4 5 6
RO 0x0
0-2
RO 0x0
0-9
RO 0x0
RO 0x0
0-5
RO 0x0
0-9
RO 0x0
RO 0x0
0-5
RO 0x0
0-9
250 432
RTC_TSDR 0x24
DP32G030
31:25 RESERVED RO 0x0
24
LEAPYEAR
RO 0x0
23:20 YEAR_DEC RO 0x0
0-9
19:16 YEAR
RO 0x0
0-9
15:13 RESERVED RO 0x0
12
MONTH_DEC RO 0x0
0-1
11:8 MONTH
RO 0x1
0-9
7:6
RESERVED RO 0x0
5:4
DATE_DEC RO 0x0
0-3
3:0
DATE
RO 0x1
0-9
RTC_CNT 0x28
31:20 RESERVED 19:0 CNT_20
RO
0x0
RO
0x0
20bit
RTC_VALID 0x2C
251 432
31:1 RESERVED
RO
0
CUR_VALID RO
DP32G030
0x0
0x0
1
RTC_TSTRRTC_TSDRRTC_CNT
252 432
5.16UART UART
DP32G030
5.16.1
Universal Asynchronous Receiver/TransmitterUART 3 DMA 8 FIFO FIFO UART
5-115 UART
253 432
DP32G030
UART CPU APB UART UART PAD
5.16.2
UART 8bit 9bit 0 1 1 DMA 8 FIFO FIFO
254 432
5.16.3
DP32G030
5-116 UART
UART BAUD_CTRL UART_BAUD BAUD_CLK UART_RX_CTRL UART_TX_CTRL
UART 8 FIFO UART_RX_CTRL RX_FIFO CPU DMA TX_FIFO
UART_RX_CTRL UART_RX RX_DATA RX_FIFO
255 432
DP32G030
UART_RX_CTRL RX_FIFO BAUD_CLK BIT
UART DMA DMA_CTRL DMA DMA UART
UART AUTO_FLOW_CTRL
5-117 UART
UART 1 UART RXFIFO RXFIFO RXFIFO 2 UART RXFIFO RXFIFO
256 432
DP32G030
5-118 UART
UART TXFEND 1 1 2 TXDONE 1
TXFIFO TXBUSY
=48M 115200 UARTDIV=48000000/115200=416.6
417
257 432
DP32G030
uart_rx UART_BAUD
uart_rx ABRDBIT
ABRDEN uart_rx 1 ABRDBIT UART_BAUD ABRDEN
5-119 UART
258 432
DP32G030
UART UART 16 UART_RX bit 16 8910
5-120 UART
bit 16 8 9 10 0 bit 0 1 bit 1
UART CTS RTS 2
259 432
DP32G030
5-121 UART
RTS RTSEN 1 FIFO RTS FIFO RTS RTS
CTS
5-122 UART
260 432
DP32G030
CTSEN 1 CTS CTS FIFO CTS
CTS
5-123 UART
1
5-124 UART
261 432
DP32G030
1 UART 2 UART 2 UART 3 4
2
5-125 UART
1 UART RXTO 2 CPU 3 UART 3 UART 4 5
UART 8
262 432
DP32G030
5-126 UART
UART0 UART1 UART2
BASE: 0x4006B000 BASE: 0x4006B800 BASE: 0x4006C000
UART_CTRL
0x00
32
UART_BAUD 0x04
32
UART_TDR
0x08
32
UART_RDR
0x0c
32
UART_IE
0x10
32
UART_IF
0x14
32
UART_FIFO
0x18
32
UART_FC
0x1c
32
UART_RXTO 0x20
32
R/W R/W W R R/W R/W R/W R/W R/W
0x00 UART 0x00 UART 0x00 UART 0x00 UART 0x00 UART 0x2400 UART 0x07 UART FIFO 0x00 UART 0xff UART
263 432
DP32G030
UART_CTRL 0x00
31:17 16:14
13:12
11 10:9
RESERVED
R
TX_DLY
R/W
ABRDBIT
R/W
ABRDEN
R/W
RESERVED R
0
000
0
0011bit
0102bit
......
1117bit
118 0x80
104
0
0x08
012 0x02
001 0x01
1 0 0
0
264 432
8:7
PARMD
R/W 0
6
PAREN
R/W 0
5
NINEBIT
R/W 0
4
TXDMAEN R/W 0
3
RXDMAEN R/W 0
2
TXEN
R/W 0
1
RXEN
R/W 0
0
UARTEN
R/W 0
DP32G030
11 0 10 1 01 00
1 0
9bit 19bit 08bit DMA 1 DMA UART 0 CPU UART DMA 1 DMA UART 0 CPU UART 1 tx_fifo uart_tx 0uart_tx 1 1 uart_rx 0 uart_rx UART 1 UART 0 UART
UART_BAUD 0x04
31:16 RESERVED
R
0
265 432
15:0 BAUD
R/W 0
DP32G030
UART_TDR 0x08
31:9 RESERVED
8:0 TDR
R
0
W0
FIFO FIFO
UART_RDR 0x0C
31:9 RESERVED
8:0 RDR
R
0
R
0
FIFO FIFO RXFIFO RXFIFO RXFIFO
UART_IE 0x10
31:10 RESERVED
R
0
266 432
9
ABRD_OVF
8
RXFIFO_OVF
7
TXFIFO
6
RXFIFO
5
RXTO
4
STOPE
3
PARITYE
2
TXDONE
1
RESERVED
0
RESERVED
R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0
R/W 0
R/W 0 R/W 0
DP32G030
FIFO FIFO FIFO FIFO
UART_IF 0x14
31:23 RESERVED
22:20 TF_LEVEL
R
0
R
0
FIFO 000 FIFO 0 FIFO 8 001 FIFO 1 ...... 111 FIFO 7
267 432
19:17 RF_LEVEL
16
TXBUSY
15
TXFIFO_HFULL
14
TXFIFO_FULL
13
TXFIFO_EMPTY
12
RXFIFO_HFULL
11
RXFIFO_FULL
10
RXFIFO_EMPTY
9
ABRD_OVF
8
RXFIFO_OVF
7
TXFIFO
6
RXFIFO
5
RXTO
R
0
R
0
R
0
R
0
R
0x1
R
0
R
0
R
0x1
R/W 0
R/W 0
R
0
R
0
R/W 0
DP32G030
FIFO 000 FIFO 0 FIFO 8 001 FIFO 1 ...... 111 FIFO 7 1 FIFO 0 FIFO
FIFO
FIFO
FIFO
FIFO
FIFO
FIFO
1 0 1 FIFO 1 FIFO 1 0 FIFO 1 0 1 1
268 432
4
STOPE
3
PARITYE
2
TXDONE
1
RESERVED
0
RESERVED
R/W 0
R/W 0 R/W 0 R/W 0 R/W 0
DP32G030
1 1 FIFO 1
UART_FIFO 0x18
31:8 RESERVED
7
TF_CLR
6
RF_CLR
5:3 TF_LEVEL
R
0
R/W 0 R/W 0
R/W 0
TXFIFO 1 FIFO
RXFIFO 1 FIFO
TXFIFO 0000 0011 0102 ...... 1117 FIFO 011 TXFIFO 3
269 432
2:0 RF_LEVEL
R/W 0x7
DP32G030
RXFIFO 0001 0012 0103 ...... 1118 FIFO 011 RXFIFO 4
UART_FC 0x1C
31:6 RESERVED
5
RTS_SIGNAL
4
CTS_SIGNAL
3
RTSPOL
2
CTSPOL
R
0
R
0
R
0
R/W 0
R/W 0
RTS 1RTS 0RTS
CTS 1CTS 0CTS
RTS 1RTS UART RTS UART FIFO
0RTS UART RTS UART FIFO
CTS 1CTS UART CTS UART 0CTS UART CTS UART
270 432
1
RTSEN
0
CTSEN
R/W 0 R/W 0
DP32G030
RTS 1RTS 0RTS CTS 1CTS 0CTS
UART_RXTO 0x20
31:8 RESERVED
7:0
RXTO
R
0
R/W 0xff
RXFIFO
271 432
5.17SPI SPI
DP32G030
5.17.1
Serial Peripheral InterfaceSPI 2 8 SPI SPI
5-127 SPI
SPI CPU APB SPI SPI PAD SPI PAD
5.17.2
4
272 432
8 FIFO DMA
5.17.3
DP32G030
5-128 SPI
SPI SPI SPICR FIFO SPIWDR SPI SPIWDR FIFO FIFO SPIRDR FIFO SPIRDR FIFO SPIIE
273 432
5.17.4
DP32G030
SPI
SPI SPI SPICR.CPHA (SPICR.CPOL) 4
SPI SPICR.SPE 0 SPI SCK 1CPHA=0 SPI CPOL=1 CPOL=0
5-129 SPI /CPHA=0
2CPHA=1 SPI CPOL=1 CPOL=0
274 432
DP32G030
5-130 SPI /CPHA=1
3 SSN SPI SSN
I/O
5-131 SPI SSN CPHA=0
MOSI
MOSI SPI SPI
275 432
MISO
DP32G030
MISO SPI SPI
SCK
SCK MOSI MISO SPI SPI
SSN
SSN SPI SSN SPI SSN
SPI
276 432
DP32G030
5-132 SPI Master/SPI Slave
MOSIMISOSCK SSN MOSIMISO MOSI MISO 8
1 SPICR.SPE SPICR.MSTR SPI
2 SPICR.CPHA SPICR.CPOL 3 SPICR.SPR[2:0] 4 SPICR.LSB SPICR.CPHA_DATAHOLD_S SPIIE SPIIR SSN MCU SPIWDR SPIIR.SPIF
277 432
DP32G030
CPHA=0 SSN SSN SPIIR.SPIF SSN MISO MSB
CPHA=1 SPIIR.SPIF
SPI 5 :
5-133 SPI
278 432
FIFO
DP32G030
5-134 SPI FIFO
FIFO FIFO RFF_INTEN FIFO 8 FIFO 8 FIFO RFF 1 T0 FIFO FIFO 1 FIFO FIFO SPI SPI
279 432
FIFO
DP32G030
FIFO FIFO RFOF_INTEN FIFO 8 FIFO 8 FIFO T0 FIFO RFOF 1 FIFO FIFO FIFO FIFO 1 SPI SPI
280 432
FIFO
DP32G030
5-135 SPI FIFO
FIFO FIFO RFHF_INTEN FIFO 8 FIFO 4 FIFO RFF 1 T0 FIFO 4 1 FIFO FIFO SPI SPI
281 432
FIFO
DP32G030
5-136 SPI FIFO
SPIWDR FIFO FIFO TFE_INTEN FIFO 8 FIFO 4 FIFO TFE 1 T0 FIFO FIFO 1 FIFO FIFO T1 SPI SPI
282 432
FIFO
DP32G030
5-137 SPI FIFO
SPIWDR FIFO FIFO TFE 1T0 FIFO TFE_INTEN FIFO T1 0T2 FIFO 1T3 FIFO FIFO 1 FIFO FIFO SPI SPI
283 432
DMA
DP32G030
DMA DMA TXDMAEN RXDMAEN TXDMAEN 1 DMA SPI RXDMAEN 1 DMA SPI
284 432
DP32G030
5-138 SPI
SPI PORT SPI
285 432
SPI SPI SPI SPI SPI
DP32G030
SPI0: SPI1: SPICR
BASE: 0x400B8000 BASE: 0x400B8800
0x00
32
SPIWDR
0x04
32
SPIRDR
0x08
32
SPIIE
0x10
32
SPIIF
0x14
32
SPIFIFOST
0x18
32
R/W R/W R RW R/W R/W
0x1010 SPI
0x00
SPI
0x00
SPI
0x00
SPI
0x8
SPI
0x9
SPIFIFO
SPICR 0x00
286 432
DP32G030
31:17 RESERVED R
0
16
TF_CLR
R/W 0
15
RF_CLR
R/W 0
14
TXDMAEN R/W 0
13
RXDMAEN R/W 0
12
MSR_SSN R/W 1
CPHA_DATA
11:8
R/W 0
HOLD_S
7
LSB
R/W 0
6
MSTR
R/W 0
5
CPOL
R/W 0
4
CPHA
R/W 1
FIFO 1 FIFO FIFO 1 FIFO DMA 1 DMA SPI 0 CPU SPI DMA 1 DMA SPI 0 CPU SPI SSN 1
CPHA 1 00001 pclk 00012 pclk ...... 111116 pclk 0MSB 1LSB 0 = SPI 1 = SPI 0 = 1 = 0 = 1 =
287 432
3
SPE
2
SPR2
1
SPR1
0
SPR0
R/W 0
R/W 0 R/W 0 R/W 0
SPI 0 = SPI 1 = SPI SPI 2
SPI 1
SPI 0
DP32G030
SPR0SPR1SPR2
SPR2 0 0 0 0 1 1 1 1
SPR1 0 0 1 1 0 0 1 1
SPR0 0 1 0 1 0 1 0 1
Fsck Fpclk/4 Fpclk/8 Fpclk/16 Fpclk/32 Fpclk/64 Fpclk/128 Fpclk/256 Fpclk/512
Fsck(Fcpu=48Mhz) 12MHz 6MHz 3MHz 1.5MHz 750KHz 375KHz 187.5KHz 93.75KHz
SPIWDR 0x04
7:0
SPIWDR
R/W
SPI SPIWDR FIFO
0
FIFO
288 432
SPIRDR 0x08
DP32G030
7:0
SPIRDR
R
SPI SPIRDR
0
FIFO
SPIRDR FIFO
SPIIE 0x10
31:5 RESERVED
4
TXFIFO_HFULL
3
TXFIFO_EMPTY
2
RXFIFO_HFULL
1
RXFIFO_FULL
0
RXFIFO_OVF
R R/W R/W R/W R/W R/W
0
0
FIFO
0
FIFO
0
FIFO
0
FIFO
0
FIFO
SPIIF 0x14
31:5 RESERVED
4
TXFIFO_HFULL
3
TXFIFO_EMPTY
2
RXFIFO_HFULL
R
0
R/W 0
R/W 1
R/W 0
FIFO 1 FIFO 1 FIFO 1
289 432
1
RXFIFO_FULL
0
RXFIFO_OVF
R/W 0 R/W 0
DP32G030
FIFO 1
FIFO 1
SPIFIFOST 0x18
31:12 Reserved
11:9 TF_LEVEL
8:6
RF_LEVEL
5
TFHF
4
TFF
R R
R R R
0
FIFO 000 FIFO 0 FIFO 8 001 FIFO 1 010 FIFO 2 0 011 FIFO 3 100 FIFO 4 101 FIFO 5 110 FIFO 6 111 FIFO 7
FIFO 000 FIFO 0 FIFO 8 001 FIFO 1 010 FIFO 2 0 011 FIFO 3 100 FIFO 4 101 FIFO 5 110 FIFO 6 111 FIFO 7
0
FIFO
0
FIFO
290 432
3
TFE
2
RFHF
1
RFF
0
RFE
DP32G030
R
1
FIFO
R
0
FIFO
R
0
FIFO
R
1
FIFO
291 432
5.18IIC IIC
DP32G030
5.18.1
IIC(Inter-Integrated Circuit) IIC SDA() SCL() SCL SDA IIC IIC SDA IIC 100kbit/s 400kbit/s IIC IIC IIC
IIC APB CPU
IIC 292 432
5.18.2
DP32G030
masterslave IIC 3 Standard-mode100kbpsFast-mode400kbpsFast-mode Plus1Mbps SCL/SDA Master SCL LOW SCL 2^17* SCL Slave 7 10 mask slave 7 slave
128 10 slave 256 clock stretchingslave SCL hold
293 432
5.18.3
DP32G030
5-139 IIC
IIC REG IO SDA SCL SDASCL MASTER SLAVE TIMER START SCL SCL SCL SDA SCL
5.18.4
IIC (SDA)(SCL) SCL SDA SCL SCL SDA SCL SCL
294 432
DP32G030
5-140 IIC
SCL SDA S SCL SDA
7 1 R/W R/W 0 1 SDA
295 432
DP32G030
R/W
NACK
SDA
P SCL SDA
7bit
5-141 IIC 7bit
296 432
DP32G030
5-142 IIC
5-143 IIC
10bit
5-144 IIC 10bit
297 432
DP32G030
5-145 IIC 10bit
SCL SDA
IIC SCL SDA Standard-modeFast-mode SCL SDA IO
SCL SDA IO IO IO SCL SDA IO
5-146 IIC SCL
298 432
DP32G030
SLAVE STARTSLAVE STOP MASTER SCL LOW IIC_IE IIC_IF
5-147 IIC
299 432
master-transmitter
DP32G030
300 432
5-148 IIC
DP32G030
1 IIC_MSPC pclk=60M IIC Standard-mode100kbps SCL 600 pclk tLOW 400 pclktHIGH 200 pclk SCL_LOW=0xC4SCL_HITH=0x60CPD=0x01
2 IIC_CCFG MODE 1 IIC_CCFG EN 1 3 IIC_CST BUSY 1 0 0 4 Start IIC_MCTRL STA 1 0 5 slave IIC_TXDATA bit7~bit1 bit0 0 IIC_MCTRL WR 1 0 IIC_IF TXF 1 1 IIC_CTRANS RX_ACK 0 slave 1 8 6 slave IIC_TXDATA slave IIC_MCTRL WR 1 0 IIC_IF TXF 1 1 IIC_CTRANS RX_ACK 0 1 8 7 6 8 STOP IIC_MCTRL STO 1 0 9 TXF
301 432
master-receiver
DP32G030
302 432
DP32G030
5-149 IIC
303 432
DP32G030
1 IIC_MSPC pclk=60M IIC Standard-mode100kbps SCL 600 pclk tLOW 400 pclktHIGH 200 pclk SCL_LOW=0xC4SCL_HITH=0x60CPD=0x01
2 IIC_CCFG MODE 1 IIC_CCFG EN 1 3 IIC_CST BUSY 1 0 0
4 Start IIC_MCTRL STA 1 0 5 slave IIC_TXDATA bit7~bit1 bit0 1 IIC_MCTRL WR 1 0 IIC_IF TXF 1 1 IIC_CTRANS RX_ACK 0 slave 1 8 6 slave IIC_CTRANS TX_ACK 0 IIC_MCTRL RD 1 IIC_IF RXNE 1 IIC_RXDATA slave IIC_MCTRL RD 0 IIC_IF.RXF 1 1 7 6 IIC_CTRANS TX_ACK 1 6 8 STOP IIC_MCTRL STO 1 0 9 TXF RXF
304 432
slave-transmitter
DP32G030
305 432
DP32G030
5-150 IIC
306 432
DP32G030
1 slave IIC_SCTRL ADMD 0 2 slave IIC_SADDR 3 IIC_CCFG MODE 0 IIC_CCFG EN 1 4 IIC_IF SLV_STA IIC start 1 5 IIC_IF RXNE 1 master 6 IIC_RXDATA IIC_SADDR mask master 7 IIC_TXDATA 8 IIC_IF RXF 1 ACK 9 IIC_IF TXE 1 TXDATA 10 IIC_IF TXF 1 1 11 IIC_CTRANS RX_ACK 0 master 9~11 IIC_CTRANS RX_ACK 1 master IIC_CTRANS TXD_CLR IIC_TXDATA 12 IIC_IF SLV_STO IIC STOP 13 SLAVE STARXF TXF SLAVE STO
307 432
slave-receiver
DP32G030
308 432
5-151 IIC
DP32G030
1 slave IIC_SCTRL ADMD 0 2 slave IIC_SADDR 3 IIC_CCFG MODE 0 IIC_CCFG EN 1 4 IIC_IF SLV_STA IIC start 1 5 IIC_IF RXNE 1 master 6 IIC_RXDATA IIC_SADDR mask master
7 IIC_IF RXF 1 ACK 1
8 IIC_CTRANS TX_ACK 0 9 IIC_IF RXNE 1 slave IIC_RXDATA 10 IIC_IF RXF 1 ACK 1 11 9~10 IIC_IF SLV_STO
12 SLAVE STARXF SLAVE STO
309 432
clock-stretching
DP32G030
master-receiver 1 IIC_MSPC pclk=60M IIC Standard-mode100kbps
SCL 600 pclk tLOW 400 pclktHIGH 200 pclk SCL_LOW=0xC4SCL_HITH=0x60CPD=0x01
2 IIC_CCFG MODE 1 IIC_CCFG EN 1 3 IIC_CST BUSY 1 0 0
4 Start IIC_MCTRL STA 1 0 5 slave IIC_TXDATA bit7~bit1 bit0 1 IIC_MCTRL WR 1 0 IIC_IF TXF 1 1 IIC_CTRANS RX_ACK 0 slave 1 8 6 slave slave master SCL slave hold slave hold master IIC_IF MLTO
IIC_CTRANS TX_ACK 0 IIC_MCTRL RD 1 IIC_IF RXNE 1 IIC_RXDATA slave IIC_MCTRL RD 0 IIC_IF.RXF 1 1
310 432
DP32G030
7 6 IIC_CTRANS TX_ACK 1 6
8 STOP IIC_MCTRL STO 1 0 9 TXF RXF slave-transmitter 1 slave IIC_SCTRL ADMD 0STRETCH 1 2 slave IIC_SADDR 3 IIC_CCFG MODE 0 IIC_CCFG EN 1 4 IIC_IF SLV_STA IIC start 1 5 IIC_IF RXNE 1 master 6 IIC_RXDATA IIC_SADDR mask master 7 IIC_TXDATA slave SCL master SCL slave IIC_TXDATA slave IIC_MSPC SCL_LOW SCL 8 IIC_IF RXF 1 ACK 9 IIC_IF TXE 1 TXDATA 10 IIC_IF TXF 1 1 11 IIC_CTRANS RX_ACK 0 master 9~11 IIC_CTRANS RX_ACK 1 master IIC_CTRANS TXD_CLR IIC_TXDATA
311 432
DP32G030
12 IIC_IF SLV_STO IIC STOP
13 SLAVE STARXF TXF SLAVE STO
IIC0
BASE: 0x400B9000
IIC1
BASE: 0x400B9800
IIC_CCFG 0x0
32
R/W
IIC_CST
0x4
32
RO
IIC_CTRANS 0x8
32
R/W
IIC_RXDATA 0xC
32
RO
IIC_TXDATA 0x10
32
R/W
IIC_IE
0x14
32
R/W
IIC_IF
0x18
32
R/W
IIC_MCTRL 0x20
32
R/W
IIC_MSPC 0x24
32
R/W
IIC_SCTRL 0x30
32
R/W
IIC_SADDR 0x34
32
R/W
0x18 0x06 0x02 0x00 0x00 0x00 0x01 0x00 0x33f7f 0x08 0x00
IIC_CCFG 0x00
31:7
RESERVED RO
0
312 432
6:3
DNF
R/W 0x3
2
RESERVED RO
0
1
MODE
R/W 0x0
0
EN
R/W 0
DP32G030
Receive SDASCL Digital Noise Filter 0000 0001 1 ...... 1111 15
0slave 1master IIC 0 1
IIC_CST 0x04
31:14 RESERVED
R
0
13:12 SLV_RXDT
RO 0
SLV_STRETCH_
11
RO 0
BUSY
10 SLV_WR
RO 0
Slave Slave 00RXDATA 01 10 11 master code MCDE=1
Slave clock stretching slave 0 clock stretching 1 clock stretching
Slave slave 1slave master 0slave master STOP
313 432
9
SLV_RD
RO 0
8
SLV_ACTIVE
RO 0
7:3 RESERVED
RO 0
2
SDA
RO 1
1
SCL
RO 1
0
BUSY
RO 0
DP32G030
Slave slave 1slave master 0slave master STOP
Slave slave 0slave 1slave STOP Start_repeat
IIC SDA IIC 0IIC SDA 1IIC SDA IIC SCL IIC 0IIC SCL 1IIC SCL
IIC_CCFG.EN EN 0 1IIC START STOP
IIC_CTRANS 0x08
31:3 RESERVED
2
TXD_CLR
1
RX_ACK
R
0
W, AC 0
0 1 IF.TXE
RO
1
ACK/NACK IF.TXF Start_repeat STOP 1 0 ACK 1 NACK
314 432
0
TX_ACK
R/W 0
DP32G030
ACK/NACK 0 ACK 1 NACK
ACK/NACK A slave ACK/NACK B slave MCDE master code NACK
C slave NACK
IIC_RXDATA 0x0C
31:8 RESERVED
7:0 RXDATA
R
R
0
IF.RXNE 1
0
ACK/NACK
slave RXF
IIC_TXDATA 0x10
31:8 RESERVED 7:0 TXDATA
R R/W
0
IF.TXE 0 0
315 432
IIC_IE 0x14
DP32G030
31:18 RESERVED
17 MLTO
16:10 RESERVED
9
SLV_STO
8
SLV_STA
7:5 RESERVED
4
RXF
3
TXF
2
RXOVF
1:0 RESERVED
R R/W RO R/W
R/W RO R/W
R/W
R/W RO
0
Master SCL LOW
0
0
1
0
Slave STOP
0
0
1
Slave START
0
0
1
0
0
0
1
0
0
1
0
0
1
0
IIC_IF 0x18
31:18 RESERVED
R
0
316 432
17 MLTO
R, 0
W1C
16:10 RESERVED
RO
0
9
SLV_STO
R, 0
W1C
8
SLV_STA
R, 0
W1C
7:5 RESERVED
RO
0
4
RXF
R, 0
W1C
3
TXF
R, 0
W1C
DP32G030
Master SCL LOW 1 master 0 1SCL LOW 1024 MSPC SCL LOW
Slave STOP 1 slave 0slave STOP 1slave STOP
Slave START 1 slave 0slave START 1slave START
1 ACK/NACK 0 1 slave 1 Slave 7 slave
R/W 2 Slave 10 slave 2
ADDR[7:0] 10 repeat START slave 1 89 START 1 ADDR[9:8] 3 Slave SCTRL.MCDE=1 master code
1 ACK/NACK 0 1
317 432
2
RXOVF
1
RXNE
0
TXE
R, 0
W1C
RO
0
RO
1
DP32G030
1 ACK/NACK 0 1 RXDATA
slave STRETCH slave SCL RXDATA RXDATA
0 1 ACK/NACK
Master IF.RXOVF
Slave ASTRETCH=0 IF. RXOVF
NACK BSTRETCH=1 ACK master
slave SCL hold RXDATA SCL
0 TXDATA 1 TXDATA 1 IF.TXF 0 TXDATA
IIC_MCTRL 0x20
318 432
31:4 RESERVED
3
STO
RO
0
W, AC 0
2
WR
W, AC 0
1
RD
0
STA
W, AC 0 W, AC 0
DP32G030
1 STOP
1 TXDATA ACK/NACK 1 TXDATA WR RD 1 1 RXDATA ACK/NACK 1 START STA WR START
IIC_MSPC 0x24
31:28 RESERVED
27:24 DAT_HD
23:16 CPD 15:8 SCL_HI
RO
R/W
R/W R/W
0
SDA Master Slave mastertHD;DAT=(DAT_HD + 4) * Tpclk slavetHD;DAT=(DAT_HD + DNF + 6) * Tpclk 0x00 SDA SDA SCL STASTOP DAT_HD tHD;DAT
SCL_HI SCL_LOW 0x03
Master
SCL Master 0x3f
tHIGH=( (SCL_HI+1) * (CPD+1) + DNF + 6) * Tpclk
319 432
7:0 SCL_LOW
DP32G030
SCL Master slave STRETCH SCTRL. ASDS 0 slave R/W 0x7f TXDATA SCL tLOW=( (SCL_LOW+1) * (CPD+1) + DAT_HD + 5) * Tpclk SCL tHIGH+tLOW tHIGH tLOW 1:2
IIC_SCTRL 0x30
31:4 RESERVED
3
ASDS
RO
0
R/W 1
Stretching Adaptive Stretching Data Setup 0 MSPC 1 master SCL stretching
Slave-transmitter STRETCH stretching salve SCL SDA
320 432
2
STRETCH
R/W 0
1
MCDE
R/W 0
0
ADMD
R/W 0
DP32G030
Clock stretching 0Clock stretching 1Clock stretching
slave receiver IF.RXNE=1CTRANS. STRETCH_BUSY ACK SCL hold RXDATA STRETCH_BUSY SCL
slave transmitter IF. TXF=1 ACK/NACK TXE=1 CTRANS.STRETCH_BUSY SCL hold SCL_LOW STRETCH_BUSY SCL
Master Code Detect Enable. 0 master code 1 master code
slave START master code IF.RXF CST. SLV_RXDT 11 slave master code
slave 07 110
IIC_SADDR 0x34
31:24 RESERVED
RO
0
321 432
MASK_ADDR[
23:17
R/W 0
7:1]
MASK_ADDR
16
R/W 0
0
15:10 RESERVED
RO
0
9:8 ADDR[9:8] R/W 0
7:1 ADDR[7:1] R/W 0
0
ADDR0
R/W 0
DP32G030
Slave 0 1 slave 10 RXDATA ADDR[7:0] ADDR[9:8] mask
Slave
7 don't care 10 bit9~bit8
bit7~bit1
7 don't care 10 bit0
322 432
5.19 ADC
DP32G030
5.19.1
SARADC 14 A/D
0 - 10 1 OPA0 10 OPA1
11 12 13 14 1.2V 15 AVDD/3
323 432
DP32G030
5-152 SARADC
5.19.2
IO 11 2.4M 0-10 13-15
13 14 1.2V 15 AVDD/3
324 432
DP32G030
ADC PAD_VREF PAD_VREF AVDD_ADC 16 FIFO TIMERPLUS PMWPLUS
trigger
FIFO FIFO ADC 0VINVrefAVDD_ADC DMA FIFO
325 432
5.19.3
DP32G030
5-153 SARADC
SARADC 11 ADC ADC PAD_VREFADC ADC ADC FIFO FIFO
SARADC 12 TIMERPLUS TIMER_PLUS1_GOAL[1:0] TIMERPLUS1 TIMER_PLUS0_GOAL[1:0] TIMERPLUS0 PWMPLUS PWM_PLUS1_TRIGGER[3:0]PWMPLUS1 trigger PWM_PLUS0_TRIGGER[3:0] PWMPLUS0 trigger
326 432
5.19.4
DP32G030
SARADC 16 14 2 11 12 ADC_CFG ADC_CH_SEL
5-154 SARADC
SPL_NUM SPL_NUM 8 8 SARADC_CTRL 8 FIFO
327 432
DP32G030
ADC_MD SARADC SARADC SARADC SARADC
ADC_CH_SEL SARADC
5-155 SARADC
a T0 CPU ADC_START ADC_START 1 SARADC a
T1 ADC_START
328 432
DP32G030
T2 SARADC a ch_a data0eoc CPU FIFO
CPU ADC_START ADC_START 1 T3 SARADC a
T4 ADC_START T5 SARADC a ch_a data1eoc
CPU FIFO CPU ADC_START ADC_START SARADC CPU
ADC_CH_SEL SARADC
5-156 SARADC
a T0 CPU ADC_START ADC_START 1 SARADC a
329 432
DP32G030
T1 SARADC a ch_a data0eoc CPU FIFO
T2 SARADC a ch_a data1eoc CPU FIFO
T3 SARADC a ch_a data2eoc CPU FIFO
CPU N N-1 ADC_START ADC_START 0 CPU T4 ADC_START 0 SARADC
T5 SARADC a ch_a data3eoc CPU ADC_START SARADC
ADC_START SARADC
ADC_CH_SEL SARADC
5-157 SARADC
330 432
DP32G030
a b c a<b<c 0< 5< 8 T0 CPU ADC_START ADC_START 1 SARADC
abc T1 ADC_START T2 SARADC a a ch_a data0eoc
CPU FIFO
T3 SARADC b b ch_b data0eoc CPU FIFO
T4 SARADC c c ch_c data0eoc CPU FIFO
CPU ADC_START ADC_START 1 T5 SARADC abc
T6 ADC_START T7 SARADC a a ch_a data1eoc
CPU FIFO
T8 SARADC b b ch_b data1eoc CPU FIFO
T9 SARADC c c ch_c data1eoc CPU FIFO 331 432
DP32G030
ADC_START ADC_START SARADC
ADC_CH_SEL SARADC
5-158 SARADC
a b c a<b<c 0< 5< 8 T0 CPU ADC_START ADC_START 1 SARADC
abc T1 SARADC a a ch_a data0eoc
CPU FIFO T2 SARADC b b ch_b data0eoc CPU FIFO
332 432
DP32G030
T3 SARADC c c ch_c data0eoc CPU FIFO
CPU N N-1 N ADC_START ADC_START 0 CPU T5 ADC_START 0 SARADC
T4 SARADC a a ch_a data1eoc CPU FIFO
T6 SARADC b b ch_b data1eoc CPU FIFO
T7 SARADC c c ch_c data1eoc CPU FIFO
ADC_START SARADC ADC_START SARADC
FIFO
SARADC 16 FIFO ADC_MEM_MD
333 432
DP32G030
FIFO FIFO
SARADC ADC_IN_SMPL
ADC_CFG IN_SMPL_WIN 1/3/5/7/9/11/13/15 ADC_CFG SMPL_SETUP 1/2/4/8/16/32/64/128
CPU
SARADC ADC_TRIG 12
ADC_EXTTRIG_SEL[3:0] PWM_PLUS0_TRIGGER[3:0] ADC_EXTTRIG_SEL[7:4] PWM_PLUS1_TRIGGER[3:0] ADC_EXTTRIG_SEL[9:8] TIMER_PLUS0_GOAL[1:0] ADC_EXTTRIG_SEL[11:10] TIMER_PLUS1_GOAL[1:0]
334 432
DP32G030
5-159 SARADC
SARADC 18
5-160 SARADC
335 432
DP32G030
5-161 SARADC
336 432
SARADC ADC ADC ADC FIFO KD offset FIFO FIFO ADC ADC
DP32G030
337 432
DP32G030
SARADC
BASE: 0x400BA000
ADC_CFG
0x00
32
ADC_START
0x04
32
ADC_IE
0x08
32
ADC_IF
0x0c
32
ADC_CH0_STAT
0x10
32
ADC_CH0_DATA
0x14
32
ADC_CH1_STAT
0x18
32
ADC_CH1_DATA
0x1C
32
ADC_CH2_STAT
0x20
32
ADC_CH2_DATA
0x24
32
ADC_CH3_STAT
0x28
32
ADC_CH3_DATA
0x2C
32
ADC_CH4_STAT
0x30
32
ADC_CH4_DATA
0x34
32
ADC_CH5_STAT
0x38
32
ADC_CH5_DATA
0x3C
32
ADC_CH6_STAT
0x40
32
ADC_CH6_DATA
0x44
32
ADC_CH7_STAT
0x48
32
ADC_CH7_DATA
0x4C
32
ADC_CH8_STAT
0x50
32
ADC_CH8_DATA
0x54
32
ADC_CH9_ST
0x58
32
ADC_CH9_DATA
0x5c
32
ADC_CH10_ST
0x60
32
ADC_CH10_DATA 0x64
32
ADC_CH11_ST
0x68
32
0x2100
R/W
ADC
000
R/W 0x00 ADC
R/W 0x00 ADC
RW
0x00 ADC
R/W 0x00 ADC 0
R/W 0x00 ADC 0
R/W 0x00 ADC 1
R/W 0x00 ADC 1
R/W 0x00 ADC 2
R/W 0x00 ADC 2
R/W 0x00 ADC 3
R/W 0x00 ADC 3
R/W 0x00 ADC 4
R/W 0x00 ADC 4
R/W 0x00 ADC 5
R/W 0x00 ADC 5
R/W 0x00 ADC 6
R/W 0x00 ADC 6
R/W 0x00 ADC 7
R/W 0x00 ADC 7
R/W 0x00 ADC 8
R/W 0x00 ADC 8
R/W 0x00 ADC 9
R/W 0x00 ADC 9
R/W 0x00 ADC 10
R/W 0x00 ADC 10
R/W 0x00 ADC 11
338 432
ADC_CH11_DATA ADC_CH12_ST ADC_CH12_DATA ADC_CH13_ST ADC_CH13_DATA ADC_CH14_ST ADC_CH14_DATA ADC_CH15_ST ADC_CH15_DATA ADC_FIFO_STAT ADC_FIFO_DATA
EXTTRIG_SEL
0x6c 0x70 0x74 0x78 0x7c 0x80 0x84 0x88 0x8c 0xa0 0xa4
0xb0
ADC_CALIB_OFFSET 0xf0
ADC_CALIB_KD
0xf4
DP32G030
32 R/W 0x00 ADC 11
32
R/W 0x00 ADC 12
32 R/W 0x00 ADC 12
32
R/W 0x00 ADC 13
32 R/W 0x00 ADC 13
32 R/W 0x00 ADC 14
32 R/W 0x00 ADC 14
32 R/W 0x00 ADC 15
32
R/W 0x00 ADC 15
32 R/W 0x04 ADC FIFO
32 R/W 0x00 ADC FIFO
ADC 32 R/W 0x00
32 R/W 0x00 ADC OFFSET
32
R/W 0x00 ADC KD
ADC_CFG 0x00
31:30 RESERVED
29
DMA_EN
28
ADC_TRIG
R
0
R/W 0 R/W 0
DMA FIFO 0CPU FIFO 1DMA FIFO
ADC 0 CPU ADC 1 ADC
339 432
27
ADC_EN
R/W 0
IN_SMPL_WI
26:24
R/W 010
N
ADC_SMPL_C
23
R/W 0
LK
ADC_MEM_
22
R/W 0
MODE
21:19 SMPL_SETUP R/W 010
18
CONT
R/W 0
17:16 AVG
R/W 0
DP32G030
ADC 0 1
ADC 000 1 ADC 001 3 ADC 010 5 ADC 011 7 ADC 100 9 ADC 101 11 ADC 110 13 ADC 111 15 ADC
ADC 1 ADC 0 ADC
ADC 0ADC FIFO 1ADC
ADC 000 1 ADC 001 2 ADC 010 4 ADC 011 8 ADC 100 16 ADC 101 32 ADC 110 64 ADC 111 128 ADC
ADC 0 1
ADC 001 012 104 118
340 432
15:0 ADC_CH_SEL R/W 0
DP32G030
ADC Bit15-bit0 15- 0 1
ADC_START 0x04
30:4 3
2 1
RESERVED R
FIFO_CLR R/W
SOFT_RES R/W
ET
BUSY
R
0
FIFO
0
0 1
1 FIFO
ADC
0
0
ADC ADC
ADC 0
1
341 432
DP32G030
ADC 0 1 1 ADC_ CONT
ADC_ CONT 1
FIFO
0
START
R/W 0
ADC_ CONT 1 ADC ADC ADC FIFO 1 1 0
ADC_IE 0x08
30:18 RESERVED R
ADC_FIFO_
17
R/W
HFULL_IE
ADC_FIFO_F
16
R/W
ULL_IE
ADC_CHx_E
15:0
R/W
OC_IE
0
ADC FIFO 0
0 1 ADC FIFO 0 0 1
0
ADC x
342 432
ADC_IF 0x0C
DP32G030
30:18 RESERVED
R
0
ADC_FIFO_HF
17
R/W 0
ULL_IF
ADC_FIFO_FU
16
R/W 0
LL_IF
ADC_CHx_EO
15:0
R/W 0
C_IST
ADC FIFO 1 ADC FIFO 1 ADC x 1
ADC_CHx_STAT
30:1
0
RESERVED R
ADC_CH_E R
OC
0
ADC x
0
1 ADC x
ADC_IF 1
ADC_CHx_DATA
30:16 15:12
11:0
RESERVED R
ADC_CH_ R
NUM ADC_CH_
R DATA
0
0
ADC
ADC x 0
343 432
DP32G030
ADC_FIFO_STAT 0xA0
30:8
7:4
3 2 1 0
RESERVED
R
0
ADC_FIFO_LEVEL R
0
RESERVED
R
0
ADC FIFO 0000 FIFO 0 FIFO 16 0001 FIFO 1 0010 FIFO 2 0011 FIFO 3 0100 FIFO 4 0101 FIFO 5 0110 FIFO 6 0111 FIFO 7 1000 FIFO 8 1001 FIFO 9 1010 FIFO 10 1011 FIFO 11 1100 FIFO 12 1101 FIFO 13 1110 FIFO 14 1111 FIFO 15
ADC_FIFO_EMPTY R
1
ADC_FIFO_HFULL R
0
ADC_FIFO_FULL
R
0
ADC FIFO 1 FIFO 0 FIFO
ADC FIFO 1 FIFO 0 FIFO
ADC FIFO 1 FIFO 0 FIFO
344 432
DP32G030
ADC_FIFO_DATA 0xA4
30:16 15:12 11:0
RESERVED R
ADC_FIFO R
_NUM ADC_FIFO
R _DATA
0
0
ADC
ADC FIFO 0
ADC_ EXTTRIG_SEL 0xB0
30:12
RESERVED
EXTTRIG 11:0
_SEL
R
R/W
0
ADC Bit11-bit0 exttrig_in[11:0] 0 ADC 0 1
ADC_CALIB_OFFSET 0xF0
30:17 16 15:8
RESERVED OFFSET_ VALID RESERVED
7:0
OFFSET
R
0
R/W 0
OFFSET
R
0
R/W 0
ADC OFFSET OFFSET ADC
345 432
DP32G030
ADC_CALIB_KD 0xF4
30:17 16 15:10
RESERVED KD_VALID RESERVED
9:0
KD
R
0
R/W 0
R
0
R/W 0
KD
ADC K K ADC K 1 1 K 1 0
346 432
5.20 COMP
DP32G030
5.20.1
IO
5.20.2
0mv 24mv 40mv 60mv 2 4 8
347 432
5.20.3
DP32G030
5-162
0 VP PA4 VN PA3
CMP_CFG.CMP_EN[0] 1 VP PA10 VN PA9
CMP_CFG.CMP_EN[1]
348 432
DP32G030
2 VP PC4 VN PC3 CMP_CFG.CMP_EN[2]
5.20.4
0COMP0 PA4 PA3 CMP_ST CMP_ORG_OUT[0] CMP_ST CMP_OUT[0] CMP_ST CMP_IF[0] 1COMP1 PA10 PA9 CMP_ST CMP_ORG_OUT[1] CMP_ST CMP_OUT[1] CMP_ST CMP_IF[1] 2COMP2 PC4 PC3 CMP_ST CMP_ORG_OUT[2] CMP_ST CMP_OUT[2] CMP_ST CMP_IF[2]
CMPx_HYS
0mV24mV40mV 60mV
349 432
DP32G030
5-163
CMP_CFG.CMP_FILTER 0 2 4 8
5-164
350 432
DP32G030
0 1 1 0
CPU
5-165
COMPARATOR
BASE: 0x40000000 351 432
CMP_CFG CMP_ST
DP32G030
0x120 R/W 0x200000
0x124 R/W 0x00
CMP_CFG 0x120
31:26
RESERVED
25:24 CMP_FILTER
23:22 RESERVED 21:20 CMP2_HYS
19:18 CMP1_HYS
17:16 CMP0_HYS 15:11 RESERVED
10:8
CMP_INTEN
7:3
RESERVED
R R/W R R/W R/W R/W R R/W R
0
00
10
012
104
118
0
CMP2
0
0024mv 0140mv
1060mv 110mv
CMP1
0
0024mv 0140mv
1060mv 110mv
CMP0
0
0024mv 0140mv
1060mv 110mv
0
1 0 0 Bit10-bit8 CMP2-CMP0
0
352 432
2:0
CMP_EN
R/W
0
DP32G030
1 0 Bit2-bit0 CMP2-CMP0
CMP_ST 0x124
31:22 RESERVED R
0
21:20 CMP2_IF
R/W 0
19:18 CMP1_IF
R/W 0
1716 CMP0_IF
R/W 0
15:11 RESERVED R
0
CMP_ORG_
108
R
0
OUT
7:3
RESERVED R
0
2:0
CMP_OUT R
0
2 Bit21 1 2 0 1 Bit20 1 2 1 0 1 1 Bit19 1 1 0 1 Bit18 1 1 1 0 1 0 Bit17 1 0 0 1 Bit16 1 0 1 0 1
1P >N 0P <N Bit10~bit8 CMP2~CMP0
1P >N 0P <N Bit2~bit0 CMP2~CMP0
353 432
5.21 OPAMP
DP32G030
5.21.1
ADC ADC IO
5.21.2
/ / 2 3MHz bandwidth ADC
354 432
5.21.3
DP32G030
5-166
OPAMP0 VP PA7 VN PA8 PA6 SARADC 1 OPA_CFG.OPA_EN[0]
OPAMP0 VP PC5 VN PC6 PC7 SARADC 10 OPA_CFG.OPA_EN[1]
OPERATIONAL AMPLIFIER BASE: 0x40000000
355 432
OPA_CFG
0x140
R/W 0x00
DP32G030
OPA_CFG
31:2
1:0
RESERVED
OPA_EN
R
0
R
0
OPA 1 0 Bit1-bit0 OPA1-OPA0
356 432
DP32G030
5.22FLASH FLASHCTRL
5.22.1
64K FLASH FLASH NVR
FLASH CPU FLASH CPU FLASH
5.22.2
64K FLASH 56MHz 1
56MHz 84MHz 2 NVR 4 512 1 FLASH 3 FLASH FLASH 2K 4K 8K 512 64 256
357 432
5.22.3
DP32G030
FLASH AHB APB FLASH FLASH FLASH FLASH
FLASH
5-167 FLASH
AHB CPU APB CPU FLASH FLASH FLASH
358 432
DP32G030
FLASH FLASH FLASH FLASH FLASH FLASH FLASH
FLASH CPU FLASH FLASH FLASH FLASH FLASH
FLASH FLASH 2K 64K 512 128 32
5.22.4
FLASH RAM FLASH_CFG DEEP_PD 1 RAM FLASH_CFG DEEP_PD 0
FLASH 56MHz 1 RAM FLASH_CFG READ_MD 0 56MHz 84MHz 2 RAM FLASH_CFG READ_MD 1
359 432
NVR MAIN
DP32G030
TRIM NVR NVR TRIM
NVR RAM FLASH_CFG NVR_SEL 1 NVR 4 512 1 FLASH 3
FLASH RAM
FLASH_ADDR (256 )
512 FLASH_ADDR
CPU FLASH FLASH
FLASH
FLASH_ADDR / 64 bit7-bit13 1 512Byte 512
360 432
DP32G030
FLASH 512ByteMAIN 64KBytes 128 NVR 2KBytes 4 (256 )
START
FLASH_START START 1 FLASH MODE
FLASH_LOCK 0x55START 1 FLASH
FLASH_UNLOCK 0xAASTART 1
MASK
MASK 2KBytes4KBytes 8KBytes MASK MASK_LOCK 1 MASK_SEL 0 MASK_SEL
361 432
DP32G030
FLASH
FLASH
FLASH_ST INIT_BUSY 1 flash 0
FLASH
FLASH_ST BUSY 1 0 READY
FLASH_ST PROG_BUF_EMPTY 1 0 16us
362 432
FLASH
DP32G030
FLASH FLASH FLASH
RAM
FLASH
1 FLASH READY 2 3 4 FLASH START 5 FLASH READY 6 FLASH
363 432
DP32G030
5-168
RAM 364 432
FLASH
DP32G030
1 FLASH READY 2 3 4 5 FLASH START 6 FLASH READY 7 FLASH
365 432
DP32G030
5-169
RAM 366 432
FLASH
DP32G030
1 FLASH READY 2 3 4 5 FLASH START 6 PROG_BUF_EMPTY 0 0
1 7 FLASH READY 8 FLASH
64
367 432
DP32G030
368 432
5-170
RAM
DP32G030
FLASH _CTRL FLASH_CFG FLASH_ADDR FLASH_WDATA FLASH_START FLASH_ST FLASH_LOCK FLASH_UNLOCK FLASH_MASK FLASH_ERASETIME FLASH_PROGTIME
BASE: 0x4006F000
0x00
32
0x04
32
0x08
32
0x10
32
0x14
32
0x18
32
0x1c
32
0x20
32
0x24
32
0x28
32
R/W R/W W R/W R W W R/W R/W R/W
0x80000000
0x0
0x0
0x0
0x5
0x0
0x0
0x2
0x7532a31b
0x1f4360
FLASH_CFG 0x00
31
DEEP_PD
R/W 1
FLASH 1 0 RAM
369 432
30:5 RESERVED
4:2
MODE
1
NVR_SEL
0
READ_MD
R
0
R/W 0
R/W 0 R/W 0x0
DP32G030
000 AHB 001 FLASH_ADDR (256 ) 010 512 FLASH_ADDR 1 RAM 2 MODE 0
NVR 0 Main Array 128 512 1 NVR 4 512 RAM 12 56MHz<sys_clk<84MHz 01 sys_clk<=56MHz RAM
FLASH_ADDR 0x04
31:14 RESERVED
13:0 ADDR
R
0
R/W 0
/ 64 bit7-bit13 1 512Byte
370 432
DP32G030
FLASH_WDATA 0x08
31:0 WDATA
R/W
0
FLASH_START 0x10
31:1 RESERVED
0
START
R
0
R/W 0
1 MODE
FLASH_ST 0x14
31:3 RESERVED
PROG_BUF 2
_EMPTY
R
0
R
1
1 0
371 432
DP32G030
1
BUSY
R
0
1 0 READY
FLASH
0
INIT_BUSY R
1
1 flash
0
FLASH_LOCK 0x18
31:8
RESERVED
7:0
LOCK
R
W
0
0x55START
0x0
1 FLASH
FLASH_UNLOCK 0x1C
31:8
RESERVED
7:0
UNLOCK
R
W
0
0
0xAASTART
1
FLASH_MASK 0x20
372 432
31:3 RESERVED
2
MASK_LOCK
1:0
MASK_SEL
R
0
R/W 1
R/W 0
DP32G030
MASK 1 MASK_SEL 0 MASK_SEL MASK 00 01 2KB 4 10 4KB 8 11 8KB 16
FLASH_ERASETIME 0x24
31 RESERVED 30:19 TRCV
18:0 TERASE
R R/W
R/W
0
0xea6
FLASH TRCV TRCV 50us 72MHz
1 48MHz
FLASH TERASE
0x2a31 b
TERASE TERASE 3.2ms-4ms
72MHz
1 48MHz
FLASH_PROGTIME 0x28
373 432
31:22 RESERVED 21:11 TPGS
10:0 TPROG
DP32G030
R
0
FLASH TPGS TPGS R/W 0x3e8 20us 48MHz
FLASH TPROG TPROG 16us-20us R/W 0x360 TPROG 48MHz
374 432
5.23 CRC
DP32G030
5.23.1
CRC AHB
5-171 CRC
5.23.2
81632 CRC 375 432
DP32G030
CRC
x^16+x^12+x^5+1
x^8+x^2+x+1
x^16+x^15+x^2+1
x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x^1+1
5.23.3
5-172 CRC
CRC CRC_DATAIN CRC CRC CRC CRC CRC_DATAOUT
376 432
5.23.4
DP32G030
CRC
CRC k r (CRC ) k+r CRC
CRC T n bit D k bit r bit F (7,3) 110 1001 110 1001 CRC
5-173 CRC
CRC 1. CRC 110 4 CRC > 110 0000 2. 110 0000 CRC ( 2 ) CRC 3. CRC
377 432
CRC
DP32G030
CRC CRC
CRC-CCITT CRC_CCITT
16
x^16+x^12+x^5+1
CRC-8
CRC_8
8
x^8+x^2+x+1
CRC-16 CRC-32
CRC_16 CRC_32
16
x^16+x^15+x^2+1
32
x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x ^7+x^5+x^4+x^2+x^1+1
378 432
5-174 CRC
DP32G030
CRC CRC_CR CRC_IV CRC_DATAIN CRC_DATAOUT
BASE: 0x40003000
0x00
32
R/W
0x04
32
W
0x08
32
R/W
0x0c
32
R
0x00 CRC 0x00 CRC 0x00 CRC 0x00 CRC
CRC_CR 0x00
31:11 RESERVED 10:9 CRC_SEL
8:7 DATA_WIDTH
RO 0
R/W 0 R/W 0
CRC 00 x^16+x^12+x^5+1 01 x^8+x^2+x+1 10 x^16+x^15+x^2+1 11 x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x ^7+x^5+x^4+x^2+x+1
CRC 0032 01 16 10 8 11
379 432
6:5 OUTPUT_INV R/W 0
4
OUTPUT_REV R/W 0
3:2 INPUT_INV
R/W 0
1
INPUT_REV
R/W 0
0
CRC_EN
R/W 0
DP32G030
INPUT_INV
1 0
00bit 01bit
32 31:0 -> 0:31 16 15:0 -> 0:15
8 7:0 -> 0:7 10bit
32 31:0 -> 24:31, 16:23, 8:15, 0:7 16 15:0 -> 8:15, 0:7
8 01 11
32 31:0 -> 7:0,15:8,23:16,31:24 16 15:0 -> 7:0,15:8
8 00
1 0
CRC 1CRC 0CRC
CRC_IV 0x04
31:0 CRC_IV
R/W 0
CRC
380 432
CRC_DATAIN 0x08
DP32G030
31:0 CRC_DATAIN
W
0
CRC DATA_WIDTH 0032 01 16 10 8 11
CRC_DATAOUT 0x0C
31:0 CRC_DATAOUT
W
0
CRC CRC_SEL 00 16 01 8 10 16 1132
381 432
5.24 DMA DMA
DP32G030
5.24.1
DMA
5-175 DMA
5.24.2
DMA 4 AHB
382 432
DP32G030
816 32bits 4096 DMA
5.24.3
383 432
5-176 DMA
DP32G030
5.24.4
DMA CPU CPU DMA RAM DMA CPU CPU
DMA
RAMRAM
DMA CHn RAM RAM CHnMOD.MS_SEL 0 CHnMOD.MD_SEL 0 RAM CHnCON.SWREQ 1 SIZE DMA RAM DMA RAM
RAM
DMA CHn RAM CHnMOD.MS_SEL 0 CHnMOD.MD_SEL CHnCON.SWREQ 1 SIZE DMA
384 432
DP32G030
RAM DMA
RAM
DMA CHn RAM CHnMOD.MS_SEL CHnMOD.MD_SEL 0 SIZE DMA DMA RAM
DMA
DMA CHnCON.PRI 4 --- --- --- ---
385 432
DP32G030
2 3
DMA DMA
DMA
DMA DMA 4096
CHnMSADDR DMA
CHnMDADDR DMA
386 432
DP32G030
CHnCON.PRI 4
CHnCON.CIRMD 0 1 DMA
CHnCON.LENTH 4096 CHnMOD.MD_SIZE CHnMOD.MS_SIZE 8bit16bit 32bit
CHnCON.CH_EN 1
1 CHnCON.CH_EN 0 1
387 432
DP32G030
1 DMA CHnCON.CH_EN 0 CHnCON.CH_EN 0
CHnMOD.MS_SEL CHnMOD.MD_SEL 0x00 RAM 0x01-0x07
CHnMOD.MS_ADDMOD CHnMOD.MD_ADDMOD
388 432
DP32G030
F0/F1/F2/F3/F4/F5/F6/F7/F8/F9/FA/FB/FC/FD/FE/FF
5-177 DMA
/
884
0x0/F0 0x1/F1 0x2/F2 0x3/F3
1: 0x0 F0[7:0], 0x0 F0[7:0] 2: 0x1 F1[7:0], 0x1 F1[7:0] 3: 0x2 F2[7:0], 0x2 F2[7:0] 4: 0x3 F3[7:0], 0x3 F3[7:0]
8 16 4
0x0/F0 0x1/F1 0x2/F2 0x3/F3
1: 0x0 F0[7:0], 0x0 00F0[15:0] 2: 0x1 F1[7:0], 0x2 00F1[15:0] 3: 0x2 F2[7:0], 0x4 00F2[15:0] 4: 0x3 F3[7:0], 0x6 00F3[15:0]
8 32 4
0x0/F0 0x1/F1 0x2/F2 0x3/F3
1: 0x0 F0[7:0], 0x0 000000F0[31:0] 2: 0x1 F1[7:0], 0x4 000000F1[31:0] 3: 0x2 F2[7:0], 0x8 000000F2[31:0] 4: 0x3 F3[7:0], 0xC 000000F3[31:0]
16 8 4
0x0/F1F0 0x2/F3F2 0x4/F5F4 0x6/F7F6
1: 0x0 F1F0[15:0], 0x0 F0[7:0] 2: 0x2 F3F2[15:0], 0x1 F2[7:0] 3: 0x4 F5F4[15:0], 0x2 F4[7:0] 4: 0x6 F7F6[15:0], 0x3 F6[7:0]
16 16 4
0x0/F1F0 0x2/F3F2 0x4/F5F4 0x6/F7F6
1: 0x0 F1F0[15:0], 0x0 F1F0[15:0] 2: 0x2 F3F2[15:0], 0x2 F3F2[15:0] 3: 0x4 F5F4[15:0], 0x4 F5F4[15:0] 4: 0x6 F7F6[15:0], 0x6 F7F6[15:0]
16 32 4
0x0/F1F0 0x2/F3F2 0x4/F5F4 0x6/F7F6
1: 0x0 F1F0[15:0], 0x0 0000F1F0[31:0] 2: 0x2 F3F2[15:0], 0x4 0000F3F2[31:0] 3: 0x4 F5F4[15:0], 0x8 0000F5F4[31:0] 4: 0x6 F7F6[15:0], 0xC 0000F7F6[31:0]
32 8 4
0x0/ F3F2F1F0 0x4/ F7F6F5F4 0x8/FBFAF9F8 0xC/FFFEFDFC
1: 0x0 F3F2F1F0[31:0], 0x0 F0[7:0] 2: 0x4 F7F6F5F4[31:0], 0x1 F4[7:0] 3: 0x8 FBFAF9F8 [31:0], 0x2 F8[7:0] 4: 0xc FFFEFDFC [31:0], 0x3 FC[7:0]
/
0x0/F0 0x1/F1 0x2/F2 0x3/F3 0x0/00F0 0x2/00F1 0x4/00F2 0x6/00F3 0x0/000000F0 0x4/000000F1 0x8/000000F2 0xC/000000F3 0x0/F0 0x1/F2 0x2/F4 0x3/F6 0x0/F1F0 0x2/F3F2 0x4/F5F4 0x6/F7F6 0x0/0000F1F0 0x4/0000F3F2 0x8/0000F5F4 0xC/0000F7F6 0x0/F0 0x1/F4 0x2/F8 0x3/FC
389 432
32 16 4 32 32 4
0x0/ F3F2F1F0 0x4/ F7F6F5F4 0x8/FBFAF9F8 0xC/FFFEFDFC
0x0/ F3F2F1F0 0x4/ F7F6F5F4 0x8/FBFAF9F8 0xC/FFFEFDFC
DP32G030
1: 0x0 F3F2F1F0[31:0], 0x0 F1F0[15:0] 2: 0x4 F7F6F5F4[31:0], 0x2 F5F4[15:0] 3: 0x8 FBFAF9F8 [31:0], 0x4 F9F8[15:0] 4: 0xc FFFEFDFC [31:0], 0x6 FDFC[15:0]
0x0/F1F0 0x2/F5F4 0x4/F9F8 0x6/FDFC
1: 0x0 F3F2F1F0[31:0], 0x0 F3F2F1F0[31:0] 0x0/ F3F2F1F0
2: 0x4 F7F6F5F4[31:0], 0x4 F7F6F5F4[31:0] 0x4/ F7F6F5F4
3: 0x8 FBFAF9F8 [31:0], 0x8 FBFAF9F8 [31:0] 0x8/FBFAF9F8
4: 0xc FFFEFDFC [31:0], 0xC FFFEFDFC [31:0]
0xC/FFFEFDFC
DMA
5-178 DMA
HTC_INTEN TC_INTEN
HTC_INTST TC_INTST
DMA
DMA 4 0- 3 UART0UART1UART2SPI0SPI1 ADCTIMER_PLUS0 TIMER_PLUS1
5-179 DMA
390 432
bit
000 001 010 011 100 101
bit
000 001 010 011 100 101
0
UART0_RX
UART2_TX
UART1_RX
UART0_TX
SPI0_RX
SPI1_TX
SARADC
N/A
TIMER_PLUS0_L
N/A
TIMER_PLUS1_L
N/A
2
UART2_RX
UART1_TX
UART0_RX
UART2_TX
SPI1_RX
SPI0_TX
SARADC
N/A
TIMER_PLUS1_L
N/A
TIMER_PLUS0_L
N/A
DP32G030
1
UART1_RX
UART0_TX
UART2_RX
UART1_TX
SPI1_RX
SPI0_TX
SARADC
N/A
TIMER_PLUS0_H
N/A
TIMER_PLUS1_H
N/A
3
UART0_RX UART1_RX
UART2_TX UART0_TX
SPI0_RX SARADC
SPI1_TX N/A
TIMER_PLUS1_H
N/A
TIMER_PLUS0_H
N/A
391 432
DP32G030
5-180 DMA
392 432
DP32G030
5-181 DMA
DMA
DMA 393 432
DP32G030
5-182 DMA
DMA 1 DMA_CON DMA_EN 1 DMA 2 3 DMA_CHnCON DMA_CHnMOD DMA_CHnMSADDR DMA_CHnMADDR 4 DMA_CHnCON.CH_EN 1
394 432
DP32G030
5DMA
6 DMA
7
8 CH_EN 0
DMA
BASE: 0x40001000
DMA_CTR
0x00 32
R/W
0x00
DMA
DMA_INTEN
0x04 32
R/W
0x00
DMA
DMA_INTST
0x08 32
R/W
0x00
DMA
DMA_CH0CTR
0x100 32
R/W
0x1ffe 0
DMA_CH0MOD
0x104 32
R/W
0x00
0
DMA_CH0MSADDR 0x108 32
R/W
0x00
0
DMA_CH0MDADDR 0x10c 32
R/W
0x00
0
DMA_CH0_ST
0x110 32
R
0x00
0
DMA_CH1CTR
0x120 32
R/W
0x1ffe 1
DMA_CH1MOD
0x124 32
R/W
0x00
1
DMA_CH1MSADDR 0x128 32
R/W
0x00
1
DMA_CH1MDADDR 0x12c 32
R/W
0x00
1
395 432
DMA_CH1_ST
0x130 32
DMA_CH2CTR
0x140 32
DMA_CH2MOD
0x144 32
DMA_CH2MSADDR 0x148 32
DMA_CH2MDADDR 0x14c 32
DMA_CH2_ST
0x150 32
DMA_CH3CTR
0x160 32
DMA_CH3MOD
0x164 32
DMA_CH3MSADDR 0x168 32
DMA_CH3MDADDR 0x16c 32
DMA_CH3_ST
0x170 32
DP32G030
R
0x00
1
R/W
0x1ffe 2
R/W
0x00
2
R/W
0x00
2
R/W
0x00
2
R
0x00
2
R/W
0x1ffe 3
R/W
0x00
3
R/W
0x00
3
R/W
0x00
3
R
0x00
3
DMA_CTR 0x00
31: 1 RESERVED
0
DMA_EN
R
0
R/W 0
DMA 0DMA 1DMA
DMA_INTEN 0x04
31:12 RESERVED
R
0
396 432
11
CH3_THC_INTEN
R/W 0
10
CH2_THC_INTEN
R/W 0
9
CH1_THC_INTEN
R/W 0
8
CH0_THC_INTEN
R/W 0
7:4
RESERVED
R
0
3
CH3_TC_INTEN
R/W 0
2
CH2_TC_INTEN
R/W 0
1
CH1_TC_INTEN
R/W 0
0
CH0_TC_INTEN
R/W 0
DP32G030
3 2 1 0 3 2 1 0
DMA_INTST 0x08
31:12 RESERVED
11
CH3_THC_INTST
10
CH2_THC_INTST
9
CH1_THC_INTST
8
CH0_THC_INTST
7:4
RESERVED
3
CH3_TC_INTST
2
CH2_TC_INTST
R
0
R/W 0
R/W 0
R/W 0
R/W 0
R
0
3 1 2 1 1 1 0 1
R/W 0 R/W 0
3 1 2 1
397 432
1
CH1_TC_INTST
R/W 0
0
CH0_TC_INTST
R/W 0
DP32G030
1 1 0 1
DMA_CHnCTR 0x100 + 0x20*(n)
31:17 RESERVED 16 SWREQ
15:14 PRI
13 LOOP 12:1 LENTH
R R/W
R/W
R/W R/W
0
1
0
1
2LOOP 0
LOOP 1
00
01
0
10
11
0 0
1
LENTH+1 0xfff MS_SIZE MD_SIZE
398 432
0
CH_EN
R/W 0
DP32G030
0 1 1 1LOOP 0 LOOP 1 2 1
DMA_CHnMOD 0x100 + 0x20*(n)+ 0x04
31:14 RESERVED
13:11 MD_SEL
R
R/W
0
MD
000
001 hsreq_md[0]
010 hsreq_md[1]
011 hsreq_md[2]
100 hsreq_md[3]
0
101 hsreq_md[4]
110 hsreq_md[5]
111 hsreq_md[6]
1 000 SRAM
2 001-111
399 432
10:9 MD_SIZE
R/W 0
MD_ADDMO
8
R/W 0
D
7:6 RESERVED
R
0
5:3 MS_SEL
R/W 0
2:1 MS_SIZE
R/W 0
DP32G030
MD 008bits 0116bits 1032bits 11 MD 0 1
MS 000 001 hsreq_ms[0] 010 hsreq_ms[1] 011 hsreq_ms[2] 100 hsreq_ms[3] 101 hsreq_ms[4] 110 hsreq_ms[5] 111 hsreq_ms[6] 1 000 SRAM 2 001-111
MS 008bits 0116bits 1032bits 11
400 432
MS_ADDMO
0
R/W 0
D
DP32G030
MS 0 1
DMA_CHnMSADDR 0x100 + 0x20*(n)+ 0x08
31:0
MS_ADDR
R/W
MS
0
32 16 8
DMA_CHnMDADDR 0x100 + 0x20*(n) + 0x0C
31:0
MD_ADDR R/W
MD
0
32 16 8
DMA_CHn_ST 0x100 + 0x20*(n) + 0x10
31:12 RESERVED 11:0 CUR_LENTH
R
0
R
0
401 432
5.25 AES AES
DP32G030
5.25.1
AES 128 AES
128 128 CPU
ECB CBC CTR
5-183 AES
402 432
DP32G030
5.25.2
AES Rijndael / 128 4 32 ECBCBCCTR 128 128 213 128 1 32 INPUT buffer 1 32 OUTPUT buffer 32 128 CBC AES CTR
32
5.25.3
403 432
5-184 AES
DP32G030
AES
5.25.4
AES AES EN = 0 AES_CR CHMOD [1 0] ·ECB ·CBC ·CTR
ECB
AES_IVR
404 432
DP32G030
5-185 AES
5-186 AES
405 432
DP32G030
CBC
CBC AES_IVRx IV IV
5-187 AES
406 432
DP32G030
5-188 AES
CTR
32 XOR
407 432
DP32G030
5-189 AES
408 432
DP32G030
5-190 AES
AES AES_CR DATATYPE
409 432
DP32G030
410 432
5-191 AES
DP32G030
AES KEYIV
1. AES_CR·EN=0 AES 2. AES_CR·MODE[1:0]=00 AES_CR·CHMOD[1:0] 3. ECB AES_KEYRx CTR CBC AES_IVRx 4. AES_CR·EN=1 AES 5. AES_DINR MSB 6. AES_SR CCF 7. AES_DOUTR MSB 8. 567 KEY KEY CTR IV
AES KEY
411 432
1. AES_CR·EN=0 AES
DP32G030
2. AES_CR · MODE[1:0]=01 AES_CR·CHMOD[1:0]
3. AES_KEYRx AES_IVRx
4. AES_CR·EN=1 AES
5. AES_SR CCF
6. AES_KEYRx AES_KEYRx
7. 3456
KEY
AES KEYIV
1. AES_CR·EN=0 AES 2. AES_CR·MODE[1:0]=10 AES_CR·CHMOD[1:0] 3. ECB AES_KEYRx CTR CBC AES_IVRx 4. AES_CR·EN=1 AES 5. AES_DINR MSB 6. AES_SR CCF 7. AES_DOUTR MSB
412 432
8. 567
DP32G030
KEY
CTR KEY KEYCTR IV IV
+
+ AES KEY
1. AES_CR·EN=0 AES 2. AES_CR·MODE[1:0]=11 + AES_CR·CHMOD[1:0] CTR + 3. ECB AES_KEYRx CTR CBC AES_IVRx 4. AES_CR·EN=1 AES 5. AES_DINR MSB 6. AES_SR CCF 7. AES_DOUTR MSB 8. 567 KEY AES AES_KEY
CTR
413 432
DP32G030
AES
BASE: 0x400BD000
AES_CR
0x00
32
AES_SR
0x04
32
AES_DINR
0x08
32
AES_DOUTR 0x0c
32
AES_KEYR0
0x10
32
AES_KEYR1
0x14
32
AES_KEYR2
0x18
32
AES_KEYR3
0x1C
32
AES_IVR0
0x20
32
AES_IVR1
0x24
32
AES_IVR2
0x28
32
AES_IVR3
0x2C
32
R/W R R/W R R/W R/W R/W R/W R/W R/W R/W R/W
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
AES AES AES AES AES 0 AES 1 AES 2 AES 3 AES 0 AES 1 AES 2 AES 3
AES_CR 0x00
31:9
RESERVED
8
ERRC
R
R/W
0
0
1 RDERR WRERR
414 432
7
CCFC
W
0
6:5
CHMOD
R/W 0
4:3
MODE
R/W 0
2:1
DATATYPE
R/W 0
0
EN
R/W 0
DP32G030
AES 00ECB 01CBC 10CTR 11 AES AES AES AES
AES 00 01 10 11+ AES AES AES CTR 4 CTR 4 3
0032 0116 0x764356AB 0x56AB7643 108 0x764356AB 0xAB564376 111 0x00112233 0xCC448800 AES AES AES
AES AES EN AES AES 2
415 432
DP32G030
AES_SR 0x04
31:3 RESERVED
2
WRERR
1
RDERR
0
CCF
R R
R
R
0
AES_DINR
AES_CR ERRC 0
0 1 AES WRERR AES
AES_DOUTR
AES_CR ERRC 0
0 1 AES RDERR AES
CCFIE AES_CR
0
AES_CR CCFC
1
0
AES_DINR 0x08
416 432
31:0 DINR
R/W 0
DP32G030
4 1 4 MSB LSB 2 AES_KEYRx
3 4+ 4 MSB LSB 32
AES_DOUTR 0x0C
31:0 DOUTR
R
CCF 4 128
- 1 4 MSB
0
LSB
- 2 AES_KEYRx
- 3 4+ 4 MSB LSB
32
AES_KEYR0 0x10
417 432
31:0 KEYR
R/W 0
DP32G030
[31:0] AES 1 2 4 + LSB [31:0] 3 LSB [31:0] AES CCF AES 4 +
AES_KEYR1 0x14
31:0 KEYR
R/W
0
[63:32]
AES_KEYR2 0x18
31:0 KEYR
R/W
0
[95:64]
AES_KEYR3 0x1C
31:0 KEYR
R/W
0
[127:96]
418 432
AES_IVR0 0x20
DP32G030
31:0 IVR
R/W
[310] AES_CR EN 1
- ECB 0
- CTR CBC CTR 32
AES 0x00000000
AES_IVR1 0x24
31:0 IVR
R/W
[63:32]
CTR
0
AES 0x00000000
AES_IVR2 0x28
31:0 IVR
R/W
[95:64]
CTR
0
AES 0x00000000
419 432
AES_IVR3 0x2C
DP32G030
31:0 IVR
R/W
MSB IVR [12796]
CTR
0
AES 0x00000000
420 432
6.
DP32G030
IO
6.1
3.3V
TA = 25 °C VDD =3.3V
6.2
6.2.1
VDD VSS VIN VDD VSS
1
-0.3
3.6
V
VSS-0.3
3.6
V
50 mV
50 mV
6.2.2
I DD IOUT I IN
IIN
2
-30
-5
120 mA
30
mA
5
mA
-25
25
mA
421 432
6.2.3
DP32G030
TSTG TJ
3
-45
150
125
6.3
6.3.1
VDD FCLK TA
4
2.0
3.3
3.6
V
-
-
72 MHz
-40
-
85
6.3.2
TVR TVF
5
VDD VDD
0.3
-
uS/V
0.3
-
uS/V
6.3.3
VPOR VPDR
6
1.87
1.76
1.9 1.8
1.96
V
1.85
V
422 432
VHYS
PDR
TRST
DP32G030
90
100
110 mV
-
0.6
-
ms
6.3.4
I DD
I DD
I DD
I DD I DD I DD I DD I DD I DD I DD I DD I DD I DD
sleep sleep sleep
7
3.3V@48MHz Run in RAM All Peripherals clock
OFF 3.3V@24MHz Run in RAM All Peripherals clock
OFF 3.3V@12MHz Run in RAM All Peripherals clock
OFF 3.3V@32KHz Run in RAM All Peripherals clock
OFF 3.3V@48MHz All Peripherals clock
ON 3.3V@24MHz All Peripherals clock
ON 3.3V@12MHz All Peripherals clock
ON 3.3V@48MHz All Peripherals clock
OFF 3.3V@24MHz All Peripherals clock
OFF 3.3V@12MHz All Peripherals clock
OFF
3.3V@48MHz
-
3.3V@48MHz All Peripherals clock
ON 3.3V@24MHz All Peripherals clock
ON
423 432
mA
mA
A
A
mA
mA A
mA
mA
A
12
-
A
A
A
3.3V@12MHz
I DD
sleep All Peripherals clock
ON
3.3V@48MHz
I DD
sleep All Peripherals clock
OFF
3.3V@24MHz
I DD
sleep All Peripherals clock
OFF
3.3V@12MHz
I DD
sleep All Peripherals clock
OFF
I DD
deepsleep
3.3V@48MHz
I DD
stop
3.3V@48MHz
3.3V@48MHz
I DD
stop All Peripherals clock
OFF
3.3V@24MHz
I DD
stop All Peripherals clock
OFF
3.3V@12MHz
I DD
stop All Peripherals clock
OFF
DP32G030 A
A
A
A
-
5
-
A
-
0.5
-
A
A
A
A
All Peripherals clock
6.3.5
VREFINT
-40~85 1.19
1.2
1.21
V
tS_vrefint
ADC sampling time when reading the internal reference voltage
-
-
5
-
us
6.3.6
Twusleep Twudeepsleep
sleep deepsleep
-
-
100
-
us
-
-
140
-
us
Twustop
stop
-
-
350
-
us
424 432
DP32G030
6.3.7
fHSI
TRIM
Trim step
ACC
DC
TSU
I DD
-
VDD=2.0V~3.6 V
-40~85 VDD=3.3V
-
-
-
48
-
MHz
-
0.8
-
%
-1
-
1
%
45
50
55
%
-
10
-
S
-
100
85 A
6.3.8
FLSI
TRIM
Trim step
ACC
DC
TSU
I DD
-
VDD=2.0V~3.6 V
-40~85 VDD=3.3V
-
-
-
32.768
-
KHz
-
-
1.8
%
-3
3
%
45
50
55
%
-
-
80
S
-
-
1
A
6.3.9
FHSE
TSU
-
4
-
32
MHz
0.3
-
1
ms
425 432
I DD
VDD = 3.3V, Rm = 45, CL =
10pF@8MHz VDD = 3.3V, Rm =
30, CL = 20pF@16MHz
DP32G030
-
0.86
1.45
uA
-
0.8
1.2
uA
6.3.10
FLSE
TSU
I DD
-
CL=20pF CL = 20pF@8MHz
-
32.768
-
KHz
-
600
-
ms
1.2
-
2
uA
6.3.11PLL
fPLL_IN
fPLL_OUT
Tlock
PLL
Jitter
Cycle-to-cycle jitter
-
4
-
48
MHz
40
-
60
%
-
72
-
MHz
-
-
35
us
-
200
ps
6.3.12FLASH
Tprog Terase
32-bit
-40~85
-
-
20
us
0.5KB
-40~85
-
-
4
ms
426 432
IDD Standby
Deep power down
Ncycle
/
Tret
-40~85 -40~85
85 85
DP32G030
-
-
0.9
mA
-
-
0.9
mA
-
90
-
uA
-
3
-
uA
10
-
-
10
-
-
6.3.13EMC
ESD(HBM)
ESD(CDM)
LatchUp
TA = 25C JEDEC JS-001-2017
TA = 25C JEDEC JS-002-2014
TA = 25C JEDEC78D
2000 500 100
V V
mA
6.3.14IO
VIL VIH Vhys IIH
TC3.3V IO
-
FT5V tolerance IO
-
- 0.39VDD V - 0.47VDD V
TC3.3V IO
0.55VDD
-
FT5V tolerance IO 0.51VDD
-
-
V
-
V
-
-
240
-
mV
-
-1
427 432
-
1
uA
DP32G030
IIL
-
-1
-
1
uA
RPU
-
-
40
-
K
RPD
-
-
40
-
K
VOL
VOH
TC3.3V IO |IIO| = 8mA
VDD 2.7V
-
-
VDD-0.29
-
0.27
V
-
V
VOL
VOH
TC3.3V IO |IIO| = 20mA VDD 2.7V
-
-
VDD-0.87
-
1
V
-
V
VOL_5 VOH_5
FT5V tolerance IO
-
-
|IIO| = 8mA
VDD 2.7V
VDD-0.3
-
0.28
V
-
V
VOL_5 VOH_5
FT5V tolerance IO
-
-
|IIO| = 20mA
VDD 2.7V
VDD-0.91
-
0.9
V
-
V
6.3.15EXTRST
VIL
VIH
Vhys
RPU
VF
VNF
-
VIN = VSS -
-
-
0.3VDD V
0.7VDD
-
-
V
0.71
1.19
1.33
V
-
40
-
K
-
-
70
ns
-
350
-
ns
428 432
6.3.16ADC
DP32G030
VDD
ADC
-
2
IDD
ADC
VDD = 3.3V
-
fADC
ADC
-
-
-
3.6
V
0.5
-
mV
48
-
MHz
fs
-
-
2.4
-
MHz
VAIN RAIN RADC
VIN = VSS
-
0
-
VDD
V
-
-
50
K
-
-
0.65
K
CADC
-
-
-
3.8
pF
Ts
-
1
TCONV fADC = fSYS = 48MHz
20
Vextvref
-
-
-
128
1/fADC
-
147
1/fADC
-
VDD
V
6.3.17ADC
ET
Total unadjusted error
EO
Offset error
EG
Gain error
ED
Differential linearity error
EL
Integral linearity error
-
-
+/-4 LSB
fADC = 48M,
-
RAIN3k,
VDDA=2.7V to
-
3.6V TA = -40 to
85
-
-
+/-1.5 LSB
-
+/-2.5 LSB
-
+/-1 LSB
-
-
+/-1.7 LSB
429 432
6.3.18
DP32G030
TL
Avg_Slope
Slope
V25
25
Tstart
Ts_temp
ADC
-
6.3.19
-
-
+/-2.7
3.05
3.13
3.2 mv/
1.34
1.543
1.52
V
4
-
10
us
5
-
-
us
VDD CMIR
Vopa_offset
Iload IDD CMRR PSRR GBW SR Rload
-
2.0
-
3.6
V
-
0
Input offset voltage maximum trim range
25No load output
-
25No load output
-
Input offset voltage
after offset trim
2.0V~3.6V-40 ~85
-
-
-
-
VDD
V
-
8
mV
-
0.4
mV
-
0.8
mV
-
500
uA
-
Common mode rejection ratio
-
54
Power supply rejection ratio
-
72
-
2.1
-
320
uA
-
196
dB
-
138
dB
4.7
12.6 MHz
Slew Rate
-
2.5
4.1
5.4
V/us
-
4
-
-
K
430 432
DP32G030
Cload
-
-
-
50
pF
VOHsat High saturation voltage
-
VDD-30
-
-
mV
VOLsat Low saturation voltage
-
-
-
31
mV
PM
Phase Margin
-
46
67
97
°
GM
Gain Margin
THD
Total Harmonic Distortion
-
6.6
17
30
dB
-
3.1
3.2
3.3
%
6.3.20
VDD
IDD
VCM Voffset Vhys Tstart
offset
AV
DC Voltage Gain
-
-
2.0
-
3.6
V
-
30
45
uA
0.35 0.5VDD VDD-0.3 V
-
10
20
mV
-
60
140
mV
-
-
400
ns
45
65
75
dB
431 432