Motherboard Pegatron VA70 BA52HR, BA52CR - Schematics. Download Free.
Notebook Acer Aspire V3-771G - Service manuals and Schematics, Disassembly / Assembly. Download Free.
5
4
3
2
1
VA70 BLOCK DIAGRAM
POWER
VGA POWER
CPU VCORE
GPU VCORE
PAGE 80
PAGE 80
CPU
DDR3 1333/1600 MHz channel A
DDR-III SO-DIMM*2
SYSTEM, +3V, +5V
PAGE 81
+1.05VS_VGA
PAGE 16
+VCCP & +VCCP_VT
+1.5VS_VGA
D
D
dGPU
PCIE X 16
Sandy Bridge Ivy Bridge
DDR3 1333/1600 MHz channel B
DDR-III SO-DIMM*2
DDR & VTT
PAGE 82 PAGE 83
+3VS_VGA
N13P GS/GL/GT
PAGE 17
2.5V & 1.5VS &1.1VS
+12VS_VGA
PAGE 70~79
FDI x 4
PAGE 3-10
DMI x 4
USB2.0
Camera
PAGE 84
SMART CHARGER
PAGE 88
LOAD SWITCH
PAGE 91
HDMI
PAGE 39
CRT
PAGE 38
LVDS/eDP
PAGE 37
PCH
USB2.0 USB2.0
USB PORT9
USB PORT3
PAGE 58
Head Phone (Combo Jack)
Azalia Codec RTK/ALC271 (VB6)
Azalia
Cougar Point Panther Point
USB2.0 USB3.0
USB20 PORT1 USB30 PORT2
C
MIC
PAGE 58
PAGE 41 42
HM77
USB2.0
USB20 PORT0
K/B
USB3.0
USB30 PORT1
PAGE 48
T/P
PAGE 48
FAN
PAGE 49
EC
PAGE 30
IT8518E
LPC HSPI
PAGE 13-19
PCIE *1 USB2.0
PAGE 61
MiniCard WLAN/WMAX BT combo
PAGE 55
POWER DETECT
PAGE 90
LOAD SWITCH
PAGE 91
POWER PROTECT
PAGE 92
POWER PROTECT
PAGE 92
Power Rails
Sleep State RTC VA
VSUS V
VS
S0
ON
ON
ON
ON
ON
C
S3
ON
ON
ON
ON
OFF
S4
ON
ON
ON
OFF OFF
S5/ AC
ON
ON
ON
OFF OFF
S5/ DC
ON
ON
OFF OFF OFF
PCIe Port PCIE_P1 CARDREADER PCIE_P2 Mini CARD (WLAN)
PCIE_P3 mSATA
USB30 IC FL1009
PCIE_P4 USB30
SATA
SPI ROM 4MB (BIOS/EC)
PCIE *1
PAGE 51
PCIE_P5 PCIE_P6 LAN
PAGE 30
SPI ROM
SPI
PCIE *1
Giga LAN AR8151/AR8152
RJ45
USB20 PORT USB P00 External MB
2MB (ME)
PAGE 28
PCIE *1
PAGE 33
Card Reader
PAGE 34
USB P01 External MB USB P02
B
RTS5209
B
USB P03 External DB
SATA HDD
PAGE 40
USB P04
PAGE 60
SATA HDD
PCIE *1 SATA 3.0
mSATA/SSD
USB P05 USB P08 USB P09
BT Camera External DB
PAGE 60
SATA ODD
PAGE 53
USB P10 USB P11 SSD USB P12
PAGE 60
USB P13
IO BOARD
TP BT BOARD
PWR BOARD
POWER Button
USB PORT3
HP_OUT
Touch PAD Button
POWER LED
A
USB PORT9
MIC IN
LID SW
LID SW
SATA PORT SATA P0 HDD 1 SATA P1 HDD 2 SATA P2 ODD 3 SATA P3 mSATA SATA P4 SATA P5
A
Title : BLOCK DIAGRAM
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
1
of
77
5
4
3
2
1
5
4
3
BOM optional
Remark
N/A
For
/ABCT
For ABCT
D
/niAMT
For no iAMT
/HOME
For
/HR
For Huron River
/Non_HSPI
For ROM SETTING
Entry
For
Main
For
/USB20
For USB 2.0
/HSPI
For
C
/HDMI
For HDMI
/TP1_AUD
For power control
/TP1_BT
For power control
/TP1_CAMERA
For power control
/TP1_CR
For power control
/TP1_LAN
For power control
/TP1_ODD
For power control
/TP1_WLAN
For power control
/THERM
For Palm Rest
B
/usb30
For USB 3.0
/ZPODD
For ODD battery saving Mount R5108
@
For
@/MP
For debug port, MP
/BT270 /COMBO_BT /SATA+
keypat list keypat list For Sata Repeater, SR
A
5
4
3
2
1
D
C
B
Title : System Setting A
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
A
BA52HR/CR
1.0
Date: Friday, February 03, 2012
2
Sheet
2
of 94
1
5
4
3
2
+VCCP
+VCCP 4,6,7,25,26,27,37,47,63,82
U0301A
22 DMI_TXN0 22 DMI_TXN1 22 DMI_TXN2 22 DMI_TXN3
B27 B25 A25 B24
DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]
D
22 DMI_TXP0 22 DMI_TXP1 22 DMI_TXP2 22 DMI_TXP3
B28 B26 A24 B23
DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]
22 DMI_RXN0 22 DMI_RXN1 22 DMI_RXN2 22 DMI_RXN3
G21 E22 F21 D21
DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]
22 DMI_RXP0 22 DMI_RXP1 22 DMI_RXP2 22 DMI_RXP3
G22 D22 F20 C21
DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]
22 FDI_TXN[7:0]
FDI_TXN0 A21 FDI_TXN1 H19 FDI_TXN2 E19 FDI_TXN3 F18 FDI_TXN4 B21 FDI_TXN5 C20 FDI_TXN6 D18 FDI_TXN7 E17
FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]
22 FDI_TXP[7:0]
FDI_TXP0 A22 FDI_TXP1 G19 FDI_TXP2 E20 FDI_TXP3 G18 FDI_TXP4 B20 FDI_TXP5 C19 FDI_TXP6 D19 FDI_TXP7 F17
FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]
C
22 FDI_FSYNC0 22 FDI_FSYNC1
J18 J17
FDI0_FSYNC FDI1_FSYNC
22
FDI_INT
H20 FDI_INT
22 FDI_LSYNC0 22 FDI_LSYNC1
J19 H17
FDI0_LSYNC FDI1_LSYNC
+VCCP
DP Compensation
24.9Ohm 2 1%
37 DP_HPD#_PCH
1 R0302 DP_COMP
A18 A17 B16
eDP_COMPIO eDP_ICOMPO eDP_HPD
37 DP_AUXP_PCH 37 DP_AUXN_PCH
C15 D15
eDP_AUX eDP_AUX#
37 DP_TXP0_PCH 37 DP_TXP1_PCH
37 DP_TXN0_PCH 37 DP_TXN1_PCH
T0301 T0302
T0303 T0304
1 1
DP_TXP2_PCH DP_TXP3_PCH
C17 F16 C16 G15
eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]
1 1
DP_TXN2_PCH DP_TXN3_PCH
C18 E16 D16 F15
eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]
eDP
Intel(R) FDI
DMI
PCI EXPRESS* - GRAPHICS
PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO
J22 PEG_COMP J21 H22
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
K33 PCIENB_RXN15 M35 PCIENB_RXN14 L34 PCIENB_RXN13 J35 PCIENB_RXN12 J32 PCIENB_RXN11 H34 PCIENB_RXN10 H31 PCIENB_RXN9 G33 PCIENB_RXN8 G30 PCIENB_RXN7 F35 PCIENB_RXN6 E34 PCIENB_RXN5 E32 PCIENB_RXN4 D33 PCIENB_RXN3 D31 PCIENB_RXN2 B33 PCIENB_RXN1 C32 PCIENB_RXN0
J33 PCIENB_RXP15 L35 PCIENB_RXP14 K34 PCIENB_RXP13 H35 PCIENB_RXP12 H32 PCIENB_RXP11 G34 PCIENB_RXP10 G31 PCIENB_RXP9 F33 PCIENB_RXP8 F30 PCIENB_RXP7 E35 PCIENB_RXP6 E33 PCIENB_RXP5 F32 PCIENB_RXP4 D34 PCIENB_RXP3 E31 PCIENB_RXP2 C33 PCIENB_RXP1 B32 PCIENB_RXP0
M29 PCIENB_TXN0 CX0301 2 M32 PCIENB_TXN1 CX0302 2 M31 PCIENB_TXN2 CX0303 2 L32 PCIENB_TXN3 CX0304 2 L29 PCIENB_TXN4 CX0305 2 K31 PCIENB_TXN5 CX0306 2 K28 PCIENB_TXN6 CX0307 2 J30 PCIENB_TXN7 CX0308 2 J28 PCIENB_TXN8 CX0309 2 H29 PCIENB_TXN9 CX0310 2 G27 PCIENB_TXN10 CX0311 2 E29 PCIENB_TXN11 CX0312 2 F27 PCIENB_TXN12 CX0313 2 D28 PCIENB_TXN13 CX0314 2 F26 PCIENB_TXN14 CX0315 2 E25 PCIENB_TXN15 CX0316 2
M28 PCIENB_TXP0 CX0317 2 M33 PCIENB_TXP1 CX0318 2 M30 PCIENB_TXP2 CX0319 2 L31 PCIENB_TXP3 CX0320 2 L28 PCIENB_TXP4 CX0321 2 K30 PCIENB_TXP5 CX0322 2 K27 PCIENB_TXP6 CX0323 2 J29 PCIENB_TXP7 CX0324 2 J27 PCIENB_TXP8 CX0325 2 H28 PCIENB_TXP9 CX0326 2 G28 PCIENB_TXP10 CX0327 2 E28 PCIENB_TXP11 CX0328 2 F28 PCIENB_TXP12 CX0329 2 D27 PCIENB_TXP13 CX0330 2 E26 PCIENB_TXP14 CX0331 2 D25 PCIENB_TXP15 CX0332 2
+VCCP R0301 1 1% 2 24.9Ohm
PCIENB_RXN[15:0] 70
PCIENB_RXP[15:0] 70
1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V
1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V 1 0.22UF/10V
/DGPU PCIEG_RXN15 /DGPU PCIEG_RXN14 /DGPU PCIEG_RXN13 /DGPU PCIEG_RXN12 /DGPU PCIEG_RXN11 /DGPU PCIEG_RXN10 /DGPU PCIEG_RXN9 /DGPU PCIEG_RXN8 /DGPU PCIEG_RXN7 /DGPU PCIEG_RXN6 /DGPU PCIEG_RXN5 /DGPU PCIEG_RXN4 /DGPU PCIEG_RXN3 /DGPU PCIEG_RXN2 /DGPU PCIEG_RXN1 /DGPU PCIEG_RXN0
/DGPU PCIEG_RXP15 /DGPU PCIEG_RXP14 /DGPU PCIEG_RXP13 /DGPU PCIEG_RXP12 /DGPU PCIEG_RXP11 /DGPU PCIEG_RXP10 /DGPU PCIEG_RXP9 /DGPU PCIEG_RXP8 /DGPU PCIEG_RXP7 /DGPU PCIEG_RXP6 /DGPU PCIEG_RXP5 /DGPU PCIEG_RXP4 /DGPU PCIEG_RXP3 /DGPU PCIEG_RXP2 /DGPU PCIEG_RXP1 /DGPU PCIEG_RXP0
PEG Compensation Enable PCIE Lane Reversal Need to PD CFG[2]
PCIEG_RXN[15:0] 70
PCIEG_RXP[15:0] 70
SOCKET989 12V013ISM000
1201-006D000 - 988B for Huron River
If Support PCIE Gen3, change AC Cap to 0.22uF
B
1 D C B
A
A
Title : CPU(1)_DMI,PEG,FDI,CLK,MISC
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
3
of
94
5
4
3
2
1
5
4
Select the termination voltage of DMI and FDI Tx/Rx (PCH Strap) H_SNB_IVB# connected to DF_TVS via 1Kohm DF_TVS needs PU via 2.2Kohm to +1.8VS
25 H_SNB_IVB#
U0301B C26 SNB_IVB#
T0401
1
TP_SKTOCC#_R
AN34 SKTOCC#
T0402
1
do not remove because POWER removed thier PU R. Joyoung0613
TP_CATERR#_R
AL33 CATERR#
D
25
H_PECI
AN33 PECI
+VCCP
62Ohm 2
1 R0404
H_PROCHOT#
R0403
2
1
H_PROCHOT#_D
AL32 PROCHOT#
R1.0 1229
25,47 H_THRMTRIP#
56Ohm
2 R0402
1 H_THRMTRIP#_R SP0401
AN32 THERMTRIP#
THERMAL MISC
DDR3 MISC
CLOCKS
3
2
1
BCLK BCLK#
A28 CLK_EXP_P_R A27 CLK_EXP_N_R
DPLL_REF_SSCLK DPLL_REF_SSCLK#
A16 CLK_DP_P_R A15 CLK_DP_N_R
SP0404 1 SP0405 1
1 R0431
@
R0430 1
2 R0402 2 R0402
2 1KOhm
RN0401B 3 RN0401A 1
1KOhm 2
+VCCP
0Ohm 4 0Ohm 2
CLK_EXP_P 21 CLK_EXP_N 21
CLK_DP_P 21 CLK_DP_N 21
+1.5V_VCCDDQ +3VS +3VSUS +VCCP +3V
+1.5V_VCCDDQ 7
+3VS
16,17,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+3VSUS 22,24,27,28,30,33,65,81,85,92
+VCCP 3,6,7,25,26,27,37,47,63,82
+3V
24,37,51,63,65,91
DDR3 DRAM Reset.
@
SM_DRAMRST# R8
CPUDRAMRST# 5
D
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
AK1 SM_RCOMP_0 A5 SM_RCOMP_1 A4 SM_RCOMP_2
R0418 1 R0419 1 R0420 1
1% 2 140Ohm 1% 2 25.5Ohm 1% 2 200Ohm
System Memory Impedance Compensation Huron River platform Design Guide 436735 P.88 Table 37. Eric Fang to Alan Chien 11/15/2010
Huron River platform Design Guide Update 440484 SM_RCOMP_1 use 26ohm 1%
22 H_PM_SYNC 2
10KOhm 25 H_CPUPWRGD
22 PM_DRAM_PWRGD
2 R0402 1 R0408
2 R0402
2 130Ohm
1 H_PM_SYNC_R SP0402
AM34 PM_SYNC
1 H_CPUPWRGD_R SP0403
AP33 UNCOREPWRGOOD
1 VDDPWRGOOD_R R0409
V8 SM_DRAMPWROK
BUF_CPU_RST#
AR33 RESET#
PWR MANAGEMENT JTAG & BPM
PRDY# PREQ#
TCK TMS TRST#
TDI TDO
AP29 AP27
AR26 AR27 AP30
AR28 AP26
XDP_PRDY# XDP_PREQ#
XDP_TCK XDP_TMS XDP_TRST#
XDP_TDI_R XDP_TDO_R
DBR# AL35 H_DBR#_R
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32
XDP_BPM0_R XDP_BPM1_R XDP_BPM2_R XDP_BPM3_R XDP_BPM4_R XDP_BPM5_R XDP_BPM6_R XDP_BPM7_R
1
T0403
1
T0404
1
T0405
1
T0406
1
T0407
1
T0408
1
T0409
1
T0410
1
T0411
1
T0412
1
T0413
1
T0414
1
T0415
1
T0416
1
T0417
1
T0418
R1.0 PU/PD for JTAG signals
XDP_TMS XDP_TDI_R XDP_TDO_R
XDP_PREQ#
XDP_TCK XDP_TRST#
R0401 1
2 51Ohm
R0402 1
2 51Ohm
R0410 1 @ 2 51Ohm
R0406 1 @ 2 51Ohm
R0407 1 R0405 1
2 51Ohm 2 51Ohm
+VCCP
C
C
PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ
SOCKET989 12V013ISM000
If don't support S3 power reduction 1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405 2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106
+1.5V_VCCDDQ
+3VSUS
+3V
3. Unmount Q0501, C0501, R0506, R0504, R0507 4. Mount R0501, change r0508 to 0ohm from 1kohm
1
R0449 200Ohm 1%
PM_DRAM_PWRGD
2
R0402
1 SP0406
R1.1 change to short pin 0R7042506
1KOhm @ 1%
1
2
1.57 Volt
2
1
R0452 1.1KOhm @
1%
2
1
U0404 5 VCC
A1 B2
4 Y
GND 3
Vcc=1.65~5.5
@
C0405 0.22UF/10V @
2
R0453 10KOhm @
2
Q0403
3 PMBS3904
C
@
B1
E 2
C0404 0.22UF/10V
@
2
1
1
+1.5V_VCCDDQ
R0454 1%
24.3KOhm
1
2
@
R0455 47KOhm @ 1%
1
5 Unmount Q0701, R0703, R0705, Q0702 6. Mount R0702 and short JP0701
7. Unmount R2232, R2231, Q2203
2
Power good for +1.5V_VCCDDQ (delay > 100ns)
Reserve S3 power reduction schematic
B
B
+VCCP
1
24 PLT_RST#
@ U0402
1 NC 2A 3 GND
Vcc=1.65~5.5
VCC 5 Y4
+3VS
@
1
2
C0402 0.1UF/16V
BUFO_CPU_RST#
2
R0413 75Ohm @
1
2
R0414 @ 43Ohm
Check Frank remove or not??
2
1
R0415 0Ohm @
BUF_CPU_RST#
R0416 1
1
2 1.5KOhm
R0417 750Ohm 1%
R1.0 0119 Sandy Bridge:R0417 = 750 ohm (10V220000093) Ivy Bridge:R0417 = 680 ohm (10V240000041)
80 VR_HOT#
R0486 1 @ 2 0Ohm
H_PROCHOT#
R1.0 0224 Intel Comments
C0401 47PF/50V
@
1
2
D3
Q0401
2N7002
1
S2 G
THRO_CPU
THRO_CPU 30
2
A
A
Frank 0506 EVERST check
Title : CPU(1)_DMI,PEG,FDI,CLK,MISC
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
4
of
94
5
4
3
2
1
5 U0301C
4
3
+1.5V
+1.5V
7,16,51,63,83
U0301D
16 M_A_DQ[63:0] D
C
M_A_DQ0 C5 M_A_DQ1 D5 M_A_DQ2 D3 M_A_DQ3 D2 M_A_DQ4 D6 M_A_DQ5 C6 M_A_DQ6 C2 M_A_DQ7 C3 M_A_DQ8 F10 M_A_DQ9 F8 M_A_DQ10 G10 M_A_DQ11 G9 M_A_DQ12 F9 M_A_DQ13 F7 M_A_DQ14 G8 M_A_DQ15 G7 M_A_DQ16 K4 M_A_DQ17 K5 M_A_DQ18 K1 M_A_DQ19 J1 M_A_DQ20 J5 M_A_DQ21 J4 M_A_DQ22 J2 M_A_DQ23 K2 M_A_DQ24 M8 M_A_DQ25 N10 M_A_DQ26 N8 M_A_DQ27 N7 M_A_DQ28 M10 M_A_DQ29 M9 M_A_DQ30 N9 M_A_DQ31 M7 M_A_DQ32 AG6 M_A_DQ33 AG5 M_A_DQ34 AK6 M_A_DQ35 AK5 M_A_DQ36 AH5 M_A_DQ37 AH6 M_A_DQ38 AJ5 M_A_DQ39 AJ6 M_A_DQ40 AJ8 M_A_DQ41 AK8 M_A_DQ42 AJ9 M_A_DQ43 AK9 M_A_DQ44 AH8 M_A_DQ45 AH9 M_A_DQ46 AL9 M_A_DQ47 AL8 M_A_DQ48 AP11 M_A_DQ49 AN11 M_A_DQ50 AL12 M_A_DQ51 AM12 M_A_DQ52 AM11 M_A_DQ53 AL11 M_A_DQ54 AP12 M_A_DQ55 AN12 M_A_DQ56 AJ14 M_A_DQ57 AH14 M_A_DQ58 AL15 M_A_DQ59 AK15 M_A_DQ60 AL14 M_A_DQ61 AK14 M_A_DQ62 AJ15 M_A_DQ63 AH15
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
16
M_A_BS0
16
M_A_BS1
16
M_A_BS2
AE10 AF10
V6
SA_BS[0] SA_BS[1] SA_BS[2]
16
M_A_CAS#
16
M_A_RAS#
16
M_A_WE#
AE8 AD9 AF9
SA_CAS# SA_RAS# SA_W E#
B
SOCKET989 12V013ISM000
DDR SYSTEM MEMORY A
SA_CLK[0] SA_CLK#[0] SA_CKE[0]
AB6 AA6 V9
SA_CLK[1] SA_CLK#[1] SA_CKE[1]
AA5 AB5 V10
SA_CLK[2] SA_CLK#[2] SA_CKE[2]
AB4 AA4 W9
SA_CLK[3] SA_CLK#[3] SA_CKE[3]
AB3 AA3 W 10
SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]
AK3 AL3 AG1 AH1
SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]
AH3 AG3 AG2 AH2
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
C4 G6 J3 M6 AL6 AM8 AR12 AM15
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
D4 F6 K3 N6 AL5 AM9 AR11 AM14
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
R1.0 S3 circuit:- DRAM_RST# to memory should be high during S3
+1.5V
M_A_DIM0_CLK_DDR0 16 M_A_DIM0_CLK_DDR#0 16 M_A_DIM0_CKE0 16
M_A_DIM0_CLK_DDR1 16 M_A_DIM0_CLK_DDR#1 16 M_A_DIM0_CKE1 16
M_A_DIM0_CLK_DDR2 16 M_A_DIM0_CLK_DDR#2 16 M_A_DIM0_CKE2 16
M_A_DIM0_CLK_DDR3 16 M_A_DIM0_CLK_DDR#3 16 M_A_DIM0_CKE3 16
M_A_DIM0_CS#0 16 M_A_DIM0_CS#1 16 M_A_DIM0_CS#2 16 M_A_DIM0_CS#3 16
M_A_DIM0_ODT0 16 M_A_DIM0_ODT1 16 M_A_DIM0_ODT2 16 M_A_DIM0_ODT3 16
M_A_DQS#[7:0] 16
M_A_DQS[7:0] 16
M_A_A[15:0] 16
17 M_B_DQ[63:0]
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
C9 A7 D10 C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2 J7 J8 K10 K9 J9 J10 K8 K7 M5 N4 N2 N1 M4 N5 M2 M1 AM5 AM6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9 AJ11 AT8 AT9 AH11 AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
17
M_B_BS0
17
M_B_BS1
17
M_B_BS2
17
M_B_CAS#
17
M_B_RAS#
17
M_B_WE#
AA9 AA7
R6
SB_BS[0] SB_BS[1] SB_BS[2]
AA10 AB8 AB9
SB_CAS# SB_RAS# SB_W E#
SOCKET989 12V013ISM000
2
R1.0 0209 Change R0508 to 1K ohm R0508 close to DIMM
16,17 DDR3_DRAMRST#
R0508 1
1
R0507 1KOhm @
2 1KOhm
0614-change Q0501 from UM6K1N to 2N7002
R0501
2
1 0Ohm
@ Q0501 2N7002
CPUDRAMRST#_R
3D 1
G 2S
CPUDRAMRST# 4
1 1% 2
@ R0506
4.99KOhm
9,21 DRAMRST_CNTRL_PCH
1
2
@ C0501 0.047UF/16V
A
Reserve S3 power reduction schematic
If don't support S3 power reduction 1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405 2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106
3. Unmount Q0501, C0501, R0506, R0504, R0507 4. Mount R0501, change r0508 to 0ohm from 1kohm
5 Unmount Q0701, R0703, R0705, Q0702 6. Mount R0702 and short JP0701
7. Unmount R2232, R2231, Q2203
5
4
3
DDR SYSTEM MEMORY B
2
SB_CLK[0] SB_CLK#[0] SB_CKE[0]
AE2 AD2 R9
SB_CLK[1] SB_CLK#[1] SB_CKE[1]
AE1 AD1 R10
SB_CLK[2] SB_CLK#[2] SB_CKE[2]
AB2 AA2 T9
SB_CLK[3] SB_CLK#[3] SB_CKE[3]
AA1 AB1 T10
SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]
AD3 AE3 AD6 AE6
SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3]
AE4 AD4 AD5 AE5
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
D7 F3 K6 N3 AN5 AP9 AK12 AP15
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
C7 G3 J6 M3 AN6 AP8 AK11 AP14
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_DIM0_CLK_DDR0 17 M_B_DIM0_CLK_DDR#0 17 M_B_DIM0_CKE0 17
M_B_DIM0_CLK_DDR1 17 M_B_DIM0_CLK_DDR#1 17 M_B_DIM0_CKE1 17
M_B_DIM0_CLK_DDR2 17 M_B_DIM0_CLK_DDR#2 17 M_B_DIM0_CKE2 17
M_B_DIM0_CLK_DDR3 17 M_B_DIM0_CLK_DDR#3 17 M_B_DIM0_CKE3 17
M_B_DIM0_CS#0 17 M_B_DIM0_CS#1 17 M_B_DIM0_CS#2 17 M_B_DIM0_CS#3 17
M_B_DIM0_ODT0 17 M_B_DIM0_ODT1 17 M_B_DIM0_ODT2 17 M_B_DIM0_ODT3 17
M_B_DQS#[7:0] 17
M_B_DQS[7:0] 17
M_B_A[15:0] 17
2
1 D
C
B
A
Title : CPU(2)_DDR3
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012 1
Sheet
5
of
94
5
4
3
2
1
+VCCP
0614-Remove C0641 and nostuff C0651,C0647,C0658
Vcc for processor core Voltage range: 0.3 - 1.52V
U0301F
POWER
SV-QC ICCMAX 94A
D
SV-DC ICCMAX 53A
+VCORE
Check net name??
CORE SUPPLY SVID
C B
AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26
Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100
PEG AND DDR
Voltage for the memory controller and shared cache defined at the motherboard VCCIO_SENSE and VSS_SENSE_VCCIO
ICCMAX_VCCIO 8.5A
+VCCP
VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24
VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39
VCCIO40
AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12
E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
J23
R1.0 0126 Intel Comments
+VCCP
1
VIDALERT# VIDSCLK VIDSOUT
AJ29 AJ30 AJ28
R1.0 0126 Intel Comments
H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT
R0602 1
Close to CPU 2 43Ohm
2
R0603 75Ohm 1%
+VCORE
1
1
1
1
C0634 22UF/6.3V
C0635 22UF/6.3V
C0636 22UF/6.3V
C0637 22UF/6.3V
C0638 22UF/6.3V
C0639 22UF/6.3V
C0640 22UF/6.3V
1
1
1
+VCCP +VCORE
+VCCP 3,4,7,25,26,27,37,47,63,82 +VCORE 63,80
2
2
2
2
2
2
2
@
@
Check net name??
1
HR_Decoupling guide from Intel (POWER + EE)
+VCCP 22uF * 19pcs (7 nostuff)
1
1
1
1
1
1
1
330uF * 3pcs
C0645
C0646
C0647
C0648
C0649
C0650
C0651
C0652
D
2
2
2
2
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
2
2
EIH31/30 (EE)
@
@
0622-Remove CE0603(powre schematic reserve)
+VCCP 10uF * 19pcs (2pcs no stuff) 22uF* 10 pcs (total no stuff) 330 uF *1pcs Power support
2
1
2
1
2
1
C0656 22UF/6.3V
C0657 22UF/6.3V
C0658 22UF/6.3V
C0659 22UF/6.3V
2
1
CR_Decoupling guide from Intel (POWER + EE)
+VCCP 22uF * 19pcs (7 nostuff) 330uF * 3pcs
2
Decoupling guide for Everest (EE)
+VCCP 22uF * 19pcs (7 no stuff) 330uF * 1pcs (1 no stuff)=>JE31HR/CR power support
1
C0601 10UF/6.3V
C0602 10UF/6.3V
2
1
2
1
1
1
1
1
C0604 10UF/6.3V
C0605 10UF/6.3V
C0622 10UF/6.3V
C0607 10UF/6.3V
C0627 10UF/6.3V
C0609 10UF/6.3V
C0610 10UF/6.3V
C0611 10UF/6.3V
2
2
2
2
2
2
2
@
@
1
1
1
HR_Decoupling guide from Intel (POWER + EE)
+VCC_CORE 22uF * 16pcs 10uF * 10pcs 470uF * 4pcs
2
1
EIH31/30
1
1
1
1
1
1
1
1
1
+VCC_CORE 22uF * 14pcs(6pcs unmount)
C
2
2
2
2
C0612 22UF/6.3V
C0613 22UF/6.3V
C0615 22UF/6.3V
C0616 22UF/6.3V
C0617 22UF/6.3V
C0618 22UF/6.3V
C0619 22UF/6.3V
C0620 22UF/6.3V
C0621 22UF/6.3V
C0606 22UF/6.3V
2
2
2
2
2
10uF * 16pcs (4pcs unmount) 470uF * 2pcs (Power support)
@
@
2
1
2
1
2
1
C0614 22UF/6.3V
C0626 22UF/6.3V
C0608 22UF/6.3V
C0628 22UF/6.3V
C0629 22UF/6.3V
C0630 22UF/6.3V
2
1
2
1
2
1
CR_Decoupling guide from Intel (POWER + EE)
+VCC_CORE 22uF * 16pcs 10uF * 10pcs 470uF * 4pcs
2
+VCCP
2
Close to VR
R0605 54.9Ohm 1%
@
0622-Remove CE0601(powre schematic reserve)
+VCCP
+VCCP
2
2
Close to CPU
R0607 130Ohm 1%
Close to VR
R0608 130Ohm 1%
Decoupling guide for Everest (EE)
+VCC_CORE 22uF * 16pcs (8 nostuff) 10uF * 10pcs (3 nostuff) 470uF * 1pcs=>JE31HR/CR power support
1
1
1
VR_SVID_ALERT# 80 1 SP0601
2 R0402
VR_SVID_CLK 80
1 SP0602
2 R0402
VR_SVID_DATA 80
B
VCC_SENSE VSS_SENSE
AJ35 AJ34
VCC_SENSE_R VSS_SENSE_R
SP0604 1 SP0605 1
VCCIO_SENSE VSSIO_SENSE
B10 A10
R1.0 0126 Intel Comments
Frank 20110602 check pull up/pull down reserve power schematic or not.
2 R0402 2 R0402
VCCSENSE VSSSENSE
VCCSENSE 80 VSSSENSE 80
VCCP_SENSE 82 VSSP_SENSE 82
Frank 20110516 Change VCCP_SENSE to VCCIO_SENSE
and change VSSP_SENSE to VSSIO_SENSE for meet power schematic.
Frank 20110516 Remove R0601 and R0604, because Power is already reserved
SENSE LINES
A
SOCKET989
A
12V013ISM000
Title : CPU(4)_PWR
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
6
of
94
5
4
3
2
1
5
4
SV-QC ICCMAX_VAXG 33A SV-DC ICCMAX_VAXG 33A
+VGFX_CORE
Graphics core voltage Voltage range: 0 - 1.52V
1
1
1
1
1
1
C0703 22UF/6.3V
C0704 22UF/6.3V
C0705 22UF/6.3V
C0706 22UF/6.3V
C0707 22UF/6.3V
C0708 22UF/6.3V
2
2
2
2
2
2
@
@
@
D
1
1
1
1
1
1
C0711 22UF/6.3V
C0712 22UF/6.3V
C0713 22UF/6.3V
C0714 22UF/6.3V
C0715 22UF/6.3V
2
2
2
2
2
@
0622-Remove CE0705(powre schematic reserve) HR_Decoupling guide from Intel (POWER + EE)
+VGFX_CORE 22uF * 12pcs 470uF * 2pcs
EIH31/30 +VCCP 22uF* 16 pcs (6 unmount) 330uF * 1pcs (power support) 470uF *1pcs (EIH31 Del 470uF For Layout)
2
C0716 22UF/6.3V
CR_Decoupling guide from Intel (POWER + EE) +VGFX_CORE 22uF * 12pcs
470uF * 2pcs
C
Decoupling guide for Everest (EE) +VGFX_CORE 22uF * 12pcs (2 nostuff)
470uF * 1pcs (JE31HR/CR power support) PLL supply voltage (DC + AC specification)
ICCMAX_VCCPLL 1.2A
+1.8VS
1
1
1
1
+ CE0701 220UF/6.3V
C0717 10UF/6.3V
2
1BV090000003
2
C0718 1UF/6.3V
2
C0719 1UF/6.3V
2
HR_Decoupling guide from Intel (POWER + EE)
+1.8VS 1uF * 2pcs 10uF * 1pcs
330uF * 1pcs
B
EIH31/30
+1.8VS
1uF * 2pcs 10uF * 1pcs 2.2uF*1pcs 4.7uF*1pcs 22uF * 1pcs (un-mount)
CR_Decoupling guide from Intel (POWER + EE)
+1.8VS 1uF * 2pcs 10uF * 1pcs
330uF * 1pcs Decoupling guide from Everest (EE)
+1.8VS 1uF * 2pcs 10uF * 1pcs
100uF * 1pcs
3
2
1
U0301G
AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17 AL24 AL23 AL21 AL20 AL18 AL17 AK24 AK23 AK21 AK20 AK18 AK17 AJ24 AJ23 AJ21 AJ20 AJ18 AJ17 AH24 AH23 AH21 AH20 AH18 AH17
VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54
B6 A6 A2
VCCPLL1 VCCPLL2 VCCPLL3
SOCKET989 12V013ISM000
1.8V RAIL
GRAPHICS
VREF SENSE LINES
POWER
R1.0 Add net name. Joyoung 0621 0614-Add SP0701,SP0702
VAXG_SENSE VSSAXG_SENSE
AK35 AK34
VCCGT_SENSE_R VSSGT_SENSE_R
SP0701 2 SP0702 2
1 R0402 1 R0402
Close to CPU
+V_SM_REF 10mil
R0702 1
VCCGT_SENSE 80 VSSGT_SENSE 80
2 0Ohm
DDR3 Reference Voltage
+VCCP +1.5V
+VCCSA +1.8VS
+VGFX_CORE +1.5V_VCCDDQ
+V_SM_VREF
+VCCP 3,4,6,25,26,27,37,47,63,82
+1.5V
5,16,51,63,83
+VCCSA 85
+1.8VS 25,26,63,84
+VGFX_CORE 63,80
+1.5V_VCCDDQ 4
+V_SM_VREF 18
D
D GS
D3 1
S2 G
1
SM_VREF AL1 +V_SM_VREF_CNT
R0703 100KOhm @
2
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15
AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
2
1
C0725 10UF/6.3V
2
1
Q0701
@
SI2308DS-T1-E3
1
1
C0724 10UF/6.3V
2
C0723 10UF/6.3V N/A
2
C0722 10UF/6.3V
2
1
C0721 10UF/6.3V N/A
2
1
+V_SM_VREF
Reserve S3 power reduction schematic
2
1
+1.5V_VCCDDQ
+ C0720 10UF/6.3V N/A
CE0702 220UF/6.3V
PS_S3CNTRL_1.5V_R 2 @ 1
0Ohm
R0705
PS_S3CNTRL_1.5V 22
4
1
2
5
3
@ Q0702 SI4336DY_T1_E3
1 12 2
3MM_OPEN_5MIL JP0701
1
2
C0730
470PF/50V
@
+1.5V
ICCMAX_VDDQ 5A Joyoung 0613 Reduce to 5A (EDS R2.1)
Processor I/O supply voltage for DDR3 (DC + AC specification)
0614-Change JP(3MM_OPEN_5MIL)
MISC SA RAIL DDR3 -1.5V RAILS
> 0
SUSB_EC#
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8
M27 M26 L26 J26 J25 J24 H26 H25
ICCMAX_VCCSA 6A
Voltage for the System Agent and
VCCSA_SENSE
0614-Remove C0728
+VCCSA
1
1
1
1
C0729 10UF/6.3V
2
C0727 10UF/6.3V
2
+ C0726 10UF/6.3V N/A
2
2
CE0703 100UF/6.3V
+1.5V_VCCDDQ C
+1.5V_VCCDDQ Power Good (U0404 pin 4)
+0.75VS
>100 ns
R1.3
HR_Decoupling guide from Intel (POWER + EE)
VCCSA_SENSE H23
FC_C22 VCCSA_VID1
C22 C24
1@ R0704
2 0Ohm
R1.0 0209 Intel Comments
+VCCP
2
VCCSA_SEL0 VCCSA_SEL1
1
R0708 1KOhm @
VCCSA_SENSE 85 Close to CPU
+VDDQ 10uF * 6pcs 330uF * 1pcs
EIH31
VCCSA_SEL0 85 VCCSA_SEL1 85
R1.0 0101
+VCCSA_SEL0 +VCCSA_SEL1
L
L
VCCSA 0.9V
+VDDQ 10uF * 6pcs (3 nostuff) 220uF * 1pcs
CR_Decoupling guide from Intel (POWER + EE) +VDDQ 10uF * 6pcs
330uF * 1pcs
2
R0709 1KOhm @
L
H
0.8V
H
L
0.725V
Decoupling guide for Everest (EE)
H
H
0.675V
+VDDQ 10uF * 6pcs (3 nostuff)
220uF * 1pcs
B
1
HR_Decoupling guide from Intel (POWER + EE)
+VCCSA 10uF * 3pcs 330uF * 1pcs
2
2
R0706 1KOhm
R0707 1KOhm
EIH31/30
1
1
+VCCSA 10uF * 4pcs (2 nostuff) 100uF * 1pcs
CR_Decoupling guide from Intel (POWER + EE)
+VCCSA 10uF * 3pcs 330uF * 1pcs
Decoupling guide for Everest (EE)
+VCCSA 10uF * 3pcs (1 nostuff) 100uF * 1pcs
A
A
Title : CPU(4)_PWR
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
7
of
94
5
4
3
2
1
5
4
3
2
U0301H
U0301I
D C
AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10
AT7 AT4 AT3 AR25 AR22 AR19 AR16 AR13 AR10 AR7 AR4 AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10 AP7 AP4 AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10 AN7 AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10 AM7 AM4 AM3 AM2 AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10 AL7 AL4 AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10 AK7 AK4 AJ25
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W 35 W 34 W 33 W 32 W 31 W 30 W 29 W 28 W 27 W 26 U9 U8 U6 U5 U3 U2
R1.0
TP_VSSG_DIE_SENSE 1
T0801
T35 T34 T33 T32 T31 T30 T29 T28 T27 T26
P9 P8 P6 P5 P3 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34 L33 L30 L27 L9 L8 L6 L5 L4 L3 L2 L1 K35 K32 K29 K26 J34 J31 H33 H30 H27 H24 H21 H18 H15 H13 H10 H9 H8 H7 H6 H5 H4 H3 H2 H1 G35 G32 G29 G26 G23 G20 G17 G11 F34 F31 F29
VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233
VSS
VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285
F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
SOCKET989 12V013ISM000
B
SOCKET989 12V013ISM000
1 D C B
A
A
Title : CPU(3)_CFG,RSVD,GND
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
8
of
94
5
4
3
2
1
5
4
3
CFG strapping information:
R1.0 Add CFG0
Frank 0516 Remove CFGO to XDP
U0301E
CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition - 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG[4]: Embedded DisplayPort Detection
D
- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort
- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port
CFG[6:5]: PCI Express Port Bifurcation Straps
- 11 : (Default) x 1 6 - 10 : x 8 , x 8 - 01 : Reserved - 00 : x 8 , x 4 , x 4
CFG[7]: PEG DEFER TRAINING
- 1: (Default) PEG Train immediately following xxRESETB de assertion - 0: PEG Wait for BIOS training
1
TPC26T T0918
1
TPC26T T0917
1
TPC26T T0916
1
TPC26T T0915
1
TPC26T T0914
1
TPC26T T0913
1
TPC26T T0912
1
TPC26T T0911
1
TPC26T T0910
1
TPC26T T0909
1
TPC26T T0908
1
TPC26T T0907
1
TPC26T T0906
1
TPC26T T0905
1
TPC26T T0904
1
TPC26T T0903
1
TPC26T T0902
1
TPC26T T0901
1
TPC26T T0953
1
TPC26T T0952
1
TPC26T T0951
1
TPC26T T0950
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
AK28 AK29 AL26 AL27 AK26 AL29 AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27 AK31 AN29
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]
VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE
AJ31 AH31 AJ33 AH33
RSVD1 RSVD2 RSVD3 RSVD4
AJ26 RSVD5
1 R0909 1 R0910
CFG2
1 1% 2
R0902
/DGPU 1KOhm
CFG4
1 1% 2
R0903
1KOhm
CFG5
1 1% 2
R0904
@ 1KOhm
CFG6
1 1% 2
R0905
@ 1KOhm
C
CFG7
1 1% 2
R0906
@ 1KOhm
This model is UMA, unmount R0902(use Default)
DDR_WR_VREF01 DDR_WR_VREF02
R1.0 0126
DIMM0_VREF_DQ_R Pull Down 1k ohm DIMM1_VREF_DQ_R Pull Down 1k ohm Design Guide 1.0 P.89 Figure 44 (436735)
1% 1% @@
1KOhm 2 1KOhm 2
Power schematic reserve 1.0V or not??
+VCCIO_SEL
1
1.05V
0
1.00V
IVB VCCIO for Mobile and Desktop is changed from 1.0v to 1.05v, same as PPT VCCIO. (461017 WW23'11)
PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT:
R1.0 0111
Delete VCCIO_SEL. Joyoung0614 1 VCCIO_SEL_R
TPC26T T0955
Frank 20110516 Change VCCP_SEL to VCCIO_SEL for meeting Power schematic defined
B4 D1
RSVD6 RSVD7
F25 F24 F23 D24 G25 G24 E23 D23 C30 A31 B30 B29 D30 B31 A30 C29
RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23
J20 B18 A19
RSVD24 RSVD25 RSVD26
J15 RSVD27
DDR_WR_VREF01
R0911 1 @ 2 0Ohm
@ O0901A UM6K1N
1
6
DIMM0_VREF_DQ 18
SOCKET989 12V013ISM000
2
5,21 DRAMRST_CNTRL_PCH B
DDR_WR_VREF02
M3 Path:0 Ohm at Page18
R0912 1 @ 2 0Ohm
@ O0901B UM6K1N
4
3
DIMM1_VREF_DQ 18
5
Reserve S3 power reduction schematic
M3: Processor Generated SO-DIMM VREFDQ New Requirement
Sandy Bridge CPU Only: M1 Implementation Sandy Bridge/Ivy Bridge CPU: M1 and M3 Implementation
A
RESERVED
2
RSVD28 RSVD29 RSVD30 RSVD31 RSVD32
L7 AG7 AE7 AK2 W8
RSVD33 RSVD34 RSVD35
AT26 AM33 AJ27
RSVD37 RSVD38 RSVD39 RSVD40
T8 J16 H16 G16
RSVD41 RSVD42 RSVD43 RSVD44 RSVD45
AR35 AT34 AT33 AP35 AR34
RSVD46 RSVD47 RSVD48 RSVD49 RSVD50
B34 A33 A34 B35 C35
RSVD51 RSVD52
AJ32 AK32
RSVD53 AH27 TP_VCCG_DIE_SENSE 1
T0954 TPC26T
RSVD54 RSVD55
AN35 AM35
RSVD56 RSVD57 RSVD58
AT2 AT1 AR1
KEY B1
5
4
3
2
1 D
C
B
A
Title : CPU(3)_CFG,RSVD,GND
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012 1
Sheet
9
of
94
5
4
D
CPU XDP connector
C
PCH XDP connector
B
A
5
4
3
2
1
+VTT_PCH_ORG +3VSUS +VCCP +3VS
+VTT_PCH_ORG 22,26,27
+3VSUS 4,22,24,27,28,30,33,65,81,85,92
+VCCP 3,4,6,7,25,26,27,37,47,63,82
+3VS
4,16,17,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
D
C
B
A
Title : NB(3)_****
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
10 of
99
3
2
1
5
4
M_A_DIM0_CLK_DDR0
1
H:5.2mm
1
R1620 150Ohm
C1650
5 M_A_A[15:0]
D C
@
R1621 150Ohm
@
2
1
2
2
1
2
10PF/50V M_A_DIM0_CLK_DDR#0
@
M_A_DIM0_CLK_DDR1
C1651 10PF/50V M_A_DIM0_CLK_DDR#1
@
5 M_A_DQS[7:0] 5 M_A_DQS#[7:0]
5 M_A_DIM0_CLK_DDR1 5 M_A_DIM0_CLK_DDR#1 5 M_A_DIM0_CLK_DDR0 5 M_A_DIM0_CLK_DDR#0
5 M_A_DIM0_CS#1 5 M_A_DIM0_CS#0
5 M_A_DIM0_ODT1 5 M_A_DIM0_ODT0
5
M_A_W E#
5
M_A_RAS#
5
M_A_CAS#
5
M_A_BS2
5
M_A_BS1
5
M_A_BS0
5 M_A_DIM0_CKE1 5 M_A_DIM0_CKE0
SMBus Slave Address: A0H
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
1 3
10KOhm 10KOhm
2 4
RN1601A RN1601B
M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS2 M_A_DQS#2 M_A_DQS3 M_A_DQS#3 M_A_DQS0 M_A_DQS#0 M_A_DQS1 M_A_DQS#1
DM should connect to GND directly Design Guide 0.9 p86 (436735)
CON1601A
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
102 104 101 103
CK1 CK1# CK0 CK0#
121 114
S1# S0#
120 116
ODT1 ODT0
113 110 115
WE# RAS# CAS#
79 108 109
BA2 BA1 BA0
74 73
CKE1 CKE0
201 197
SA1 SA0
188 186 171 169 154 152 137 135
64 62 47 45 29 27 12 10
DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0
187 170 153 136
63 46 28 11
DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0
1 0 3 2 4 5 6 7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5 M_A_DQ11
7 M_A_DQ12
15 M_A_DQ8
17 M_A_DQ9
4 M_A_DQ14
6 M_A_DQ10
16 M_A_DQ15
18 M_A_DQ13
21
M_A_DQ4
23
M_A_DQ1
33
M_A_DQ2
35
M_A_DQ7
22
M_A_DQ0
24
M_A_DQ5
34
M_A_DQ3
36
M_A_DQ6
39 M_A_DQ29
41 M_A_DQ30
51 M_A_DQ27
53 M_A_DQ31
40 M_A_DQ28
42 M_A_DQ25
50 M_A_DQ24
52 M_A_DQ26
57
M_A_DQ19
59
M_A_DQ18
67
M_A_DQ22
69
M_A_DQ23
56
M_A_DQ20
58
M_A_DQ21
68
M_A_DQ17
70
M_A_DQ16
129
M_A_DQ33
131
M_A_DQ36
141
M_A_DQ37
143
M_A_DQ34
130
M_A_DQ38
132
M_A_DQ32
140
M_A_DQ35
142
M_A_DQ39
147 M_A_DQ44
149 M_A_DQ40
157 M_A_DQ46
159 M_A_DQ45
146 M_A_DQ43
148 M_A_DQ47
158 M_A_DQ42
160 M_A_DQ41
163
M_A_DQ49
165
M_A_DQ48
175
M_A_DQ51
177
M_A_DQ54
164
M_A_DQ53
166
M_A_DQ50
174
M_A_DQ52
176
M_A_DQ55
181 M_A_DQ58
183 M_A_DQ61
191 M_A_DQ63
193 M_A_DQ57
180 M_A_DQ60
182 M_A_DQ56
192 M_A_DQ62
194 M_A_DQ59
17,28,48,53,55 SMB_CLK_S 17,28,48,53,55 SMB_DAT_S
202 200
SCL SDA
RESET# 30
DDR3_DIMM_204P 12V02GW SM000
M_A_DQ[63:0] 5
ok ok ok ok ok ok
ok ok
DDR3_DRAMRST# 5,17
3
2
+1.5V
+1.5V
5,7,51,63,83
+1.5V
+1.5V_DDR3
JP1601 1 12 2
3MM_OPEN_5MIL
+0.75VS +3VS
+1.5V_DDR3
+0.75VS 17,63,83
+3VS
4,17,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+1.5V_DDR3 17,18
+1.5V_DDR3
1
1
C1605 0.1UF/16V
C1606 0.1UF/16V
2
2
Layout Note: Place these caps near SO DIMM 0
T1601 Reserve
1 PM_EXTTS#0_DIM_A
+V_VREF_CA_DIMM0
1
1
2
C1624 2.2UF/6.3V @
+V_VREF_DQ_DIMM0
2
C1623 0.1UF/16V
CON1601B
75 81 87 93 99 105 111 117 123
VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17
VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18
76 82 88 94 100 106 112 118 124
2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195
VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51
VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52
3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196
198 125
EVENT# TEST
77 122
NC1 NC2
GND1 GND2
207 208
NP_NC1 NP_NC2
205 206
VTT1 VTT2
203 204
126 1
VREFCA VREFDQ
VDDSPD 199
DDR3_DIMM_204P 12V02GW SM000
1
1
C1622 2.2UF/6.3V @
2
C1625 0.1UF/16V
2
2
1
1
2
+1.5V_DDR3
1
C1607 0.1UF/16V
C1608 0.1UF/16V
2
1
+ @
2
+0.75VS +3VS
1
C1615 0.1UF/16V
2
C1614 2.2UF/6.3V @
CE1601 220UF/2V
+1.5V PWR: 22UF*3PCS EE:10UF*9PCS
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 0
1
1
1
1
1
1
1
1
1
1
C1609 10UF/6.3V
2
C1610 10UF/6.3V @
2
C1611 10UF/6.3V
2
C1612 10UF/6.3V
2
C1613 10UF/6.3V @
2
C1620 10UF/6.3V @
2
2
2
C1646 1UF/6.3V
C1645 1UF/6.3V
C1648 1UF/6.3V
C1647 1UF/6.3V
2
2
+0.75VS
1
1
1
1
C1616 1UF/6.3V
2
C1617 1UF/6.3V
2
C1618 1UF/6.3V @
2
C1619 1UF/6.3V @
2
M_A_DIM0_CLK_DDR2
H:9.2mm
1
1
R1623
CON1602A
B
150Ohm @
R1622 150Ohm
@
2
1
2
2
1
2
C1653 10PF/50V
M_A_DIM0_CLK_DDR#2 @
M_A_DIM0_CLK_DDR3
C1652 10PF/50V
M_A_DIM0_CLK_DDR#3 @
5 M_A_DIM0_CLK_DDR3 5 M_A_DIM0_CLK_DDR#3 5 M_A_DIM0_CLK_DDR2 5 M_A_DIM0_CLK_DDR#2
5 M_A_DIM0_CS#3 5 M_A_DIM0_CS#2
5 M_A_DIM0_ODT3 5 M_A_DIM0_ODT2
SMBus Slave Address: A2H
5 M_A_DIM0_CKE3 5 M_A_DIM0_CKE2
+3VS
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_W E# M_A_RAS# M_A_CAS#
M_A_BS2 M_A_BS1 M_A_BS0
1 3
10KOhm 10KOhm
2 4
RN1602A RN1602B
M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS2 M_A_DQS#2 M_A_DQS3 M_A_DQS#3 M_A_DQS0 M_A_DQS#0 M_A_DQS1 M_A_DQS#1
DM should connect to GND directly Design Guide 0.9 p86 (436735)
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
102 104 101 103
CK1 CK1# CK0 CK0#
121 114
S1# S0#
120 116
ODT1 ODT0
113 110 115
WE# RAS# CAS#
79 108 109
BA2 BA1 BA0
74 73
CKE1 CKE0
201 197
SA1 SA0
188 186 171 169 154 152 137 135
64 62 47 45 29 27 12 10
DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0
187 170 153 136
63 46 28 11
DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0
0 1 2 3 4 5 6 7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5 M_A_DQ11
7 M_A_DQ12
15 M_A_DQ8
17 M_A_DQ9
4 M_A_DQ14
6 M_A_DQ10
16 M_A_DQ15
18 M_A_DQ13
21
M_A_DQ4
23
M_A_DQ1
33
M_A_DQ2
35
M_A_DQ7
22
M_A_DQ0
24
M_A_DQ5
34
M_A_DQ3
36
M_A_DQ6
39 M_A_DQ29
41 M_A_DQ30
51 M_A_DQ27
53 M_A_DQ31
40 M_A_DQ28
42 M_A_DQ25
50 M_A_DQ24
52 M_A_DQ26
57
M_A_DQ19
59
M_A_DQ18
67
M_A_DQ22
69
M_A_DQ23
56
M_A_DQ20
58
M_A_DQ21
68
M_A_DQ17
70
M_A_DQ16
129
M_A_DQ33
131
M_A_DQ36
141
M_A_DQ37
143
M_A_DQ34
130
M_A_DQ38
132
M_A_DQ32
140
M_A_DQ35
142
M_A_DQ39
147 M_A_DQ44
149 M_A_DQ40
157 M_A_DQ46
159 M_A_DQ45
146 M_A_DQ43
148 M_A_DQ47
158 M_A_DQ42
160 M_A_DQ41
163
M_A_DQ49
165
M_A_DQ48
175
M_A_DQ51
177
M_A_DQ54
164
M_A_DQ53
166
M_A_DQ50
174
M_A_DQ52
176
M_A_DQ55
181 M_A_DQ58
183 M_A_DQ61
191 M_A_DQ63
193 M_A_DQ57
180 M_A_DQ60
182 M_A_DQ56
192 M_A_DQ62
194 M_A_DQ59
SMB_CLK_S SMB_DAT_S
202 200
SCL SDA
RESET# 30
DDR3_DRAMRST#
DDR3_DIMM_204P 12V02GBSM000
A
+1.5V_DDR3
1
1
C1635 0.1UF/16V
C1629 0.1UF/16V
2
2
Layout Note: Place these caps near SO DIMM 0
T1602 Reserve
1 PM_EXTTS#0_DIM_A
+V_VREF_CA_DIMM0
1
1
2
C1643 2.2UF/6.3V @
+V_VREF_DQ_DIMM0
2
C1637 0.1UF/16V
CON1602B
75 81 87 93 99 105 111 117 123
VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17
VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18
76 82 88 94 100 106 112 118 124
2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195
VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51
VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52
3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196
198 125
EVENT# TEST
77 122
NC1 NC2
GND1 GND2
207 208
NP_NC1 NP_NC2
205 206
VTT1 VTT2
203 204
126 1
VREFCA VREFDQ
VDDSPD 199
DDR3_DIMM_204P 12V02GBSM000
1
1
C1626 2.2UF/6.3V @
2
C1630 0.1UF/16V
2
2
1
+1.5V_DDR3
1
C1636 0.1UF/16V
C1632 0.1UF/16V
1
2
2
+0.75VS +3VS
1
C1644 0.1UF/16V
2
C1633 2.2UF/6.3V @
+1.5V PWR: 22UF*3PCS EE:10UF*9PCS
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 0
1
1
1
1
1
1
1
1
1
1
C1627 10UF/6.3V
2
C1621 10UF/6.3V @
2
C1640 10UF/6.3V
2
C1641 10UF/6.3V
2
C1642 10UF/6.3V @
2
C1638 10UF/6.3V @
2
2
2
C1654 1UF/6.3V
C1649 1UF/6.3V
C1656 1UF/6.3V
C1655 1UF/6.3V
2
2
+0.75VS
1
1
1
1
C1634 1UF/6.3V
2
C1631 1UF/6.3V
2
C1628 1UF/6.3V @
2
C1639 1UF/6.3V @
2
5
4
3
2
1 D
C
B
A
BG1-CSC-HW R&D Dept.5
Size Project Name
D
PLFG
Date: Friday, February 03, 2012 1
Title : DDR3(1)_SO-DIMM0
Engineer: Ahren_chen
Sheet
16 of
Rev 1.0 99
5
4
H:4MM
5 M_B_A[15:0]
M_B_DQ[63:0] 5
CON1701A
D C
2
1
2
1
R1720 150Ohm
@ @
R1721 150Ohm
@ @
5 M_B_DQS[7:0]
5 M_B_DQS#[7:0]
2
1
2
1
M_B_DIM0_CLK_DDR0
C1750 10PF/50V M_B_DIM0_CLK_DDR#0
M_B_DIM0_CLK_DDR1
C1751 10PF/50V M_B_DIM0_CLK_DDR#1
SMBus Slave Address: A4H
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
5 M_B_DIM0_CLK_DDR1 5 M_B_DIM0_CLK_DDR#1 5 M_B_DIM0_CLK_DDR0 5 M_B_DIM0_CLK_DDR#0
5 M_B_DIM0_CS#1 5 M_B_DIM0_CS#0
5 M_B_DIM0_ODT1 5 M_B_DIM0_ODT0
5
M_B_W E#
5
M_B_RAS#
5
M_B_CAS#
5
M_B_BS2
5
M_B_BS1
5
M_B_BS0
5 M_B_DIM0_CKE1 5 M_B_DIM0_CKE0
+3VS
1
3
10KOhm 10KOhm
2 4
RN1701A RN1701B
M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0
DM should connect to GND directly Design Guide 0.9 p86 (436735)
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
102 104 101 103
CK1 CK1# CK0 CK0#
121 114
S1# S0#
120 116
ODT1 ODT0
113 110 115
WE# RAS# CAS#
79 108 109
BA2 BA1 BA0
74 73
CKE1 CKE0
201 197
SA1 SA0
188 186 171 169 154 152 137 135
64 62 47 45 29 27 12 10
DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0
187 170 153 136
63 46 28 11
DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0
0 1 2 3 4 5 6 7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5
M_B_DQ1
7
M_B_DQ5
15
M_B_DQ4
17
M_B_DQ0
4
M_B_DQ2
6
M_B_DQ7
16
M_B_DQ3
18
M_B_DQ6
21 M_B_DQ12
23 M_B_DQ13
33 M_B_DQ15
35 M_B_DQ14
22 M_B_DQ9
24 M_B_DQ8
34 M_B_DQ11
36 M_B_DQ10
39
M_B_DQ16
41
M_B_DQ17
51
M_B_DQ22
53
M_B_DQ19
40
M_B_DQ21
42
M_B_DQ20
50
M_B_DQ18
52
M_B_DQ23
57 M_B_DQ30
59 M_B_DQ26
67 M_B_DQ25
69 M_B_DQ29
56 M_B_DQ28
58 M_B_DQ24
68 M_B_DQ27
70 M_B_DQ31
129
M_B_DQ33
131
M_B_DQ32
141
M_B_DQ38
143
M_B_DQ34
130
M_B_DQ36
132
M_B_DQ37
140
M_B_DQ35
142
M_B_DQ39
147 M_B_DQ44
149 M_B_DQ41
157 M_B_DQ43
159 M_B_DQ47
146 M_B_DQ45
148 M_B_DQ40
158 M_B_DQ46
160 M_B_DQ42
163
M_B_DQ50
165
M_B_DQ52
175
M_B_DQ55
177
M_B_DQ54
164
M_B_DQ48
166
M_B_DQ53
174
M_B_DQ49
176
M_B_DQ51
181 M_B_DQ60
183 M_B_DQ58
191 M_B_DQ63
193 M_B_DQ61
180 M_B_DQ57
182 M_B_DQ56
192 M_B_DQ62
194 M_B_DQ59
ok ok ok ok ok ok ok ok
16,28,48,53,55 SMB_CLK_S 16,28,48,53,55 SMB_DAT_S
202 200
SCL SDA
RESET# 30
DDR3_DIMM_204P 12V02GIRM001
DDR3_DRAMRST# 5,16
3
2
+1.5V_DDR3
1
1
C1705 0.1UF/16V
C1706 0.1UF/16V
2
2
Layout Note: Place these caps near SO DIMM 1
T1701 1 PM_EXTTS#0_DIM_B Reserve N/A
+V_VREF_CA_DIMM1
1
1
2
C1724 2.2UF/6.3V @
+V_VREF_DQ_DIMM1
2
C1723 0.1UF/16V
CON1701B
75 81 87 93 99 105 111 117 123
VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17
VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18
76 82 88 94 100 106 112 118 124
2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195
VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51
VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52
3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196
198 125
EVENT# TEST
77 122
NC1 NC2
GND1 GND2
207 208
NP_NC1 NP_NC2
205 206
VTT1 VTT2
203 204
126 1
VREFCA VREFDQ
VDDSPD 199
DDR3_DIMM_204P 12V02GIRM001
1
1
C1722 2.2UF/6.3V @
2
C1725 0.1UF/16V
2
2
1
+1.5V_DDR3
1
C1707 0.1UF/16V
C1708 0.1UF/16V
2
+0.75VS
+3VS
1
1
C1715 0.1UF/16V
2
C1714 2.2UF/6.3V @
2
+1.5V
+0.75VS +3VS
+1.5V_DDR3
+1.5V
5,7,16,51,63,83
+0.75VS 16,63,83
+3VS
4,16,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+1.5V_DDR3 16,18
2
1
+ @
CE1701 220UF/2V
+1.5V PWR: 22UF*3PCS EE:10UF*9PCS
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 1
1
1
1
1
1
1
1
1
1
1
C1709 10UF/6.3V
2
C1710 10UF/6.3V @
2
C1711 10UF/6.3V
2
C1712 10UF/6.3V
2
C1713 10UF/6.3V @
2
C1726 10UF/6.3V @
2
2
2
C1745 1UF/6.3V
C1746 1UF/6.3V
C1747 1UF/6.3V
C1748 1UF/6.3V
2
2
+0.75VS
1
1
1
1
C1716 1UF/6.3V
2
C1717 1UF/6.3V
2
C1718 1UF/6.3V @
2
C1719 1UF/6.3V @
2
1 D
C
M_B_DIM0_CLK_DDR2
1
H:8MM
1
R1722
150Ohm
C1752
+1.5V_DDR3
+1.5V_DDR3
@
2
10PF/50V
CON1702A
CON1702B
2
B A
R1723 150Ohm
@
2
1
2
1
M_B_DIM0_CLK_DDR#2 @
M_B_DIM0_CLK_DDR3
C1753 10PF/50V M_B_DIM0_CLK_DDR#3
@
5 M_B_DIM0_CLK_DDR3 5 M_B_DIM0_CLK_DDR#3 5 M_B_DIM0_CLK_DDR2 5 M_B_DIM0_CLK_DDR#2
5 M_B_DIM0_CS#3 5 M_B_DIM0_CS#2
5 M_B_DIM0_ODT3 5 M_B_DIM0_ODT2
SMBus Slave Address: A6H
5 M_B_DIM0_CKE3 5 M_B_DIM0_CKE2
+3VS
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_W E# M_B_RAS# M_B_CAS#
M_B_BS2 M_B_BS1 M_B_BS0
1 3
10KOhm 10KOhm
2 4
RN1702A RN1702B
M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0
DM should connect to GND directly Design Guide 0.9 p86 (436735)
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
102 104 101 103
CK1 CK1# CK0 CK0#
121 114
S1# S0#
120 116
ODT1 ODT0
113 110 115
WE# RAS# CAS#
79 108 109
BA2 BA1 BA0
74 73
CKE1 CKE0
201 197
SA1 SA0
188 186 171 169 154 152 137 135
64 62 47 45 29 27 12 10
DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0
187 170 153 136
63 46 28 11
DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0
0 1 2 3 4 5 6 7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5
M_B_DQ1
7
M_B_DQ5
15
M_B_DQ4
17
M_B_DQ0
4
M_B_DQ2
6
M_B_DQ7
16
M_B_DQ3
18
M_B_DQ6
21 M_B_DQ12
23 M_B_DQ13
33 M_B_DQ15
35 M_B_DQ14
22 M_B_DQ9
24 M_B_DQ8
34 M_B_DQ11
36 M_B_DQ10
39
M_B_DQ16
41
M_B_DQ17
51
M_B_DQ22
53
M_B_DQ19
40
M_B_DQ21
42
M_B_DQ20
50
M_B_DQ18
52
M_B_DQ23
57 M_B_DQ30
59 M_B_DQ26
67 M_B_DQ25
69 M_B_DQ29
56 M_B_DQ28
58 M_B_DQ24
68 M_B_DQ27
70 M_B_DQ31
129
M_B_DQ33
131
M_B_DQ32
141
M_B_DQ38
143
M_B_DQ34
130
M_B_DQ36
132
M_B_DQ37
140
M_B_DQ35
142
M_B_DQ39
147 M_B_DQ44
149 M_B_DQ41
157 M_B_DQ43
159 M_B_DQ47
146 M_B_DQ45
148 M_B_DQ40
158 M_B_DQ46
160 M_B_DQ42
163
M_B_DQ50
165
M_B_DQ52
175
M_B_DQ55
177
M_B_DQ54
164
M_B_DQ48
166
M_B_DQ53
174
M_B_DQ49
176
M_B_DQ51
181 M_B_DQ60
183 M_B_DQ58
191 M_B_DQ63
193 M_B_DQ61
180 M_B_DQ57
182 M_B_DQ56
192 M_B_DQ62
194 M_B_DQ59
1
C1743 0.1UF/16V
C1730 0.1UF/16V
2
2
Layout Note: Place these caps near SO DIMM 1
T1702 1 PM_EXTTS#0_DIM_B Reserve N/A
+V_VREF_CA_DIMM1
1
1
2
C1732 2.2UF/6.3V @
+V_VREF_DQ_DIMM1
2
C1729 0.1UF/16V
1
75 81 87 93 99 105 111 117 123
VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17
VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18
76 82 88 94 100 106 112 118 124
2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195
VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51
VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52
3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196
198 125
EVENT# TEST
77 122
NC1 NC2
GND1 GND2
207 208
NP_NC1 NP_NC2
205 206
VTT1 VTT2
203 204
126 1
VREFCA VREFDQ
VDDSPD 199
DDR3_DIMM_204P 12V02GBRM001
1
1
C1741 2.2UF/6.3V @
2
C1727 0.1UF/16V
2
2
1
1
C1728 0.1UF/16V
C1720 0.1UF/16V
2
+0.75VS
+3VS
1
1
C1744 0.1UF/16V
2
C1742 2.2UF/6.3V @
2
+1.5V PWR: 22UF*3PCS EE:10UF*9PCS
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 1
1
1
1
1
1
1
1
1
1
1
C1733 10UF/6.3V
2
C1738 10UF/6.3V @
2
C1739 10UF/6.3V
2
C1740 10UF/6.3V
2
C1734 10UF/6.3V @
2
C1737 10UF/6.3V @
2
2
2
C1754 1UF/6.3V
C1749 1UF/6.3V
C1756 1UF/6.3V
C1755 1UF/6.3V
2
2
+0.75VS
1
1
1
1
C1736 1UF/6.3V
2
C1735 1UF/6.3V
2
C1731 1UF/6.3V @
2
C1721 1UF/6.3V @
2
BG1-CSC-HW R&D Dept.5
Size Project Name
D
PLFG
Date: Friday, February 03, 2012
Title : DDR3(2)_SO-DIMM1
Engineer: Ahren_chen
Sheet
17 of
Rev 1.0 99
B A
SMB_CLK_S SMB_DAT_S
202 200
SCL SDA
RESET# 30 DDR3_DRAMRST#
DDR3_DIMM_204P 12V02GBRM001
1202-000R000 (12V02GIRM001)
5
4
3
2
1
5
4
3
2
DDR3 Vref
83 M_VREF
M_VREF
R1809 1 @
+V_VREF_DDR3 2 0Ohm
CA
1 SP1801
+V_VREF_CA_DIMM0
2
+V_VREF_CA_DIMM1
R0402
1 SP1802
2 R0402
For DDR3_VREF command & address.
+1.5V_DDR3 +V_VREF_CA_DIMM0 +V_VREF_DQ_DIMM0 +V_VREF_CA_DIMM1 +V_VREF_DQ_DIMM1
+V_SM_VREF
D
R1.0 0121
+V_SM_VREF
For M3 test only
M1: Fixed SO-DIMM VREF_DQ
1
2
+1.5V_DDR3
R1807 1KOhm
1
1
C1801 0.1UF/16V
R1808 1KOhm
2
2
9 DIMM0_VREF_DQ 9 DIMM1_VREF_DQ
SP1803 1
R1801 1 R1804 1
2 R0402
DQ
+V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM1
2 0Ohm
2 0Ohm
R1.0 1231
R1805 1 R1806 1
2 0Ohm 2 0Ohm
R1802 1 @
R1803 1 @
2 0Ohm 2 0Ohm
2
+1.5V_DDR3
R1811 1KOhm
1
1
@
1
C1802 0.1UF/16V
R1810 1KOhm
2
2
@ @
Default M1
M3
M1
M3: Processor Generated SO-DIMM VREFDQ
New Requirement
+1.5V_DDR3 16,17 +V_VREF_CA_DIMM0 16 +V_VREF_DQ_DIMM0 16 +V_VREF_CA_DIMM1 17 +V_VREF_DQ_DIMM1 17 +V_SM_VREF 7
If support M1 :(Sandy Bridge CPU Only)
C
1. Un mount R1802,R1803,R1805,R1806,R1810,R1811,C1802
2. Mount R1801,R1804
==>CA and DQ are the same path
If support M1 and M3 :(Sandy Bridge/Ivy Bridge CPU) 1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802 2. Un mount R1801,R1804 ==> CA and DQ are separate path
Sandy Bridge CPU Only: M1 Implementation Sandy Bridge/Ivy Bridge CPU: M1 and M3 Implementation
B
1 D C B
A
A
Title : DDR3(3)_CA/DQ Voltage
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
18 of
94
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
R1.4--2
Title : VID Controller
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
19 of
94
5
4
3
2
1
5
RTC battery
3 4
1
+RTCBAT
2 R2001
J2001 BATT_HOLDER_2P
+3VA
+VCC_RTC
D2001
1 3
1 +RTC_BAT 2 1KOhm
1V/0.2A
1
C2003
R1.0 0110
2
1UF/6.3V GND
2
D
12V20GBSM000
GND
+VCC_RTC RTCRST# RC delay should be 18ms~25ms
R2003 1
2 20KOhm
2 21 1
1
C2004 1UF/6.3V
JRST2001
SGL_JUMP
@
2
Connector Type 1217-001L000
Request by CSC for CMOS clear function
CMOS Settings Clear CMOS
Keep CMOS
JRST2001
Shunt Open (Default)
R2004 1
GND 2 20KOhm
GND
2 21 1
2
R2005 1MOhm
2
1
C2005 1UF/6.3V
JRST2002
SGL_JUMP
@
INTVRMEN: Integrated SUS 1.05V VRM Enables Low: Enable External VRs High:Enable Internal VRs
1
PCH_INTVRMEN
R2030 1 @ 2 200KOhm 1%
C
GND
GND
GND
TPM Settings
Clear ME RTC Registers Keep ME RTC Registers
JRST2002 Shunt
Open (Default)
B
HDA_DKEN : Flash Descriptor Security Overide H = Disabled (Default) L = Enabled
Note : Rising edge of PWROK
HDA_DOCK_EN#
JRST3 1MM_OPEN_M1M2
1 12 2
2 R2008 1 1KOhm
R1.0 add JRST3 to follow BIC50. Joyoung 0628
A 5
2
1
4
ACZ_BCLK_AUD C2010 10PF/50V
EMI solution
3
2
1
+VCC_RTC
+VCC_RTC 22,27
R1.0 Delete +RTCBAT
+3VA
+3VA
27,30,48,63,65,81,88,93
+3VS
+3VS
4,16,17,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+3VSUS_ORG
+3VSUS_ORG 21,22,24,25,27
+1.05VM_ORG
+1.05VM_ORG 27
+VTT_PCH_VCCIO
+VTT_PCH_VCCIO 26,27
D
GND GND
C2001
2
1RTC_X1_C
15PF/50V
2 3
1
SP2005
1
2
R0402
X2001 32.768KHZ R2002
10MOhm
1
U2001A
2
T2015
1 T2011
2 C2002
GND
1 T2012
1
+VCC_RTC
1 15PF/50V
330KOhm 2 1% 1 R2006
4
RTC_X1 RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INTVRMEN
A20 RTCX1 C20 RTCX2 D20 RTCRST# G22 SRTCRST# K22 INTRUDER# C17 INTVRMEN
RTC
LPC
FW H0/LAD0 FW H1/LAD1 FW H2/LAD2 FW H3/LAD3
C38 A38 B37 C37
FWH4/LFRAME# D36
LDRQ0# LDRQ1#/GPIO23
E36 K36
SERIRQ V5
SNN_PCH_DRQ#0 1 SNN_LPC_DRQ#1 1
Serial Interrupt Request
T2032 T2033
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
30,65 30,65 30,65 30,65
LPC_FRAME# 30,65
INT_SERIRQ 30,65
SATA 6G
41 ACZ_BCLK_AUD 41 ACZ_SYNC_AUD
R2051 1 R2052 1
2 33Ohm 2 33Ohm
ACZ_BCLK ACZ_SYNC
N34 HDA_BCLK L34 HDA_SYNC
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
AM3 AM1 AP7 AP5
SATA_RXN0 60 SATA_RXP0 60 SATA_TXN0 60 SATA_TXP0 60
HDD1
41
SB_SPKR
41,42 ACZ_RST#_AUD
R2055 1
2 33Ohm
ACZ_RST#
T10 SPKR K34 HDA_RST#
SATA1RXN SATA1RXP SATA1TXN SATA1TXP
AM10 AM8 AP11 AP10
SATA_RXN1 53 0928
C
SATA_RXP1 53 SATA_TXN1 53
mSATA
SATA_TXP1 53
41 ACZ_SDIN0_AUD
30 PCH_FLASH_DESCRIPTOR 41 ACZ_SDOUT_AUD
R2050 1 @ R2053 1
2 0Ohm 2 0Ohm
30 MEFLSH_EN# T2002
R2054 1 @ 2 0Ohm 1
Remove TP
E34 HDA_SDIN0 G34 HDA_SDIN1 C34 HDA_SDIN2 A34 HDA_SDIN3
IHDA
ACZ_SDOUT R2050 near R2008
A36 HDA_SDO
HDA_DOCK_EN# C36 HDA_DOCK_EN#/GPIO33 CARDREADER_RESET N32 HDA_DOCK_RST#/GPIO13
T2024
1
PCH_JTAG_TCK_BUF J3 JTAG_TCK
SATA
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
SATA_RXN2 60 SATA_RXP2 60 SATA_TXN2 60 SATA_TXP2 60
SATA_RXN3 60 SATA_RXP3 60 SATA_TXN3 60 SATA_TXP3 60
ODD 0928 HDD2
JTAG
T2025
1
PCH_JTAG_TMS
H7 JTAG_TMS
SATAICOMPO Y11
T2026
1
T2027
1
PCH_JTAG_TDI PCH_JTAG_TDO
K5 JTAG_TDI H1 JTAG_TDO
SATAICOMPI Y10 SATA3RCOMPO AB12
SATA_COMP R2007 1 1% 2 37.4Ohm +VTT_PCH_VCCIO
SATA3COMPI AB13
SATA3_COMP R2047 1 1% 2 49.9Ohm +VTT_PCH_VCCIO
28,30 PCH_SPICLK
T3 SPI_CLK
SATA3RBIAS AH1 RBIAS_SATA3
R2048 1 1% 2 750Ohm
GND
28 PCH_SPICS0# 28,30 PCH_SPICS1#
PCH_SPICS1#
Y14 SPI_CS0# T1 SPI_CS1#
SATALED# P3
@
1 R2025 SATA_LED#
2 10KOhm
+3VS
SATA_LED# 66
B
SPI
28,30 PCH_SPISI
V4 SPI_MOSI
SATA0GP/GPIO21 V14
SATA0GP
28,30 PCH_SPISO
U3 SPI_MISO
SATA1GP/GPIO19 P1
BBS_BIT0_R
SP2003 2
1 R0402
BBS_BIT0 24
COUGAR_POINT_ES1 02V000000001
0200-00HU000 C.S 907552 A1 QMVY BGA942 INTEL/COUGAR POINT PCH
Strap information:
SB_SPKR
SB_SPKR: No reboot strap Low: Disable (Default) High:Enable
ACZ_SDOUT
ACZ_SDOUT: 1.Flash descriptor security: Sampled Low: in effect. Sampled High: override
ACZ_SYNC
2.ACZ_SDOUTwhich sample high on the rising edge of PWROK Will also disable Intel ME.
ACZ_SYNC: On Die PLL VR voltage selector Low: 1.8V (Default) High: 1.5V note : CRB has no strap Hrron River Platform Schematic Design Checklist (438390 page 48)
R2020 1 @ 2 1KOhm
+3VS
R2034 1 @ 2 1KOhm
R2036 1
2 1KOhm
VCCVRAM use +1.5VS in mobile
+3VSUS_ORG +3VSUS_ORG
Pull High
INT_SERIRQ SATA0GP
1 R2026
1 R2027
+3VS
2 10KOhm
2 10KOhm
A
Title : PCH(1)_SATA,IHDA,RTC,LPC
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
20 of
94
4
3
2
1
5
4
3
2
1
+3VS +VTT_PCH_ORG
+3VSUS_ORG
+3VS
4,16,17,20,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+VTT_PCH_ORG 22,26,27
+3VSUS_ORG 20,22,24,25,27
U2001B
D
40 PCIE_RXN1_CR 40 PCIE_RXP1_CR 40 PCIE_TXN1_CR 40 PCIE_TXP1_CR
C2107 1 C2114 1
2 0.1UF/16V PCIE_TXN1_CR_C 2 0.1UF/16V PCIE_TXP1_CR_C
BG34 BJ34 AV32 AU32
PERn1 PERp1 PETn1 PETp1
55 PCIE_RXN2_WLAN 55 PCIE_RXP2_WLAN 55 PCIE_TXN2_WLAN 55 PCIE_TXP2_WLAN
C2103 1 C2104 1
2 0.1UF/16V 2 0.1UF/16V
PCIE_TXN2_WLAN_C PCIE_TXP2_WLAN_C
BE34 BF34 BB32 AY32
PERn2 PERp2 PETn2 PETp2
53 PCIE_RXN3_mSATA 53 PCIE_RXP3_mSATA 53 PCIE_TXN3_mSATA 53 PCIE_TXP3_mSATA
51 PCIE_RXN_USB30 51 PCIE_RXP_USB30 51 PCIE_TXN_USB30 51 PCIE_TXP_USB30
C2106 C2105
1
2 0.1UF/16V
1
2 0.1UF/16V
@
@
PCIE_TXN3_mSATA_C PCIE_TXP3_mSATA_C
C2108 C2113
1
2 0.1UF/16V
1
2 0.1UF/16V
/FL1009
/FL1009
PCIE_TXN4_USB30_C PCIE_TXP4_USB30_C
BG36 BJ36 AV34 AU34
BF36 BE36 AY34 BB34
BG37 BH37 AY36 BB36
PERn3 PERp3 PETn3 PETp3
PERn4 PERp4 PETn4 PETp4
PERn5 PERp5 PETn5 PETp5
33 PCIE_RXN6_LAN 33 PCIE_RXP6_LAN 33 PCIE_TXN6_LAN 33 PCIE_TXP6_LAN
C2110 1 C2111 1
2 0.1UF/16V 2 0.1UF/16V
PCIE_TXN6_GLAN_C PCIE_TXP6_GLAN_C
BJ38 BG38 AU36 AV36
PERn6 PERp6 PETn6 PETp6
BG40 BJ40 AY40 BB40
PERn7 PERp7 PETn7 PETp7
C
BE38 BC38 AW 38 AY38
PERn8 PERp8 PETn8 PETp8
T2110
1
T2111
1
T2103
1
CLK_PCH_SRC0_N CLK_PCH_SRC0_P
CLK_REQ0#
Y40 Y39
CLKOUT_PCIE0N CLKOUT_PCIE0P
100MHz
J2 PCIECLKRQ0#/GPIO73
40 CLK_PCIE_CR#_PCH 40 CLK_PCIE_CR_PCH
40 CLK_REQ1_CR#
55 CLK_PCIE_WLAN#_PCH 55 CLK_PCIE_WLAN_PCH
55 CLK_REQ2_WLAN#
SP2101 1 SP2102 1
SP2103 1
SP2117 2 SP2118 2
SP2112 2
2 R0402 2 R0402 2 R0402
1 1
CLK_PCH_SRC1_N CLK_PCH_SRC1_P
AB49 AB47
CLKOUT_PCIE1N CLKOUT_PCIE1P
100MHz
1
CLK_REQ1#
M1 PCIECLKRQ1#/GPIO18
CLK_PCH_SRC2_N CLK_PCH_SRC2_P
CLK_REQ2#
AA48 AA47
V10
CLKOUT_PCIE2N 100MHz CLKOUT_PCIE2P PCIECLKRQ2#/GPIO20
CLOCKS
PCI-E* Controller
Link
SMBUS
SMBALERT#/GPIO11 E12 SMBCLK H14
SMBDATA C9
EXT_SCI# SCL_3A SDA_3A
SML0ALERT#/GPIO60 A12 SML0CLK C8
SML0DATA G12
DRAMRST_CNTRL_PCH SML0_CLK SML0_DAT
SML1ALERT#/PCHHOT#/GPIO74 C13 SML1CLK/GPIO58 E14
SML1DATA/GPIO75 M16
SML1ALERT# SML1_CLK SML1_DAT
1 T2121
CL_CLK1 M7 CL_DATA1 T11 CL_RST1# P10
EXT_SCI# 30 SCL_3A 28 SDA_3A 28
DRAMRST_CNTRL_PCH 5,9
1
T2133
1 T2134
SML1_CLK 28 SML1_DAT 28
1 T2135 1 T2136 1 T2137
PEG_A_CLKRQ#/GPIO47 M10 CLK_REQ_PEG_A#
SP2114 1
100MHz CLKOUT_PEG_A_N CLKOUT_PEG_A_P
AB37 AB38
CLK_PCIE_PEG#_PCH_L CLK_PCIE_PEG_PCH_L
SP2115 1 SP2116 1
100MHz CLKOUT_DMI_N CLKOUT_DMI_P
AV22 AU22
120MHz CLKOUT_DP_N CLKOUT_DP_P
AM12 AM13
CLK_DP_N CLK_DP_P
100MHz
CLKIN_DMI_N CLKIN_DMI_P
BF18 BE18
CLK_BUF_EXP_N CLK_BUF_EXP_P
2 R0402
2 R0402 2 R0402
CLKREQ_PEG# 70
CLK_PCIE_PEG#_PCH 70 CLK_PCIE_PEG_PCH 70
CLK_EXP_N 4 CLK_EXP_P 4
CLK_DP_N 4 CLK_DP_P 4
CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P
3 1
10KOhm 4 10KOhm 2
RN2108B RN2108A
CLK_BUF_EXP_N CLK_BUF_EXP_P CLK_BUF_DOT96_N CLK_BUF_DOT96_P CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P
1 3 1 3 3 1
10KOhm 10KOhm
2 4
10KOhm 10KOhm
2 4
10KOhm 4
10KOhm 2
RN2109A RN2109B RN2110A RN2110B RN2111B RN2111A
D
CLK_BUF_REF14
R2116 1
2 10KOhm
CLOCK TERMINATION for FCIM Default power-on mode is ICC.
GND
+3VSUS_ORG
EXT_SCI# SCL_3A SDA_3A
R2117 1 RN2103B 4 RN2103A 2
2 10KOhm 3 2.2KOhm 1 2.2KOhm
DRAMRST_CNTRL_PCH R2120 1
2 1KOhm
SML0_CLK
3 2.2KOhm 4 RN2104B
SML0_DAT
1 2.2KOhm 2 RN2104A
SML1_CLK
3 2.2KOhm 4 RN2105B
SML1_DAT
1 2.2KOhm 2 RN2105A
SML1ALERT#
R2125 1
2 10KOhm
C
DGPU_EDID_SELECT# DGPU_PRSNT# DGPU_PRSNT#
R2144 1 @ 2 10KOhm R2126 1 /UMA 2 10KOhm R2134 1 /DGPU 2 10KOhm
+3VS
GND
53 CLK_PCIE_mSATA#_PCH 53 CLK_PCIE_mSATA_PCH
SP2104 1 SP2105 1
2 R0402 2 R0402
CLK_PCH_SRC3_N CLK_PCH_SRC3_P
Y37 Y36
CLKOUT_PCIE3N CLKOUT_PCIE3P
100MHz
CLKIN_GND1_N CLKIN_GND1_P
BJ30 BG30
CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P
PCH CLKREQ Setting: Not connected to device.
53 CLK_REQ3_PCIE_mSATA#
SP2106 1
4.USB3.0 51 CLK_PCIE_USB#_PCH
51 CLK_PCIE_USB_PCH
51 CLK_REQ_USB30#
2 R0402
SP2119 2 SP2120 2 SP2113 2
CLK_REQ3#
1
CLK_PCH_SRC4_N
1
CLK_PCH_SRC4_P
1
CLK_REQ4#
A8 PCIECLKRQ3#/GPIO25
COUGAR_POINT_ES1
Y43 Y45
CLKOUT_PCIE4N CLKOUT_PCIE4P
100MHz
L12 PCIECLKRQ4#/GPIO26
96MHz CLKIN_DOT_96N CLKIN_DOT_96P
G24 E24
100MHz CLKIN_SATA_N CLKIN_SATA_P
AK7 AK5
CLK_BUF_DOT96_N CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P
R1.0 0118
CLK_REQ6_LAN# CLK_REQ0#
R2149 1 R2154 1
+3VSUS_ORG 2 10KOhm 2 10KOhm
T2125
1
T2126
1
CLK_PCH_SRC5_N CLK_PCH_SRC5_P
V45 V46
CLKOUT_PCIE5N CLKOUT_PCIE5P
100MHz
14.31818MHz REFCLK14IN
K45
CLK_BUF_REF14
C2101
1
2
GND
CLK_REQ3#
R2156 1 @
R1.0 CLK_REQ3# is change to +3VSUS 0609
2 10KOhm
3
2 R2142
T2127
1
CLK_REQ5#
L14 PCIECLKRQ5#/GPIO44
33MHz CLKIN_PCILOOPBACK H45
CLK_PCI_FB 24
10PF/50V
CLK_REQ4#
R2157 1
2 10KOhm
B
T2116
1
T2117
1
CLK_PCH_PEG_B_N CLK_PCH_PEG_B_P
AB42 AB40
CLKOUT_PEG_B_N CLKOUT_PEG_B_P
100MHz
XTAL25_IN XTAL25_OUT
V47 V49
XTAL25_IN XTAL25_OUT
T2112
1
CLK_REQ_PEG_B#
E6 PEG_B_CLKRQ#/GPIO56
4
CLK_REQ5#
R2158 1
2 10KOhm
B
2 X2103
25MHZ
GND
CLK_REQ7# CLK_REQ_PEG_B#
R2159 1 R2160 1
2 10KOhm 2 10KOhm
1
1 1MOhm
33 CLK_PCIE_LAN# 33 CLK_PCIE_LAN
33 CLK_REQ6_LAN#
SP2107 1 SP2108 1
SP2109 1
2 R0402 2 R0402
2 R0402
CLK_PCH_SRC6_N CLK_PCH_SRC6_P
CLK_REQ6#
V40 V42
CLKOUT_PCIE6N CLKOUT_PCIE6P
100MHz
T13 PCIECLKRQ6#/GPIO45
XCLK_RCOMP Y47 XCLK_COMP
R2106 1
2 90.9Ohm
+VCCDIFFCLKN
C2102
1
2XTAL25_OUT_C 1
2
R0402 SP2111
10PF/50V
GND
CLK_REQ_PEG_A#
R2161 1
2 10KOhm
T2123
1
T2124
1
T2118
1
CLK_PCH_SRC7_N CLK_PCH_SRC7_P
CLK_REQ7#
R1.0 Remove PCIE_CLK_XDP 0602
V38 V37
K12
AK14 AK13
CLKOUT_PCIE7N 100MHz CLKOUT_PCIE7P PCIECLKRQ7#/GPIO46 CLKOUT_ITPXDP_N 100MHz CLKOUT_ITPXDP_P
CLKOUTFLEX0/GPIO64 K43 CLKOUTFLEX1/GPIO65 F47 CLKOUTFLEX2/GPIO66 H47 CLKOUTFLEX3/GPIO67 K49
DGPU_EDID_SELECT# CLK_OUT1 CLK_OUT2 DGPU_PRSNT#
1 T2122 1 T2141 1 T2139 1 T2140
Connected to device.
+3VS
CLK_REQ2_WLAN#
R2133 1 @ 2 10KOhm
FLEX CLOCKS
02V000000001
CLK_REQ1#
R2155 1 @ 2 10KOhm
CLK_REQ4#
R2145 1 @ 2 10KOhm
CLK_REQ6_LAN#
R2143 1 @ 2 10KOhm
CLK_REQ2_WLAN#
R2138 1
2 10KOhm
CLK_REQ3#
R2162 1
2 10KOhm
CLK_REQ1#
R2166 1
2 10KOhm
A
A
GND
Title : PCH(2)_PCIE,CLK,SMB,PEG
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
21 of
94
5
4
3
2
1
5
4
3
2
1
+3VSUS_ORG
+3VSUS_ORG 20,21,24,25,27
+3VS
+3VS
4,16,17,20,21,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
U2001C
+VTT_PCH_ORG +3VA
+VTT_PCH_ORG 26,27
+3VA
20,27,30,48,63,65,81,88,93
D
3
DMI_RXN0
3
DMI_RXN1
3
DMI_RXN2
3
DMI_RXN3
3
DMI_RXP0
3
DMI_RXP1
3
DMI_RXP2
3
DMI_RXP3
3
DMI_TXN0
3
DMI_TXN1
3
DMI_TXN2
3
DMI_TXN3
3
DMI_TXP0
3
DMI_TXP1
3
DMI_TXP2
3
DMI_TXP3
BC24 BE20 BG18 BG20
BE24 BC20 BJ18 BJ20
AW 24 AW 20 BB18 AV18
AY24 AY20 AY18 AU18
DMI0RXN DMI1RXN DMI2RXN DMI3RXN
DMI0RXP DMI1RXP DMI2RXP DMI3RXP
DMI0TXN DMI1TXN DMI2TXN DMI3TXN
DMI0TXP DMI1TXP DMI2TXP DMI3TXP
DMI
FDI
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
FDI_INT AW16 FDI_INT_R
SP2201 1
2 R0402
FDI_TXN0 3 FDI_TXN1 3 FDI_TXN2 3 FDI_TXN3 3 FDI_TXN4 3 FDI_TXN5 3 FDI_TXN6 3 FDI_TXN7 3
FDI_TXP0 3 FDI_TXP1 3 FDI_TXP2 3 FDI_TXP3 3 FDI_TXP4 3 FDI_TXP5 3 FDI_TXP6 3 FDI_TXP7 3
FDI_INT 3
+VCC_RTC +3VSUS +5VSUS
+12VSUS
+VCC_RTC 20,27 +3VSUS 4,24,27,28,30,33,65,81,85,92 +5VSUS 27,30,60,61,63,65,66,82,83,84,85,91 +12VSUS 28,60,81,91
D
BJ24 DMI_ZCOMP
FDI_FSYNC0 AV12 FDI_FSYNC0_R SP2202 1
2 R0402
FDI_FSYNC0 3
+VTT_PCH_ORG
R2201 2 1% 1 49.9Ohm DMI_COMP_R
BG25 DMI_IRCOMP
FDI_FSYNC1 BC10 FDI_FSYNC1_R SP2203 1
2 R0402
FDI_FSYNC1 3
GND
R2202 2 1% 1 750Ohm RBIAS_CPY
BH21 DMI2RBIAS
FDI_LSYNC0 AV14 FDI_LSYNC0_R SP2204 1
2 R0402
FDI_LSYNC0 3
FDI_LSYNC1 BB10 FDI_LSYNC1_R SP2205 1
2 R0402
FDI_LSYNC1 3
System Power Management
DSWVRMEN A18 DSWODVREN
R2215 1 @ 2 330KOhm
R2214 1
2 330KOhm
GND +VCC_RTC
DSWODVREN - On Die DSW VR Enable HIGH - Enabled(DEFAULT) ; LOW-Disabled
T2208 SUS_PWR_ACK_R 1 SUSACK#
SP2216 1 R2203 2 @
2 R0402 1 0Ohm
SUSACK#_R
C12 SUSACK#
DPWROK E22 PCH_DPROK
SP2220 1
2 R0402 PM_RSMRST_R
30,92 PM_PWROK
+3VS
SYS_PWROK
R1.0
R2205 2
1
1
2
1.2V/0.1A @ D2201
SP2217 1
2
10KOhm R0402
PM_SYSRST#_R SYS_PWROK_R
SP2212 1
2 R0402 PM_PCH_PWROK_R
K3 SYS_RESET# P12 SYS_PWROK L22 PWROK
WAKE# B9 CLKRUN#/GPIO32 N3 SUS_STAT#/GPIO61 G8
SUS_STAT
T2206 1
PCIE_WAKE# 33,51,53 PM_CLKRUN# 30
Remove SUSCLK signal for TPM 0906
T2205
C
SP2221 1
2 R0402 PM_APWROK_R
L10 APWROK
SUSCLK/GPIO62 N14 SUS_CLK
1
R1.1 Remove SUS_CLK signal 0809
C
T2204
4 PM_DRAM_PWRGD
B13 DRAMPWROK
SLP_S5#/GPIO63 D10 SLP_S5#
1
R1.0 delete SP2215 for unuse. Joyoung 0617
PM_RSMRST# has pull down 10k ohm in EC
30 PM_RSMRST#
SP2213 1
2 R0402 PM_RSMRST_R
C21 RSMRST#
SLP_S4# H4
SLP_S4#_R
SP2206 1
2 R0402
PM_SUSC# 30
30 ME_SUSPWRDNACK
SP2218 1
2 R0402 SUS_PWR_ACK_R
K16 SUSWARN#/SUSPWRDNACK/GPIO30
SLP_S3# F4
SLP_S3#_R
SP2207 1
2 R0402
PM_SUSB# 30
30 PM_PWRBTN#
30 ME_AC_PRESENT T2201 1 T2202 1
SP2214 1 SP2219 1
2 R0402 2 R0402
AC_PRESENT_R BATLOW# RI#
E20 PWRBTN# H20 ACPRESENT/GPIO31 E10 BATLOW#/GPIO72 A10 RI#
02V000000001 COUGAR_POINT_ES1
SLP_A# G10 ME_PM_SLP_A#_R R2216 2 @ 1 0Ohm
SLP_SUS# G16 SLP_SUS#_R PMSYNCH AP14
2 @ 1 0Ohm R2217
R1.0 0110 SLP_SUS# 30 R1.0 0121
H_PM_SYNC 4
SLP_LAN#/GPIO29 K14
ME_PM_SLP_LAN#_RR2218 2 @ 1 0Ohm
ME_PM_SLP_LAN# 30
R1.0 cut trace. Joyoung 0614
i-AMT
R1.0 0121
ME_PM_SLP_A# 30
i-AMT
B PM_PWROK
92 DELAY_VR_AND_ALL_SYS
SYS_PWROK for PCH
R2204 2 @ 1 0Ohm +3VSUS
U2201
1A
VCC 5
2B
3 GND
4 Y
Vcc=2~5.5
@
R2206 2
1 0Ohm
SYS_PWROK
B +3VSUS_ORG
+3VSUS
+5VSUS
1
1
R2230 10KOhm
@
R2232 10KOhm @
2
2
A
24,30,63,91,92 SUSB_EC#
SP2211 1
2 R0402
PM_SUSB# R2241 2
1 0Ohm
@
Q2203A UM6K1N
@ 2
GND
1
6
5
4
2
+12VSUS
5% R2231 100KOhm @
1
Q2203B UM6K1N
@ 5
3
PS_S3CNTRL_1.5V 7
R1.0 0120
PM_CLKRUN#
PM_PWROK
R2220 1 R2221 1
+3VS 2 10KOhm 2 10KOhm
GND
GND
4
3
RI#
R2223 1
BATLOW#
R1.0 0120
PCIE_WAKE#
R2224 1 R2225 1
2 10KOhm 2 10KOhm 2 1KOhm
ME_PM_SLP_A#_R
R2226 1 @ 2 10KOhm
ME_SUSPWRDNACK R2227 1
2 10KOhm
ME_AC_PRESENT
R2228 1
2 10KOhm
ME_PM_SLP_LAN#_R R2229 1 @ 2 10KOhm
2
A
Title : PCH(3)_FDI,DMI,SYS PWR
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012 1
Sheet
22 of
94
LVDS
5
4
3
+3VS
+3VS
4,16,17,20,21,22,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92 +3VS
37 LCD_BACKEN_PCH 37 LCD_VDD_EN_PCH
SP2301 1 SP2302 1
U2001D
2 R0402 2 R0402
J47 M45
L_BKLTEN L_VDD_EN
L_CTRL_CLK
1 2.2KOhm 2 RN2301A
L_CTRL_DATA
3 2.2KOhm 4 RN2301B
DDC2BC_PCH
1 2.2KOhm 2 RN2303A
D
DDC2BD_PCH
3 2.2KOhm 4 RN2303B
37 LCD_BL_PWM_PCH
37 LVDS_DDCDAT_PCH
R1.0 0119
37 LVDS_DDCCLK_PCH
R1.0 Direct link. Joyoung 0614
T2301 T2302
Use eDP panel ,L_DDC_DADA is NC
Un mount R2307
1
L_CTRL_CLK
1
L_CTRL_DATA
R2301 2 R2302 2 @
1 2.37KOhm 1 0Ohm
SP2303 1
2 R0402
P45
T40 K47
T45 P39
AF37 AF36
AE48 AE47
L_BKLTCTL
L_DDC_CLK L_DDC_DATA
L_CTRL_CLK L_CTRL_DATA
LVD_IBG LVD_VBG
LVD_VREFH LVD_VREFL
GND
37 LVDSA_LCLKN_PCH 37 LVDSA_LCLKP_PCH
AK39 AK40
LVDSA_CLK# LVDSA_CLK
Frank 0506 Pull up 2.2k ohm in DDC bus for CRT and LVDS .
37 LVDSA_L0N_PCH 37 LVDSA_L1N_PCH 37 LVDSA_L2N_PCH
AN48 AM47 AK47 AJ48
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
37 LVDSA_L0P_PCH 37 LVDSA_L1P_PCH 37 LVDSA_L2P_PCH
AN47 AM49 AK49 AJ47
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
Frank 0426 modify CRT net name.
37 LVDSB_LCLKN_PCH 37 LVDSB_LCLKP_PCH
37 LVDSB_L0N_PCH 37 LVDSB_L1N_PCH 37 LVDSB_L2N_PCH
37 LVDSB_L0P_PCH 37 LVDSB_L1P_PCH 37 LVDSB_L2P_PCH
AF40 AF39
AH45 AH47 AF49 AF45
AH43 AH49 AF47 AF43
LVDSB_CLK# LVDSB_CLK
LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
38 DAC_B_PCH 38 DAC_G_PCH 38 DAC_R_PCH C
CRT_B_PCH 50 ohm JP2301 2 CRT_G_PCH 50 ohm CRT_R_PCH 50 ohm
Close to CPU
1 SHORT_PIN JP2302 2
1 SHORT_PIN
2
1
JP2303
SHORT_PIN
37.5 ohm 37.5 ohm 37.5 ohm
1
1
1
R2304 150Ohm
R2305 150Ohm
R2306 150Ohm
38 DDC2BC_PCH 38 DDC2BD_PCH
38 DAC_HSYNC_PCH 38 DAC_VSYNC_PCH
2
2
2
/UMA
/UMA GND
/UMA
GND GND
B_PCH G_PCH R_PCH
N48 P49 T49
CRT_BLUE CRT_GREEN CRT_RED
T39 M40
CRT_DDC_CLK CRT_DDC_DATA
SP2304 1 SP2305 1
2 R0402 2 R0402
M47 M49
CRT_HSYNC CRT_VSYNC
R2303 2 0.5% 1 1KOhm
T43 T42
DAC_IREF CRT_IRTN
COUGAR_POINT_ES1 02V000000001
CRT
CRT Disable: (For discrete graphic)
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
CRT_HSYCN,CRT_VSYNC
2. 1-k ±0.5% pull-down to GND:
DAC_IREF
3. Connected to GND:
B
CRT_ITRN
4. Connect to +V3.3:
VCCADAC
DisPlay Port Disable: (For discrete graphic)
1. NC: ALL
LVDS Disable: (For discrete graphic)
1. NC: LVDSA_DATA [3:0], LVDSA_DATA# [3:0], LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0], LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK# L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH LVD_VREFL, LVD_IBG, LVD_VBG
2. Connected to GND: VccALVDS,VccTX_LVDS
Digital Display Interface
2
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_INTN SDVO_INTP
AP43 AP45
AM42 AM40
AP39 AP40
SDVO_CTRLCLK SDVO_CTRLDATA
P38 M39
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
DDPC_CTRLCLK DDPC_CTRLDATA
P46 P42
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
DDPD_CTRLCLK DDPD_CTRLDATA
M43 M36
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
DDPD_AUXN DDPD_AUXP
Display Port C
Display Port B
HDMI_DDC_CLK_PCH 39 HDMI_DDC_DATA_PCH 39
1 T2303 1 T2304
HDMI_HPD_PCH 39
HDMI_TXN2_PCH 39 HDMI_TXP2_PCH 39 HDMI_TXN1_PCH 39 HDMI_TXP1_PCH 39 HDMI_TXN0_PCH 39 HDMI_TXP0_PCH 39 HDMI_CLKN_PCH 39 HDMI_CLKP_PCH 39
SDVO
Display Port D
1 D C B
A
A
Title : PCH(4)_DP,LVDS,CRT
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
23 of
94
5
4
3
2
1
5
4
3
1
+3VS
R2430 10KOhm @
2
U2402
91 VGA_PWRON
+3VSUS R2414 1 @ 2 0Ohm
5 4
VCC A B
Y GND
1 2 3
R2415 GND
1 @ 2 0Ohm DGPU_PWR_EN SUSB_EC# 22,30,63,91,92
D
SN74LVC1G08DCKR
@
R2413 1
2 0Ohm
U2001E
BG26 BJ26 BH25 BJ16 BG16 AH38 AH37 AK43 AK45 C18 N30
H3 AH12 AM4 AM5
Y13 K24 L24 AB46 AB45
TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20
RSVD
B21 M20 AY16 BG46
TP21 TP22 TP23 TP24
C +3VS
+3VS
1 3 5 7
10KOhm 10KOhm 10KOhm 10KOhm
2 4 6 8
RN2403A RN2403B RN2403C RN2403D
SATA_ODD_DA# EXTTS_SNI_DRV1_PCH
DGPU_SELECT# INT_PIRQA#
RN2407A RN2407B RN2407C RN2407D
210KOhm 641100KKOOhhmm 810KOhm
1 3 5 7
MPC_PWR_CTRL# INT_PIRQB# INT_PIRQC# INT_PIRQD#
+3VS
10KOhm 2 @ 1R2420
10KOhm 2
1 R2421
DGPU_PWM_SELECT# EXTTS_SNI_DRV0_PCH
10KOhm 2 /DGPU 1R2422
DGPU_HOLD_RST#_R
B
1KOhm 2
1 R2423
DGPU_PWR_EN
/DGPU
61 USB3_RX1_N 61 USB3_RX2_N
61 USB3_RX1_P 61 USB3_RX2_P
61 USB3_TX1_N 61 USB3_TX2_N
61 USB3_TX1_P 61 USB3_TX2_P
BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW 30
TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40
70 DGPU_HOLD_RST# 63 DGPU_PWR_EN
DGPU_PWR_EN T2404
GND 60 SATA_ODD_DA#
T2401
1
4
PLT_RST#
21 CLK_PCI_FB 30 CLK_KBCPCI_PCH
65 CLK_DEBUG
1
2
SP2403 1 T2406
1
R2405 1 @
2 R0402 1
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
DGPU_HOLD_RST#_R DGPU_SELECT#
BBS_BIT1 DGPU_PWM_SELECT# STP_A16OVR
2 1KOhm
MPC_PWR_CTRL# SATA_ODD_DA# EXTTS_SNI_DRV0_PCH EXTTS_SNI_DRV1_PCH
K40 K38 H38 G38
PIRQA# PIRQB# PIRQC# PIRQD#
C46 C44 E40
REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54
D47 E42 F46
GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55
COUGAR_POINT_ES1
G42 G40 C42 D44
PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
T2402
1
22Ohm 2
22Ohm 2
22Ohm 2
T2405
1
PCI_PME#
K10
PLT_RST#
C6
A15:R2409=100ohm for EA .
PME# PLTRST#
1 R2409 1 R2410 1 R2411
CLKOUT_PCI0_R CLK_PCI_FB_R CLK_KBCPCI_PCH_R CLK_DEBUG_R CLK_DBG_R
R1.0 0103
H49 H43 J48 K42 H40
CLKOUT_PCI0 CLKOUT_PCI1 33MHz CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4
C2403 10PF/50V @
02V000000001
GND DGPU_PWR_EN is active high
PCI USB
2
1
+3VSUS
+3VSUS 4,22,27,28,30,33,65,81,85,92
+3VS
+3VS
4,16,17,20,21,22,23,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+3V
+3V
4,37,51,63,65,91
+3VSUS_ORG
+3VSUS_ORG 20,21,22,25,27
RSVD1 RSVD2 RSVD3 RSVD4
AY7 AV7 AU3 BG4
+12VS +1.8VS
+12VS +1.8VS
28,39,41,91 7,25,26,63,84
RSVD5 RSVD6
AT10 BC8
RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
RSVD23 RSVD24
RSVD25
AV5 AV10
AT8
NV_RCOMP
R2427 1
1% @
2 32.4Ohm
GND
RSVD26 RSVD27
AY5 BA2
RSVD28 RSVD29
AT12 BF3
D
USB PORT
USB P00 USB P01 USB P02
External 2.0/3.0 External 2.0/3.0
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
C24 USB_PN0 A24 USB_PP0 C25 USB_PN1 B25 USB_PP1
C26
A26 K28 USB_PN3 H28 USB_PP3 E28 USB_PN4 D28 USB_PP4 C28 USB_PN5 A28 USB_PP5
C29
B29 N28 USB_PN7 M28 USB_PP7 L30 USB_PN8 K30 USB_PP8 G30 USB_PN9 E30 USB_PP9 C30 USB_PN10 A30 USB_PP10 L32 USB_PN11 K32 USB_PP11 G32 USB_PN12 E32 USB_PP12
C32
A32
1 1
1 1
1 1
1 1
T2426 T2427
T2422 T2423
T2424 T2425
T2416 T2417
USB_PN0 61 USB_PP0 61 USB_PN1 61 USB_PP1 61
USB_PN3 61 USB_PP3 61
USB_PN5 55 USB_PP5 55
USB_PN8 37 USB_PP8 37 USB_PN9 61 USB_PP9 61
USB_PN11 53 USB_PP11 53
USB P03 External 2.0
USB P04
USB P05 WiFi
USB P07
USB P08 Camera
C
USB P09 External 2.0
USB P10 BT
USB P11 PCIE/mSATA
USB P12
USB P13
USBRBIAS# C33 USBRBIAS B33 USB_BIAS
R2424 1 1% 2 22.6Ohm GND
+3VSUS_ORG
OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43
OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14
A14 OC0#/GPIO59 K20 OC1#/GPIO40 B17 OC2#/GPIO41 C16 OC3#/GPIO42 L16 OC4#/GPIO43 A16 OC5#/GPIO9 D14 OC6#/GPIO10 C14 OC7#/GPIO14
1 7 5 7 5 1 3 3
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm
2 8 6 8 6 2 4 4
RN2402A RN2402D RN2401C RN2401D RN2402C RN2401A RN2401B RN2402B
B
Place within 500 mils of PCH
SP2401 1
2 R0402
USB_OC0# 61
SP2402 1
2 R0402
USB_OC1# 61
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap
Boot BIOS Strap
BBS_BIT1 0 0 1 1
BBS_BIT0 0 1 0 1
Boot BIOS Location LPC Reserved (NAND) Reserved SPI (PCH)
STP_A16OVR: A16 swap override Strap/ Top-Block swap override jumper
Low=Enabled A16 swap override/ Top-Block swap override
High=Default
A
Sampled on rising edge of PWROK.
20 BBS_BIT0
BBS_BIT0 R2417 1 @ 2 1KOhm BBS_BIT1 R2418 1 @ 2 1KOhm
GND
STP_A16OVR R2419 1 @ 2 1KOhm GND
5
4
+3V
PLT_RST#
U2401 @
1 2 3
A VCC B GND Y
5 4
SN74LVC1G08DCKR
GND
1 R2425
2 0Ohm
1
BUF_PLT_RST# 30,33,40,47,51,53,55,70
R2426 10KOhm
2
A GND
Title : PCH(5)_PCI,NVRAM,USB
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
24 of
94
3
2
1
5
4
3
2
1
+3VS +3VSUS
+3VS +3VSUS
4,16,17,20,21,22,23,24,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92 4,22,24,27,28,30,33,65,81,85,92
PCB_ID1
PCB_ID0
+3VSUS_ORG
+3VSUS_ORG 20,21,22,24,27
A
L
L
B
L
H
R1.0
C
H
L
Add PCH_GPIO0_R.
U2001F
D
MP
69 GSENSOR_INT1_PCH
R2501 1 @
2 100Ohm
PCH_GPIO0_R GPIO1
T7 BMBUSY#/GPIO0 A42 TACH1/GPIO1
TACH4/GPIO68 C40 TACH5/GPIO69 B41
R2511 1 1% 2 1.5KOhm
GND
D SATA_ODD_PWRGT 60
+3VS
+3VS
Delete ICC_EN#.
37 eDP_ON#
eDP_ON#
T2503
1 DGPU_HPD_INTR# H36 E38
TACH2/GPIO6 TACH3/GPIO7
TACH6/GPIO70 C41 TACH7/GPIO71 A40
R2512 1 R2513 1
1% 2 1.5KOhm 1% 2 1.5KOhm
+3VS +3VS
Add PM_LANPHY_EN
51 USB30_EXT_SMI# 53,55 WLAN_RST#_PCH
SP2502 1
2 R0402
USB30_EXT_SMI# C10 GPIO8
PM_LANPHY_EN
C4 LAN_PHY_PWR_CTRL/GPIO12
need close to EC
1
1
2
R2525 @
10KOhm
R2527 @
10KOhm
2
Add HOST_ALERT#1_R. Add SATA_DET#4_R.
30,65 EXT_SMI#
SP2501 1
2 R0402
HOST_ALERT#1_R G2 GPIO15
SATA_DET#4
U2 SATA4GP/GPIO16
A20GATE PECI
RCIN#
P4 AU16 P5
H_PECI_R
0Ohm 1 @ 2 R2514 43Ohm 1
2 R2515
A20GATE 30
H_PECI 4 H_PECI_EC 30
RCIN# 30
GPIO CPU/MISC
PCB_ID0 PCB_ID1
DGPU_PWROK has 100 ms software delay , no hardware delay requirement
Reserve PCH_GPIO24
87,91,92 DGPU_PWROK
DGPU_PWROK
66 WLAN_LED T2509
1 LAN_LPWR SP2504 1
2 R0402
WLAN_LED PCH_GPIO24 GPIO27
D40 TACH0/GPIO17 T5 SCLOCK/GPIO22 E8 GPIO24/MEM_LED
E16 GPIO27
PROCPW RGD THRMTRIP# INIT3_3V# DF_TVS
AY11 AY10 T14 AY1
PM_THRMTRIP# 390Ohm 1
INIT3_3V#
1 T2504
NV_CLE
R2502 1
1% 2 R2516 2 1KOhm
R2517 1
2 56Ohm
@
H_CPUPWRGD 4 H_THRMTRIP# 4,47 +VCCP
H_SNB_IVB# 4
1
1
R2526 10KOhm
R2528 10KOhm
2
2
@
@
Add PLL_ODVR_EN.
Add PSATA_PWR_EN#1_R.
Add SATA_ODD_PRSNT#_R and FDI_OVRVLTG.
60 SATA_ODD_PRSNT#
T2510 SP2503 1
1 2 R0402
WLAN_ON_R
P8
STP_PCI#
K1
SATA_PWR_EN#1_R K4
SATA_ODD_PRSNT#_RV8
FDI_OVRVLTG
M5
GPIO28 STP_PCI#/GPIO34 GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37
TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4
AH8 AK11 AH10 AK10
R2503 1
TS Signal Disable Guideline TS_VSS[1:4] should pull down to GND Design Guide 0.9 (436735)
2 2.2KOhm
+1.8VS
GND
GND
C
Frank
PCB_ID0
N2 SLOAD/GPIO38
NC_1 P37
GND
C
0502 Modify PCB_ID
PCB_ID1
M3 SDATAOUT0/GPIO39
55 BT_ON_PCH
V13 SDATAOUT1/GPIO48
Vss_NCTF15 BG2
Add CRIT_TEMP_REP#_R.
+3VSUS_ORG
30 PCH_ALERT# T2508
SP2505 1 1
2 R0402
CRIT_TEMP_REP#_R BT_LED
V3 SATA5GP/GPIO49 D6 GPIO57
Vss_NCTF16 Vss_NCTF17 Vss_NCTF18
BG48 BH3 BH47
EXT_SMI# USB30_EXT_SMI#
R2529 1 R2531 2
2 1KOhm 1 10KOhm
R1.0 0126 Intel Comments
+3VS
+3VS
A4 Vss_NCTF1 A44 Vss_NCTF2 A45 Vss_NCTF3 A46 Vss_NCTF4
Vss_NCTF19 Vss_NCTF20 Vss_NCTF21 Vss_NCTF22
BJ4 BJ44 BJ45 BJ46
NCTF
1
PM_LANPHY_EN
R2538 2 /niAMT 1 10KOhm
PCH_GPIO24
R2541 2
1 10KOhm
R1.0 0120
2
1
R2549 10KOhm
@
R2550 10KOhm
@
A5 Vss_NCTF5 A6 Vss_NCTF6 B3 Vss_NCTF7
Vss_NCTF23 BJ5 Vss_NCTF24 BJ6 Vss_NCTF25 C2
2
R1.0 mount R2541 for LAN_LPWR 0615
+3VS
53,55 WLAN_ON
B47 Vss_NCTF8 BD1 Vss_NCTF9
Vss_NCTF26 C48 Vss_NCTF27 D1
RCIN# has pull high at EC side
3
BD49 Vss_NCTF10
Vss_NCTF28 D49
DGPU_HPD_INTR# R2534 2
1 10KOhm
Q2501B
UM6K1N
5
BE1 Vss_NCTF11
Vss_NCTF29 E1
PCH_ALERT# DGPU_PWROK
R2535 2 R2539 2
1 10KOhm 1 10KOhm
R1.0 0119
@
4
6
BE49 Vss_NCTF12
Q2501A
UM6K1N
2
WLAN_ON_R
BF1 Vss_NCTF13
Vss_NCTF30 E49 Vss_NCTF31 F1
B
eDP_ON#
R2547 2
1 10KOhm
@
1
BF49 Vss_NCTF14
Vss_NCTF32 F49
B
Unused GPIO GSENSOR_INT1_PCH
R2536 2
1 10KOhm
GND
GND
COUGAR_POINT_ES1 02V000000001
GPIO1
R2545 2 @ 1 10KOhm
R1.0 0119
STP_PCI#
SATA_DET#4
GPIO27 #438390 Checklist
R2537 2 R2546 2 R2548 2
1 10KOhm 1 10KOhm 1 10KOhm
GND
R1.0 REMOVE DGPU_PWROK schematic 0602
DGPU_PWROK
R2540 2 @ 1 10KOhm
+3VS
R2518 1 1% 2 1KOhm @
FDI_OVRVLTG
FDI TERMINATION VOLTAGE OVERRIDE
- GPIO37 (FDI_OVRVLTG)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
R2519 1
+3VS
R2520 1 1% 2 200KOhm SATA_ODD_PRSNT#_R
DMI TERMINATION VOLTAGE OVERRIDE - GPIO36 (SATA_ODD_PRSNT#) LOW - TX, RX terminated to same voltage (DC Couplong Mode) DEFAULT
2 100KOhm
GND
GND
PLL ON DIE VR ENABLE
A
WLAN_ON_R
R2521 1 @ 2 1KOhm
GND HIGH - DISABLED (DEFAULT)
A
LOW - ENABLED
R1.0 Change net name for single net. Joyoung 0621
Title : PCH(6)_CPU,GPIO,MISC
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
25 of
94
5
4
3
2
1
5
4
3
2
1
U2001H
H5 VSS0
+VCCA_DAC_1_2
L2604
D C
AA17 AA2 AA3
AA33 AA34 AB11 AB14 AB39
AB4 AB43
AB5 AB7 AC19 AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39 AD4 AD40 AD42 AD43 AD45 AD46 AD8 AE2 AE3 AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38 AF4 AF42 AF46 AF5 AF7 AF8 AG19 AG2 AG31 AG48 AH11 AH3 AH36 AH39 AH40 AH42 AH46 AH7 AJ19 AJ21 AJ24 AJ33 AJ34 AK12 AK3
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79
VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW 14 AW 18 AW 2 AW 22 AW 26 AW 28 AW 32 AW 34 AW 36 AW 40 AW 48 AV11 AY12 AY22 AY28
+VTT_PCH_ORG +VTT_PCH_VCCIO
R1.0 0126 Intel Comments
U2001G
POWER
2
1
2
2
1
C2613 0.01UF/50V
C2612 0.1UF/16V
C2614 22UF/6.3V
1
1
2
1kOhm/100Mhz
+3VS
+VTT_PCH_VCC
C2601 10UF/10V
GND
2
1
1
1
C2602 1UF/6.3V
C2603 1UF/6.3V
@ C2623 1UF/6.3V
2
2
2
GND
GND
GND
+VTT_PCH_VCCDPLL_EXP
1
1.3A
AA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31
VccCore1 VccCore2 VccCore3 VccCore4 VccCore5 VccCore6 VccCore7 VccCore8 VccCore9 VccCore10 VccCore11 VccCore12 VccCore13 VccCore14 VccCore15 VccCore16 VccCore17
+VTT_PCH_VCCIO
SP2604 2
1 R0402
+VTT_PCH_VCCDPLL_EXP
3.709A/29=128mA
AN19
Total 29pin (EDS R2.1) Joyoung0614
VccIO1
+VTT_PCH_ORG
L2601 2 @
1 1kOhm/100Mhz
+VTT_PCH_VCCAPLL_EXP
1
C2605 10UF/10V @
2
BJ22 VccAPLLEXP
AN16 AN17
VccIO2 VccIO3
+VTT_PCH_VCCIO
+VTT_PCH_VCC_EXP
1
1
1
R1.0 0126 Intel Comments
1
GND
AN21 3.709A/29*12= 1.535A
VccIO4
Total 29pin (EDS R2.1) AJNo2y6oungV0c6c1IO4 5
1
AN27 VccIO6
2
2
2
C2606 10UF/10V
C2607 1UF/6.3V
C2608
@
1UF/6.3V
C2609 1UF/6.3V
C2610 1UF/6.3V
2
2
AP21 AP23
VccIO7 VccIO8
AP24 VccIO9
AP26 VccIO10
GND
AT24 VccIO11
+3VS_VCC3_3 +VTT_PCH_VCCAPLL_FDI
R2605 2 @ 1 0Ohm
SP2606 2
+VTT_PCH_VCCDPLL_FDI 1 R0402
AN33 VccIO12
+3VS_VCCA3GBG
AN34 VccIO13
SP2605
2
1
change
228mA/8=28.5mA to 228mA total 8pin
BH29 (EDS R2.1)
Vcc3_3_1
1
R0402
Joyoung0613
C2611
0.1UF/16V
167mA/4=41.75mA
2
+VCCAFDI_VRMJoyoung0613 AP16 VccVRM1
GND
change to 167mA total 4pin (EDS R2.1)
BG6 VccAFDIPLL
3.709A/29=128mA
AP17
Total 29pin (EDS R2.1) Joyoung0613
VccIO14
+VCCIO_CPU_VCC_DMI
42mA/2=21mA AU20 VccDMI1
COUGAR_POINT_ES1
FDI DFT / SPI
VCCIO DMI
VCC CORE
HVCMOS
LVDS
CRT
VccADAC U48 1mA
VssADAC U47
GND
VccALVDS VssALVDS
AK36 AK37
1mA GND
GND
GND
R1.0 0225
GND +3VS_VCCA_LVD
SP2607
1
2
R0402
+3VS
VccTX_LVDS1 VccTX_LVDS2 VccTX_LVDS3 VccTX_LVDS4
AM37 AM38 AP36 AP37
40mA (EDS R2.1)
Joyoung0613
2
1
C2615 0.01UF/50V
2
1
+1.8VS_VCCTX_LVD 1kOhm/100Mhz 1
1
C2616 0.01UF/50V
2
C2617 22UF/6.3V @
+1.8VS 2 L2602
Vcc3_3_2 V33
GND
GND
GND
+3VS_VCC_GIO
Vcc3_3_3
V34 change
to
228mA/8*2pin=57mA 228mA total 8pin (EDS R2.1)
SP2608 2
1
Joyoung0613
C2618
0.1UF/16V
2
167mA/4=41.75mA
Joyoung0613 VccVRM2 AT16
+VCCAFDI_VRM
GND
change to 167mA total 4pin (EDS R2.1) +VCCIO_CPU_VCC_DMI
1 R0402 +VCCP
VccDMI2 AT20 42mA/2=21mA
SP2609 2
1 R0402
1
VccClkDMI
AB36 75mA (EDS R2.1)
Joyoung0613
C2619 1UF/6.3V
2
GND
+VTT_PCH_ORG_VCCCLKDMI
1kOhm/100Mhz 2
1 L2603 @
R2614 2
1 0Ohm
+VTT_PCH_ORG
1
VccDFTERM1 AG16
C2620 10UF/10V @
2
VccDFTERM2 AG17
GND +V_NVRAM_VCCPNAND
+1.8VS
VccDFTERM3 AJ16
20mA
SP2610 2
1 R0402
1
VccDFTERM4
AJ17 (EDS R2.1)
Joyoung0614
2
C2621 0.1UF/16V
R1.2
GND +3VM_VCCPSPI
VccSPI 02V000000001
V1 10mA (EDS R2.1) Joyoung0613
C2622 0.1UF/16V
2
1
R2616 2 @ 1 0Ohm
R2617 2
1 0Ohm
+3VS +3VM_SPI
+3VS_VCC3_3
D C
GND
COUGAR_POINT_ES1 02V000000001
GND
GND
R1.0 0118
+VTT_PCH_VCCIO
+VTT_PCH_VCCIO 20,27
B
+VTT_PCH_ORG
+VTT_PCH_ORG 22,27
B
+1.05VS
+1.05VS 27,63,80,82,87
+1.05VS
JP2601
4.56A=330mA+1.3A+2.925A
1 12 2
3MM_OPEN_5MIL
+VTT_PCH_ORG
JP2602 1 12 2 2MM_OPEN_5MIL
+VTT_PCH_VCC 1.3A
+1.5VS
SP2602
1
2
+VCCAFDI_VRM 160mA
+1.5VS +VCCAFDI_VRM
+3VS +3VS_VCC3_3
+3VM_SPI +1.8VS
+1.5VS 53,55,63,91
+VCCAFDI_VRM 27
+3VS
4,16,17,20,21,22,23,24,25,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+3VS_VCC3_3 27
+3VM_SPI 28
+1.8VS 7,25,63,84
0614-Change JP(3MM_OPEN_5MIL)
JP2603
+VTT_PCH_VCCIO 2.925A
R0402
+VCCP
+VCCP 3,4,6,7,25,27,37,47,63,82
1 12 2 2MM_OPEN_5MIL
VCCVRAM use +1.5VS in mobile HAD_SYNC should pull high to +3VSUS
R1.0 Delete
R1.0 fellow everest 0614
+VTT_PCH_VCC
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
JP2604 1MM_OPEN_M1M2
+VTT_PCH_ORG
+VTT_PCH_VCCDPLL_FDI +VTT_PCH_VCCAPLL_FDI +3VS_VCCA3GBG
1 12 2
+3VS_VCC_GIO +VCCA_DAC_1_2
+3VS_VCCA_LVDS
+3VM_VCCPSPI
+V_NVRAM_VCCPNAND
+1.8VS_VCCTX_LVD
+VCCIO_CPU_VCC_DMI
+VTT_PCH_ORG_VCCCLKDMI
A
A
Title : PCH(7)_POWER,GND
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
26 of
94
5
4
3
2
1
5 U2001I
D C B
AY4 AY42 AY46
AY8 B11 B15 B19 B23 B27 B31 B35 B39
B7 F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38 BB4 BB46 BC14 BC18 BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46 BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BD3 BF30 BF38 BF40 BF8 BG17 BG21 BG33 BG44 BG8 BH11 BH15 BH17 BH19 H10 BH27 BH31 BH33 BH35 BH39 BH43 BH7 D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42 D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34
F3
VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258
GND
02V000000001 COUGAR_POINT_ES1
4
3
2
1
VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342 VSS343 VSS344 VSS345 VSS346
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W 34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W 17 W 19 W2 W 27 W 48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
+VTT_PCH_ORG
+3VSUS_ORG +3VA
R2703 1 @ 2 0Ohm
R2704 1
2 0Ohm
R2705 1 @ 2 0Ohm
U2001J +VTT_PCH_VCCACLK AD49 VccAClk +VCCPDSW 3mA T16 VccDSW3_3
POWER
1
USB
Clock and Miscellaneous
+VTT_PCH_ORG +1.05VM_ORG
@ L2704 1
C2705 0.1UF/16V
2
2 1kOhm/100Mhz
GND
2
1
PCH_VCCDSW
V12
C2706 @
+3VS_VCC_CLKF33 T38
228mA/8=28.5mA
0.1UF/16V
GND +VCCAPLL_CPY_PCH BH23
1
@ C2707 10UF/10V
2
+VTT_PCH_VCCIO
SP2715 1
2 R0402
AL29
3.709A/29=128mA
+VCCDPLL_CPY
+VCCSUS1 100mA/3=33mA
AL24
1
GND
C2708 1UF/6.3V @
AA19
2
GND
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
0.903A/23*20= 785mA
AC29 AC31
AD29
1
1
1
1
1
2
2
C2709 22UF/6.3V
C2710 22UF/6.3V
C2711 1UF/6.3V
C2712
@
1UF/6.3V
C2741 1UF/6.3V
2
2
AD31 W 21
2
GND
GND
GND
GND
GND
W 23 W 24
W 26
W 29
W 31
W 33
DcpSusByp
Vcc3_3_4
VccAPLLDMI2 VccIO15
DcpSus1
VccASW 1 VccASW 2 VccASW 3 VccASW 4 VccASW 5 VccASW 6 VccASW 7 VccASW 8 VccASW 9 VccASW 10 VccASW 11 VccASW 12 VccASW 13 VccASW 14 VccASW 15 VccASW 16 VccASW 17 VccASW 18 VccASW 19 VccASW 20
PCI/GPIO/LPC
+VCCRTCEXT
N16 DcpRTC
1
SATA
C2714 0.1UF/16V
+VCCAFDI_VRM 167mA/4=41.75mA Y49 VccVRM3
2
+VTT_PCH_VCCIO
+VTT_PCH_VCCA_A_DPL
75mA
BD47 VccADPLLA
GND
+VTT_PCH_VCCA_B_DPL
75mA
BF47 VccADPLLB
SP2716
1
2
R0402
1
+VTT_PCH_ORGSP2718 1
2 R0402
+VCCDIFFCLK 3.709A/29=128mA 55mA
AF17 AF33 AF34
1
C2715
+VCCDIFFCLKN
AG34
2
1UF/6.3V
C2716 1UF/6.3V
+VTT_PCH_ORG_SSCVCC
2
SP2717 1
2 R0402
95mA AG33
GND
GND +VTT_PCH_ORG
1
0.1UF/16V
C2717 1UF/6.3V
GND
2
2 GND
1 VCCSST V16 C2718
+1.05VM_ORG
R2710 1 @ 2 0Ohm
+V1.05VM_ORG_VCCSUS 100mA/3*2=66mA T17 V19
1
+VTT_CPU_VCCPCPU
@ C2719 1UF/6.3V
SP2701
2
+VCCP
1
2
1mA BJ8 GND
1
1
1
R0603
C2720
C2721
C2722
4.7UF/6.3V
0.1UF/16V
0.1UF/16V
2
2
2
6uA A22
VccIO16 VccDIFFCLKN1 VccDIFFCLKN2 VccDIFFCLKN3
VccSSC
DcpSST
DcpSus2 DcpSus3
V_PROC_IO
VccRTC
GND
GND
GND
COUGAR_POINT_ES1
MISC
RTC CPU
HDA
GND
+VCC_RTC
1
1
C2723 1UF/6.3V
C2724 0.1UF/16V
C2725 0.1UF/16V
2
2
2
GND
GND
GND
1
+VTT_PCH_VCCUSBCORE
VccIO17 VccIO18 VccIO19 VccIO20 VccIO21
N26 3.709A/29*5= 639mA
P26
1
P28
C2726
1UF/6.3V
2
T27
T29
GND
SP2702 1
2 R0603
+VTT_PCH_VCCIO
VccSus3_3_1 VccSus3_3_2 VccSus3_3_3 VccSus3_3_4 VccSus3_3_5
VccIO22
T23 119mA
+3VSUS_ORG_VCCPUSB SP2703 1
2 R0603 +3VSUS_ORG
1
2
T24
C2727
V23
0.1UF/16V
+3VSUS_ORG_VCCAUBG SP2704 1
2 R0402 +3VSUS_ORG
1
V24
GND
C2728
P24
0.1UF/16V
2
2
3.709A/29=128mA
T26 +VCCAUPLL
1
SP2705
GND
2 R0402
+VTT_PCH_VCCIO +5VSUS_PCH_VCC5REFSUS
1
D2701 1V/0.2A
D +3VSUS_ORG
13
V5REF_Sus M26 1mA
DcpSus4 VccSus3_3_6
AN23 AN24
+VCCA_USBSUS +3VSUS_ORG_VCCPSUS
2
1
C2730 1UF/6.3V @
C2729 1UF/6.3V
+5VS_PCH_VCC5REF
1 R2711 2 100Ohm
+5VSUS_ORG +3VS
2
GND
D2702 1V/0.2A
2 3
1
V5REF P34 1mA
+3VSUS_ORG_VCCPSUS
GND
1 R2712 2 100Ohm
+5VS
1
VccSus3_3_7 N20 VccSus3_3_8 N22 VccSus3_3_9 P20 VccSus3_3_10 P22
2
1
SP2706 1
C2732 1UF/6.3V
GND +3VS_VCCPCORE
2 R0402 +3VSUS_ORG
C2731 1UF/6.3V
2
GND
Vcc3_3_5 Vcc3_3_6 Vcc3_3_7
AA16 228mA/8*2pin=57mA
W 16
+3VS_VCCPPCI
T34 228mA/8=28.5mA
SP2708 1
2 R0402
+3VS_VCC3_3
2
1
SP2707 1
C2733 0.1UF/16V
2 R0402
+3VS_VCC3_3
C
1
Vcc3_3_8 AJ2
C2734 0.1UF/16V GND 228mA/8=28.5mA
2
GND +3VS_VCC3_3
1
VccIO23 AF13
VccIO24 VccIO25
AH13 AH14
VccIO26 VccAPLLSATA
AF14 AK1
C2735
2
0.1UF/16V +VTT_PCH_VCCIO_SATA3
GND 3.709A/29*4= 512mA
SP2709 1
2 R0603
+VTT_PCH_VCCIO
1
GND
2
C2736 1UF/6.3V
+VTT_PCH_ORG_VCCAPLL_SATA3
1kOhm/100Mhz 1
@ 2 L2705
+VTT_PCH_ORG
1
VccVRM4 AF11 167mA/4=41.75mA +VCCAFDI_VRM
VccIO27 VccIO28 VccIO29
AC16 AC17 AD17
+VTT_PCH_VCCIO_VCC_SATA
3.709A/29*3= 384mA
SP2710 1
1
C2738 1UF/6.3V
2
C2737 10UF/10V @
GND 2 R0603
+VTT_PCH_VCCIO
2
GND
VccASW21 T21 PCH_VCC_1_1_20 0.903A/23*3= 118mA
+1.05VM_ORG
B
VccASW22 V21 PCH_VCC_1_1_21
VccASW23 T19 PCH_VCC_1_1_22
10mil trace VccSusHDA P32 10mA
+3VSUS_ORG_VCCPAZSUS
SP2714 1
2 R0603
+3VSUS_ORG
1
C2739 0.1UF/16V
2
GND
+3VS_VCC3_3
R2701 1 @ L2701 1 A
2 0Ohm 2 1kOhm/100Mhz
1
+3VS_VCC_CLKF33
1
C2701 10UF/10V
C2702 1UF/6.3V
2
2
GND
GND
5
+VTT_PCH_VCCA_A_DPL
+VTT_PCH_ORG
1
R2702 0Ohm @
2
C2703 1UF/6.3V
GND
2
+VTT_PCH_VCCA_B_DPL
1
+VTT_PCH_VCCA_B_DPL
C2704 1UF/6.3V
2
1
1
C2713
22UF/6.3V /HR
2
1
L2702
1
2
1kOhm/100Mhz C2751
47UF/4V
2
GND
GND
L2703
1
2
1
C2740
1
1kOhm/100Mhz C2750
2
22UF/6.3V /HR
2
47UF/4V
GND
GND
GND
4
+3VSUS
JP2703
1MM_OPEN_M1M2
1 12 2
+3VSUS_ORG 109mA
+5VSUS
JP2702
1MM_OPEN_M1M2
1 12 2
+5VSUS_ORG
+3VS
JP2704
1MM_OPEN_M1M2
1 12 2
+3VS_VCC3_3 266mA
3
+1.05VS
R1.0 fellow everest 0614
JP2705 1 12 2
+1.05VM_ORG 1.01A
2MM_OPEN_5MIL
+VCC_RTC +3VA +1.05VS
+VTT_PCH_ORG +VTT_PCH_VCCIO
+VCCDIFFCLKN +VCCAFDI_VRM
+3VS +3VS_VCC3_3
+VCCP +5VSUS +5VS
+3VSUS_ORG +3VSUS
+VCC_RTC 20,22
+3VA
20,30,48,63,65,81,88,93
A
+1.05VS 26,63,80,82,87
+VTT_PCH_ORG 22,26
+VTT_PCH_VCCIO 20,26
+VCCDIFFCLKN 21
+VCCAFDI_VRM 26
+3VS
4,16,17,20,21,22,23,24,25,26,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+3VS_VCC3_3 26
+VCCP 3,4,6,7,25,26,37,47,63,82
+5VSUS 22,30,60,61,63,65,66,82,83,84,85,91
+5VS
30,38,39,41,42,48,49,60,63,66,80,87,91
+3VSUS_ORG 20,21,22,24,25
+3VSUS 4,22,24,28,30,33,65,81,85,92
PEGATRON COMPUTER INC
Title : PCH(8)_POWER,GND
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
27 of
94
2
1
5
PCH SPI ROM
+3VA_EC +3VSUS
2 R2814
2@ R2815
1 0Ohm
1 0Ohm
+3VM_SPI
D2801 1
3 2
@ 1V/0.2A
2 R2813
1 0Ohm
D
20 PCH_SPICS0# 20,30 PCH_SPISO
4
PCH_SPICS0# PCH_SPISO
+3VM_SPI
0Ohm 1 33Ohm 1 3.3KOhm 1
2 R2811 2 R2807 2 R2803
3
+3VM_SPI
2
+3VM_SPI1_WP#
C2801 0.1UF/16V
2
U2801
1 2 3 4
CS# SO/SIO1 W P#/ACC GND
VCC HOLD#
SCLK SI/SIO0
8 7 6 5
MX25L1606EM2I-12G 05V000000010
SPI1_HOLD# SPI1_CLK SPI1_SI
(2MB)
1
1
R2801 3.3KOhm
R2805 1 R2806 1
2 33Ohm 2 33Ohm
2
R1.0 0106
+3VS +12VS +12VSUS +3VM_SPI
1
+3VS
4,16,17,20,21,22,23,24,25,26,27,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+12VS 39,41,91
+12VSUS 22,60,81,91
+3VM_SPI 26
PCH_SPICLK PCH_SPISI
PCH_SPICLK 20,30 PCH_SPISI 20,30
PCH
<6.5 inch
<6.5 inch
EC
SPI ROM (32Mb)
D
SPI ROM (128 Kb)
+3VM_SPI
+3VM_SPI
1
1
20,30 PCH_SPICS1#
PCH_SPICS1#
0Ohm
1 @ 2 R2812
33Ohm 1 @ 2 R2810
3.3KOhm 1 @ 2 R2804
SPI2_CS#1 SPI2_SO +3VM_SPI2_WP#
U2802
@
1 2 3 4
CS# SO/SIO1 W P#/ACC GND
VCC HOLD#
SCLK SI/SIO0
8 7 6 5
MX25L3206EM2I-12G 05V000000005
(4MB)
2
C2802 0.1UF/16V
@
R2802 3.3KOhm @
2
SPI2_HOLD# SPI2_CLK SPI2_SI
R2808 1 @ 2 33Ohm R2809 1 @ 2 33Ohm
C
C
SPI Debug Connector
B
A 5
PCH SMBus
PCH
+3VSUS
21 SCL_3A
6
1
Q2801A UM6K1N
2
+12VS
2
+3VS
3
1
RN2801A 4.7KOHM
RN2801B 4.7KOHM
4
SMBUS Link device
eDP WLAN CPU XDP PCH XDP
+3VS
SMB_CLK_S 16,17,48,53,55
5
21 SDA_3A
3
4
SMB_DAT_S 16,17,48,53,55
B
Q2801B UM6K1N
+3VS
30,49,69,74 SMB1_CLK
EC, VGA Thermal
30,49,69,74 SMB1_DAT
Q2802A
UM6K1N
1
6
1@ 2
R2817
0Ohm
1
2
R2816
0Ohm
+12VSUS +12VS
2 5
Q2802B
UM6K1N
4
3
+3VSUS
SML1_CLK 21
PCH
SML1_DAT 21
+3VS Plamrest Thermal
A
Title : PCH(9)_SPI,SMB
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
28 of
94
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : CLK_ICS9LRS3197
PEGATRON COMPUTER INC
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
29 of
94
5
4
3
2
1
5
4
3
2
1
U3001
+3VA_EC
3 VBAT
127 121 114
92 50 26
VSTBY(PLL) VSTBY5 VSTBY4 VSTBY3 VSTBY2 VSTBY1
ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/W UI28/GPI4 ADC5/DCD1#/W UI29/GPI5 ADC6/DSR1#/W UI30/GPI6 ADC7/CTS1#/W UI31/GPI7
66 67 68 69 70 71 72 73
USB_OC#_EC
1
ME_PM_SLP_LAN# ME_PM_SLP_A#
T3043
THERM_ALERT#_EC 74
SLP_SUS# 22 WLAN_SW# 65 PCH_ALERT# 25 AD_IINP 88 ME_PM_SLP_LAN# 22 ME_PM_SLP_A# 22
+3VA_EC +3VS
+3VSUS +3VA
+3VA_EC +3VS +3VSUS +3VA
28,47 4,16,17,20,21,22,23,24,25,26,27,28,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92 4,22,24,27,28,33,65,81,85,92 20,27,48,63,65,81,88,93
For IT8518 Power
+3VA
+3VA_EC
Output driving:16mA
L3001
D
+3VACC +3VS
74 AVCC 11 VCC
PW M0/GPA0 PW M1/GPA1 PW M2/GPA2 PW M3/GPA3 PW M4/GPA4 PW M5/GPA5 PW M6/SSCK/GPA6 PW M7/RIG1#/GPA7
24 25 28 29 30 31 32 34
FAN0_PWM
1
T3044
PWR_BLUE_LED# 65,66 CHG_LED_BLUE# 66 BAT_ORG_LED# 66 PWR_AMBER_LED# 65,66
USBP0_EN 61 EC_SPKR 41 LCD_EC_PWM 37
+3VA_EC C3001
1
1
C3002
C3003
1
1
1kOhm/100Mhz
1
2
+3VA_EC
1
D
10UF/10V
0.1UF/16V 0.1UF/16V
C3004
C3005
2
2
2
20,65 LPC_AD0
20,65 LPC_AD1
20,65 LPC_AD2
20,65 LPC_AD3
24 CLK_KBCPCI_PCH
20,65 LPC_FRAME#
24,33,40,47,51,53,55,70 BUF_PLT_RST#
20,65 INT_SERIRQ
25,65 EXT_SMI#
21 EXT_SCI#
25 A20GATE
25
RCIN#
47 EC_RST#
7 47OHM
5 47OHM
3 1
47OHM 47OHM
SP3004 1 SP3005 1 SP3006 1 SP3007 1
8 RN3004DLAD0 6 RN3004CLAD1 4 RN3004BLAD2 2 RN3004ALAD3
2 R0402 2 R0402 2 R0402 2 R0402
10 9 8 7
13 6
22 5
15 23 126
4 14
RXD/SIN0/GPB0
TXD/SOUT0/GPB1
RING#/ PWRFAIL#/CK32KOUT/LPCRST#/GPB7
LAD0/GPM0
LAD1/GPM1
LAD2/GPM2
KSO16/SMOSI/GPC3
LAD3/GPM3
TMRI0/W UI2/GPC4
LPCCLK/GPM4
KSO17/SMISO/GPC5
LFRAME#/GPM5
TMRI1/W UI3/GPC6
LPCRST#/WUI4/GPD2 PWUREQ#/BBO/GPC7
SERIRQ/GPM6
ECSMI#/GPD4
ECSCI#/GPD3
RI1#/W UI0/GPD0
GA20/GPB5
RI2#/W UI1/GPD1
KBRST#/GPB6
GINT/CTS0#/GPD5
W RST#
TACH0A/GPD6
TACH1A/TMA1/GPD7
108 109 112
56 120 57 124 16
18 21 33 47 48
KSO16 KSO17 WLAN_PWR_ON# 1
FAN0_TACH
T3045
USBCHG_EN 81 ME_SUSPWRDNACK 22 PM_RSMRST# 22
KSO16 48 AC_IN_OC 74,88 KSO17 48 BAT1_IN_OC# 90
PM_SUSB# 22 PM_SUSC# 22 PM_PWROK 22,92 FAN0_TACH 49 ME_AC_PRESENT 22
GND GND
10UF/10V
2
R1.0 change to short pin. Joyoung0628
SP3001
1
2
+3VS
R0603
1
EC_AGND
C3006 0.1UF/16V
2
For PU / PD
0.1UF/16V
2
R1.0 change to short pin. Joyoung0628 +3VACC
SP3002
1
2
1
R0603
C3007 0.1UF/16V
2
EC_AGND
C
48
KSI0
48
KSI1
48
KSI2
48
KSI3
48
KSI4
48
KSI5
48
KSI6
48
KSI7
48
KSO0
48
KSO1
48
KSO2
48
KSO3
48
KSO4
48
KSO5
48
KSO6
48
KSO7
48
KSO8
48
KSO9
48
KSO10
48
KSO11
48
KSO12
48
KSO13
48
KSO14
48
KSO15
58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55
KSI0/STB#
KSI1/AFD#
L80HLAT/BAO/W UI24/GPE0
KSI2/INIT#
EGAD/W UI25/GPE1
KSI3/SLIN#
EGCS#/W UI26/GPE2
KSI4
EGCLK/W UI27/GPE3
KSI5
PW RSW /GPE4
KSI6
RTS1#/W UI5/GPE5
KSI7
LPCPD#/W UI6/GPE6
KSO0/PD0
L80LLAT/W UI7/GPE7
KSO1/PD1
KSO2/PD2
KSO3/PD3
SSCE1#/FSCE#/GPG0
KSO4/PD4
DTR1#/SBUSY/GPG1/ID7
KSO5/PD5
SSCE0#/GPG2
KSO6/PD6
DSR0#/GPG6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
CLKRUN#/W UI16/GPH0/ID0
KSO10/PE
W UI17/SIN1/SMCLK3/GPH1/ID1
KSO11/ERR# WUI18/SOUT1/GPH2/SMDAT3/ID2
KSO12/SLCT
HSCE#/W UI19/GPH3/ID3
KSO13
HSCK/GPH4/ID4
KSO14
HMISO/GPH5/ID5
KSO15
HMOSI/GPH6/ID6
19 VSUS_ON_EC 82 83 84 125 35 17 20
SP3003 1
2 R0402
106
107 BT_PWR_ON#
1
100 PCH_FLASH_DESCRIPTOR
104
T3047
93
94
95
96
HSPI_CS R3056 1 N/A 2 0Ohm
97
HSPI_CLK R3057 1 N/A 2 0Ohm
98
HSPI_SO R3058 1 N/A 2 0Ohm
99
HSPI_SI
R3059 1 N/A 2 0Ohm
VSUS_ON 63,81,91,93
SUSC_EC# 63,91
SUSB_EC# 22,24,63,91,92
CPU_VRON 80
PWR_SW#_M 65 RF_DET# 55
0202
LID_SW# 37,48,65
WLAN_WAKE# 55
THRO_CPU 4
PM_PWRBTN# 22
PM_CLKRUN# 22 USBP1_EN 61
USBP2_EN 61 PCH_SPICS1# 20,28 PCH_SPICLK 20,28 PCH_SPISO 20,28 PCH_SPISI 20,28
+3VA_EC
R3004 1
2 47KOhm BAT1_IN_OC#
RN3001A RN3001B
1 4.7KOHM 2 3 4.7KOHM 4
+3VS
SMB0_CLK SMB0_DAT
RN3001D RN3001C
7 4.7KOHM 8 5 4.7KOHM 6
SMB1_DAT SMB1_CLK
R3055 1
2 10KOhm THERM_ALERT#_EC
+5VS
RN3002A 1 RN3002B 3 RN3003B 3 RN3003A 1
4.7KOHM2 44..77KKOOHHMM44 4.7KOHM2
TP_CLK TP_DAT SUSB_EC# SUSC_EC#
GND
+3VS
R3017 1 10KOhm 2 R3018 1 10KOhm 2 R3060 1 10KOhm 2
A20GATE RCIN# FAN0_TACH
+3VA_EC
C
55,81 IOAC_EN
61
CHGCB0#
119 123
GPC0 TMA0/GPB2
PM_SUSB# PM_SUSC#
R3006 1 R3007 1
2 100KOHM 2 100KOHM
R3025 1 10KOhm 2 PWR_SW#_M
38 CRT_IN#_EC 69 GSENSOR_INT1_EC
55 WLAN_RST#_EC
48
TP_CLK
48
TP_DAT
63,88 SMB0_CLK 63,88 SMB0_DAT 28,49,69,74 SMB1_CLK 28,49,69,74 SMB1_DAT
25 H_PECI_EC
37 LCD_BACKOFF#
RF_ON_R H_PECI_EC
85 86 87 88 89 90
PS2CLK0/TMB0/GPF0 PS2DAT0/TMB1/GPF1 PS2CLK1/DTR0#/GPF2 PS2DAT1/RTS0#/GPF3 PS2CLK2/W UI20/GPF4 PS2DAT2/W UI21/GPF5
110 111 115 116 117 118
SMCLK0/GPB3 SMDAT0/GPB4 SMCLK1/GPC1 SMDAT1/GPC2 SMCLK2/PECI/W UI22/GPF6 SMDAT2/PECIRQT#/W UI23/GPF7
20 MEFLSH_EN#
R1.2-4
@ Q4602
2N7002
?? ?
D3
1 PCH_FLASH_DESCRIPTOR S2 G
GND
PCH_FLASH_DESCRIPTOR 20
CPU_VRON
R3009 1
2 100KOHM
PM_RSMRST#
R3011 1
AC_IN_OC is pulled high at power
2 10KOhm
R3038 1 10KOhm 2 WLAN_WAKE#
R3061 1 10KOhm 2 IOAC_EN
R3062 1 10KOhm 2 @
RF_DET#
R3063 1 10KOhm 2 RF_DET#
0202
42
OP_SD#
49 CTL_FAN 80,92 VRM_PWRGD
92 ALL_SYSTEM_PWRGD
81,92 SUS_PWRGD
55
BT_ON_EC
VRM_PWRGD
81 80 79 78 77 76
DAC5/RIG0#/GPJ5 DAC4/DCD0#/GPJ4 DAC3/TACH1B/GPJ3 DAC2/TACH0B/GPJ2 GPJ1 TACH2/GPJ0
mSATA_PWR_ON# LAN_PWR_ON# AUD_PWR_ON# CAMERA_PWR_ON#
VSUS_ON
R3008 1
2 100KOHM
+3VSUS
R3053 2 @ 1 100KOHM VSUS_ON
+3VSUS R3020 1 10KOhm 2
PM_PWRBTN#
+5VSUS
B
55
RF_ON
+3VS_WLAN
+3VS_WLAN
1
1
R3040 10KOhm
R3041 10KOhm
2
EC_XIN 128 EC_XOUT 2
CK32K CK32KE
SCE# SCK SI SO
101 105 102 103
FSCE# FSCK FMOSI FMISO
VSS1 VCORE
VSS2 VSS3 VSS4 VSS5 VSS6
1 12 27 49 91 113 122
AVSS 75
C3008 1
0.1UF/16V
2
GND
GND
EC_AGND
ODD_PWR_ON#
+3VA_EC
R3014 47KOhm
2
1 PWR_BLUE_LED#
B
R3054 1
2 10KOhm VSUS_ON
R3027 47KOhm
2
1 PWR_AMBER_LED#
@ VSUS_ON Default Pull High to +3VSUS
+5VA
R3015 47KOhm
2
1 BAT_ORG_LED#
32
Q3001B
UM6K1N
5
IT8518E
R3022 47KOhm
2
1 CHG_LED_BLUE#
6
4
Q3001A UM6K1N
2
RF_ON_R
1
GND R3035 2
@
Share ROM
GND 1 0Ohm
+3VA_EC
2
1
A
SCE#
R3034 2
SO
R3029 1
+3VA_EC
R3032 1
1 0Ohm 2 15Ohm 2 3.3KOhm
U3004
SCE#_S SO_S ROM_WP#_S
1 2 3 4
CS#
VCC
SO/SIO1 HOLD#
WP#/ACC SCLK
GND
SI/SIO0
8 7 6 5
MX25L3206EM2I-12G 05V000000005
SCLK_S SI_S
need to check ROM P/N
R3028 3.3KOhm
C3013 0.1UF/16V
2
1
R3030 1 R3031 1
2 15Ohm
SCK
2 15Ohm
SI
5
4
non-Share ROM
Cload=12.5PF place close to EC
+3VA_EC
2
1
R3019
C3012
3.3KOhm
0.1UF/16V
U3003
@
@
2
SCE# R3033 2 @
SO R3013 1 @
+3VA_EC
R3024 2 @
1 2 1
0Ohm 15Ohm 3.3KOhm
SCE#_nonS 1 SO_nonS 2 ROM_WP#_no3nS
4
CE# SO W P# GND
VCC HOLD#
SCK SIO
8 7 6 5
ROM_HD#_nonS
SCK_nonS
15Ohm1 @
SI_nonS
15Ohm1 @
1
2 R3016 2 R3023
SCK SI
PM25LD010C-SCE (128KB)
@
3
2
EC_XIN
R3021
10MOhm
2@
1 EC_XOUT
X3001
32.768Khz
+/-20ppm/12.5PF
R3026
1
42 @ 1
0Ohm @
2 3
C3010 10PF/50V
1
2
2
1
C3011 10PF/50V @
BU2/RD3
Size Project Name
C
VA70
Date: Friday, February 03, 2012
A
Title : ITE8518E
Engineer: Wing_Cheng
Sheet
30 of
Rev 1.0 99
1
5
4
3
2
1
D
D
+3V_LAN
+3VSUS
R3309
1
2
0Ohm
21 21 21 21
1A 40 mil
C3301
C3302
C3303
10UF/6.3V 10UF/6.3V 1UF/10V
C3304 0.1UF/16V
GND
+AVDDH27
U3301 1 VDD33
TRXP0 TRXN0 TRXP1 TRXN1 TRXP2 TRXN2 TRXP3 TRXN3
11 12 14 15 17 18 20 21
L_TDP 34 L_TDN 34 L_RDP 34 L_RDN 34 L_TRDP2 34 L_TRDM2 34 L_TRDP3 34 L_TRDM3 34
2 L_TRDP3 R3312
2 L_TRDN3 R3313
2 L_TRDP2 R3302
2 L_TRDN2 R3301
2 L_TRDP1 R3304
2 L_TRDN1 R3303
2 L_TRDP0 R3306 2 L_TRDN0 R3305
1
+AVDDH27 R3317 1
2
C3310 0.1UF/16V
GND 2 0Ohm
2
C3308
C3309
0.1UF/16V 1UF/10V
2
1
1
9 AVDDH_REG
22 16
AVDDH1 AVDDH2
1
1
1
1
1%
1% 1%
1% 1%
1% 1%
1%
1
1
1
1
49.9Ohm
1 49.9Ohm
49.9Ohm
1 49.9Ohm
49.9Ohm
1 49.9Ohm
49.9Ohm
1 49.9Ohm
21
C3311 0.1UF/16V
20 mil
1
+AVDDL11
1
C3312
C3313
6 AVDDL_REG
C3323 0.1UF/16V
C3324 0.1UF/16V
C3325 0.1UF/16V
C3326 0.1UF/16V
2
2
2
2
0.1UF/16V 1UF/10V
2
2
C
GND
C
GND
GND
GND
GND
1
1
1
1
2
C3314
C3315
C3317
0.1UF/16V 0.1UF/16V 0.1UF/16V
C3316 0.1UF/16V
2
2
2
+VDD17
40 mil
C3305
1
1
L3301 1
C3306
2.2UH
13 19 34 31
AVDDL1 AVDDL2 AVDDL3 AVDDL4
2
VCTL17
40
60 mil
LX
LED[1] LED[0] LED[2]
39 38 23
Close Chip
LED1 LED0
R3314 1 @
2 0Ohm CLK_REQ6_LAN#
1
T3301
LED0
LED_BLINKINGn 34
1
2
2
0.1UF/16V 10UF/10V <200 mil
<200 mil
TX_P TX_N
30 29
RX_P RX_N
35 36
PCIE_RXP_LAN_R PCIE_RXN_LAN_R
C3327 1 C3328 1
2 0.1UF/16V 2 0.1UF/16V
PCIE_RXP6_LAN 21 PCIE_RXN6_LAN 21
PCIE_TXP6_LAN 21 PCIE_TXN6_LAN 21
2
R3307 10KOhm
Strap for non-overclocking
VDDCT
1
C3307
5 VDDCT
REFCLK_P REFCLK_N
33 32
CLK_PCIE_LAN 21 CLK_PCIE_LAN# 21
GND
2
0.1UF/16V
+3V_LAN
+3V_LAN
2
2
+DVDDL11
R3323 4.7KOhm @
R3322 4.7KOhm @
1
1
20 mil
1
1
37 DVDDL_REG
B
C3318
C3319
PERSTn 2
BUF_PLT_RST# 24,30,40,47,51,53,55,70
B
2
1UF/10V 0.1UF/16V
2
WAKEn 3
PCIE_W AKE#_LAN
LED1
LED_LINKn 34
21
GND GND GND
C3321
12PF/50V
1
2
C3331 @
0.1UF/16V
1
2
4
25MHZ
X3301
3
1
2
XOUT_LAN_C
C3322 12PF/50V
GND
C3320 820PF/50V
1AV200000090
GND
GND
XIN_LAN
1
2
XOUT_LAN
SP3301
R0402
GND
1 1% 2
R3308
2.37KOhm
R3301 close to pin10
24 DVDDL
8 7
XTLI XTLO
10 RBIAS
21
SMCLK SMDATA
25 26
CLKREQn 4
NC TESTMODE
GND GND1 GND2 GND3 GND4 GND8 GND7 GND6 GND5
28 27 41 42 43 44 45 49 48 47 46
R3318 1
2 0Ohm Pull High at PCH R3319
CLK_REQ6_LAN# 21
1 @
2 0Ohm VDDCT
21 21
C3330
C3329
0.1UF/16V 1UF/10V
@
@
GND
GND
2
1
R3321 10KOhm @
GND
AR8151-BL1A-RL This customer directs part number 020O-002P000 ATHEROS/AR8151-BL1A-RL
GND
R1.3
+3VSUS
1
R3310 10KOhm
2
3D
1 G 2S
PCIE_W AKE#_LAN
PCIE_WAKE# 22,51,53
2N7002
A
Q5306
A
R3315 1 @
2 0Ohm
Title : LAN_AR8151L
BG1-CSC-HW R&D Dept.5
Engineer: Ahren_chen
Size Project Name
Rev
Custom
T13M_RG
1.0
Date: Friday, February 03, 2012
Sheet
33 of 99
5
4
3
2
1
5
11/30 Swap for LU3401/LU3402 co-lay(Elmer)
LU3402 D
L_TDP
RD+ 1
16 RX+
L_TXP
RDCT1
L_TDN L_RDP
RD- 2 CT_1 3 CT_2 6
TD+ 7
15 RX14 CT_4 11 CT_3 10 TX+
L_TXN L_CMT1 L_CMT0 L_RXP
L_RDN
TD- 8 NC1 4 NC2 5
@
9 TX-
12 NC3 13 NC4
10/100MB 09V120000007
L_RXN
C
EMI Req D3401
1
@ 2
AZ2025-01H.R7G
R3408 1
2 0Ohm
10PF/50V 2
1 C3406
10PF/50V 2
1 C3407
10PF/50V 2
1 C3408
LAN_GND B
4 +VDD17
1
R3414 0Ohm
33
L_TDP
33
L_TDN
33
L_RDP
33
L_RDN
33
L_TRDP2
33 L_TRDM2
33
L_TRDP3
33 L_TRDM3
C3409 2
1 1UF/6.3V
L_TXP_T
L_TXN_T L_RXP_T
L_RXN_T L_TRLP2_T
L_TRLM2_T L_TRLP3_T
L_TRLM3_T
2
RDCT1
1
C3404 0.1UF/16V
2
2
1
3
FAE suggestion 1003
Co-Layout
LU3401
2 TD1+ 1 TCT1 3 TD1-
5 TD2+ 4 TCT2 6 TD2-
8 TD3+ 7 TCT3 9 TD3-
11 TD4+ 10 TCT4 12 TD4-
09V120000003
MX1+ 23 MCT1 24 MX1- 22
MX2+ 20 MCT2 21 MX2- 19
MX3+ 17 MCT3 18 MX3- 16
MX4+ 14 MCT4 15 MX4- 13 GST5009
L_TXP L_CMT0 L_TXN
L_RXP L_CMT1 L_RXN
L_TRLP2 L_CMT2 L_TRLM2
L_TRLP3 L_CMT3 L_TRLM3
C3411 1000PF/50V @
1
+3V_LAN
R3409 0Ohm
2
1
510Ohm 1 R3413 0Ohm @
LAN_GND
2 R3411
C3403 470PF/50V
@ LAN_GND
2
1
LED_LINKn
2
33 LED_LINKn
2
1
R3412 1 @
C3401 470PF/50V @ LAN_GND
2 510Ohm
L_TXP
1
L_TXN
2
L_RXP
3
L_TRLP2 4
L_TRLM2 5
L_RXN
6
L_TRLP3 7
L_TRLM3 8
11 12 14 P_GND2
9 10 P_GND1 13
LAN_JACK_8P
LAN_GND
CON3401 12V23GBSD009
33 LED_BLINKINGn
R3410 1
2 510Ohm
1
@
C3402
470PF/50V Close Connector
2
A
LAN_GND
LAN_GND
for Non-overclocking
5
4
3
Y G
1 2
2
1
D
EMI suggest to change 0805 size 0921
R3401
1
2
75Ohm
C
1
07V180000007 275V
C3405 1500PF/2KV
2
U3405 /HOME
LAN_GND
L_TXP
U3403
1
8
L_TXP
L_TXN
2
L_RXP
3
7
L_TXN
6
L_RXP
L_RXN
4
5
L_RXN
/HOME AZ3028-04P
U3404
L_TRLP2 1
8
L_TRLP2
B
L_TRLM2 2 L_TRLP3 3
7
L_TRLM2
6
L_TRLP3
L_TRLM3
4
5
L_TRLM3
AZ3028-04P /HOME
A
<Variant Name>
Title : RJ45/ RJ11
BG1-CSC-HW R&D Dept.5
Engineer: Ahren_chen
Size Project Name
Rev
Custom
PLFG
1.0
Date: Friday, February 03, 2012
Sheet
34 of
99
2
1
A
LVDS
1
CH A
CH B
LVDS_YA0P LVDS_YA0M
LVDS_YA1P LVDS_YA1M
LVDS_YA2P LVDS_YA2M
LVDS_CLKAP LVDS_CLKAM
LVDS_YB0P LVDS_YB0M
LVDS_YB1P LVDS_YB1M
LVDS_YB2P LVDS_YB2M
LVDS_CLKBP LVDS_CLKBM
B
From PCH
LVDSA_L0P_PCH 23 LVDSA_L0N_PCH 23
LVDSA_L1P_PCH 23 LVDSA_L1N_PCH 23
LVDSA_L2P_PCH 23 LVDSA_L2N_PCH 23
LVDSA_LCLKP_PCH 23 LVDSA_LCLKN_PCH 23
LVDSB_L0P_PCH 23 LVDSB_L0N_PCH 23
LVDSB_L1P_PCH 23 LVDSB_L1N_PCH 23
LVDSB_L2P_PCH 23 LVDSB_L2N_PCH 23
LVDSB_LCLKP_PCH 23 LVDSB_LCLKN_PCH 23
2
+LCD_VCC
1
R3737 0Ohm
LVDS(3.3V)
+3VS
AC_BAT_SYS
L3702
80Ohm/100Mhz
2
1
1
Irat=2A C3708
C3709
@
0.1UF/25V 0.1UF/25V
2
2
1
AC_INV
C3725 39PF/50V 1AV200000014 @
2
2
LCD_VDD_EN
1
2
R3713 100KOhm
1
U3701 +LCD_VCC_OUT 1 OUT
IN 5
2 GND
3 EN DSG 4
G5244T11U
C3701 4.7UF/6.3V
+LCD_VCC_R
R3701
2
1+LCD_VCC_OUT
150Ohm
C3702 1UF/6.3V
1AV200000038
+LCD_VCC
+3VS
C3723 39PF/50V
1AV200000014 @
C3711 0.1UF/16V
1AV200000023
C3724 39PF/50V
1AV200000014 @
2
1
INT_MIC_AC_IN
D3703 1
AZ2025-01H.R7G @ 2
C
D3705
1
2
AZ2025-01H.R7G @ @
2
1 10PF/50V
C3751
SP3702
ANALOG 1
2 R0402
A_GND
GND1 41
+LCD_VCC
AC_INV AC_INV USBP8-_L USBP8+_L
LVDS_YB2M LVDS_YB2P
LVDS_YB0M LVDS_YB0P
LVDS_YA2M LVDS_YA2P
LVDS_YA0M LVDS_YA0P
LCD_BL_PW M_C
CON3701
2 4
6 8 10 12 14
16 18 20 22 24
26 28 30 32 34
36 38 40
2 4
6 8 10 12 14
16 18 20 22 24
26 28 30 32 34
36 38 40
1 3
5 7 9 11 13
15 17 19 21 23
25 27 29 31 33
35 37 39
1 3
5 7 9 11 13
15 17 19 21 23
25 27 29 31 33
35 37 39
42 GND2
W toB_CON_40P 12V17GISM084
BACK_EN_C ANALOG INT_MIC_AC_IN
LVDS_CLKBM LVDS_CLKBP
LVDS_YB1M LVDS_YB1P
LVDS_CLKAM LVDS_CLKAP
LVDS_YA1M LVDS_YA1P
LVDS_DATA LVDS_CLK +3V_CMOS_C
INT_MIC_AC_IN 41
+3VS
L3720
+3V_CMOS
120Ohm/100Mhz
1
2
Irat=400mA
1
C3747
0.1UF/16V
2
R3710 1KOhm @
2
1
LVDS_CLKAP LVDS_CLKAM
C3715 39PF/50V
1AV200000014 @
2
2
C3703 10PF/50V @
R3711 1KOhm @
1
C3704 10PF/50V @
2
1
R3709 1KOhm @
2
1
LVDS_CLKBP
LVDS_CLKBM
2
C3705 10PF/50V @
1
R3705 1KOhm
@
1
2
C3719 39PF/50V 1AV200000014 @
C3712 10PF/50V @
1
3
eDP
eDP(3V)
+3VS
+EDP_VCC
1
4
C3713 1UF/6.3V 1AV200000038
@
R3702
+EDP_VCC_OUT1
2 +eDP_VCC_R
150Ohm
@
5 IN
U3702 OUT 1
GND 2
4 DSG EN 3
G5244T11U
@
R3736 0Ohm
2
+EDP_VCC_OUT @
LCD_VDD_EN
2
C3714 4.7UF/6.3V
1
R3723 100KOhm
@
1
2
@
+LCD_VCC R3735 1
+EDP_VCC 2 0Ohm
for LVDS/eDP power sequence check
5
2
DP_AUXP DP_AUXN
DP_TXP0 DP_TXN0
DP_TXP1 DP_TXN1
C3720 C3721
C3726 C3722
C3728 C3727
1
2 0.1UF/16V
1
2 0.1UF/16V
/UMA
/UMA
1
2 0.1UF/16V
1
2 0.1UF/16V
/UMA
/UMA
1
2 0.1UF/16V
1
2 0.1UF/16V
/UMA
/UMA
From CPU
DP_AUXP_PCH 3 DP_AUXN_PCH 3
DP_TXP0_PCH 3 DP_TXN0_PCH 3
DP_TXP1_PCH 3 DP_TXN1_PCH 3
CPU
HPD low active
3 DP_HPD#_PCH
HPD
+VCCP
1
DP_HPD#_PCH
R3719 1KOhm /UMA
2
Q3703
D3
2N7002 /UMA
1 G S2
R3720 100KOhm /UMA
1
DP_HPD_C
+3V_CMOS_C USBP8-_E USBP8+_E
ANALOG INT_MIC_AC_IN
DP_TXN1 DP_TXP1
DP_TXN0 DP_TXP0
DP_AUXP DP_AUXN
+EDP_VCC T3703
1 BIST
DP_HPD_C BACK_EN_C LCD_BL_PW M_C
25
eDP_ON#
eDP_ON# AC_INV AC_INV AC_INV AC_INV
CON3703
1 2 3 4 5
6 7 8 9 10
11 12 13 14 15
16 17 18 19 20
21 22 23 24 25
26 27 28 29 30
1 2 3 4 5
6 7 8 9 10
11 12 13 14 15
16 17 18 19 20
21 22 23 24 25
26 27 28 29 30
SIDE3 33 SIDE4 34
SIDE5 35
32 SIDE2
W TOB_CON_30P 12V371BSM002
SIDE1 31
D
LVDS/eDP control signal
LVDS/EDP pin
LVDS_CLK LVDS_DATA
LCD_BACKOFF LCD_VDD_EN
LCD_BL_PWM
E
LVDS/EDP pin
LVDS_DDCCLK_PCH 23
1
LVDS_DDCDAT_PCH 23
LCD_BACKEN_PCH 23 LCD_VDD_EN_PCH 23
LCD_BL_PW M_PCH 23
+EDP_VCC
+LCD_VCC
2
2
R3714 10KOhm
@
1
R3704 10KOhm
/UMA
D3706
1
2
RB751V-40 D3702
2 3
1
LCD_BACKOFF# 30
LID_SW # 30,48,65 LCD_BACKOFF
+3VS
1
2
1V/0.1A
R3712 100KOhm
4
2
RN3734A
RN3734B
2
1
1kOhm/100Mhz
L3705 1
2
@ Irat=300mA
LCD_EC_PWM 30
2.2KOhm /UMA
1
3
2.2KOhm /UMA
LCD_BL_PW M_C BACK_EN_C
1kOhm/100Mhz
L3704 1
2
Irat=300mA
LCD_BL_PWM
LVDS_CLK LVDS_DATA
1
1
C3706
100PF/50V @
2
C3707 100PF/50V
2
3
USB Camera
4
R3706
RN3711A
1
2
1 0Ohm 2
0Ohm 10V440000001
24
USB_PN8
+3V
+3V_CMOS
2
@
USBP8-_L
1
L3706 90Ohm/100Mhz
4
3
24
USB_PP8
3 0Ohm 4
RN3711B @
USBP8+_L
RN3733 close to EDP connector(CON3703)
LVDS connector(CON3701)
USBP8-_L USBP8+_L
RN3733A 2 0Ohm 1
4 0Ohm 3 RN3733B
USBP8-_E USBP8+_E
EDP connector(CON3703)
5
Title : LVDS CONN
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
37
of
99
A
B
C
D
E
5 23 DAC_R_PCH 23 DAC_G_PCH D 23 DAC_B_PCH
C 23 DDC2BD_PCH 23 DDC2BC_PCH
B 23 DAC_HSYNC_PCH
23 DAC_VSYNC_PCH
A
5
4
3
2
1
Check UMA and DSC inductor value
56nH
DAC_R
1 JP3801
2
V_RED_J
SHORT_PIN
L3801 1
2 09V020000009
RED
56nH
DAC_G
1 JP3802
2
V_GREEN_J
SHORT_PIN
L3802 1
2 09V020000009
GREEN
56nH
DAC_B
1
2
V_BLUE_J
L3803 1
2 09V020000009
BLUE
D
JP3803
SHORT_PIN
+5VS
DDC2BD_5 HSYNC_CRT VSYNC_CRT DDC2BC_5
R3814 1 R3804 2 R3805 2 R3815 1
2 0Ohm 1 0Ohm 1 0Ohm 2 0Ohm
DDC2BD_S HSYNC VSYNC DDC2BC_S
1
1
1
2
1
1
2
1
1
1
1
1
1
1
+3VS
D3804 RB751V-40
+5VS_CRT
2
2
2
2
2
2
R3801 150Ohm 1%
R3802 150Ohm 1%
R3803 150Ohm 1%
C3801 C3802 C3803 6.8PF/50V6.8PF/50V6.8PF/50V
C3804 C3805 C3806 C3807 C3808 C3809 C3810 6.8PF/50V6.8PF/50V6.8PF/50V12PF/50V6.8PF/50V6.8PF/50V12PF/50V
2
2
2
1
2
2
1
12
1
R3806
R3807
Q3801A
2.2KOhm 2.2KOhm
UM6K1N
C
2 5
2
2
DDC2BD 1
6
DDC2BD_5
DDC2BC
4
3
Q3801B UM6K1N
DDC2BC_5
+3VS
1
CON3801 16
R3820 10KOhm
The LC filter circuit(NV DSC only) DDC:L=27nH,C=12PF
2
R3821
DDC2BC_S 15
5
CRT_IN#_EC_CON
2
1
10
VSYNC
14
4
1
@ 0Ohm
CRT_IN#_EC 30
9
R3822
HSYNC
13
3
BLUE
0Ohm
8
DDC2BD_S 12
2
GREEN
2
7
11
1
RED
+5VS
6
HSYNC/VSYNC:L=27nH,C=47PF RGB:L=100nH,C=10PF
5 4 DDC2BD_S
VSYNC
U3801
DAC_HSYNC
3 2 1
GND Y A OE# Vcc
4 5
HSYNC_CRT
1.1 - 23
17 D_SUB_15P
6
D3801
B
74AHCT1G125GW
12V10GBRD012
CM1293_04SO
06V030000010
+5VS_CRT
@
DAC_VSYNC
U3802
1 2 3
OE# Vcc A GND Y
5 4
74AHCT1G125GW 06V030000010
VSYNC_CRT
1
2 DDC2BC_S 3
HSYNC
1.1 - 23
4
3
A
Title :CRT
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
38 of 77
2
1
5
4
3
2
23 HDMI_CLKP_PCH
C3908 1
2 0.1UF/16V
/UMA
HDMI_CLKP
23 HDMI_CLKN_PCH
C3910 1
2 0.1UF/16V
/UMA
HDMI_CLKN
23 HDMI_TXP0_PCH
C3909 1
2 0.1UF/16V
/UMA
HDMI_TXP0
23 HDMI_TXN0_PCH
C3911 1
2 0.1UF/16V
/UMA
HDMI_TXN0
23 HDMI_TXP1_PCH
C3904 1
2 0.1UF/16V
/UMA
HDMI_TXP1
23 HDMI_TXN1_PCH
C3905 1
2 0.1UF/16V
/UMA
HDMI_TXN1
23 HDMI_TXP2_PCH
C3906 1
2 0.1UF/16V
/UMA
HDMI_TXP2
D
23 HDMI_TXN2_PCH
C3907 1
2 0.1UF/16V
/UMA
HDMI_TXN2
Close to connector and do T routing
2 R3914 2 R3917 2 R3913 2 R3911 2 R3916 2 R3912 2 R3910 2 R3915
R3910,R3911,R3912,R3913,R3914,R3915,R3916,R3917 Intel design guide : 680ohm /UMA NV reference schematics : 499ohm /DGPUO
1 D
680OHM 1 680OHM 1 680OHM 1 680OHM 1 680OHM 1 680OHM 1 680OHM 1 680OHM 1
HDMI_TXN0
@ 1 0Ohm 2 RN3903A
HDMI_TXN0_CON
+5VS
3D
1 G 2S
Q3902
2N7002 N/A
GND
HDMI_TXN2
@ 1 0Ohm 2 RN3901A
HDMI_TXN2_CON
EMI solution
HDMI_CLKP HDMI_TXP0 HDMI_TXP1 HDMI_TXP2
R4840 1 @ R4841 1 @ R4842 1 @ R4843 1 @
2 220Ohm 10V220000339
2 220Ohm 10V220000339
2 220Ohm 10V220000339
2 220Ohm 10V220000339
HDMI_CLKN HDMI_TXN0 HDMI_TXN1 HDMI_TXN2
3
4
3
4
L3904
L3901
67ohm N/A
EMI suggestion 0922
67ohm N/A
EMI suggestion 0922
2
1
2
1
C
09V090000007
09V090000007
C
HDMI_TXP0
@
3
0Ohm
4 RN3903B
HDMI_TXP0_CON
HDMI_TXP2
@
3
0Ohm
4 RN3901B
HDMI_TXP2_CON
HDMI_CLKP
@ 3 0Ohm 4 RN3904B HDMI_CLKP_CON
HDMI_TXP1
@ 3 0Ohm 4 RN3902B
HDMI_TXP1_CON
2
1
2
1
HDMI_CLKN
L3903 67ohm
EMI suggestion 0922
3
4
N/A
@
09V090000007
1
0Ohm
2 RN3904A
HDMI_CLKN_CON
HDMI_TXN1
L3902 67ohm
EMI suggestion 0922
3
4
N/A
@
09V090000007
1
0Ohm
2 RN3902A
HDMI_TXN1_CON
HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible
+12VS
3D
1 G 2S
+5VS
RN3905,RN3906 Intel design guide:2.2K ohm /UMA B NV reference schematics:4.7K ohm /DGPUO
NDS351AN_NL Q3901
+3VS
F3901
2
1
0.35A/6V
+5VS_HDMI
2
C3901 0.1UF/25V
1
2
4
RN3905B 2.2KOhm
RN3905A 2.2KOhm
+3VS
RN3906A 2.2KOhm
2
1
3
4
2
D3902 1V/0.1A
RN3906B 2.2KOhm
21 23
20 22
12V12GBRD001 HDMI_CON_19P
P_GND1 P_GND3
HDMI_TXP2_CON HDMI_TXN2_CON HDMI_TXP0_CON HDMI_TXN0_CON
HDMI_SCL HDMI_HPD_CON
1 3 5 7 9 11 13 15 17 19
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18
2 4 6 8 10 12 14 16 18
HDMI_TXP1_CON HDMI_TXN1_CON
HDMI_CLKP_CON HDMI_CLKN_CON
HDMI_SDA +5VS_HDMI
B
P_GND2 P_GND4
CON3901
3
1
1
3
HDMI_CLKP_CON HDMI_CLKN_CON
2
23 HDMI_DDC_CLK_PCH 23 HDMI_DDC_DATA_PCH
HDMI_SCL_PCH HDMI_SDA_PCH
5 21 21
1
6
4
Q3904A
UM6K1N
3
Q3904B UM6K1N
+3VS
C3903 10PF/50V
@
C3902 10PF/50V @
HDMI_SCL HDMI_SDA
@ 11KOhm
@ 11KOhm
R3920 2
R39212
23 HDMI_HPD_PCH
HDMI_HPD
1 R3902
2 HDMI_HPD_CON 4.7KOhm
R1.0 0106 HDMI HPD Cost Reduced Level Shifter Design Recommendation
EMI solution
1
2 3
1
D3901 1.25V/0.15A
R3918 10KOhm
2
A
A
+3VS
Title : HDMI
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
39 of
77
5
4
3
2
1
5
4
3
2
1
From System's PCIE interface
21 PCIE_TXP1_CR
PCIE_TXP1_CR
NP_NC1 1 P_GND2 4
21 PCIE_TXN1_CR
PCIE_TXN1_CR
CON4001
GND
21 PCIE_RXP1_CR
PCIE_RXP1_CR
21 PCIE_RXN1_CR
PCIE_RXN1_CR
D
21 CLK_PCIE_CR_PCH
21 CLK_PCIE_CR#_PCH
21 CLK_REQ1_CR#
24,30,33,47,51,53,55,70 BUF_PLT_RST#
30,37,38,39,41,47,48,49,53,55,60,63,66,69,91,92
+3VS
CLK_PCIE_CR_PCH CLK_PCIE_CR#_PCH CLK_REQ1_CR# BUF_PLT_RST# +3VS
GND
MS_CLK
C4013 10PF/50V
1
2 R4005 1 0Ohm
@
@
1
MS_CLK_R
C4011 10PF/50V
+3V_CARD
2
2
SD_CLK
C4014 10PF/50V
1
2 R4002 1 0Ohm
@ @
2
C4019 0.1UF/16V
2
1
T4010
2
1
C4010 10PF/50V
SD_CLK_R
+3V_CARD
SD_D2
SD_D3
SD_CMD MS_D3 MS_INS#
MS_D2
MS_D0
MS_D1 MS_BS
SD_CD# SD_D0 SD_D1 SD_WP
P20 P19 P18 P17 P16 P15 P14 P13 P12 P11 P10
P9 P8 P7 P6 P5 P4 P3 P2 P1
SD_DAT2
XD_GND2
MS_VSS(GND)2
XD_CD
SD_DAT3/MMC_RSV
XD_R/XD_B
MS_VCC
XD_RE
MS_SCLK
XD_CE
SD_CMD/MMC_CMD
XD_CLE
MS_DATA3
XD_ALE
MS_INS
XD_WE
SD_VSS/MMC_VSS1
XD_WP
MS_DATA2
XD_GND1
SD_VDD/MMC_VDD
XD_D0
MS_SDIO/DATA0
XD_D1
SD_CLK/MMC_CLK
XD_D2
MS_DATA1
XD_D3
MS_BS
XD_D4
MS_VSS(GND)1
XD_D5
SD_CD
XD_D6
SD_DAT0/MMC_DAT
XD_D7
SD_DAT1
XD_VCC
SD_WP SD_VSS/MMC_VSS2/GND_FOR_CD/WP
P40 P39 P38 P37 P36 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 P25 P24 P23 P22 P21
XD_CD# XD_RDY XD_RE# XD_CE# XD_CLE XD_ALE XD_WE# XD_WP#
XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7
+3V_CARD
D
GND
1 1% 2 R4019
RES 6.2K OHM 1/16W (0402) 1%
T4009 T4005 T4008
10V220000088
3 P_GND1 2 NP_NC2
+3VS CLK_REQ1_CR# BUF_PLT_RST#
1 1 1 1 MS_INS# SD_CD# SP15 SP14
CARD_READER_40P 12V34GBSM002
48 47 46 45 44 43 42 41 40 39 38 37
U4000
RREF 3V3_IN2 CLK_REQ# PERST#
EEDO EECS EESK GPIO/EEDI MS_INS# SD_CD# SP15 SP14
C
C4012 PCIE_RXP1_CR 1 PCIE_RXN1_CR 1
C4009
0.1UF/16V 2 2
0.1UF/16V
GND GND
+3V_CARD
trace width 40mils
C4016 4.7UF/6.3V 1
PCIE_TXP1_CR PCIE_TXN1_CR
CLK_PCIE_CR_PCH CLK_PCIE_CR#_PCH
2 AV12 HSOP_R HSON_R
1
2 DV12
C4007 0.1UF/16V
+3VS
1
1
C4006
1 2 3 4 5 6 7 8 9 10 11 12
HSIP HSIN REFCLKP REFCLKN AV12 HSOP HSON GND1 DV12 Card1_3V3 3V3_IN1 Card2_3V3
SP13 SP12 SP11 SP10
SP9 SP8 SP7 SP6 SP5 DV12_S GND3 SD_D2
36 35 34 33 32 31 30 29 28 27 26 25
SP13 SP12 SP11 SP10
SP9 SP8 SP7 SP6 SP5 DV12_S
SD_D2
4.7UF/6.3V C4021
1
2
1
2
C4022 0.1UF/16V
GND GND
GND
GND
SD/MMC/MMC plus/MS/xD
C
10UF/10V
C4008 0.1UF/16V
+3V_CARD
C4008 C4002 SD CARD CAP
xD_CD# DV33_18 GND2 SP1 SP2 SP3 SP4 SD_D1 SD_D0 SD_CLK SD_CMD SD_D3
2
2
GNDGND
RTS5209-GR
13 14 15 16 17 18 19 20 21 22 23 24
C4003 MS CARD CAP C4004 XD CARD CAP
1
1
1
1
Part number:020J-007D000
C4023 10UF/10V
C4002 0.1UF/16V
C4003 0.1UF/16V
C4004 0.1UF/16V
2
2
2
2
XD_CD# DV33_18 SP1 SP2 SP3 SP4 SD_D1 SD_D0 SD_CLK SD_CMD SD_D3
AV12
1 L4000
@
2
DV12
0Ohm
Close to connector
GND
2 C4020 2 C4024
@ B
GND
Remove Serial Flash
Reserve for BIOS boot function
1 4.7UF/6.3V
1 0.1UF/16V
Pin Name
Description
SP1
SD_D7/XD_RDY
SP1
SD_D7
XD_RDY
B
SP2
SD_D6/XD_RE#
SP2
SD_D6
XD_RE#
SP3
SD_D5/XD_CE#
SP3
SD_D5
XD_CE#
SP4
SD_D4/XD_WE#
SP4
SD_D4
XD_WE#
SP5
MS_BS/XD_CLE
SP5
MS_BS
XD_CLE
SP6
MS_D5/XD_ALE
SP6
MS_D5
XD_ALE
SP7
MS_D1/XD_WP#
SP7
MS_D1
XD_WP#
SP8
MS_D4/XD_D0
SP8
MS_D4
XD_D0
SP9
MS_D0/XD_D1
SP9
MS_D0
XD_D1
SP10
MS_D2/XD_D2
SP10
MS_D2
XD_D2
SP11
MS_D6/XD_D3
SP11
MS_D6
XD_D3
SP12
MS_D3/XD_D4
SP12
MS_D3
XD_D4
SP13
MS_D7/XD_D5
SP13
MS_D7
XD_D5
SP14
MS_CLK/XD_D6
SP14
MS_CLK
XD_D6
SP15
SD_WP/XD_D7
SP15 SD_WP
XD_D7
A
When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled.
5
4
3
A
Share Pin
Title : RTS5209
BG1/CSC/HW5
Engineer: Peter5 Huang
Size Project Name
Rev
Custom
Comal
1.0
Date: Friday, February 03, 2012
Sheet
40 of
99
2
1
5
Intel 1.01 Design Guide update #440484 R1.3 use dual mosfet
1
+12VS
SP4105 R0402
1
4
+12VS SP4106
R0402
3
2
1
+5VS
R4118
1
2
0Ohm 10V440000001
PVDD
22
2
5
UM6K1N
Q4105A 6
1
GND_PVSS
UM6K1N
Q4105B 3
4
Placement near audio codec
Placement near audio codec
20 ACZ_SYNC_AUD
R4113 1 @
2 0Ohm ACZ_SYNC_AUD_R
PVDD
PVDD
Moat
20 ACZ_SDOUT_AUD D
R4122 1 @
2 0Ohm
ACZ_SDOUT_AUD_R
D
H_SPKR+_M H_SPKR-_M H_SPKL-_M H_SPKL+_M
1
1
1
1
2
C4123 10UF/10V
C4120 0.1UF/16V
2
C4125 0.1UF/16V
C4129 10UF/10V
2
2
48mA Typical
+5VS_AUDIO
+5VS
R4102
1
2
0Ohm 10V440000001 N/A
+5VS_AUDIO
1
1
+3VS_AUD 50mA Typical
C4101 2.2UF/6.3V
@
2
1
2
1
C4104 0.1UF/16V
C4103 0.1UF/16V
2
1
U4101A
49 48 47 46 45 44 43 42 41 40 39 38 37
2
C4110 2.2UF/6.3V
@
2
C4111 0.1UF/16V
A_GND
2
1
D4101 @
AZ2015-01H.R7G
2
C4114
10UF/10V
N/A 1AV500000008 A_GND
1
GND SPDIFO
EAPD PVDD2 SPK-OUT-R+ SPK-OUT-RPVSS2 PVSS1 SPK-OUT-LSPK-OUT-L+ PVDD1 AVDD2 AVSS2
20 ACZ_BCLK_AUD
EMI suggestion 0922
R4133 1
2 0Ohm
C4143 10PF/50V
@
2
1
Placement near audio codec
T4101
1
T4102
1
42 MUTE_AMP#
ACZ_SDOUT_AUD_R
20 ACZ_SDIN0_AUD 20,42 ACZ_RST#_AUD
PC_BEEP_R 1 R4103 2
2 R4104 1 ACZ_SDIN0_R 33Ohm ACZ_SYNC_AUD_R
PC_BEEP_C
C4105
2
1PC_BEEP
1 2 3 4 5 6 7 8 9 10 11 12
DVDD GPIO0/DMIC-DATA GPIO1/DMIC-CLK PD# SDATA-OUT BCLK DVSS2 SDATA-IN DVDD-IO SYNC RESET# PCBEEP
CBP CBN CPVEE HPOUT-R(PORT-I-R) HPOUT-L(PORT-I-L) MIC1-VREFO-L MIC1-VREFO-R MIC2-VREFO LDO-CAP VREF AVSS1 AVDD1
36 35 34 33 32 31 30 29 28 27 26 25
C4126 2 C4128 2
1 2.2UF/6.3V 1 2.2UF/6.3V
MIC2_VREFO AUD_LDO_CAP
VREF_CODEC +5VS_AUDIO
1
1
C4106
C4107
1
A_GND
C4116 1
2
10UF/10V @
1
C4108
C4141
AC_HP_R 42 AC_HP_L 42
CAPLESS HEADPHONE VREFOUT_A_E_L 42
VREFOUT_A_E_R 42
A_GND
C4115 1
2
10UF/10V @
A_GND
SenseA LINE2-L(PORT-E-L) LINE2-R(PORT-E-R) MIC2-L(PORT-F-L) MIC2-R(PORT-F-R) SenseB JDREF MONO-OUT MIC1-L(PORT-B-L) MIC1-R(PORT-B-R) LINE1-L(PORT-C-L) LINE1-R(PORT-C-R)
Sense_A COMBO_MIC_IN_AC_E_L COMBO_MIC_IN_AC_E_R AUD_JDREF
AUD_EXT_MIC_L AUD_EXT_MIC_R
@
47KOhm
0.1UF/16V
2.2UF/6.3V
0.1UF/16V
2.2UF/6.3V 0.1UF/16V
2
2
2
2
1
1
Need to close AUDIO codec R4115 1
2 0Ohm
C4102
R4107
@
13 14 15 16 17 18 19 20 21 22 23 24
C
2
4.7KOhm 100PF/50V
ALC271X-VB6-CG
C
D4102
02V0J0000016
A_GND
A_GND
A_GND
2
20 SB_SPKR 30 EC_SPKR
1
3
PC_BEEP_R
2
A_GND
Placement near audio codec
1V/0.2A
1 R4114
@
2 0Ohm
61
HP_JD#
61 MIC_EXT_JD#
R4109 1 R4105 2
2 39.2KOhm 1% 1 20KOhm 1%
C4137 1000PF/50V
AUD_LDO_CAP
2
1
A_GND
1
C4142
37 INT_MIC_AC_IN
U4101B
50 51 52 53
GND1 GND2 GND3 GND4
GND8 GND7 GND6 GND5
57 56 55 54
R4123
2
1
C4134 2 C4135 2
1 1UF/6.3V INT_MIC_AC_IN_L 1 1UF/6.3V INT_MIC_AC_IN_R
C4118 1 C4119 1
2 2.2UF/6.3V 2 2.2UF/6.3V
MIC_IN_AC_E_R 42 MIC_IN_AC_E_L 42
1KOhm
1
C4138
1000PF/50V
C4136 @ Frank 1000PF/50V 0503 Vender request
2
1
A_GND
2
A_GND
close codec IC
R4108 2
1 20KOhm
1%
A_GND
Placement near audio codec except C1923, C1922, C1924, and C1925
42 COMBO_MIC_EXT_JD#
R4101 2
1 20KOhm
2
10UF/10V
N/A A_GND
2
R4124 4.7KOhm N/A
1
INT_MIC_AC_IN
ALC271X-VB6-CG 02V0J0000016
ALC271-SPKR_EC_ICH_Colay
JP4102
1
2
Configuration for ALC269 Internal Speaker: Port D
SHORTPIN @
JP4101
1
2
SHORTPIN
1 C4124 1 C4122 1 C4130 1 C4127
R4129 2 R4130 2 R4131 2 R4132 2
1 0Ohm H_SPKL+_C 1 0Ohm H_SPKL-_C 1 0Ohm H_SPKR+_C 1 0Ohm H_SPKR-_C
CON4102
1 2 3 4
1 2 3 4
GND2 6 GND1 5
WTOB_CON_4P 12V17ABSM000
B
External Headphone: Port A
@
B
2 10PF/50V
2 10PF/50V
2 10PF/50V
2 10PF/50V
R4110
1
2
External Microphone: Port F
JP4104
0Ohm
Internal Microphone: Port B
1
2
10V440000001
SHORTPIN
+3VS
+3VS_AUD
@
A_GND
H_SPKL+_M H_SPKL-_M H_SPKR+_M H_SPKR-_M
R4125 2 R4126 2 R4127 2 R4128 2
1 0Ohm H_SPKL+ 1 0Ohm H_SPKL1 0Ohm H_SPKR+ 1 0Ohm H_SPKR-
CON4101
1 2 3 4
1 2 3 4
GND2 6 GND1 5
WTOB_CON_4P 12V17ABSM000
1 C4100 1 C4109 1 C4112 1 C4113
2 10PF/50V
2 10PF/50V
2 10PF/50V
2 10PF/50V
A 5
R4120 2.2KOhm
A
MIC2_VREFO
1
2
R4121
C4140 1
2 2.2UF/6.3V COMBO_MIC_IN_AC_E_R
1
42,61 COMBO_MIC
1
2
C4139 1
2 2.2UF/6.3V COMBO_MIC_IN_AC_E_L
2
C4121 10UF/10V @
A_GND
1
2
1KOhm
R4119 22KOhm 10V240000016
R1.1 Add Audio Combo jack schematic 0801
A_GND
Title :
Engineer:
ASUSTeK COMPUTER INC. NB1 Size Project Name
Custom
BA52HR/CR
CODEC-ALC269 Wing_Cheng
Rev 1.0
Date: Friday, February 03, 2012
Sheet
41 of
77
4
3
2
1
5
4
3
2
+5VA
+5VS
1
D
AMP De-Pop Control circuit
2
1
R4201 100KOhm
R4202 10KOhm
2
MUTE_AMP#
3D
1 G 2S
Q4201 2N7002
MUTE_AMP# 41
6
30 OP_SD#
SP4201
1
2 R0402
Q4202A UM6K1N
2
1
3
20,41 ACZ_RST#_AUD
SP4202
1
2 R0402
Q4202B UM6K1N
5
C
41 VREFOUT_A_E_R 41 VREFOUT_A_E_L
41 MIC_IN_AC_E_L 41 MIC_IN_AC_E_R
1
2
R4207 1KOhm
1
2
R4204 1KOhm
B
41 AC_HP_R 41 AC_HP_L
R4205 1 R4206 1
2 51Ohm 2 51Ohm
41 COMBO_MIC_EXT_JD#
COMBO_MIC_EXT_JD#
4
1
2
1
GND
2
R4211 4.7KOhm
R4210 4.7KOhm
MIC_IN_AC_E_L_J 61 MIC_IN_AC_E_R_J 61
HP_JACK_R 61 HP_JACK_L 61
3
Q4203 D3
11 G
R4208
2
1
22KOhm
COMBO_MIC
COMBO_MIC 41,61
1
S2 2SK3018T106
C4201 10UF/10V
2
2
A
07V020000006
A_GND
A_GND
5
4
3
2
1 D
C
B
A
Title :AUDIO ALC269
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
B
BA52HR/CR
Date: Friday, February 03, 2012
Sheet
1
42 of
Rev 1.0 77
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : MDC CONN
BG1-HW RD Div.2-NB RD Dept.5
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
43 of
77
5
4
3
2
1
5 D C B A
5
4
3
2
1
D
C
B
Del Entry audio circuit
SR-8 0121-11
A
Title : CODEC-ALC269
Engineer:
ASUSTeK COMPUTER INC. NB1 Size Project Name
Custom
BA52HR/CR
Wing_Cheng
Rev 1.0
Date: Friday, February 03, 2012
Sheet
44 of 77
4
3
2
1
5 D C B A
5
4
3
Del Entry audio circuit
SR-8 0121-11
4
3
2
1
D
C
B
A
Title : AUDIO ALC269
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
45 of 77
2
1
5
4
3
2
1
Thermal Policy
+3VS
+3VS
D
D
2
2
R4709 10KOhm @
R4706 10KOhm
1
1
6
87 VGA_HOT#
Q4703B UM6K1N
@ 5
3
Q4703A UM6K1N
@ 2
1
4
74 VGA_OVERTEMP#
R4705 1
2 0Ohm
CPU_VGA_THERM#
C
C
49 PR_OVERTEMP#
R4702
1
2
0Ohm
49 CPU_THERM#
R4708
1
2
0Ohm
2
UM6K1N Q4702A
6
1
+3VA_EC
NPCE795 has internal power-on reset circuit Use 47k ohm to make sure that raising time of POR is less than 10us
R4704 2 D4702 2
1 47KOhm 1 1.2V/0.1A
81,92 FORCE_OFF#
1 R4703 2 0Ohm
D4703 2
1 1.2V/0.1A
EC_RST# 30
1
B
C4701
B
4.7UF/6.3V
3
Q4702B
@
2
24,30,33,40,51,53,55,70 BUF_PLT_RST#
UM6K1N 5
4
4,25 H_THRMTRIP#
+VCCP
2 R4701 1 1 B 330Ohm
3 C
Q4701 PMBS3904 E 2
A
+3VA_EC +3VS
+3VA_EC 28,30
+3VS
4,16,17,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,48,49,53,55,60,63,66,69,91,92
5
4
3
A
Title : RST_Reset Circuit
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name
Rev
B
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
47 of 77
2
1
5
4
3
Touch Pad Button/ Hall Sensor
close toU4601
D
+3VA
1
12V18GWSM059
FPC_CON_8P
9 10
1 SIDE1 2
3 4 5 6 SIDE2 7 8
1 2 3 4 5 6 7 8
CON4802
1
+3VA +5VS
+3VS
1
1
R4801 0Ohm
R4803 0Ohm
2
2
@
1
1
C4802 22PF/25V
C4801 22PF/25V
C4803 22PF/25V
TP_DAT 30 TP_CLK 30 LID_SW# 30,37,65 SMB_DAT_S 16,17,28,53,55 SMB_CLK_S 16,17,28,53,55
R4812 100KOhm
+3VA
12
2 3 LID_SW#
1 D4801
C4807
1.25V/0.15A
100PF/50V
2
Note:
@
LID_SW# is easy to cause high voltage damage when
plugging inverter board connector to M/B with AC present.
Need to add bidirectional diode to protect this pin.
2
2
2
C
+3VA +5VS
+3VS
1
1
CON4803
B
10 9
8 SIDE2 7
6 5 4 3 SIDE1 2 1
8 7 6 5 4 3 2 1
2
R4802 0Ohm
R4804 0Ohm
2
@
TP_DAT
TP_CLK
LID_SW#
SMB_DAT_S
SMB_CLK_S
TP_CLK
D4802 1 I/O1
2 GND
+3VA
6 I/O4
TP_DAT
5 VDD
1
1
1
FPC_CON_8P 12V18GWSM059
2
C4805 22PF/25V
2
C4804
C4806
2
22PF/25V 22PF/25V
3 I/O2
4 I/O3
CM1293_04SO
@
2
Keyboard
CON4801 N/A
27 GND1 28 GND2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
FPC_CON_26P 12V18ABSM001
1218-00MW000
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
1
KSO0
30
KSO1
30
KSO2
30
D
KSO3
30
KSO4
30
KSO5
30
KSO6
30
KSO7
30
KSO8
30
KSO9
30
KSO10 30
KSO11 30
KSO12 30
KSO13 30
KSO14 30
KSO15 30
KSO16 30
KSO17 30
KSI0
30
KSI1
30
KSI2
30
KSI3
30
KSI4
30
KSI5
30
KSI6
30
KSI7
30
C
1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 C4816
13@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 33@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@ 3@333333333333333333333333PPPPPPPPPPPPPPPPPPPPPPPPFFFFFFFFFFFFFFFFFFFFFFFF////////////////////////5555555555555555555555552000000000000000000000000VVVVVVVVVVVVVVVVVVVVVVVV86462648462844228268486233CCCCCCCCCCCCCCCCCCCCCCCCPNNNNNNNNNNNNNNNNNNNNNNNNF444444444444444444444444/58888888888888888888888880000000000000000000000000V122344446656132156535213DCBCACBDBCADBBAADACDBDCA
KSO0 KSO1 KSO2
KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6
B
C4817 1@ 2 33PF/50V
KSI7
@
@
A
A
Title : KB/ TP/ FLASH
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
48 of 77
5
4
3
2
1
5
4
3
2
1
D
U5001 Close to CPU
+3VS
1
C4904 0.1UF/10V
2
R4906
1
2
0Ohm
U4902
5 4
VCC SET GND
HYST OT#
1 2 3
G709T1UF 06V220000007
temp setting : 97 degree
THERM_SET CPU_THERM#
R4903 1 1% 2 17.4KOhm CPU_THERM# 47
C
FAN
B CON4901
HOLD1 1 2 3
HOLD2 W TOB_CON_3P
12V17GISM046
5
4
2
1
2
R4907 2
1 0Ohm
C4907 22PF/25V @
2 D4901
1@ SS0520
2
1
C4908
100PF/50V @
FAN0_TACH 30
+5VS
1
+5VS_FAN
C4905 2.2UF/10V
1
30 CTL_FAN
C4906 2.2UF/10V
2
D
Plam Rest Thermal Sensor
+3VS_THEM
+3VS
PHILIP PMBS3904
Pleace in the center of Plamrest.
Palmrest_THRM_DA
1B
Place near PCH
3
C
Q4902 PMBS3904 E
2
2
1
C4901 2200PF/50V
R4901
1
2
150Ohm
2
1
C4902 0.1UF/16V
U4903
1 2 3 4
VCC SMBCLK DXP SMBDATA DXN ALERT# THERM# GND
8 7 6 5
G781
SMB1_CLK_Thermal SMB1_DAT_Thermal
SP4901
1
2 R0402
1
2 R0402
SP4902
Plamrest_THRM_DC
PR_OVERTEMP# 47
U4903 under palmrest
SMBUS addr=1001100x (98) U4903: Remote(Local) thermal sensor,use remote mode.
SMB1_CLK 28,30,69,74 SMB1_DAT 28,30,69,74
C
R1.2-10
U4901
B
1 2 3 4
FON# VIN VO VSET
GND4 GND3 GND2 GND1
8 7 6 5
G991P11U 06V520000001
A
A
Title : THERMAL/ FAN
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
49 of 77
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : Realtek_RTS5138
BG1-HW RD Div.2-NB RD Dept.5
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
50 of
77
5
4
3
2
1
5
4
24,30,33,40,47,53,55,70 GND
BUF_PLT_RST#
C5101
2
1
Y5V 20% 0.1UF/25V
21 CLK_PCIE_USB_PCH 21 CLK_PCIE_USB#_PCH
/FL1009 21 PCIE_RXP_USB30 21 PCIE_RXN_USB30
21 PCIE_TXP_USB30 21 PCIE_TXN_USB30
D
U5101
R5103 1 0Ohm 2
PCIE_RST#
C5108 2 C5115 2
/FL1009
Y5V 20%
1 0.1UF/25V 1 0.1UF/25V
Y5V 20%
USB3_PE4_RXP2_C USB3_PE4_RXN2_C
R5114 2
/FL1009 1 12.1KOhm vx_r04P0C2I_EsRmEaXllT
C5118 /FL21009 1 0.1UF/25V Y5V 20%
PCIECAP
B13 PERST#
B17 B18
PCIECKP PCIECKM
A23 A24
PCIETXP PCIETXM
B15 B16
PCIERXP PCIERXM
A18 PCIEREXT
B19 PCIECAP
GND +3V
/FL1009
1
C5120 1UF/6.3V X5R 10%
/FL1009 GND +3V
2
2
1
C5103 0.1UF/25V Y5V 20%
/FL1009
A4 B45
AVCC33X_1 AVCC33X_2
A3 A59
B6 B44
AGND33_1 AGND33_2 AGND33_3 AGND33_4
1
C5102 10UF/6.3V X5R 10%
C5114 1UF/6.3V X5R 10%
1
1
C5124 0.1UF/25V Y5V 20%
A12 PVCC33X
2
2
2
/FL1009
/FL1009
GND +1.05V_USB30
/FL1009
1
C5105 1UF/6.3V X5R 10%
1
C5123 0.1UF/25V Y5V 20%
A17 A22 A60
B7
AVCC10X_1 AVCC10X_2 AVCC10X_3 AVCC10X_4
2
2
C /FL1009
GND
/FL1009 +1.05V_USB30
B14 C5104
1
1
C5125
0.1UF/25V
1UF/6.3V
Y5V 20%
X5R 10%
2
2
A19
A61
/FL1009
A62
B8
+2P5VCC GND
/FL1009
B9 B20
B11
1
C5122 1UF/6.3V X5R 10%
1
C5112 0.1UF/25V Y5V 20%
2
2
Current=72mA SP5101
2
AVCC10
AGND10_1 AGND10_2 AGND10_3 AGND10_4 AGND10_5 AGND10_6
PVCC25OX
/FL1009
NB_R0402_20MIL_SMALL
1
GND +2P5V
/FL1009
1
C5106 1UF/6.3V
1
C5107 0.1UF/25V
/FL1009
A5 A21 B46
PVCC25X_1 PVCC25X_2 PVCC25X_3
X5R 10%
Y5V 20%
2
B
/FL1009 GND
2
A1 A20 A54 B10
PGND PGND_2 PGND_3 PGND_4
+3V
/FL1009
1
2
C5117 1UF/6.3V X5R 10%
/FL1009
GND
2
1
C5109 0.1UF/25V Y5V 20%
/FL1009
A44 B12 B38
DVCC33X_1 DVCC33X_2 DVCC33X_3
A26 B25 B30
DVCC33_1 DVCC33_3 DVCC33_2
+1.05V_USB30
1
C5110 1UF/6.3V X5R 10%
1
C5111 0.1UF/25V Y5V 20%
2
2
/FL1009 GND
/FL1009
A11 A13 B40 B42 B52
DVCC10X_1 DVCC10X_2 DVCC10X_3 DVCC10X_4 DVCC10X_5
A16 A25 A36 A41 A42 B23 B26 B32
DVCC10_1 DVCC10_2 DVCC10_3 DVCC10_4 DVCC10_5 DVCC10_6 DVCC10_7 DVCC10_8
A
Follow Fresco SPEC, Change +3VSUS to +3V (1.05v must not be removed earlier then 3.3V supply removed.)
GND
A65 DGND FL1009-2Q0 /FL1009
5
4
3
2
1
Internal POWER
Analog 1.0V power supply
Analog 3.3V power supply
PCI Express Interface
FL1009
EEPROM
Crystal
SuperSpeed USB Port 1 Interface
SuperSpeed USB Port 0 Interface
U2DP0 U2DM0
A55 A56
SSTXP0 SSTXM0
B48 B49
SSRXP0 SSRXM0
B50 B51
UREF0 UCAP0 UV1280 PPW R0 OVCN0
A57 UREF0 B47 UCAP0 A58 V1280 A50 B39 VCN0
RN5101A 1 RN5101B 3
0Ohm 2 0Ohm 4
/FL1009
/FL1009
USB3_U3_TXP1 61 USB3_U3_TXN1 61
USB3_U3_RXP1 61 USB3_U3_RXN1 61
USB3_U2_PP1 61 USB3_U2_PN1 61
12.1KOhm R5112 1
2
2.2nF/16V C5119 2 /FL10109
4.7UF/6.3V C5127 X5R 10%
2 /FL10109 /FL1009
R5107
10KOhm
/FL1009
GND +3V
U2DP1 U2DM1
B2 B3
SSTXP1 SSTXM1
A7 A8
SSRXP1 SSRXM1
A9 A10
UREF1 UCAP1 UV1281 PPW R1 OVCN1
B4 UREF1 A6 UCAP1 B5 V1281 A48 A46 VCN1
RN5102A 1 RN5102B 3
0Ohm 0Ohm
2 4
/FL1009
/FL1009
12.1KOhm R5108 1
2
2.2nF/16V C5126 2 /FL10109
4.7UF/6.3V C5121 X5R 10%
R5105
2 /FL10109
/FL1009 10KOhm
/FL1009
NC22 A51 NC24 B41 NC23 A52 XSCI B43
NB_R0402_20MIL_SMALL
SP5103
2
1
Y3801_I
1
XSCO A53
/FL1009
R5113 1MOhm
2
SP5102
2
1
Y3801_O
/FL1009
NB_R0402_20MIL_SMALL
/FL1009
USB3_U3_TXP2 61 USB3_U3_TXN2 61
USB3_U3_RXP2 61 USB3_U3_RXN2 61
USB3_U2_PP2 61 USB3_U2_PN2 61
GND
+3V
X5101 12Mhz
3
C5116
1
2
12PF/50V NPO 5%
4
2
/FL1009 GND
1
C5113 1
2
/FL1009
12PF/50V NPO 5%
/FL1009
GND
PPWRCTL B34 AUXDET A39 WAKE# A14
CLKREQ# A15 SMIN B28
ROMSDA B27 ROMSCL A35 ROMPRES A33
+3V
AUXDET
R5102 1
2 4.7KOhm
/FL1009
PCIE_WAKE# 22,33,53
CLK_REQ_USB30# 21
USB3_ROMDATA
USB30_EXT_SMI# 25
USB3_ROMCLK
USB3_ROMPresent
U2LNKN PCIELNKN
SSLNKN DATTXN DATRXN
B22 B21 A27 A28 B24
Add pull-high RES.
D
+1.05V_USB30
2
2
R5111 0Ohm
R5104 0Ohm
1
1
V1280 /FL1009
V1281
/FL1009
C
+3V Support 4k/8k/16k EEPROM only
2
2
2
U5102
1 2 3 4
NC1 NC2 E2 VSS
VCC W C# SCL SDA
8 7 6 5
M24C08-RMN6TG/G
R5106 4.7KOhm
USB3_ROMCLK USB3_ROMDATA USB3_ROMPresent /FL1009
1
1
R5109 4.7KOhm
/FL1009
1
R5110 4.7KOhm
/FL1009
GND
GND
B
/FL1009
Digital IO power supply
Digital core power supply
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 TESTN
A2 A29 A30 A31 A32 A34 A37 A38 A40 A43 A45 A47 A49 A63 A64 B1 B29 B31 B33 B35 B36 B37
+3V
2
TESTN
1
R5101 4.7KOhm
/FL1009
02V8B0000002 vx_drqfn_116p_20_s354_p_fre;vx_dqfn_116p_20_s354_p_f_8v 028B-0003000
3
+5V
+5V
+1.5V
+1P05V_DUAL Imax = 0.9A
1
R5120 2KOhm
2
+1P05V_DUAL_EN_A /FL1009
1
1
C5130
R5121
2
0.1UF/16V
1KOhm /FL1009
2
1
C5131 0.1UF/16V
2
1
C5132 0.1UF/16V
2
/FL1009
/FL1009
/FL1009
GND
GND
GND
GND
U5103
1 2 3 4
POK EN VIN CNTL
GND2 GND1
FB VOUT
NC
9 8 7 6 5
RT9025_25PSP
/FL1009
GND
GND
R5122
1
2 +1P05V_DUAL_ADJ
1.8KOhm
/FL1009
1022-004Q000
2
+1.05V_USB30
1
R5123 576Ohm
C5133
22UF/6.3V
2
1
2
A /FL1009
/FLC15010394
1
2
GND 1A60-0010C00
0.1UF/16V
/FL1009
Title : USB3.0 uPD720200
BG1\HW1
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012 1
Sheet
51 of
77
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : PCIE NEW CARD
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
52 of 77
5
4
3
2
1
5
PCIE/mSATA
D
4
3
2
Select PCIE or mSATA IF select mSATA(only +3VAUX)
21 PCIE_RXN3_mSATA 21 PCIE_RXP3_mSATA
21 PCIE_TXN3_mSATA 21 PCIE_TXP3_mSATA
R5320 1 @ 2 0Ohm R5321 1 @ 2 0Ohm R5318 1 @ 2 0Ohm R5319 1 @ 2 0Ohm
PCIE_mSATA_C23 PCIE_mSATA_C25
PCIE_mSATA_C31 PCIE_mSATA_C33
C5314 1 C5315 1 C5316 1 C5317 1
2 0.01UF/50V 2 0.01UF/50V 2 0.01UF/50V 2 0.01UF/50V
SATA_RXP1 20 SATA_RXN1 20
SATA_TXN1 20 SATA_TXP1 20
1 D
+3.3VS_mSATA
2
22,33,51 PCIE_W AKE#
Q5310 2N7002 @
1
R5315 10KOhm @
PCIE_W AKE#_mSATA
+3.3VS_mSATA +1.5VS_mSATA
H5301
H5302
HT-G4041M20TFE
HT-G4041M20TFE
D3 1
S2 G
CON5301
21 CLK_REQ3_PCIE_mSATA#
C
21 CLK_PCIE_mSATA#_PCH 21 CLK_PCIE_mSATA_PCH
PCIE_W AKE#_mSATA
1 3 5 7 9 11 13 15
WAKE# Reserved1 Reserved2 CLKREQ# GND1 REFCLKREFCLK+ GND2
3.3V_1 GND7 1.5V_1 UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP
2 4 6 8 10 12 14 16
C
B +3.3VS_mSATA
PCIE_mSATA_C23 PCIE_mSATA_C25
PCIE_mSATA_C31 PCIE_mSATA_C33
+3.3VS_mSATA
17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
Reserved/UIM_C8
GND8
Reserved/UIM_C4W_DISABLE#
GND3
PERST#
PERn0
+3.3Vaux
PERp0
GND9
GND4
1.5V_2
GND5
SMB_CLK
PETn0
SMB_DATA
PETp0
GND10
GND6
USB_D-
Reserved3
USB_D+
Reserved4
GND11
Reserved5
LED_WWAN#
Reserved6
LED_WLAN#
Reserved7
LED_WPAN#
Reserved8
1.5V_3
Reserved9
GND12
Reserved10
3.3V_2
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
53 54
GND13 GND14
NP_NC2 NP_NC1
56 55
MINI_PCI_LATCH_52P 12V44GISM005
MINICARD_RST#_mSATA R5305 2
1 0Ohm
R5306 2
1 0Ohm
@
SMBC_mSATA SMBD_mSATA
R5316 1 @ 2 0Ohm R5317 1 @ 2 0Ohm
USBP11USBP11+
W LAN_ON 25,55 BUF_PLT_RST# 24,30,33,40,47,51,55,70 W LAN_RST#_PCH 25,55
SMB_CLK_S 16,17,28,48,55 SMB_DAT_S 16,17,28,48,55
USBP11-
RN5301B 3 0Ohm 4
3
4
@ L5301
90Ohm/100MHz 09V090000002
USB_PN11 24 USB_PP11 24
1
2
@
B
USBP11+
RN5301A 1 0Ohm 2
@
R5308
1
2
1
1
C5302 10UF/10V 1AV500000008
2
C5303 0.1UF/16V
2
C5304 0.1UF/16V
2
C5305 0.01UF/50V
@
2
C5301 0.01UF/50V
@
1
1
+3VS
0Ohm 10V440000001
+3.3VS_mSATA
+1.5VS
R5313
1
2
0Ohm 10V440000001
+1.5VS_mSATA
+1.5VS_mSATA
1
1
1
C5307
C5310
10UF/10V 1AV500000008 @
2
C5308 0.1UF/16V @
2
C5309 0.1UF/16V @
2
0.01UF/50V @
A
A
Title : WiFi/WiMAX
BU1-RD Div.1-HW RD Dept.1
Engineer:
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
53 of 77
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : MINICARD (WUSB /UPCONVERT)
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
54 of 77
5
4
3
2
1
5
4
3
2
1
1215
+3VS_WLAN
1
RN5501A 0Ohm
2
1
2
D3 1
S2 G
USBP5-
@
+3VS_WLAN
@
30 WLAN_WAKE#
PCIE_WAKE#_WLAN
09V090000002
USB_PN5 24
+1.5VS_WLAN
90Ohm/100MHz
USB_PP5 24
D
2N7002
L5501
D
4
3
Q5511
USBP5+
R5524 1
2 0Ohm
WiFi/WiMAX
3
RN5501B 0Ohm
4
21 CLK_REQ2_WLAN#
BT_ON/OFF#_R
R5509
2 0Ohm @
1 BT_DISABLE_M5
21 CLK_PCIE_WLAN#_PCH 21 CLK_PCIE_WLAN_PCH
CON5501
1 3 5 7 9 11 13 15
W AKE# Reserved1 Reserved2 CLKREQ# GND1 REFCLKREFCLK+ GND2
3.3V_1 GND7 1.5V_1 UIM_PW R UIM_DATA UIM_CLK UIM_RESET UIM_VPP
2 4 6 8 10 12 14 16
1215
R5522
0Ohm
RF_ON 30
25 BT_ON_PCH 30 BT_ON_EC
R5530 @ R5531
0Ohm 0Ohm
R1.1 For IOAC, 10/31
D5501 2
1
21 PCIE_RXN2_WLAN 21 PCIE_RXP2_WLAN
+3VS_WLAN
21 PCIE_TXN2_WLAN 21 PCIE_TXP2_WLAN
+3VS_WLAN
2
R5518 10KOhm
1
BT_ON/OFF#_R
SP5501 2
1 R0402
17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 BT_DISABLE_M51 51
Reserved/UIM_C8
GND8
Reserved/UIM_C4 W_DISABLE#
GND3
PERST#
PERn0
+3.3Vaux
PERp0
GND9
GND4
1.5V_2
GND5
SMB_CLK
PETn0
SMB_DATA
PETp0
GND10
GND6
USB_D-
Reserved3
USB_D+
Reserved4
GND11
Reserved5
LED_W W AN#
Reserved6
LED_W LAN#
Reserved7
LED_W PAN#
Reserved8
1.5V_3
Reserved9
GND12
Reserved10
3.3V_2
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
WLAN_ON_C
MINICARD_RST# R5505 2 @ R5506 2 @ R5507 2
SMBC SMBD
R5516 1 @ R5517 1 @
USBP5USBP5+
1 0Ohm 1 0Ohm 1 0Ohm
2 0Ohm 2 0Ohm
+3VS_WLAN
BUF_PLT_RST# 24,30,33,40,47,51,53,70 WLAN_RST#_PCH 25,53 WLAN_RST#_EC 30 SMB_CLK_S 16,17,28,48,53 SMB_DAT_S 16,17,28,48,53
LED_WLAN# 66
@ R5523
0Ohm
WLAN_ON 25,53
RB751V-40 C
53 54
GND13 GND14
NP_NC2 NP_NC1
56 55
0131
@
C
R5514 1 @ 2 0Ohm
MINI_PCI_LATCH_52P
2N7002
Q5502
12V44GBSD000
RF_DET# 30
3D
1 G 2S
RF_DET#_R
1
R5501
2 0Ohm
+3VS_WLAN
1
1
1
1
C5502 10UF/10V 1AV500000008
2
C5503 0.1UF/16V
2
C5504 0.1UF/16V
2
C5505 0.01UF/50V
@
2
C5506 0.01UF/50V
@
+1.5VS_WLAN
1215
+3VS
R5508 1 @
2 0Ohm
+3VO R5528
@ 1
2 0Ohm
+3VS_WLAN
+1.5VS
R5513
1
2 0Ohm
+1.5VS_WLAN
3D 1
G 2S
AC_BAT_SYS
SI2304BDS-T1-GE3 Q5501
1
1
1
C5510
C5513
2
10UF/10V
C5511
C5512
2
1AV500000008 0.1UF/16V
2
0.1UF/16V
2
0.01UF/50V
R5525
@
@
@
@
B
180KOHM
B
+3VO
1
2
2
30,81 IOAC_EN
0Ohm 2
1 R5527
RF_ON
0Ohm 2 @ 1R5529
1
R5526 100KOhm
1
6
UM6K1N
2
Q5513A
1
4
R5532 1MOhm
3
UM6K1N
5
Q5513B
2
1
C5501 1UF/25V
A
A
Title :WiFi/WiMAX
BU1-RD Div.1-HW RD Dept.1
Engineer:
Size Project Name
Rev
C
VA70
1.0
Date: Friday, February 03, 2012
Sheet
55 of
77
5
4
3
2
1
5
Screw M x 2
4
Fix Hole J x 1
TP_H1 1 C236D110
TP_H3 1 CT197D118N
TP_H2
D
1
C236D110
Fix Hole K x 1
TP_GND
HOTBAR_PAD_8P
0202
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TPCON1
C
TP_H4 1 DO172X118N
TP_+3VA TP_+5VS
TP_DAT_IO TP_CLK_IO TP_LID_SW# SMB_DAT_IO SMB_CLK_IO
TP_GND
1
1
1
TPCO6 10PF/50V
2
TPC07 10PF/50V
2
TPC08 10PF/50V
2
TP_GND
TP_GND
TP_GND
TP_LEFT
12V09SBSM020 TP_SWITCH_4P
1
3
2
4
5
6
TP_SW1
GND2 GND1 GND2 GND1
TP_GND TP_RIGHT
12V09SBSM020 TP_SWITCH_4P
1
3
2
4
5
6
TP_SW5
3
TPR2 1 @
2 0Ohm
TPR3 1 @
2 0Ohm
2
TP_LEFT_R
12V09SBSM020 TP_SWITCH_4P
1
3
2
4
5
6
GND2 GND1
TP_SW6
@ TP_GND
TP_RIGHT_R
12V09SBSM020 TP_SWITCH_4P
1
3
2
4
5
6
GND2 GND1
TP_SW2
Touch Pad WIN8
TPCON3
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
HOTBAR_PAD_8P
B
TP_LEFT TP_RIGHT
TP_CLK_IO TP_DAT_IO
SMB_DAT_IO SMB_CLK_IO
TP_GND TP_+5VS
TP_+5VS
Touch Pad WIN7
A
TPCON2
1 2 3 4 5 6
1 2 3 4 5 6
HOTBAR_6P
2
TP_CLK_IO_C TP_DAT_IO_C
TPC02 10PF/50V
2
TPC03 10PF/50V
2
TPR01 1 TPR02 1
2 0Ohm 2 0Ohm
TP_LEFT TP_RIGHT
2
TPC04 10PF/50V
TPC05 10PF/50V
1
1
1
1
TP_GND TP_GND
TP_GND
TP_GND
TP_GND
TP_GND
@ TP_GND
LID Switch
TP_+3VA
TPC01 1
2 0.1UF/10V
1
TP_CLK_IO TP_DAT_IO
TPR09 100KOhm
TP_LID_SW#
2
AH180-WG-7
1 Vdd
GND 3
2 OUTPUT
TPU01
1
1
TP_D2
TP_D3
TP_GND
1
TPC09
@
2
1000PF/50V
2
AZ5123-01H 07V180000006
2
@ AZ5123-01H
07V180000006
2
TPC10 1000PF/50V
1
TP_GND
TP_GND
TP_GND
TP_GND
5
4
3
2
1
TP_LEFT_R
12V09SBSM020 TP_SWITCH_4P
1
3
D
2
4
5
6
GND2 GND1
TP_SW4
@ TP_GND
TP_RIGHT_R
12V09SBSM020 TP_SWITCH_4P
1
3
C
2
4
5
6
GND2 GND1
TP_SW3
@
TP_GND
TP_D1
TP_DAT_IO
1
I/O1
2 GND TP_GND TP_RIGHT 3 I/O2
CM1293_04SO @
TP_+3VA
6
TP_CLK_IO
B
I/O4
5 VDD
4 I/O3
TP_LEFT
A
Title :TP_M
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name
B
BA52HR/CR
Date: Friday, February 03, 2012
Sheet
1
56 of
Rev 1.0 77
5
Screw G x 2
PWR_H1 1 C276D110
PWR_H2 1 C276D110
D
PWR_GND
Fix Hole H x 1
PWR_H3 1 CT197D118N
4
3
Fix Hole I x 1
PWR_H4 1 OT39DO142X118N
POWER Button LED
WLAN_SW#_PWR PWR_R06 1 @ 2 0Ohm
WLAN_SW#_PWR_R
PWR_SW2 SWITCH_4P
6
4
3
2
1
5
C PWR_GND
PWRLED_ON#_PWR
+ +
GND2 GND1
2
1
2
1
D +5VSUS_PWR
1
PWR_LED02 BLUE 07V130000054
1
PWR_C01
@
47PF/50V
2
PWR_LED01 BLUE 07V130000054
PWR_GND
2
2
1
PWR_R02 300Ohm
C
R1.1 reverse PWR_CON01 and change pin 1~4 pin define 1024
+3VA_PWR +5VSUS_PWR
PWR_CON01
10 9 8 7 6 5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
HOTBAR_10P
LID_SW#_PWR
WLAN_SW#_PWR PWRLED_ON#_PWR
PWR_SW#_PWR
B
PWR_GND
PWR_SW#_PWR
A
5
4
GND2 GND1
PWR_SW01 SWITCH_4P
6
4
3
2
1
5
PWR_GND
PWR_SW3 SWITCH_4P
6
4
3
2
1
GND2 GND1
5
PWR_GND
LID Switch
+3VA_PWR
PWR_C02 1
2 0.1UF/16V
1
PWR_R05
AH180-WG-7
100KOhm
1 Vdd
GND 3
2
B
LID_SW#_PWR
2 OUTPUT
PWR_U01
1
1
PWR_D4
PWR_D5
1
PWR_C04
@
1000PF/50V
2
1AV200000003AZ5123-01H
2
07V180000006
PWR_GND
1
2
AZ5123-01H @ 07V180000006
2
PWR_C03 1000PF/50V 1AV200000003
PWR_GND
PWR_GND
PWR_GND
PWR_GND
A
Title :PWR BTN
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
57 of
77
3
2
1
5
4
3
2
1
0.01UF/16V
2
1 IOC12
0.01UF/16V
2
1 IOC13
+5V_USB_DB_C
IOL01 80Ohm/100Mhz
1
2
2
1
+5VUSB0_IO
1
2
+ IOCE01 100UF/6.3V 1BV080000001
1
IOC08 0.1UF/16V
2
IOC09 33PF/50V
D_GND_IO
D_GND_IO
USB 2.0
+5VUSB0_IO IO_USB_PN3 IO_USB_PP3
12V13GBSD021
USB_CON_1x4P
1 2 3 4
1 P_GND1 2 P_GND2 3 P_GND3 4 P_GND4
5 6 7 8
IOCON4
D
0.01UF/16V
2
1 IOC14
IOD4
D
D_GND_IO
D_GND_IO
HOTBAR_20P
20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
IOCON5
+5V_USB_DB_C
0.01UF/16V
2
1 IOC11
IO_USB_PN3 IO_USB_PP3
IO_USB_PN9 IO_USB_PP9
MIC_IN_AC_E_R_IO MIC_IN_AC_E_L_IO MIC_EXT_JD#_IO AC_HP_L_IO AC_HP_R_IO HP_JD#_IO COMBO_MIC_IO
D_GND_IO
D_GND_IO A_GND_IO
A_GND_IO
Moat
IO_USB_PP3
1
D_GND_IO IO_USB_PN9
2
3 CM1293_04SO
6
IO_USB_PN3
+5VUSB0_IO 5
4
IO_USB_PP9
+5VUSB0_IO IO_USB_PN9 IO_USB_PP9
12V13GBSD021
USB_CON_1x4P
1 2 3 4
1 P_GND1 2 P_GND2 3 P_GND3 4 P_GND4
5 6 7 8
IOCON3
D_GND_IO
D_GND_IO
A_GND_IO
D_GND_IO
C
Headphone & MIC combo Jack
IOCON6
COMBO_MIC_IO
7
1
C
AC_HP_L_IO IOR4 2 AC_HP_R_IO IOR5 2 HP_JD#_IO IOR3 2
1 0Ohm 1 0Ohm 1 0Ohm
AU_HP_LL_JACK AU_HP_RR_JACK
HP_JD#_Jack
2
6
3
4
5
P_GND1 8
P_GND2 9
1
1
1
MIC_IN_AC_E_L_JACK
MIC_IN_AC_E_R_JACK
Screw L x 2
IO_H1 1 C354D118
Fix Hole F x 1
IO_H3 1 OB291X283DO118X130N
AU_HP_LL_JACK
AU_HP_RR_JACK
COMBO_MIC_IO
MIC_EXT_JD#_IO
HP_JD#_Jack
IOC9 100PF/50V
IOC6 100PF/50V
IOC7 100PF/50V
2
2
2
A_GND_IO
A_GND_IO
A_GND_IO
NP_NC1 10 NP_NC2 11 PHONE_JACK_9P 12V14GBSD006
A_GND_IO
A_GND_IO
IO_H2 1 C354D118
1
@ AZ2025-02S
2
1
@ AZ2025-02S
2
AZ2025-01H.R7G
@
1
AZ2025-02S @
2
2
D_GND_IO
IOD1
3
IOD2
3
IOD3
IOD12
1
3
COMBO_MIC_IO
1
1
IOC10
IOC2
B
Fix Hole E x 1
A_GND_IO
A_GND_IO
A_GND_IO
A_GND_IO
10PF/50V @
2
2
33PF/50V @
B
IO_H4 1 CB276D118N
A_GND_IO
MIC JACK
IOCON2
MIC_IN_AC_E_L_IO MIC_IN_AC_E_R_IO
MIC_EXT_JD#_IO
IOR2 1 0Ohm 2 IOR01 1 0Ohm 2
1
MIC_IN_AC_E_L_JACK MIC_IN_AC_E_R_JACK
1
1
IOC8 100PF/50V
IOC06 100PF/50V
IOC05 100PF/50V
2
2
2
8 7 1 2 6 3 4 5
8 7 1 2 6 3 4 5
9 10
NP_NC1 NP_NC2
PHONE_JACK_8P
A
A
A_GND_IO A_GND_IO
A_GND_IO
A_GND_IO
R1.1 Add 2nd MIC schematic 0804
Title :IO
BG1-NB1-HW-NB5
Engineer: Wing_Cheng
Size Project Name
Rev
C
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
58 of 77
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
Title : SLIDE_SW
A
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
A
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
59 of 77
5
4
3
2
1
5
4
3
2
1
HDD 1
9.5mm
HDD 2
20 SATA_TXP0 20 SATA_TXN0
D
20 SATA_RXN0
20 SATA_RXP0
C6001 2 C6002 2 C6003 2 C6004 2
1 0.01UF/50V 1 0.01UF/50V 1 0.01UF/50V 1 0.01UF/50V
SATA_TXP0_C SATA_TXN0_C
SATA_RXN0_C SATA_RXP0_C
CON6001
1 2 3 4 5 6 7
1 2 3 4 5 6 7
NP_NC3 25 NP_NC1 23
12.5mm
0928
CON6002
20 SATA_TXP3 20 SATA_TXN3
20 SATA_RXN3 20 SATA_RXP3
C6006 2 C6008 2 C6005 2 C6007 2
1 0.01UF/50V 1 0.01UF/50V 1 0.01UF/50V 1 0.01UF/50V
SATA_TXP3_C SATA_TXN3_C
SATA_RXN3_C SATA_RXP3_C
S1 S2 S3 S4 S5 S6 S7
S1 S2 S3 S4 S5 S6 S7
NP_NC3 3 NP_NC1 1
D
2
2
2
+3VS
1
1
C6018 @
10UF/6.3V
C6017 @
0.1UF/25V
2
2
+5VS_HDD1
+3VS
+5VS
SP6001
1
2
+5VS_HDD1
SHORT_PIN
T5101 1
1
1
1
C6021 @
10UF/6.3V
C6020 @
10UF/6.3V
C6019 0.1UF/25V
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
NP_NC2 24 NP_NC4 26
SATA_CON_22P 12V241BRD010
+3VS
1
1
C6026 @
10UF/6.3V
C6025 @
0.1UF/25V
2
2
+5VS_HDD2
1
1
1
C6024 @
10UF/6.3V
C6023 @
10UF/6.3V
C6022 0.1UF/25V
2
2
2
+5VS
+3VS
SP6002
1
2
+5VS_HDD2
SHORT_PIN
T5102 1
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 NP_NC2 P14 P15 NP_NC4
2 4
SATA_CON_22P 12V24GBRD019
C
C
ODD
ZERO POWER ODD SUPPORT
support Hokey turn off ODD power
+5VS
R6003
1
2
0Ohm
/non_Zero_ODD
+5VS_ODD
3D 1
G 2S
SI2304BDS-T1-GE3
+12VSUS
Q6002 /Zero_ODD
CON6003
B
4 NP_NC4 2 NP_NC2
S1 S2 S3 S4 S5 S6 S7
S1 S2 S3 S4 S5 S6 S7
SATA_ODD_TXP2 SATA_ODD_TXN2
SATA_ODD_RXN2 SATA_ODD_RXP2
0.01UF/50V 1 0.01UF/50V 1 0.01UF/50V 1 0.01UF/50V 1
2 C6011 2 C6012 2 C6013 2 C6014
SATA_TXP2 20 SATA_TXN2 20
SATA_RXN2 20 SATA_RXP2 20
+3VS
+5VSUS
2
1
R6007
R6006
1
2
R6004 100KOhm
/Zero_ODD
B
0Ohm 1
2 R6001
SATA_ODD_PRSNT# 25
10KOhm
100KOhm
/Zero_ODD
/Zero_ODD
1
3
1
+5VS_ODD
/Zero_ODD
2
1 NP_NC1 3 NP_NC3
P1 P2 P3 P4 P5 P6
P1 P2 P3 P4 P5 P6
1
C6015 0.01UF/50V
@
2
C6016 10UF/10V
2
1
2
+ CE5101 100UF/6.3V 1BV170000001
1
25 SATA_ODD_PWRGT
0Ohm 1
2 R6009
/Zero_ODD
1
UM6K1N
0Ohm 1
2 R6005
5
Q6001B /Zero_ODD
4
6
UM6K1N
/Zero_ODD
2
Q6001A
/Zero_ODD
C6010 1UF/25V
/Zero_ODD
2
R6011 10KOhm /Zero_ODD
SATA_CON_13P
12V24GBRD020
0Ohm 1
2 R6002
/Zero_ODD
SATA_ODD_DA# 24
3D
Q6003
2N7002
1
/Zero_ODD
G 2S
A
A
Title : SATA HDD/ ODD
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
60 of 77
5
4
3
2
1
A
B
C
D
E
MB USB +5VO
+5VO
1
+ +
30 USBP0_EN
3D
1 G 2S
2N7002 Q6105 /USBSLP
2
R6125 100KOhm /USBSLP USBCEN
GND
U6107
1A
VCC 5
2B
3 GND
4 Y
Vcc=2~5.5
/USBSLP
2
1
C6107 0.1UF/16V /USBSLP
GND
1
+5VO
C6110 1UF/6.3V
U6101
1 2 3 4
GND OUT1
IN1
OUT2
IN2 OUT/NC
EN#/EN OC#
8 7 6 5
G547E1P81U 06V290000008 2.5A current limit
+5V_USB1 USB_CHG_OC#
R6114 1
2 0Ohm
USB30_OC#
/non_USBSLP
D6102 1
3 2
1V/0.1A
1
2
1
R6113 1
2 0Ohm
R6110
@
+5VA
10KOhm
2
1
/non_USBSLP
2
R6111 100KOhm
USBP0_EN#
@
6
Q6103A
2
UM6K1N
1
@
3
@
Q6103B
USBP0_EN
5
UM6K1N
+5VO
4
24
USB_PN0
24
USB_PP0
51 USB3_U2_PN1 51 USB3_U2_PP1
FRESCO(USB30) PCH(USB20) COLAY
RN6108A 1 0Ohm 2
RN6108B 3 0Ohm 4
/FL1009 /FL1009
RN6102B 3 0Ohm 4
RN6102A 1 0Ohm 2
USB_PN0_RR USB_PP0_RR
4
1
3
2
RN6101B 3 0Ohm 4
90Ohm/100MHz L6103 @
1 0Ohm 2 RN6101A
USB_PN0_R USB_PP0_R
@
+5VO
USB_PP0_R USB_PN0_R
30
CHGCB0#
2
1
Sleep & Charge
C6116 0.1UF/25V /USBSLP
U6105 /USBSLP
5 6 7 8 9
VDD TDP TDM CB GND
SELCDP DP DM
CEN
4 3 2 1
SLG55584AVTR 06V150000009
USBCEN
FRESCO(USB30) PCH(USB30) COLAY
24 USB3_TX1_N 51 USB3_U3_TXN1
2
C6102 2 C6105 2
0.1UF/25V 1 /PCH_U30 1 /FL1009
0.1UF/25V
USB3_TX3_C_N
4
3
RN6103B /USB30 4 0Ohm 3
L6101 @
SSTN
24 USB3_TX1_P 51 USB3_U3_TXP1
C6104 2 C6103 2
0.1UF/25V 1 /PCH_U30 1 /FL1009
0.1UF/25V
USB3_TX3_C_P
90Ohm/100MHz
2
1
2 0Ohm
1 RN6103A
/USB30
SSTP
1 3
0Ohm 0Ohm
2 RN6112A 4 RN6112B
/non_USBSLP /non_USBSLP
RN6115B 4 2
RN6115A /USBSLP /USBSLP
3 10KOhm 1
10KOhm
USB_OC0# 24
USB 3.0
11 13
CON6101
P_GND2 P_GND4
+5V_USB1
GND GND
SSRN
SSRP DPP0_CON_P
DPN0_CON_N SSTN
SSTP
5 4 6 3
7 2 8 1 9
SSRXPGND SSRX+ D+
GND DSSTXVBUS SSTX+
1
P_GND1 P_GND3
1
10 12
CE6101 100UF/6.3V
2
1
C6101 0.1UF/25V 1NA/AV200000041
2
USB_CON_9P 12V136URD007 /USB30
GND
USB_P0+ USB_N0-
RN6113B N/A 4 0Ohm 3
4
L6114
3
DPP0_CON_P DPN0_CON_N
2
1
90Ohm/100MHz
2 0Ohm @
1 RN6113A N/A
SSRN SSRP
SSTN SSTP
U6102
1 2 3 4 5
LINE_1 NC4 LINE_2 NC3 GND(Pin8) LINE_3 NC2 LINE_4 NC1
10 9
7 6
AZ1045_04F /USB30
SSRN SSRP
SSTN SSTP
USB 2.0
CON6102
+5V_USB1
DPP0_CON_P DPN0_CON_N
SR-74
4 3 2 1
GND D+ DVBUS
P_GND2 P_GND4
P_GND3 P_GND1
6 8
7 5
USB_CON_4P
12V136USD002
/USB20
2
24 USB3_RX1_N 51 USB3_U3_RXN1
24 USB3_RX1_P 51 USB3_U3_RXP1
RN6109A 1 RN6110B 3
0Ohm 0Ohm
2 /PCH_U30 4 /FL1009
RN6109B 3 RN6110A 1
0Ohm 0Ohm
4 /PCH_U30 2 /FL1009
USB3_RX3_C_N USB3_RX3_C_P
RN6111B /USB30 4 0Ohm 3
3
4
L6102 @ 90Ohm/100MHz
2
1
2 0Ohm
1 RN6111A
/USB30
SSRN SSRP
+5VSUS
2
1
C6109 1UF/6.3V
@
30 USBP1_EN
U6104
1 2 3 4
GND OUT1
IN1
OUT2
IN2 OUT/NC
EN#/EN OC#
8 7 6 5
G547E1P81U 06V290000008
@
+5V_USB2 USB30_OC#
3
24
USB_PN1
24
USB_PP1
51 USB3_U2_PN2 51 USB3_U2_PP2
FRESCO(USB30) PCH(USB20) COLAY
RN6121A 1 0Ohm 2
USB_PN1_RR
RN6120A 1 0Ohm 2
3
4
RN6121B 3 0Ohm 4
USB_PP1_RR
1
2
L6109 @ 90Ohm/100MHz
/FL1009 /FL1009
RN6122B 3 0Ohm 4
RN6122A 1 0Ohm 2
3 0Ohm 4 RN6120B
USB_PN1_R USB_PP1_R
24 USB3_TX2_N 51 USB3_U3_TXN2
24 USB3_TX2_P 51 USB3_U3_TXP2
FRESCO(USB30) PCH(USB30) COLAY
C6115 2 C6114 2
0.1UF/25V 1 /PCH_U30 1 /FL1009
0.1UF/25V
USB3_TX_C_N
C6112 2 C6113 2
0.1UF/25V 1 /PCH_U30 1 /FL1009
0.1UF/25V
USB3_TX_C_P
1
4
4 0Ohm 2 0Ohm
2
3
RN6123B /USB30 3
L6104 @ 90Ohm/100MHz
1 RN6123A
/USB30
SSTN1 SSTP1
24 USB3_RX2_N 51 USB3_U3_RXN2
24 USB3_RX2_P 51 USB3_U3_RXP2 4
RN6124B 3 RN6125A 1
0Ohm 0Ohm
4 /PCH_U30 2 /FL1009
RN6124A 1 RN6125B 3
0Ohm 0Ohm
2 /PCH_U30 4 /FL1009
USB3_RX_C_N USB3_RX_C_P
RN6126B /USB30 4 0Ohm 3
3
4
L6108 @ 90Ohm/100MHz
2
1
2 0Ohm
1 RN6126A
/USB30
SSRN1 SSRP1
DPP0_CON_P
D6101 1
2
USB_PP1_R
3
6 DPN0_CON_N
+5V_USB1
C6111
5
12
0.1UF/16V @ 4 USB_PN1_R
CM1293_04SO
07V000000006 PLACE ESD Diodes 0700-0014000 near Connector
USB 3.0
+5V_USB2
GND GND
SSRN1
SSRP1 USB_PP1_R
USB_PN1_R SSTN1
SSTP1
1
2
CE6103 100UF/6.3V
@
2
1
C6108 0.1UF/25V
11 13
P_GND2 P_GND4
CON6105
5 4 6 3 7
2 8 1 9
SSRXPGND SSRX+ D+ GND
DSSTXVBUS SSTX+
USB_CON_9P 12V136URD007 /USB30
P_GND1 P_GND3
10 12
GND
SSRN1 SSRP1
SSTN1 SSTP1
U6106
1
2 3 4 5
LINE_1 NC4
LINE_2 NC3 GND(Pin8) LINE_3 NC2 LINE_4 NC1
10 9
7 6
AZ1045_04F /USB30
SSRN1 SSRP1
SSTN1 SSTP1
USB 2.0
+5V_USB2
USB_PP1_R USB_PN1_R
SR-74
CON6103
4 3 2 1
GND D+ DVBUS
P_GND2 P_GND4
P_GND3 P_GND1
6 8
7 5
USB_CON_4P 12V136USD002 /USB20
no sleep & charge
+5V_USB1
+5V_USB2
R6120
1
2
0Ohm 10V540000001 /non_USBSLP
3
4
IO Board
USB Power Switch for USB DB Main
1
+5VSUS
30 USBP2_EN C6106 N/A 1UF/6.3V
U6103
N/A
1 2 3 4
GND OUT1
IN1
OUT2
IN2 OUT/NC
EN#/EN OC#
8 7 6 5
G547E1P81U 06V290000008
+5V_USB_DB USB_OC1# 24
2
24
USB_PN3
@ 1 0Ohm 2 RN6107A USB_PN3_C
3
4
L6107 90Ohm/100Mhz
2
1
24
USB_PP3
3
0Ohm
4 RN6107B
USB_PP3_C
@ 5
BIOS debug port
24
USB_PN9
24
USB_PP9
@
1
0Ohm
2 RN6106A
USB_PN9_C
3
4
L6106 90Ohm/100Mhz
2
1
3
0Ohm
4 RN6106B
@
USB_PP9_C
A
B
AUDIO BOARD/w USB2.0 x2
+5V_USB_DB
A_GND
USB_PN3_C USB_PP3_C
USB_PN9_C USB_PP9_C
42 MIC_IN_AC_E_R_J 42 MIC_IN_AC_E_L_J
41 MIC_EXT_JD# 42 HP_JACK_L 42 HP_JACK_R 41 HP_JD# 41,42 COMBO_MIC
A_GND
CON6104
20
19 18 17 16 15
14 13 12 11 10
9 8 7 6 5
4 3 2 1
20
19 SIDE2 18 17 16 15
14 13 12 11 10
9 8 7 6 5
4 3 2 SIDE1 1
22 21
FPC_CON_20P 12V18AWSM019
A_GND
C
D
5
Title : USB PORTS/ eSATA
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Custom
BA52HR/CR
Date: Friday, February 03, 2012 E
Sheet
61 of
Rev 1.0 77
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : Camera/ BT/ FL CONN
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
62 of
77
5
4
3
2
1
5
4
DC IN
1
T6313
1
T6304
T6305 T6306 T6307
A/D_DOCK_IN_F
A/D_DOCK_IN
1
1
1
D_A/D_DOCK_IN
L6304 150Ohm/100Mhz
1
2
C6305 0.1UF/25V
1AV300000024
Irat=5A C6309 1000PF/50V
1AV200000018
F6301
1
2
10A/125V C6306 07V100000003 0.1UF/25V
1AV300000024
1
1
1
1
D T6308 T6309 T6310 T6311
WTOB_CON_4P
4 3 2 1
4 3 2 1
CON6302 12V17ABSD000
D_A/D_DOCK_IN
C6307 0.1UF/25V
1AV300000024
C6308 1UF/25V
1AV300000031
A/D_DOCK_IN
T6319
1
3
2
1
Battery Connector BAT_CON
T6320 T6312 T6321 T6322 T6323
F6302
1
2
1 1 1 1 1 1 1 1
15A/65V
07V100000004 T6301 T6302
T6303
C6310 0.1UF/25V
BATT_CON_8P
1AV300000007 @
9 10
P_GND1 1 2 3 4 5 6 7 8
P_GND2
1 2 3 4 5 6 7 8
BAT_CON_F
PI TS1#_C SMB0_CLK_C SMB0_DAT_C
L6301 2 L6303 2 L6302 2
11kOhm/100Mhz Irat=300mA 11kOhm/100Mhz Irat=300mA 11kOhm/100Mhz Irat=300mA
TS1#
90
SMB0_CLK 30,88
SMB0_DAT 30,88
D
100PF/50V
C6304
100PF/50V
C6303
100PF/50V
C6302
C6301 0.1UF/25V 1AV300000024
CON6301 12V20GBSD008
1
1
1
@
@
@
TS1#_C
D6301 1
5 SMB0_CLK_C
2
2
2
GND
1220-00FD000
2
1 1 1 1 1
T6314 T6317 T6318 T6315 T6316
2
PI
R6315 1KOhm
3
4
DF5A6.8FU
SMB0_DAT_C
BAT_CON_F
1
SR-5 0120-11
GND
Discharge Circuit
Frank 0505 Follow EVEREST
+0.75VS
+3VS
+1.5VS
+1.8VS
+1.05VS
+VCCP
+5VS
+VCORE
+VGFX_CORE
C
R1.0 0126
1
1
1
1
1
1
1
1
1
C
Intel Comments
+3VA
R6303 22Ohm
R6304 330Ohm
R6305 220Ohm
R6306 330Ohm
@
R6307 330Ohm
@
R6308 330Ohm
@
R6313 330Ohm
@
R6314 330Ohm
@
R6322 330Ohm
@
2
2
2
2
2
2
2
2
2
1
22,24,30,91,92 SUSB_EC#
62
R6301 100KOhm
Q6301A UM6K1N
2
4
1
4
1
4
Q6301B
UM6K1N 5
3
+0.75VS_DISCHRG
Q6302A UM6K1N
2
6
+3VS_DISCHRG
Q6302B UM6K1N
5
3
+1.5VS_DISCHRG
Q6303A UM6K1N
2
6
+1.8VS_DISCHRG
Q6303B
UM6K1N
@
5
3
+VTT_PCH_DISCHRG
Q6304A
UM6K1N
@
2
6
+VTT_CPU_DISCHRG
Q6304B
UM6K1N
@
5
3
+5VS_DISCHRG
Q6305A
UM6K1N
@
2
6
+VCC_CORE_DISCHRG
Q6305B
UM6K1N
@
5
3
+VGFX_CORE_DISCHRG @
1
4
1
4
1
+5V
+3V
+1.5V
+5VSUS
1
1
1
1
+3VA
R6310 330Ohm
R6311 330Ohm
R6312 330Ohm
+3VA
R6325 330Ohm @
2
1
2
2
2
1
R6302 100KOhm
+5V_DISCHRG
+3V_DISCHRG
+1.5V_DISCHRG
@
@
@
3
6
3
Q6306B
Q6307A
Q6307B
R6324 100KOhm @
Q6311B UM6K1N
3
+5VSUS_DISCHRG
62
4
Q6306A @
62
4
UM6K1N 5
UM6K1N 2
UM6K1N 5
1
4
5
Q6311A
@
UM6K1N
30,91 SUSC_EC#
UM6K1N 2
@
@
@
30,81,91,93 VSUS_ON
2
1
B
1
@
B
@
R1.1 Mount SUSC_EC# discharge schematic for power timing 0808
VGA Discharge Circuit
+3VS_VGA
+VGA_VCORE
+1.5VS_VGA
+1.05VS_VGA
1
1
1
1
+3VA
R6318 330Ohm /DGPU
R6319 330Ohm /DGPU
R6320 330Ohm /DGPU
R6321 10Ohm
/DGPU
1
2
2
2
2
R6317 100KOhm /DGPU
+VGA_VCORE_DISCHRG +3VS_VGA_DISCHRG
+1.5VS_VGA_DISCHRG
+1.05VS_VGA_DISCHRG
6
3
6
3
6
2
VGA_DISCHRG_EN 2
Q6308A UM6K1N
/DGPU
Q6309B
5
UM6K1N
Q6309A
2
UM6K1N
Q6310B
5
UM6K1N
/DGPU
Q6310A
2
UM6K1N
1
4
1
4
1
3
R6316
Q6308B
A
24 DGPU_PWR_EN
1
2 VGA_DISCHRG_CTL 5
UM6K1N
/DGPU
4
/DGPU
/DGPU
/DGPU
A
100KOhm /DGPU
Unmount +VGA_Vcore discharg
Title :DC-IN/ DISCHARGE
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
63 of
77
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
Title : USB PORTS/ eSATA
A
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
A
BA52HR/CR
Date: Friday, February 03, 2012
Sheet
64 of
Rev 1.0 77
5
4
3
2
1
5
4
3
PWR BRD/ AMBIENT/ HALL CONN.
D 30 PWR_SW#_M
C
+3VSUS
1
30 WLAN_SW#
R6503 2
1 33Ohm
PW R_SW #_S
2
R6504 10KOhm
30,37,48 LID_SW#
PW RLED_ON#
D6501 @ 0.1UF/16V C6504
2
1
2
2
10PF/50V C6508
10PF/50V C6512
2
+5VSUS
+3VA
12V18AW SM001 FPC_CON_10P
12 10
9 8 7 6 5 4 3 2 1 11
SIDE2 10 9 8 7 6 5 4 3 2 1 SIDE1
CON6504
2
2
33PF/50V C6520
0.1UF/25V C6505
10PF/50V C6506
2 3
1
1
1
1
1
1
AZ2025-02S @
LID_SW # W LAN_SW # PW RLED_ON# PW R_SW #_S
@ 0.1UF/16V C6516
2
1
2
2
10PF/50V C6514
10PF/50V C6517
2
+5VSUS
+3VA
2
2
33PF/50V C6519
0.1UF/25V C6515
10PF/50V C6518
12V18AW SM001 FPC_CON_10P
12 10
9 8 7 6 5 4 3 2 1 11
SIDE2 10 9 8 7 6 5 4 3 2 1 SIDE1
CON6503
1
1
1
1
1
DEBUG CARD CONN.
B +3V
C6503 1
2 0.1UF/16V
20,30 LPC_AD0 20,30 LPC_AD1 20,30 LPC_AD2 20,30 LPC_AD3 20,30 LPC_FRAME# 24 CLK_DEBUG
@
LPC_AD0
LPC_AD1 EXT_SMI#_C LPC_AD2 INT_SERIRQ_C LPC_AD3
LPC_FRAME#
CLK_DEBUG
CON6502
12 11 10
9 8 7 6 5 4 3 2 1
12 SIDE1 11 10 9 8 7 6 5 4 3 2 1 SIDE2
13 14
FPC_CON_12P 12V18GW SM045
Frank 0425_modify Debug port (add EXT_SMI#_C and INT_SERIRQ_C)
A
CR R1.0 change part for EOL. Joyoung0803
PS. Pin define is reverse.
20,30 INT_SERIRQ
R6501 2 @ 1 0Ohm INT_SERIRQ_C
25,30 EXT_SMI#
R6502 2 @ 1 0Ohm EXT_SMI#_C
5
4
3
2
1
D
30,66 PWR_BLUE_LED# 30,66 PWR_AMBER_LED#
R6509 2
R6510 2 @
1 0Ohm 1 0Ohm
PW RLED_ON#
change Power LED CON6503 circuit
R1.2-28
C
B
A
Title : MDC/ PWR SW/ Debug
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Rev
Custom
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
65 of
77
2
1
5
4
Power LED
+5VSUS
3
Charger LED
2
1
+5VA
1
1
1
+5VSUS
R6608 10KOhm @
LED6601
BLUE&ORANGE 07V130000038
SR-65
A1
C6602
@
2
47PF/50V
1AV200000015
3 C2 2 C1
62
3
D
Q6602A @ UM6K1N
2
Q6602B UM6K1N
5
1
@
4
LED6602
BLUE&ORANGE 07V130000038
SR-65
A1
C6601
@
2
47PF/50V
1AV200000015
2 C1
3 C2
D
2
2
R6604 360Ohm
R6602 560Ohm
1 1
2
2
3
30,65 PWR_BLUE_LED# 30,65 PWR_AMBER_LED#
R6609 1
2 0Ohm
1
1
R6607 360Ohm
R6606 560Ohm 10V240000029
+5VA
R6611 1
1
2 100KOhm
C6603 0.1UF/16V
6
Q6601A UM6K1N
2
1
Q6601B UM6K1N
5
4
2
WLAN LED
+5VA +5VS
R6617 1 @ 2 0Ohm
R6618 1
2 0Ohm
30 CHG_LED_BLUE# 30 BAT_ORG_LED#
+5VS
3
1
3
1
LED6605 AMBER 07V130000055
HDD LED
LED6604 BLUE 07V130000017
2
C
C
22
25 WLAN_LED
1
3D
1 G 2S
R6613 100KOhm
@
Q6604 2N7002
1
2
R6616 499Ohm 10V220000076
R6610 1
2 0Ohm
1
R6605 300OHM
2
+3VS_WLAN
+3VS
3 Storage_LED#
1
3 LED_WLAN#_C
@
+3VS_WLAN
1
R6614 100KOhm
R6612 100KOhm
1
62
62
R6615 10KOhm
LED_WLAN
55 LED_WLAN#
2
Q6605A UM6K1N
2
Q6605B UM6K1N
5
20 SATA_LED#
Q6603A @ UM6K1N
2
Q6603B UM6K1N
5
4
1
4
1
@
@
CPU Screw B x 4
B H6601
1 CRT276X315D157
H6602 1 CRT276X315D157
H6603 1 CRT276X315D157
H6604 1 CRT276X315D157
GPU Screw P x 2
H6605 1 CRT315x335CB236D138
H6606 1 CRT315x335CB236D138
A
Fix hole D x 1
H6633 1 CB276D138N
Fix hole N x 1
H6634 1 OB248x236DO150x138N
5
Screw A x 4 (PTH)
H6621 1 C354D126
H6622 1 C354D126
H6614 1 C354D126
H6625 1 C354D126
Screw A x 2 (NPTH)
H6620
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
C354D126N
Screw hole R x 1
H6615
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
RT413X394CBD126N
Screw hole T x 1
H6623 1 C354D126
H6624
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
C354D126N
Screw hole V x 1
H6607
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
DO149X126N
Screw hole S x 2
H6616
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
RT394x384CB354D126N H6617
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
RT394x384CB354D126N
4
Screw hole Q x 6
H6608
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
H6613
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
ST354CB354D126N H6609
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
ST354CB354D126N H6618
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
ST354CB354D126N H6610
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
ST354CB354D126N H6619
1 2 3
NP_NC GND1 GND4 GND2 GND3
5 4
ST354CB354D126N
ST354CB354D126N
S6635 11
EMI_SPRING_PAD
3
2
WLAN NUT B
H6628
H6629
A40M20-64AS
A40M20-64AS
PCH Local Side Symbol
H6611
CT236B67ID47 H6612
CT236B67ID47 A
Title :LED/ CIR/ FN/ SCREW
BU1-RD Div.1-HW RD Dept.1
Engineer: Wing_Cheng
Size Project Name
Custom
BA52HR/CR
Date: Friday, February 03, 2012
Sheet 1
66 of
Rev 1.0 77
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : TPM
Pegatron Corp.
Engineer: Wing_Cheng
Size Project Name
Rev
B
BA52HR/CR
1.0
Date: Friday, February 03, 2012
Sheet
67 of 77
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
Title : Finger Printer
A
Pegatron Corp.
Engineer:
Size Project Name
A
BA52HR/CR
Date: Friday, February 03, 2012
Sheet
Wing_Cheng
Rev 1.0 68 of 77
5
4
3
2
1
5 D
4
3
+3VS
3
4.7KOHM
RN6901B
RN6901A 2 4.7KOHM 1
4
28,30,49,74 SMB1_CLK 28,30,49,74 SMB1_DAT
C
R6907 1 R6908 1 @
@
2 0Ohm 2 0Ohm
@@
GSENSOR_CLK GSENSOR_DAT
+3VS_G
2
1
D
+3VS
+3VS_G
R6902 1
2 0Ohm
1
1
@
C6901 10UF/6.3V @
2
C6902 0.1UF/16V @
2
C
+3VS_G
U6901
16 15 14
@ 06V910000009
ADC1 ADC2
Vdd
B
T6901 1 T6902 1 GSENSOR_CLK
1 2 3 4 5
Vdd_IO NC1 NC2 SCL/SPC GND1
ADC3 GND2
INT1 RES INT2
13 12 11 10 9
R6904 1 @ 2 0Ohm R6903 1 @ 2 0Ohm 1 T6903
GSENSOR_INT1_PCH 25 GSENSOR_INT1_EC 30
B
SDA/SDI/SDO SDO/SA0 CS
GSENSOR_DAT
A 5
LIS3DHTR
6 7 8
+3VS_G
1
R6901 0Ohm @
2
4
3
BU1-RD Div.1-HW RD Dept.1 Size Project Name A
Date: Friday, February 03, 2012
2
Title : G-Sensor TSH35TR
Engineer: Wing_Cheng
Sheet
69 of
1
A
Rev 1.0 77
5
4
3
2
1
GPU BOM Optional Definition
Frank 20110513 Change N13P GPU.
+3VS_VGA
@ => Unmount. /DGPU => Discrete and Optimus SKU. /DGPUO => Discrete SKU only.
/OPT => Optimus SKU only.
U7002
/N13P-GS => When N13P-GS is mounted, we need to mount this optional.
24 DGPU_HOLD_RST#
1A
VCC 5
1 T7022
/N13P-GL => When N13P-GL is mounted, we need to mount this optional.
24,30,33,40,47,51,53,55 BUF_PLT_RST#
2B
/N13P-GS_N13M-GS => When N13P-GS or N13M-GS are mounted, we need to mount this optional.
D
3 GND
4 Y
PEX_RST
/N13P-GS_N13P-GL => When N13P-GS or N13P-GL are mounted, we need to mount this optional.
D
SN74LVC1G08DCKR
/DGPU
R7020 2 @ 1 0Ohm
2
21 CLKREQ_PEG#
C
3 PCIENB_RXP[0..15] 3 PCIENB_RXN[0..15]
PEX=> From NB EXP: VGA Card to NB
3 PCIEG_RXP[0..15] 3 PCIEG_RXN[0..15]
B
PCIE interface
N13M-GS N13P-GS/N13P-GL
8 Lane
V
16 Lane
V
GPU Information
A
GPU Location : U7001
Type
Version Pegatron P/N
N13P-GS ES
020A-00J90PB
N13P-GL QS
020A-00K60PB
N13M-GS ES
020A-00JD0PB
5
D3 1
S2 G
+3VS_VGA
+3VS_VGA
2
R7008 10KOhm /DGPU
1
Q7001 2N7002
21 21
CLK_PCIE_PEG_PCH CLK_PCIE_PEG#_PCH
/DGPU
PCIEG_RXP0 PCIEG_RXN0
PCIEG_RXP1 PCIEG_RXN1
PCIEG_RXP2 PCIEG_RXN2
PCIEG_RXP3 PCIEG_RXN3
PCIEG_RXP4 PCIEG_RXN4
PCIEG_RXP5 PCIEG_RXN5
PCIEG_RXP6 PCIEG_RXN6
PCIEG_RXP7 PCIEG_RXN7
PCIEG_RXP8 PCIEG_RXN8
PCIEG_RXP9 PCIEG_RXN9
PCIEG_RXP10 PCIEG_RXN10
PCIEG_RXP11 PCIEG_RXN11
PCIEG_RXP12 PCIEG_RXN12
PCIEG_RXP13 PCIEG_RXN13
PCIEG_RXP14 PCIEG_RXN14
PCIEG_RXP15 PCIEG_RXN15
R7009 100KOhm /DGPU
U7001A 1/19 PCI_EXPRESS
1
AJ11
CLKREQ_PEG#_R
AJ12 AK12
PCIENB_RXP0 C7032 2 PCIENB_RXN0 C7021 2
PCIENB_RXP1 C7018 2 PCIENB_RXN1 C7019 2
PCIENB_RXP2 C7024 2 PCIENB_RXN2 C7031 2
PCIENB_RXP3 C7020 2 PCIENB_RXN3 C7022 2
PCIENB_RXP4 C7023 2 PCIENB_RXN4 C7028 2
PCIENB_RXP5 C7036 2 PCIENB_RXN5 C7030 2
PCIENB_RXP6 C7026 2 PCIENB_RXN6 C7025 2
PCIENB_RXP7 C7029 2 PCIENB_RXN7 C7027 2
PCIENB_RXP8C7034 2 PCIENB_RXN8C7033 2
PCIENB_RXP9 C7046 2 PCIENB_RXN9 C7035 2
PCIENB_RXP10 C7038 2 PCIENB_RXN10 C7037 2
PCIENB_RXP11 C7040 2 PCIENB_RXN11 C7039 2
PCIENB_RXP12 C7042 2 PCIENB_RXN12 C7041 2
PCIENB_RXP13 C7047 2 PCIENB_RXN13 C7043 2
PCIENB_RXP14 C7049 2 PCIENB_RXN14 C7048 2
PCIENB_RXP15 C7051 2 PCIENB_RXN15 C7050 2
AL13
AK13 /DGPU
1 0.22UF/10VPEX_TX0+ AK14 1 0.22UF/10VPEX_TX0- AJ14
/DGPU
AN12
/DGPU
AM12
1 0.22UF/10VPEX_TX1+ AH14 1 0.22UF/10VPEX_TX1- AG14
/DGPU
AN14
/DGPU
AM14
1 0.22UF/10VPEX_TX2+ AK15 1 0.22UF/10VPEX_TX2- AJ15
/DGPU
AP14
AP15 /DGPU
1 0.22UF/10VPEX_TX3+ AL16 1 0.22UF/10VPEX_TX3- AK16
/DGPU
AN15
AM15 /DGPU
1 0.22UF/10VPEX_TX4+ AK17 1 0.22UF/10VPEX_TX4- AJ17
/DGPU
/DGPU
AN17 AM17
1 0.22UF/10VPEX_TX5+ AH17 1 0.22UF/10VPEX_TX5- AG17
/DGPU
AP17
AP18 /DGPU
1 0.22UF/10VPEX_TX6+ AK18 1 0.22UF/10VPEX_TX6- AJ18
/DGPU
AN18
/DGPU
AM18
1 0.22UF/10VPEX_TX7+ AL19 1 0.22UF/10VPEX_TX7- AK19
/DGPU
/DGPU
AN20 AM20
1 0.22UF/10VPEX_TX8+ AK20 1 0.22UF/10VPEX_TX8- AJ20
/DGPU
AP20
AP21 /DGPU
1 0.22UF/10VPEX_TX9+ AH20 1 0.22UF/10VPEX_TX9- AG20
/DGPU
AN21
/DGPU
AM21
1 0.22UF/10VPEX_TX10+ AK21 1 0.22UF/10VPEX_TX10- AJ21
/DGPU
/DGPU
AN23 AM23
1 0.22UF/10VPEX_TX11+ AL22 1 0.22UF/10VPEX_TX11- AK22
/DGPU
AP23
AP24 /DGPU
1 0.22UF/10VPEX_TX12+ AK23 1 0.22UF/10VPEX_TX12- AJ23
/DGPU
AN24
/DGPU
AM24
1 0.22UF/10VPEX_TX13+ AH23 1 0.22UF/10VPEX_TX13- AG23
/DGPU
AN26
AM26 /DGPU
1 0.22UF/10VPEX_TX14+ AK24 1 0.22UF/10VPEX_TX14- AJ24
/DGPU
AP26
AP27 /DGPU
1 0.22UF/10VPEX_TX15+ AL25 1 0.22UF/10VPEX_TX15- AK25
/DGPU
AN27
AM27
PEX_W AKE_N
PEX_RST_N
PEX_CLKREQ_N
PEX_REFCLK PEX_REFCLK_N
PEX_TX0 PEX_TX0_N
PEX_RX0 PEX_RX0_N
PEX_TX1 PEX_TX1_N
PEX_RX1 PEX_RX1_N
PEX_TX2 PEX_TX2_N
PEX_RX2 PEX_RX2_N
PEX_TX3 PEX_TX3_N
PEX_RX3 PEX_RX3_N
PEX_TX4 PEX_TX4_N
PEX_RX4 PEX_RX4_N
PEX_TX5 PEX_TX5_N
PEX_RX5 PEX_RX5_N
PEX_TX6 PEX_TX6_N
PEX_RX6 PEX_RX6_N
PEX_TX7 PEX_TX7_N
PEX_RX7 PEX_RX7N
PEX_TX8 PEX_TX8_N
PEX_RX8 PEX_RX8_N
PEX_TX9 PEX_TX9_N
PEX_RX9 PEX_RX9_N
PEX_TX10 PEX_TX10_N
PEX_RX10 PEX_RX10_N
PEX_TX11 PEX_TX11_N
PEX_RX11 PEX_RX11_N
PEX_TX12 PEX_TX12_N
PEX_RX12 PEX_RX12_N
PEX_TX13 PEX_TX13_N
PEX_RX13 PEX_RX13_N
PEX_TX14 PEX_TX14_N
PEX_RX14 PEX_RX14_N
PEX_TX15 PEX_TX15_N
PEX_RX15 PEX_RX15_N
N13P-GS 02V0A0000011 /DGPU
4
3
PEX_IOVDD1 PEX_IOVDD2 PEX_IOVDD3 PEX_IOVDD4 PEX_IOVDD5 PEX_IOVDD6
AG19 AG21 AG22 AG24 AH21 AH25
2
1
PLACE UNDER BGA
2
1
C7001
1UF/6.3V /DGPU
2
C7002
1UF/6.3V /DGPU
1
C7003
4.7UF/6.3V /DGPU
+1.05VS_VGA
PLACE BETWEEN BGA AND POWER SUPPLY
1
1
1
1
C7009
10UF/6.3V /DGPU
2
C7004
10UF/6.3V /DGPU
2
C7005
22UF/6.3V /DGPU
2
C7010
22UF/6.3V /DGPU
2
3300 mA
PEX_IOVDDQ1 PEX_IOVDDQ2 PEX_IOVDDQ3 PEX_IOVDDQ4 PEX_IOVDDQ5 PEX_IOVDDQ6 PEX_IOVDDQ7 PEX_IOVDDQ8 PEX_IOVDDQ9 PEX_IOVDDQ10 PEX_IOVDDQ11 PEX_IOVDDQ12 PEX_IOVDDQ13 PEX_IOVDDQ14
AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28
2
1
1
2
1
C7008
1UF/6.3V /DGPU
2
C7006
1UF/6.3V /DGPU
1
C7007
4.7UF/6.3V /DGPU
2
C7013
10UF/6.3V /DGPU
2
C7011
10UF/6.3V /DGPU
2
C7012
22UF/6.3V /DGPU
2
C7014
22UF/6.3V /DGPU
1
1
1
C
PEX_PLL_HVDD
N13P-GL NC
N13P-GS/N13M-GS
PEX_PLL_HVDD (3.3V)
PEX_PLL_HVDD PEX_SVDD_3V3
09/26 Add net name +PEX_PLL_HVDD (Mickey)
AH12 +PEX_PLL_HVDD R7021 2
1 0Ohm
/N13P-GS_N13M-GS
AG12
1
C7016
2
C7017
210 mA
2
0.1UF/16V /DGPU
1
4.7UF/6.3V /DGPU
1
2
+3VS_VGA
C7015 4.7UF/6.3V /DGPU
Frank 20110613 Vender request for N12P and N13P co-lay
VDD_SENSE L4
NVDD_SENSE 87
GND_SENSE L5
NVDD_GND_SENSE 87
B
NC12 P8
09/26 Change R7007 optional from @ to /DGPU (Follow NV reference schematics) (Mickey) 09/29 Change R7007 optional from /DGPU to @ (NV FAE confirmed) (Mickey)
PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N
AJ26 AK26
PEX_TSTCLK_OUT R7007 1 @ 2 200Ohm 1% PEX_TSTCLK_OUT#
09/26 Correct L7001 and R7022 optional (Mickey)
PLACE NEAR
09/26 Add net name +PEX_PLLVDD (Mickey)
PEX_PLLVDD AG26
+PEX_PLLVDD
150 mA
1
C7061
TESTMODE AK11
R7004 1 /DGPU 2 10KOhm
2
0.1UF/16V /DGPU
PLACE NEAR BGA
2
1
C7044
1UF/6.3V /DGPU
1
C7045
4.7UF/6.3V /DGPU
2
+1.05VS_VGA
/N13P-GL
L7001 1
2 30Ohm/100Mhz
R7022 2
1 0Ohm
/N13P-GS_N13M-GS
PEX_TERMP AP29 PEX_TERMP R7003 1 /DGPU 2 2.49KOhm1%
PEX_PLLVDD A
N13P-GL N13P-GS/N13M-GS
L7001
R7022
Title : GPU_PEG*16
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size Project Name
C
P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
70 of
99
2
1
5
76 FBAD[0..63] 76 FBA_CMD[0..31] 76 FBADQM[0..7] 76 FBADQS_WP[0..7] 76 FBADQS_RN[0..7]
U7001B 2/19 FBA
BOT SIDE
4
FB_CLAMP
N13P-GL N13P-GS/N13M-GS
NC
PD 10K
09/26 Change R7120 optional from /DGPU to /N13P-GS_N13M-GS (Mickey) 09/27 Change net name from +FB_DLL_AVDD to +FB_PLL_AVDD (Mickey)
3
77 FBCD[0..63] 77 FBC_CMD[0..31] 77 FBCDQM[0..7] 77 FBCDQS_WP[0..7] 77 FBCDQS_RN[0..7]
U7001C 3/19 FBB
2
1
FBB channel
N13M-GS N13P-GS/N13P-GL
FBB
X
V
FBA
V
V
D C
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
L28 M29 L29 M28 N31 P29 R29 P28 J28 H29 J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33 L31 L34 L32 L33 AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28 AJ29 AK29 AJ30 AK28 AM29 AM31 AN29 AM30 AN31 AN32 AP30 AP32 AM33 AL31 AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FB_CLAMP E1
FB_CLAMP
R7120 2
1 10KOhm
/N13P-GS_N13M-GS
R7118
FB_DLL_AVDD
K27 +FB_DLL_AVDD_R 2
1 0Ohm +FB_PLL_AVDD
/N13P-GS_N13M-GS
1
35 mA
C7115 0.1UF/10V
10%
2
/N13P-GS_N13M-GS
FB_DLL_AVDD
N13P-GL NC
N13P-GS/N13M-GS
FB_DLL_AVDD (1.05V)
09/26 Add net name +FB_DLL_AVDD_R (Mickey)
11/14 Delete T7102,T7103,T7105,T7106,T7107,T7108 (NV Recommend) (Mickey)
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
U30 T31 U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33 Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33 Y28 Y29 W 31 Y30 AA34 Y31 Y34 Y33 V31
FBA_CMD0
FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16
FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30
FBCD0 FBCD1 FBCD2 FBCD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9 FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15 FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63
G9 E9 G8 F9 F11 G11 F12 G12 G6 F5 E6 F6 F4 G4 E2 F3 C2 D4 D3 C1 B3 C4 B5 C5 A11 C11 D11 B11 D8 A8 C8 B8 F24 G23 E24 G24 D21 E21 G21 F21 G27 D27 G26 E27 E29 F29 E30 D30 A32 C31 C32 B32 D29 A29 C29 B29 B21 C23 A21 C21 B24 C24 B26 C26
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31
D13 FBC_CMD0
E14 F14 FBC_CMD2 A12 FBC_CMD3 B12 FBC_CMD4 C14 FBC_CMD5 B14 FBC_CMD6 G15 FBC_CMD7 F15 FBC_CMD8 E15 FBC_CMD9 D15 FBC_CMD10 A14 FBC_CMD11 D14 FBC_CMD12 A15 FBC_CMD13 B15 FBC_CMD14 C17 FBC_CMD15 D18 FBC_CMD16
E18 F18 FBC_CMD18 A20 FBC_CMD19 B20 FBC_CMD20 C18 FBC_CMD21 B18 FBC_CMD22 G18 FBC_CMD23 G17 FBC_CMD24 F17 FBC_CMD25 D16 FBC_CMD26 A18 FBC_CMD27 D17 FBC_CMD28 A17 FBC_CMD29 B17 FBC_CMD30
E17
U7001H
D
10/19 XVDD
CONFIGURABLE
POW ER
CHANNELS
XVDD_1 XVDD_2 XVDD_3 XVDD_4 XVDD_5 XVDD_6 XVDD_7 XVDD_8
U1 U2 U3 U4 U5 U6 U7 U8
XVDD_9 XVDD_10 XVDD_11 XVDD_12 XVDD_13 XVDD_14 XVDD_15 XVDD_16
V1 V2 V3 V4 V5 V6 V7 V8
XVDD_17 XVDD_18 XVDD_19 XVDD_20 XVDD_21 XVDD_22
W2 W3 W4 W5 W7 W8
XVDD_23 XVDD_24 XVDD_25 XVDD_26 XVDD_27 XVDD_28 XVDD_29 XVDD_30
Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
C
N13P-GS 02V0A0000011
XVDD_31 XVDD_32 XVDD_33 XVDD_34 XVDD_35 XVDD_36 XVDD_37 XVDD_38
AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8
N13P-GL
/DGPU
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
P30 F31 F34 M32 AD31 AL29 AM32 AF34
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
B
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
M31 G31 E33 M33 AE31 AK30 AN33 AF33
FBA_DQS_W P0 FBA_DQS_W P1 FBA_DQS_W P2 FBA_DQS_W P3 FBA_DQS_W P4 FBA_DQS_W P5 FBA_DQS_W P6 FBA_DQS_W P7
FBA_CMD_RFU0 FBA_CMD_RFU1
FBA_DEBUG0 FBA_DEBUG1
FBA_CLK0 FBA_CLK0_N
FBA_CLK1 FBA_CLK1_N
R32 AC32
R28 FBA_DEBUG0 AC28 FBA_DEBUG1
R30 R31 AB31 AC31
+1.5VS_VGA
R7101 1 /DGPU 2 60.4Ohm 1% R7102 1 /DGPU 2 60.4Ohm 1%
FBA_CLK0 76 FBA_CLK0# 76 FBA_CLK1 76 FBA_CLK1# 76
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5 FBCDQM6 FBCDQM7
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2 FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
E11 E3 A3 C9
F23 F27 C30 A24
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
D10 D5 C3 B9 E23 E28 B30 A23
FBB_DQS_W P0 FBB_DQS_W P1 FBB_DQS_W P2 FBB_DQS_W P3 FBB_DQS_W P4 FBB_DQS_W P5 FBB_DQS_W P6 FBB_DQS_W P7
FBB_CMD_RFU0 FBB_CMD_RFU1
C12 C20
FBB_DEBUG0 FBB_DEBUG1
G14 G20
FBB_CLK0 FBB_CLK0_N
FBB_CLK1 FBB_CLK1_N
D12 E12 E20 F20
FBC_DEBUG0 FBC_DEBUG1
09/26 Change R7103,R7104 optional from /DGPU to /N13P-GS_N13P-GL (Mickey)
+1.5VS_VGA
/N13P-GS_N13P-GL
R7103 1
2 60.4Ohm 1%
R7104 1
2 60.4Ohm 1%
/N13P-GS_N13P-GL
N13M-GS R7103/R7104 unmount
N13P-GS/N13P-GL mount
FBC_CLK0 77 FBC_CLK0# 77 FBC_CLK1 77 FBC_CLK1# 77
B
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4 FBADQS_RN5 FBADQS_RN6 FBADQS_RN7
M30 H30 E34 M34 AF30 AK31 AM34 AF32
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
T7104
FBA_W CK01 FBA_W CK01_N
FBA_W CK23 FBA_W CK23_N
FBA_W CK45 FBA_W CK45_N
FBA_W CK67 FBA_W CK67_N
FBA_W CKB01 FBA_W CKB01_N
FBA_W CKB23 FBA_W CKB23_N
FBA_W CKB45 FBA_W CKB45_N
FBA_W CKB67 FBA_W CKB67_N
K31 L30 H34 J34 AG30 AG31 AJ34 AK34
J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33
For GDDR5
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2 FBCDQS_RN3 FBCDQS_RN4 FBCDQS_RN5 FBCDQS_RN6 FBCDQS_RN7
D9 E4 B2 A9 D22 D28 A30 B23
FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7
FBB_W CK01 FBB_W CK01_N
FBB_W CK23 FBB_W CK23_N
FBB_W CK45 FBB_W CK45_N
FBB_W CK67 FBB_W CK67_N
F8 E8 A5 A6 D24 D25 B27 C27
FBB_W CKB01 FBB_W CKB01_N
FBB_W CKB23 FBB_W CKB23_N
FBB_W CKB45 FBB_W CKB45_N
FBB_W CKB67 FBB_W CKB67_N
D6 D7 C6 B6 F26 E26 A26 A27
For GDDR5
09/26 Add net name +FB_PLL_AVDD_GPU (Mickey) Frank 20110613 Vender request for N12P and N13P co-lay
1 FB_VREF /DGPU
H26 FB_VREF
FBA_PLL_AVDD U27 +FB_PLL_AVDD
FBB_PLL_AVDD H17
+FB_PLL_AVDD_GPU R7119 2 /N13P-GS1 0Ohm +FB_PLL_AVDD
FBB_PLL_AVDD
1
N13P-GS 02V0A0000011
/DGPU
66 mA
Frank 20110613 Vender suggest C7119 change 22UF.
FBA_ODT
N13P-GS 02V0A0000011
/DGPU
FBC_ODT
66 mA
C7120 0.1UF/10V 10% /N13P-GS
2
N13P-GL/N13M-GS NC
N13P-GS
FBB_PLL_AVDD (1.05V)
A
A
FBA_CMD2 R7108 2 /DGPU 1 10KOhm
FBC_CMD2 R7114 2 /DGPU 1 10KOhm
1.05V+-3% 100 mA
+1.05VS_VGA
FBA_CMD18 R7109 2 /DGPU 1 10KOhm
FBC_CMD18 R7113 2 /DGPU 1 10KOhm
L7101
+FB_PLL_AVDD
1
2
FBA_RST#
FBC_RST#
1
1
1
1
C7109 0.1UF/10V 10% /DGPU
2
C7112 1UF/6.3V 10% /DGPU
2
C7119 22UF/6.3V
/DGPU
30Ohm/100Mhz /DGPU
09V010000029
2
Place Under GPU
Place Near GPU
2
C7113 1UF/6.3V 10% /DGPU
FBA_CMD5 R7110 2 /DGPU 1 10KOhm FBA_CKE
FBA_CMD3 R7111 2 /DGPU 1 10KOhm FBA_CMD19 R7112 2 /DGPU 1 10KOhm
FBC_CMD5 R7115 2 /DGPU 1 10KOhm FBC_CKE
FBC_CMD3 R7116 2 /DGPU 1 10KOhm FBC_CMD19 R7117 2 /DGPU 1 10KOhm
PEGATRON COMPUTER INC
Title : GPU_DDR3 FB
Engineer: Mickey_Yu
Size Project Name
C
P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
71 of
99
5
4
3
2
1
5
4
3
2
1
10/03 Change C7203 optional from /DGPUO to @ (Follow NV FAE recommend) (Mickey)
RGB
+3VS_VGA
09/27 Change L7201 from 300ohm bead to 220ohm bead (Follow NV design guide) (Mickey) 09/27 Change R7202,C7206 optional from /DGPU to /N13P-GS_N13P-GL (Mickey) 09/26 Change R7201 optional from /DGPU to /OPT (Mickey)
N13M-GS NC
N13P-GL/N13P-GS RGB Function
4
2
09/26 Change RN7201 optional from /DGPU to /N13P-GS_N13P-GL (Mickey)
D
09/26 Change C7201~7205,L7201 optional from /DGPU to /DGPUO (Mickey)
+DACA_VDD
U7001N 4/19 DACA
GF108/GKx AG10 DACA_VDD
AP9 DACA_VREF
GF117 NC
TSEN_VREF
RN7201B 2.2KOhm /N13P-GS_N13P-GL
GF117
NC NC
GF108/GKx
I2CA_SCL I2CA_SDA
R4 R5
DDC_CLK_VGA DDC_DATA_VGA
3
1
RN7201A
2.2KOhm
D
/N13P-GS_N13P-GL 09/29 Correct the net name of
DDC_CLK_VGA,
DDC_DATA_VGA,DAC_HSYNC_VGA and
DAC_VSYNC_VGA (Mickey)
2
R7201 10KOhm /OPT
AP8 DACA_RSET
NC
NC NC
DACA_HSYNC DACA_VSYNC
AM9 AN9
NC
DACA_RED AK9
NC
DACA_GREEN AL10
11/29 Remove net DAC_HSYNC_VGA, DAC_VSYNC_VGA, DAC_VR, DAC_VG, DAC_VB for VGA_Vcore power plane improvement(Elmer)
1
NC
DACA_BLUE AL9
+1.05VS_VGA
N13P-GS
02V0A0000011
C
/DGPU
C
+1.05VS_VGA
L7202 1
2 30Ohm
/DGPU
L7203 1
2 180Ohm/100Mhz
/N13P-GS_N13P-GL
C7211
2
2
1
C7207 22UF/6.3V /DGPU
C7209
1
C7210
2
1
+PLL_VDD
C7208
0.1UF/16V 09/26 Add net name /DGPU +SP_PLLVDD (Mickey)
+SP_PLLVDD
1
1
C7215
C7214
U7001O 12/19 XTAL_PLL
60 mA
AD8
AE8
45 mA
AD7
45 mA
PLLVDD SP_PLLVDD
VID_PLLVDD GF108/GKx
NC GF117
22UF/6.3V
4.7UF/6.3V
0.1UF/16V
0.1UF/16V
0.1UF/16V
2
2
2
1
/N13P-GS_N13P-GL
/N13P-GS_N13P-GL
@
/N13P-GS_N13P-GL
/N13P-GS_N13P-GL
XTALSSIN
H1 XTAL_SSIN
XTAL_OUTBUFF J4
XTAL_OUTB
1
3
H3 XTAL_IN
XTAL_OUT H2
Frank
RN7203B
N13P-GS /DGPU
RN7203A
20110613 Follow Vender and spec suggest
10KOhm /DGPU
02V0A0000011
VGA_XTALIN
1
3 VGA_XTALOUT
10KOhm /DGPU
B
B
2
10/03 Change C7214 optional from /N13P-GS_N13P-GL to @ (Follow NV FAE recommend) (Mickey)
4
C7212 8.2PF/50V
/DGPU
X7201 /DGPU
2 4
27MHZ
C7213 8.2PF/50V
/DGPU
11/14 Change C7211 from 0805 to 0603 (The height
limit for thermal module) (Mickey)
VID_PLLVDD
STUFF PDs on XTALSSIN and XTALOUTBUFF WHEN EXT_SS IS NOT USED
N13M-GS N13P-GL/N13P-GS
11/16 Change C7212,C7213 from 18pF to 8.2pF (Crystal vendor recommend) (Mickey)
VID_PLLVDD
NC
(1.05V)
A
A
Title : GPU_RGB/XTAL
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size B
Project Name P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
72 of 99
5
4
3
2
1
5 D
1
2
1
2
4
3
+IFPAB_PLLVDD R7305 10KOhm /OPT
+IFPAB_IOVDD R7306 10KOhm /OPT
LVDS
U7001J 6/19 IFPAB ALL PINS NC FOR GF117
AJ8 IFPAB_RSET
AH8 IFPAB_PLLVDD
AG8 AG9
IFPA_IOVDD IFPB_IOVDD
IFPA_TXC_N IFPA_TXC
AN6 AM6
IFPA_TXD0_N IFPA_TXD0
AN3 AP3
IFPA_TXD1_N IFPA_TXD1
AM5 AN5
IFPA_TXD2_N IFPA_TXD2
AK6 AL6
IFPA_TXD3_N IFPA_TXD3
AH6 AJ6
IFPB_TXC_N IFPB_TXC
AH9 AJ9
IFPB_TXD4_N IFPB_TXD4
AP5 AP6
IFPB_TXD5_N IFPB_TXD5
AL7 AM7
IFPB_TXD6_N IFPB_TXD6
AM8 AN8
IFPB_TXD7_N IFPB_TXD7
AL8 AK8
IFPAB
GPIO14 N4
C
N13P-GS
02V0A0000011 /DGPU
09/27 Change R7302 optional from /DGPU to /N13P-GS_N13P-GL (Mickey)
09/26 Change R7303,R7304 optional from /DGPU_ONLY to /OPT (Mickey)
09/26 Change C7307~7315,L7303,L7305 optional from /DGPU_ONLY to /DGPUO (Mickey)
HDMI
U7001K 7/19 IFPC
ALL PINS NC FOR GF117
AF8 IFPC_RSET
DVI/HDMI
DP
2
1
+IFPC_PLLVDD
R7303 10KOhm /OPT
AF7 IFPC_PLLVDD
IFPC
DIS: R7303 change to 0.1UF
I2CW _SDA I2CW _SCL
IFPC_AUX_I2CW _SDA_N IFPC_AUX_I2CW _SCL
AG2 AG3
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
IFPC_L3_N IFPC_L3
IFPC_L2_N IFPC_L2
IFPC_L1_N IFPC_L1
IFPC_L0_N IFPC_L0
AG4 AG5
AH4 AH3
AJ2 AJ3
AJ1 AK1
B
+IFPC_IOVDD AF6 IFPC_IOVDD
GPIO15 P2
2
R7304 10KOhm /OPT
N13P-GS 02V0A0000011 /DGPU
1
A 5
1
2
1
2
U7001L 8/19 IFPD
ALL PINS NC FOR GF117
AN2 IFPD_RSET
DVI/HDMI
DP
+IFPD_PLLVDD AG7 IFPD_PLLVDD
R7308 10KOhm /OPT
IFPD
I2CX_SDA I2CX_SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
IFPD_AUX_I2CX_SDA_N IFPD_AUX_I2CX_SCL
AK2 AK3
IFPD_L3_N IFPD_L3
IFPD_L2_N IFPD_L2
IFPD_L1_N IFPD_L1
IFPD_L0_N IFPD_L0
AK5 AK4
AL4 AL3
AM4 AM3
AM2 AM1
+IFPD_IOVDD AG6 IFPD_IOVDD
R7309 10KOhm /OPT
N13P-GS 02V0A0000011 /DGPU
GPIO17 M6
4
3
1
2
1
2
2
1
U7001M 9/19 IFPEF
ALL PINS NC FOR GF117
DVI-DL
DVI-SL/HDMI
DP
+IFPE_PLLVDD
AB8 IFPEF_PLLVDD
I2CY_SDA I2CY_SCL
I2CY_SDA I2CY_SCL
IFPE_AUX_I2CY_SDA_N IFPE_AUX_I2CY_SCL
AB4 AB3
TXC
TXC
AD6 IFPEF_RSET
TXC
TXC
IFPE_L3_N IFPE_L3
AC5 AC4
D
R7312 10KOhm /DGPU
IFPE
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
IFPE_L2_N IFPE_L2
AC3 AC2
IFPE_L1_N IFPE_L1
AC1 AD1
IFPE_L0_N IFPE_L0
AD3 AD2
HPD_E
HPD_E
GPIO18 R1
+IFPE_IOVDD
R7310 10KOhm /DGPU
AC7 IFPE_IOVDD AC8 IFPF_IOVDD
IFPF
TXD3 TXD3
TXD4 TXD4
TXD5 TXD5
N13P-GS 02V0A0000011 /DGPU
I2CZ_SDA I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N IFPF_AUX_I2CZ_SCL
AF2 AF3
TXC TXC
IFPF_L3_N IFPF_L3
AF1 AG1
TXD0 TXD0
IFPF_L2_N IFPF_L2
AD5 AD4
TXD1 TXD1
IFPF_L1_N IFPF_L1
AF5 AF4
C
TXD2 TXD2
IFPF_L0_N IFPF_L0
AE4 AE3
HPD_F
GPIO19 P3
10/07 Delete T7310,T7311 (For layout spacing) (Mickey)
GPIO
N13M-GS N13P-GS/N13P-GL
GPIO14
X
V
GPIO15
X
V
GPIO16
X
V
GPIO17
X
V
B
GPIO18
X
V
GPIO19
X
V
IFPA/B IFPC IFPD
IFPE/F
IFPX channel
N13M-GS N13P-GS/N13P-GL
X
V
X
V
X
V
X
V
LVDS HDMI EDP
A
Title :GPU_LVDS/HDMI/EDP
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size Project Name
C
P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
73 of
99
2
1
5
U7001P
13/19 MISC2
4
3
+3VS_VGA
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
J2 J7 J6 J5 J3
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
ROM_CS_N H6
ROM_SI ROM_SO ROM_SCLK
H5 H7 H4
ROM_SI ROM_SO ROM_SCLK
1
T7401
STRAP3/4
N13P-GL N13P-GS/N13M-GS
NC
STRAP3/4
2
2
2
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
1
1
R7410 45.3KOhm 1% /DGPU
R7412 34.8KOhm 1% @
R7414 10KOhm 1% /N13P-GL
1
1
R7417 45.3KOhm 1% @
R7418 45.3KOhm 1% @
1
2
2
2
1
2
2
2
D
BUFRST_N L2
R7402 2 /DGPU 1 10KOhm
STRAP_REFGND J1 MULTI_STRAP_REF0_GND
CEC L3
R7443 1 /N13P-GL2 10KOhm
+3VS_VGA
1
1
1
R7411 45.3KOhm 1% @
R7413 45.3KOhm 1% /N13P-GL
R7415 15KOhm 1% /N13P-GS
R7416 4.99KOhm 1% /N13P-GS_N13M-GS
R7419 45.3KOhm 1% /N13P-GS_N13M-GS
2
1
2
1
R7401 40.2KOhm 1% /DGPU
N13P-GS 02V0A0000011 /DGPU
09/27 Add R7443 (/N13P-GL) for CEC (Mickey)
CEC
N13P-GL
PU 10K (3V3)
N13P-GS/N13M-GS NC
+3VS_VGA
2
ROM_SI ROM_SO ROM_SCLK
1
R7404 5.1KOhm 1% @
1
2
R7405 10KOhm 1% /N13P-GS
R7406 4.99KOhm 1% /N13P-GS
1
2
2
2
2
R7407 30KOhm 1% /HY2G
R7408 10KOhm 1% /N13P-GL
R7409 15KOhm 1% /N13P-GL
1
1
1
+3VS_VGA
2
N13P-GS ES2/QS
DEVICE ID STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 ROM_SCLK ROM_SI
ROM_SO
0xFDB 45K PU 35K PD 15K PD 5K PD 10K PD 5K PU Hynix 128Mx16 Hynix 64Mx16 10K PU
35K PD 15K PD
R7407
N13P-GL QS
DEVICE ID STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 ROM_SCLK ROM_SI
ROM_SO
0xDE9 45K PU 45K PD 10K PU NC NC 15K PD Hynix 128Mx16 Hynix 64Mx16 10K PD
35K PD 15K PD
R7414 R7407
1
STRAP2--GPU TYPE
N13M-GS N13P-GL N13P-GS
ROM_SI--VRAM TYPE
HYNIX
SAMSUNG
D
64Mx16 128Mx16 64Mx16 128Mx16
STRAP1 R7413
N13P-GS ES2/QS 35K
N13P-GL QS 45K
ROM_SI R7407
Hynix 128Mx16 35K
Hynix 64Mx16 15K
Correct the resister value of all straps for N13P-GS ES and N13P-GL QS (Follow NV FAE recommend)
I2CB_SCL/SDA
09/26 Change RN7413 from 2.2kohm to 100kohm(R7441,R7442) (Follow NV
N13M-GS N13P-GS/N13P-GL
1
1
reference schematics) (Mickey)
C
RN7415 unmount
mount
R7441 2.2KOhm
10/03 Change R7441,R7442 from 100kohm to
R7442 2.2KOhm
2.2kohm(Follow NV FAE recommend) (Mickey)
+3VS_VGA
/DGPU
/DGPU
Q7405A
UM6K1N
2
2
U7001Q
/DGPU
11/19 MISC1
I2CS_SCL I2CS_SDA
T4 T3
SMB_CLK_VGA SMB_DAT_VGA
1
6
4
3
SMB1_CLK 28,30,49,69 SMB1_DAT 28,30,49,69
2 5
I2CC_SCL I2CC_SDA
R2 R3
RN7423B RN7423A
4 2
2.2KOhm 2.2KOhm
3 1
/N13P-GS_N13P-GL /N13P-GS_N13P-GL
+3VS_VGA
UM6K1N Q7405B
T7420
1
T7421
1
VGA_THERMDN VGA_THERMDP
K4 THERMDN K3 THERMDP
I2CB_SCL I2CB_SDA
R7 R6
RN7415B RN7415A
4 2
2.2KOhm 2.2KOhm
3 1
/N13P-GS_N13P-GL /N13P-GS_N13P-GL
+3VS_VGA +3VS_VGA
/DGPU +3VS_VGA
11/28 Change R7413 from /DGPU to /N13P-GS (Follow NV FAE recommend) (Mickey) 11/28 Change R7414 from 20kohm to 10kohm(/N13P-GL) (Follow NV FAE recommend) (Mickey) 11/28 Change R7415 from 5kohm to 15kohm(/N13P-GS) (Follow NV FAE recommend) (Mickey)
C
N13P-GT ES2/QS
DEVICE ID STRAP0 STRAP1 STRAP2 STRAP3
0xFD1 45K PU 35K PD 10K PD 5K PD
R7440 1
T7422 T7423 T7424 T7425 /DGPU 2
1 1
1 1 10KOhm
VGA_JTAG_TCK AM10
VGA_JTAG_TMS AP11
VGA_JTAG_TDI
AM11
VGA_JTAG_TDO AP12
VGA_JTAG_TRST_N AN11
JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST_N
T7426
1
+3VS_VGA
3
1
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO16 GPIO20 GPIO21
P6 M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4 R8 P4 P1
GPU_VID_4 GPU_VID_3
GPU_VID_1 GPU_VID_2
VGA_OVERTEMP#_R_GPIO8 THERM_ALERT#_GPIO9
GPU_VID_0 AC_BATT# GPU_VID_5 VGA_DPRSLPVR_GPIO16
VPS
1
R7420
VR_VID_4 87 VR_VID_3 87
Remove 2 test point
RN7422A 10KOhm /DGPU
RN7422B 10KOhm /DGPU
4
2
VR_VID_1 87 VR_VID_2 87
SL7401 1 SL7402 1
2 R0402 VGA_OVERTEMP#_R 2 R0402 THERM_ALERT#
VR_VID_0 87 R7421 1 /DGPU 2 10KOhm +3VS_VGA VR_VID_5 87 R7444 2 /DGPU 1 0Ohm VGA_DPRSLPVR
@2
+3VS_VGA
10KOhm
3D
1 G 2S
C7402 4.7UF/6.3V
@ Q7403 2N7002
P/DuGllPhUigh +3VS at system
VGA_DPRSLPVR 87
1
2
VGA_OVERTEMP# 47
+3VS_VGA
R7423 10KOhm @
2
STRAP4 ROM_SCLK ROM_SI
ROM_SO
10K PD 5K PU Hynix 128Mx16 Hynix 64Mx16 10K PU
35K PD 15K PD
R7407
1
AC_BATT#
B
Q7401B
B
3
N13P-GS 02V0A0000011 /DGPU
09/29 Add net name VGA_OVERTEMP#_R_GPIO8 and THERM_ALERT#_GPIO9 on U7001Q.M1/M2 (GPIO8/9) (Mickey) 09/29 Delete T7427, add R7444 (0ohm) and VGA_DPRSLPVR off-page on U7001Q.R8 (GPIO16) (Mickey) 10/07 Delete T7428,T7433,T7435 (For layout spacing)
+3VS_VGA
4
UM6K1N @ 5
6
Q7401A UM6K1N @ 2
AC_IN_OC 30,88
1
2
(Mickey)
C7401
4.7UF/6.3V
1
GPIO
/DGPU
N13M-GS
GPIO20
X
N13P-GS/N13P-GL X
3D
1 G 2S
THERM_ALERT#
Q7402 2N7002 /DGPU
THERM_ALERT#_EC 30
GPIO21
X
X
GPIO 8
N13P-GL
N13P-GS/N13M-GS
09/29 Change Q7401,Q7402 optional from @ to /DGPU(Mickey) 09/29 Change net name from VPS to THERM_ALERT# on Q7402.2 (Mickey) 09/29 Change net name from VPS_EC to THERM_ALERT#_EC on Q7402.3 (Mickey)
Q7403 unmount NV suggestion mount
A
A
Title : GPU_GPIO/STRAP
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size Project Name
A2
P/N
Date: Friday, February 03, 2012
VA70_N13P-GDDR3 Rev 1.0
Sheet
74 of
99
5
4
3
2
1
5
4
3
2
1
+VGA_VCORE
U7001E
09/26 Add net name +VDD33_GPU (Mickey)
09/26 Add C7506,C7508,C7509 (Follow NV reference schematics) (Mickey)
14/19 NVVDD
PLACE UNDER GPU
U7001F
09/27 Remove C7506,C7508,C7509 (Follow NV design guide) (Mickey)
D C B A
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72
AA12 AA14 AA16 AA19 AA21 AA23 AB13 AB15 AB17 AB18 AB20 AB22 AC12 AC14 AC16 AC19 AC21 AC23 M12 M14 M16 M19 M21 M23 N13 N15 N17 N18 N20 N22 P12 P14 P16 P19 P21 P23 R13 R15 R17 R18 R20 R22 T12 T14 T16 T19 T21 T23 U13 U15 U17 U18 U20 U22 V13 V15 V17 V18 V20 V22 W 12 W 14 W 16 W 19 W 21 W 23 Y13 Y15 Y17 Y18 Y20 Y22
N13P-GS 02V0A0000011 /DGPU
U7001I
17/19 GND_2/2
N19 N2
N21 N23 N28 N30 N32 N33
N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22
GND143 GND144 GND145 GND146 GND147 GND148 GND149 GND150 GND151 GND152 GND153 GND154 GND155 GND156 GND157 GND158 GND159 GND160 GND161 GND162 GND163 GND164 GND165 GND166 GND167 GND168 GND169 GND170 GND171
GND
AG11 GND34
1
2
1
1
2
1
2
1
2
1
2
1
C7511
0.1UF/16V /DGPU
2
C7510
C7513
0.1UF/16V 0.1UF/16V
2
/DGPU
/DGPU
2
C7512
C7515
0.1UF/16V 0.1UF/16V
2
/DGPU
/DGPU
2
C7514
C7517
0.1UF/16V 0.1UF/16V
2
/DGPU
/DGPU
2
C7516
0.1UF/16V /DGPU
C7518 4.7UF/6.3V /DGPU
1
C7519 4.7UF/6.3V /DGPU
1
C7520 4.7UF/6.3V /DGPU
1
C7521 4.7UF/6.3V /DGPU
1
C7522 4.7UF/6.3V /DGPU
1
GND
C7523 4.7UF/6.3V /DGPU
1
C7524 4.7UF/6.3V /DGPU
1
C7530 4.7UF/6.3V /DGPU
2
2
2
2
2
2
2
C7525 4.7UF/6.3V /DGPU
1
C7526 4.7UF/6.3V /DGPU
1
C7527 4.7UF/6.3V /DGPU
1
C7528 4.7UF/6.3V /DGPU
1
C7529 4.7UF/6.3V /DGPU
1
C7536 4.7UF/6.3V /DGPU
1
GND
C7537 4.7UF/6.3V /DGPU
1
2
1
2
18/19 NC/VDD33
AC6 AJ28
AJ4 AJ5 AL11 C15 D19 D20 D23 D26 H31
T8 V32
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC13 NC14
VDD33_1 VDD33_2 VDD33_3 VDD33_4
J8 K8 L8 M8
N13P-GS 02V0A0000011 /DGPU
1
+VDD33_GPU
1
1
1
C7507
C7501
C7504
C7505
0.1UF/16V /DGPU
2
0.1UF/16V 0.1UF/16V 0.1UF/16V
2
2
/DGPU
/DGPU
/DGPU
PLACE NEAR BALLS
1
C7502
1UF/6.3V /DGPU
1
C7503
4.7UF/6.3V /DGPU
2
PLACE NEAR BGA GND
2
+3VS_VGA R7501 2 /DGPU 1 0Ohm
2
VDD33
N13P-GS
N13P-GL/N13M-GS
3V3MISC isolation circuitry
VDD33
check with NV==>
Isolation circuitry
2
1
2
GND
1
1
1
1
1
1
1
1
+
2
CE7501 330UF/2V /DGPU 1BV080000010
2
C7531 4.7UF/6.3V /DGPU
2
C7532 4.7UF/6.3V /DGPU
2
C7533 4.7UF/6.3V /DGPU
2
C7534 4.7UF/6.3V /DGPU
2
C7535 4.7UF/6.3V /DGPU
2
C7552
22UF/6.3V /DGPU
2
C7553
47UF/4V @
PLACE NEAR GPU
GND
+1.5VS_VGA
09/29 Change C7518~C7537 from 10uF to 4.7uF (Follow NV design guide) (Mickey)
GND172 GND173 GND174 GND175 GND176 GND177 GND178 GND179 GND180 GND181 GND182 GND183 GND184 GND185 GND186 GND187 GND188 GND189 GND190 GND191 GND192 GND193 GND194 GND195 GND196 GND197 GND198 GND199 GND200
T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W 13 W 15 W 17 W 18 W 20 W 22 W 28 Y12 Y14 Y16 Y19 Y21 Y23
GND36 AH11
GND_OPT1 GND_OPT2
C16 W 32
U7001G
A2 AA17 AA18 AA20 AA22 AB12 AB14 AB16 AB19
AB2 AB21
A33 AB23 AB28 AB30 AB32
AB5 AB7 AC13 AC15 AC17 AC18 AA13 AC20 AC22 AE2 AE28 AE30 AE32 AE33 AE5 AE7 AH10 AA15 AH13 AH16 AH19 AH2 AH22 AH24 AH28 AH29 AH30 AH32 AH33 AH5 AH7 AJ7 AK10 AK7 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 AL24 AL26 AL28 AL30 AL32 AL33 AL5 AM13 AM16 AM19 AM22
16/19 GND_1/2
GND1 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND2 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND3 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND35 GND4 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64 GND65 GND66 GND67 GND68 GND69 GND70 GND71 GND72
GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND80 GND81 GND82 GND83 GND84 GND85 GND86 GND87 GND88 GND89 GND90 GND91 GND92 GND93 GND94 GND95 GND96 GND97 GND98 GND99 GND100 GND101 GND102 GND103 GND104 GND105 GND106 GND107 GND108 GND109 GND110 GND111 GND112 GND113 GND114 GND115 GND116 GND117 GND118 GND119 GND120 GND121 GND122 GND123 GND124 GND125 GND126 GND127 GND128 GND129 GND130 GND131 GND132 GND133 GND134 GND135 GND136 GND137 GND138 GND139 GND140 GND141 GND142
AM25 AN1 AN10 AN13 AN16 AN19 AN22 AN25 AN30 AN34 AN4 AN7 AP2 AP33 B1 B10 B22 B25 B28 B31 B34 B4 B7 C10 C13 C19 C22 C25 C28 C7 D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16
U7001D
15/19 FBVDDQ
Frank
20110613 Follow Vender and spec suggest
=> Add C7542, C7543, C7544, C7545 and C7556 mount
+1.5VS_VGA
Remove C7540, C7561, C7558, C7649 Change C7541, C7557 to 10uF
AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27 AG27
B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24 H8 H9 L27 M27 N27 P27 R27 T27 T30 T33 V27 W 27 W 30 W 33 Y27
FBVDDQ1 FBVDDQ2 FBVDDQ3 FBVDDQ4 FBVDDQ5 FBVDDQ6 FBVDDQ7 FBVDDQ8 FBVDDQ9 FBVDDQ10 FBVDDQ11 FBVDDQ12 FBVDDQ13 FBVDDQ14 FBVDDQ15 FBVDDQ16 FBVDDQ17 FBVDDQ18 FBVDDQ19 FBVDDQ20 FBVDDQ21 FBVDDQ22 FBVDDQ23 FBVDDQ24 FBVDDQ25 FBVDDQ26 FBVDDQ27 FBVDDQ28 FBVDDQ29 FBVDDQ30 FBVDDQ31 FBVDDQ32 FBVDDQ33 FBVDDQ34 FBVDDQ35 FBVDDQ36 FBVDDQ37 FBVDDQ38 FBVDDQ39 FBVDDQ40 FBVDDQ41 FBVDDQ42 FBVDDQ43 FBVDDQ44
FB_VDDQ_SENSE F1
FB_GND_SENSE F2
1
1
1
1
1
2
1
2
1
2
C7539
C7559
0.1UF/16V 0.1UF/16V
2
/DGPU
/DGPU
2
C7542
0.1UF/16V /DGPU
2
C7544
0.1UF/16V /DGPU
2
C7538
1UF/6.3V /DGPU
1
C7555
4.7UF/6.3V /DGPU
2
C7554
10UF/6.3V /DGPU
2
C7541
10UF/6.3V /DGPU
1
1
C7551
C7556
0.1UF/16V 0.1UF/16V
2
/DGPU
/DGPU
2
C7543
0.1UF/16V /DGPU
2
C7545
0.1UF/16V /DGPU
2
C7560
1UF/6.3V /DGPU
1
1
1
2
C7562
4.7UF/6.3V /DGPU
2
1
GND
1
C7550
10UF/6.3V /DGPU
2
C7557
10UF/6.3V /DGPU
2
1
C7563 @ 0.1UF/16V
2
1
C7564 @ 0.1UF/16V
2
1
C7565 @ 0.1UF/16V
GND
11/21 Add C7563,C7564,C7565 (0.1uF) at
+1.5VS_VGA (EMI Recommend) (Mickey)
CALIBRATION PIN FB_CALx_PD_VDDQ FB_CALx_PU_GND FB_CALx_TERM_GND
GDDR5 40 40 60
FBVDDQ_SENSE FBVDDQ_GND_SENSE
T7508 1
T7509 1
PLACE CLOSE TO GPU BALLS +1.5VS_VGA
1
FB_CAL_PD_VDDQ J27
+FB_CAL_PD_VDDQ
R7507 1 /DGPU 2 40.2Ohm 1%
FB_CAL_PU_GND H27 +FB_CAL_PU_GND
R7509 1 /DGPU 2 42.2Ohm 1%
FB_CAL_TERM_GND H25 +FB_CAL_TERM_GND
R7510
/DGPU
51.1Ohm 1%
N13P-GS 02V0A0000011 /DGPU
GND
09/28 Change R7510 from 60.4ohm to 51.1ohm (Follow NV design guide) (Mickey)
Frank 20110613 Follow Vender and spec suggest=>Remove R7509 change 42.2 ohm
D C B A
Optional CMD GNDs (2) NC for 4-Lyr cards
N13P-GS 02V0A0000011 /DGPU
GND
GND
N13P-GS 02V0A0000011 /DGPU
GND
Title : GPU_Power/GND
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size Project Name
C
P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
75 of
99
5
4
3
2
1
5
4
3
2
1
VRAM CH A
*TOP SIDE*
71 FBAD[0..63] 71 FBA_CMD[0..31] 71 FBADQM[0..7] 71 FBADQS_WP[0..7] 71 FBADQS_RN[0..7]
+1.5VS_VGA
R7601 1 /DGPU 2 1KOhm1%
C7601 0.01UF/25V /DGPU
1
1
R7602 1KOhm 1% /DGPU
2
2
place near VRAM
D
71 FBA_CLK0 71 FBA_CLK0#
R7608 2 /DGPU 1 162Ohm 1% place near VRAM
C
2
1
U7601
+FBA_VREF_CA0 M8 +FBA_VREF_DQ0 H1
VREFCA VREFDQ
FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
FBA_CMD12 FBA_CMD27 FBA_CMD26
M2 N8 M3
BA0 BA1 BA2
FBA_CMD3
J7 K7 K9
CK CK# CKE
FBA_CMD2 FBA_CMD0 FBA_CMD30 FBA_CMD15 FBA_CMD13
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# WE#
FBADQS_W P1 FBADQS_W P2
FBADQM1 FBADQM2
FBADQS_RN1 FBADQS_RN2
FBA_CMD5
F3 C7
DQSL DQSU
E7 D3
DML DMU
G3 B7
DQSL# DQSU#
T2 RESET#
L8 ZQ
R7605 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
BGA_96P_524x354_COLY /DGPU
FBAD13 FBAD14 FBAD11 FBAD9 FBAD10 FBAD12 FBAD8 FBAD15
1 OK +1.5VS_VGA
R7603 1 /DGPU 2 1KOhm1%
C7602 0.01UF/25V /DGPU
1
2
1
R7604 1KOhm 1% /DGPU
2
FBAD16 FBAD20 FBAD18 FBAD23 FBAD17 FBAD22 FBAD19 FBAD21
2 OK
2
2
C7605 0.1UF/10V 10% /DGPU
1
C7606 0.1UF/10V 10% /DGPU
1
1
2
C7607 0.1UF/10V 10% /DGPU
1
2
place near VRAM
C7608 0.1UF/10V 10% /DGPU
1
2
+1.5VS_VGA
C7609 1UF/6.3V 10% /DGPU
1
1
1
1
2
C7647 1UF/6.3V 10% /DGPU
2
C7610 1UF/6.3V 10% /DGPU
2
C7612 1UF/6.3V 10% /DGPU
2
C7613 1UF/6.3V 10% /DGPU
2
C7648 1UF/6.3V 10% /DGPU
1
place close to balls
2
1
*BOT SIDE*
09/27 Swap VRAM data signal. (Mickey)
U7602
+FBA_VREF_CA0 M8 +FBA_VREF_DQ0 H1
VREFCA VREFDQ
FBA_CMD9 FBA_CMD11
FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22
FBA_CMD7 FBA_CMD21
FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
FBA_CMD12 FBA_CMD27 FBA_CMD26
M2 N8 M3
BA0 BA1 BA2
FBA_CLK0 FBA_CLK0# FBA_CMD3
J7 K7 K9
CK CK# CKE
FBA_CMD2 FBA_CMD0 FBA_CMD30 FBA_CMD15 FBA_CMD13
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# WE#
FBADQS_W P3 FBADQS_W P0
FBADQM3 FBADQM0
FBADQS_RN3 FBADQS_RN0
FBA_CMD5
F3 C7
DQSL DQSU
E7 D3
DML DMU
G3 B7
DQSL# DQSU#
T2 RESET#
L8 ZQ
R7606 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
BGA_96P_524x354_COLY /DGPU
FBAD31 FBAD25 FBAD30 FBAD24 FBAD29 FBAD27 FBAD28 FBAD26
FBAD6 FBAD1 FBAD5 FBAD3 FBAD4 FBAD0 FBAD7 FBAD2
3 OK 0 OK
2
2
2
C7614 0.1UF/10V 10% /DGPU
1
C7615 0.1UF/10V 10% /DGPU
1
C7616 0.1UF/10V 10% /DGPU
1
1
1
2
C7623 1UF/6.3V 10% /DGPU
2
C7617 1UF/6.3V 10% /DGPU
2
C7620 1UF/6.3V 10% /DGPU
1
place close to balls
2
1
1
2
C7618 0.1UF/10V 10% /DGPU
C7621 1UF/6.3V 10% /DGPU
2
1
1
2
+1.5VS_VGA
C7619 1UF/6.3V 10% /DGPU
C7622 1UF/6.3V 10% /DGPU
M13X DDR3 Data Bits Data Bits
Mode D
[31:0]
[63:32]
CMD0
CS0#
CMD1
CMD2
ODT
D
CMD3
CKE
CMD4
A14
A14
CMD5
RST
RST
CMD6
A9
A9
CMD7
A7
A7
CMD8
A2
A2
CMD9
A0
A0
CMD10
A4
A4
CMD11
A1
A1
CMD12
BA0
BA0
CMD13
WE#
WE#
CMD14
A15
A15
CMD15
CAS#
CAS#
CMD16
CS0#
C
CMD17
CMD18
ODT
CMD19
CKE
CMD20
A13
A13
CMD21
A8
A8
*TOP SIDE*
*BOT SIDE*
CMD22
A6
A6
CMD23
A11
A11
+1.5VS_VGA
R7613 1 /DGPU 2 1KOhm1%
C7625 0.01UF/25V /DGPU
1
2
place near VRAM
2
1
R7614 1KOhm 1% /DGPU
B
71 FBA_CLK1 71 FBA_CLK1#
R7611 2 /DGPU 1 162Ohm 1% place near VRAM
A
+FBA_VREF_CA1 +FBA_VREF_DQ1
FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14
FBA_CMD12 FBA_CMD27 FBA_CMD26
FBA_CMD19
FBA_CMD18 FBA_CMD16 FBA_CMD30 FBA_CMD15 FBA_CMD13
FBADQS_W P4 FBADQS_W P5
FBADQM4 FBADQM5
FBADQS_RN4 FBADQS_RN5
FBA_CMD5
U7603
M8 H1
VREFCA VREFDQ
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
M2 N8 M3
BA0 BA1 BA2
J7 K7 K9
CK CK# CKE
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# WE#
F3 C7
DQSL DQSU
E7 D3
DML DMU
G3 B7
DQSL# DQSU#
T2 RESET#
L8 ZQ
1
R7617 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
FBAD35 FBAD37 FBAD36 FBAD34 FBAD39 FBAD32 FBAD38 FBAD33
+1.5VS_VGA
4 OK
R7615 1 /DGPU 2 1KOhm 1%
C7626 0.01UF/25V /DGPU
1
2
1
R7616 1KOhm 1% /DGPU
2
FBAD47 FBAD43 FBAD46 FBAD42 FBAD45 FBAD40 FBAD44 FBAD41
5 OK
2
2
C7627 0.1UF/10V 10% /DGPU
1
C7628 0.1UF/10V 10% /DGPU
1
1
2
C7629 0.1UF/10V 10% /DGPU
1
2
place near VRAM
C7631 0.1UF/10V 10% /DGPU
1
2
+1.5VS_VGA
C7632 1UF/6.3V 10% /DGPU
1
1
1
1
2
C7636 1UF/6.3V 10% /DGPU
2
C7630 1UF/6.3V 10% /DGPU
2
C7633 1UF/6.3V 10% /DGPU
2
C7634 1UF/6.3V 10% /DGPU
2
C7635 1UF/6.3V 10% /DGPU
1
place close to balls
+FBA_VREF_CA1 +FBA_VREF_DQ1
FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14
FBA_CMD12 FBA_CMD27 FBA_CMD26
FBA_CLK1 FBA_CLK1# FBA_CMD19
FBA_CMD18 FBA_CMD16 FBA_CMD30 FBA_CMD15 FBA_CMD13
FBADQS_W P7 FBADQS_W P6
FBADQM7 FBADQM6
FBADQS_RN7 FBADQS_RN6
FBA_CMD5
U7604
M8 H1
VREFCA VREFDQ
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
M2 N8 M3
BA0 BA1 BA2
J7 K7 K9
CK CK# CKE
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# WE#
F3 C7
DQSL DQSU
E7 D3
DML DMU
G3 B7
DQSL# DQSU#
T2 RESET#
L8 ZQ
1
R7618 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
FBAD60 FBAD56 FBAD62 FBAD59 FBAD61 FBAD57 FBAD63 FBAD58
FBAD54 FBAD49 FBAD55 FBAD51 FBAD52 FBAD50 FBAD53 FBAD48
7 OK 6 OK
2
2
2
C7637 0.1UF/10V 10% /DGPU
1
C7638 0.1UF/10V 10% /DGPU
1
C7639 0.1UF/10V 10% /DGPU
1
1
1
2
C7646 1UF/6.3V 10% /DGPU
2
C7640 1UF/6.3V 10% /DGPU
2
C7643 1UF/6.3V 10% /DGPU
1
place close to balls
2
1
1
2
C7641 0.1UF/10V 10% /DGPU
C7644 1UF/6.3V 10% /DGPU
2
1
1
2
+1.5VS_VGA
C7642 1UF/6.3V 10% /DGPU
C7645 1UF/6.3V 10% /DGPU
CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30 CMD31
A5 A3 BA2 BA1 A12 A10 RAS#
VRAM Information
VRAM Location : U7601,U7602,U7603,U7604,U7701,U7702,U7703,U7704
Vendor
Configuration
Pegatron P/N
Manufacturer P/N
Hynix
128Mx16
0315-00ND0PB
H5TQ2G63BFR-11C
Hynix
64Mx16
0315-00NF0PB
H5TQ1G63DFR-11C
Micron
128Mx16
TBD
MT41J128M16JT-107G:K
A5 A3 BA2 BA1 A12 A10 RAS#
VRAM Strap
VRAM Strap Location : R7407
0x6
35K
0x2
15K
TBD
TBD
B A
BGA_96P_524x354_COLY
BGA_96P_524x354_COLY
/DGPU
/DGPU
Micron
64Mx16
0315-00SG0PB
MT41J64M16JT-107G:G
TBD
TBD
Title : GPU_VRAM CHA
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size A2
Project Name P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
76 of
99
5
4
3
2
1
5
VRAM CH C
+1.5VS_VGA
R7701 1 /DGPU 2 1KOhm1%
C7701 0.01UF/25V /DGPU
1
2
D
place near VRAM
2
1
R7702 1KOhm1% /DGPU
71 FBC_CLK0 71 FBC_CLK0#
R7703 2 /DGPU 1 162Ohm 1%
place near VRAM N12P-GV1 162ohm N12M-GE 243ohm(1022-0101400)
C
2
1
4
*TOP SIDE*
71 FBCD[0..63] 71 FBC_CMD[0..31] 71 FBCDQM[0..7] 71 FBCDQS_WP[0..7] 71 FBCDQS_RN[0..7]
U7701
+FBC_VREF_CA0 M8 +FBC_VREF_DQ0 H1
VREFCA VREFDQ
FBC_CMD9 FBC_CMD11 FBC_CMD8 FBC_CMD25 FBC_CMD10 FBC_CMD24 FBC_CMD22 FBC_CMD7 FBC_CMD21 FBC_CMD6 FBC_CMD29 FBC_CMD23 FBC_CMD28 FBC_CMD20 FBC_CMD4 FBC_CMD14
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
FBC_CMD12 FBC_CMD27 FBC_CMD26
M2 N8 M3
BA0 BA1 BA2
FBC_CMD3
J7 K7 K9
CK CK# CKE
FBC_CMD2 FBC_CMD0 FBC_CMD30 FBC_CMD15 FBC_CMD13
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# W E#
FBCDQS_W P0 FBCDQS_W P2
F3 C7
DQSL DQSU
FBCDQM0 FBCDQM2
E7 D3
DML DMU
FBCDQS_RN0 FBCDQS_RN2
G3 B7
DQSL# DQSU#
FBC_CMD5
T2 RESET#
L8 ZQ
R7704 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
BGA_96P_524x354_COLY /DGPU
FBCD0 FBCD1 FBCD4 FBCD2 FBCD7 FBCD3 FBCD6 FBCD5
+1.5VS_VGA
0 OK
R7712 1 /DGPU 2 1KOhm1%
C7713 0.01UF/25V /DGPU
1
1
R7714 1KOhm1% /DGPU
2
2
FBCD20 FBCD22 FBCD18 FBCD23 FBCD16 FBCD17 FBCD19 FBCD21
2 OK
2
2
C7702 0.1UF/10V 10% /DGPU
1
C7703 0.1UF/10V 10% /DGPU
1
1
2
C7704 0.1UF/10V 10% /DGPU
1
2
place near VRAM
C7705 0.1UF/10V 10% /DGPU
1
2
+1.5VS_VGA
C7706 1UF/6.3V 10% /DGPU
1
1
1
1
2
C7707 1UF/6.3V 10% /DGPU
2
C7708 1UF/6.3V 10% /DGPU
2
C7709 1UF/6.3V 10% /DGPU
2
C7710 1UF/6.3V 10% /DGPU
2
C7711 1UF/6.3V 10% /DGPU
1
place close to balls
3
2
*BOT SIDE*
09/27 Swap VRAM data signal. (Mickey)
U7702
+FBC_VREF_CA0 M8 +FBC_VREF_DQ0 H1
VREFCA VREFDQ
FBC_CMD9 FBC_CMD11 FBC_CMD8 FBC_CMD25 FBC_CMD10 FBC_CMD24 FBC_CMD22 FBC_CMD7 FBC_CMD21 FBC_CMD6 FBC_CMD29 FBC_CMD23 FBC_CMD28 FBC_CMD20 FBC_CMD4 FBC_CMD14
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
FBC_CMD12 FBC_CMD27 FBC_CMD26
M2 N8 M3
BA0 BA1 BA2
FBC_CLK0 FBC_CLK0# FBC_CMD3
J7 K7 K9
CK CK# CKE
FBC_CMD2 FBC_CMD0 FBC_CMD30 FBC_CMD15 FBC_CMD13
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# W E#
FBCDQS_W P1 FBCDQS_W P3
F3 C7
DQSL DQSU
FBCDQM1 FBCDQM3
E7 D3
DML DMU
FBCDQS_RN1 FBCDQS_RN3
G3 B7
DQSL# DQSU#
FBC_CMD5
T2 RESET#
L8 ZQ
1
R7705 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
BGA_96P_524x354_COLY /DGPU
FBCD13 FBCD9 FBCD14 FBCD10 FBCD12 FBCD11 FBCD15 FBCD8
1 OK
FBCD26 FBCD29 FBCD25 FBCD31 FBCD24 FBCD28 FBCD27 FBCD30
3 OK
2
2
C7715 0.1UF/10V 10% /DGPU
1
C7716 0.1UF/10V 10% /DGPU
1
1
2
C7717 0.1UF/10V 10% /DGPU
1
2
C7718 0.1UF/10V 10% /DGPU
1
2
+1.5VS_VGA
C7719 0.1UF/10V 10% /DGPU
2
2
2
2
2
C7720 1UF/6.3V 10% /DGPU
1
C7721 1UF/6.3V 10% /DGPU
1
C7722 1UF/6.3V 10% /DGPU
1
C7723 1UF/6.3V 10% /DGPU
1
C7724 1UF/6.3V 10% /DGPU
1
place close to balls
+1.5VS_VGA B
71 FBC_CLK1 71 FBC_CLK1#
A
R7710 1 /DGPU 2 1KOhm1%
C7714 0.01UF/25V /DGPU
1
1
R7708 1KOhm1% /DGPU
2
2
place near VRAM
R7713 2 /DGPU 1 162Ohm 1% place near VRAM
5
*TOP SIDE*
U7703
+FBC_VREF_CA1 M8 +FBC_VREF_DQ1 H1
VREFCA VREFDQ
FBC_CMD9 FBC_CMD11 FBC_CMD8 FBC_CMD25 FBC_CMD10 FBC_CMD24 FBC_CMD22 FBC_CMD7 FBC_CMD21 FBC_CMD6 FBC_CMD29 FBC_CMD23 FBC_CMD28 FBC_CMD20 FBC_CMD4 FBC_CMD14
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
FBC_CMD12 FBC_CMD27 FBC_CMD26
M2 N8 M3
BA0 BA1 BA2
FBC_CMD19
J7 K7 K9
CK CK# CKE
FBC_CMD18 FBC_CMD16 FBC_CMD30 FBC_CMD15 FBC_CMD13
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# W E#
FBCDQS_W P4 FBCDQS_W P5
F3 C7
DQSL DQSU
FBCDQM4 FBCDQM5
FBCDQS_RN4 FBCDQS_RN5
E7 D3
DML DMU
G3 B7
DQSL# DQSU#
FBC_CMD5
T2 RESET#
L8 ZQ
1
R7711 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
BGA_96P_524x354_COLY /DGPU
FBCD32 FBCD34 FBCD37 FBCD33 FBCD36 FBCD35 FBCD39 FBCD38
+1.5VS_VGA
4 OK
R7706 1 /DGPU 2 1KOhm1%
C7712 0.01UF/25V /DGPU
1
2
2
R7717 1KOhm1% /DGPU
1
FBCD47 FBCD40 FBCD45 FBCD42 FBCD44 FBCD43 FBCD46 FBCD41
5 OK
2
2
C7755 0.1UF/10V 10% /DGPU
1
C7766 0.1UF/10V 10% /DGPU
1
1
2
C7767 0.1UF/10V 10% /DGPU
1
2
place near VRAM
C7768 0.1UF/10V 10% /DGPU
1
2
+1.5VS_VGA
C7769 1UF/6.3V 10% /DGPU
1
1
1
1
2
C7770 1UF/6.3V 10% /DGPU
2
C7744 1UF/6.3V 10% /DGPU
2
C7771 1UF/6.3V 10% /DGPU
2
C7772 1UF/6.3V 10% /DGPU
2
C7773 1UF/6.3V 10% /DGPU
1
place close to balls
4
2
1
*BOT SIDE*
U7704
+FBC_VREF_CA1 M8 +FBC_VREF_DQ1 H1
VREFCA VREFDQ
FBC_CMD9 FBC_CMD11 FBC_CMD8 FBC_CMD25 FBC_CMD10 FBC_CMD24 FBC_CMD22 FBC_CMD7 FBC_CMD21 FBC_CMD6 FBC_CMD29 FBC_CMD23 FBC_CMD28 FBC_CMD20 FBC_CMD4 FBC_CMD14
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC1 NC2
FBC_CMD12 FBC_CMD27 FBC_CMD26
M2 N8 M3
BA0 BA1 BA2
FBC_CLK1 FBC_CLK1# FBC_CMD19
J7 K7 K9
CK CK# CKE
FBC_CMD18 FBC_CMD16 FBC_CMD30 FBC_CMD15 FBC_CMD13
K1 L2 J3 K3 L3
ODT CS# RAS# CAS# W E#
FBCDQS_W P7 FBCDQS_W P6
F3 C7
DQSL DQSU
FBCDQM7 FBCDQM6
E7 D3
DML DMU
FBCDQS_RN7 FBCDQS_RN6
G3 B7
DQSL# DQSU#
FBC_CMD5
T2 RESET#
L8 ZQ
R7715 243Ohm 1% /DGPU
J1 L1 J9 L9
NC3 NC4 NC5 NC6
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
VDD6 VDD8 VDD1 VDD4 VDD3 VDD5 VDD2 VDD7 VDD9
N1 R1 B2 K2 G7 K8 D9 N9 R9
VDDQ1 VDDQ3 VDDQ7 VDDQ5 VDDQ8 VDDQ2 VDDQ4 VDDQ6 VDDQ9
A1 C1 F1 D2 H2 A8 C9 E9 H9
VSS3 VSS7 VSS9 VSS11 VSS5 VSS2 VSS4 VSS6 VSS1 VSS8 VSS10 VSS12
E1 M1 P1 T1 J2 B3 G8 J8 A9 M9 P9 T9
VSSQ1 VSSQ3 VSSQ8 VSSQ5 VSSQ4 VSSQ6 VSSQ2 VSSQ7 VSSQ9
B1 D1 G1 E2 D8 E8 B9 F9 G9
BGA_96P_524x354_COLY /DGPU
3
FBCD60 FBCD56 FBCD63 FBCD61 FBCD57 FBCD58 FBCD62 FBCD59
FBCD54 FBCD49 FBCD55 FBCD48 FBCD52 FBCD50 FBCD53 FBCD51
7 OK 6 OK
2
2
C7774 0.1UF/10V 10% /DGPU
1
C7775 0.1UF/10V 10% /DGPU
1
1
2
C7776 0.1UF/10V 10% /DGPU
1
2
C7777 0.1UF/10V 10% /DGPU
1
2
+1.5VS_VGA
C7778 1UF/6.3V 10% /DGPU
1
1
1
1
2
C7779 1UF/6.3V 10% /DGPU
2
C7780 1UF/6.3V 10% /DGPU
2
C7781 1UF/6.3V 10% /DGPU
2
C7782 1UF/6.3V 10% /DGPU
2
C7783 1UF/6.3V 10% /DGPU
1
place close to balls
2
1
M13X DDR3 Data Bits Data Bits
Mode D
[31:0]
[63:32]
CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14 CMD15 CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30 CMD31
CS0#
ODT CKE A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15 CAS#
A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
D
A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15
C
CAS# CS0#
ODT
CKE
A13
A8
A6
A11
A5
A3
BA2
BA1
B
A12
A10
RAS#
A
PEGATRON COMPUTER INC
Size Project Name
Custom P/N Date: Friday, February 03, 2012
1
Title : GPU_VRAM CHB
Engineer: Mickey_Yu
VA70_N13P-GDDR3 Rev 1.0
Sheet
77 of 99
5
4
3
2
1
D
D
C
C
B
B
A
A
Title :
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size Project Name
C
P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
78 of
99
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
Title : GPU_PEG*16
PEGATRON COMPUTER INC
Engineer: Mickey_Yu
Size Project Name
C
P/N
VA70_N13P-GDDR3 Rev 1.0
Date: Friday, February 03, 2012
Sheet
79 of
99
5
4
3
2
1
5
4
3
2
1
CHIEF RIVER
+5VS
AC_BAT_SYS_#
AC_BAT_SYS
5
2
RMW150N03FUB
2
C8013 1UF/25V
10% QC_@
1
SR8009 R0603
5D
6
7
Q8006
8
2
1
C8002 1000PF/50V QC_@
2
1
C8006 10UF/25V 10% QC_@
2
1
C8007 10UF/25V 10% QC_@
Icc_TDC: SV-QC 52A
Icc_Max SV-QC 94A
1
S
G
SV-DC 36A SV-DC 53A
+VGFX_CORE
10Ohm 1% 2 R8041 1
RdroopG R8042
5 6
4
3
2
1
U8001
ISL6208CRZ QC_@
QC_@
T8093 TPC28T L8003
+VCORE
VCC FCCM
7 VCCGT_SENSE
3.92KOhm 1%
2
1
R8087
1
2
2KOhm 1%
C8060
2
1
330PF/50V
Switching Frequency=300KHz ICC MAX=45A
4 3
LGATE GND1
PHASE UGATE
GND2
7 8 9
2
1
0.36UH
1
2
Irat=60A QC_@
5
5
1
PWM BOOT
JP8005 SHORT_PIN
JP8004 SHORT_PIN
11
RMW200N03FUB
RMW200N03FUB
R8043
C8030
R8044
C8031
R8045
Q8014
Q8015
R8002
1
D
1 C8028 @
2
1
2
2
1
1
2
2
1
2 1
C8012 0.22UF/25V
2
QC_@
6
7
8
6
7
8
2.2Ohm 5% @
2
2
D
+
CE8006
5D
5D
2
1
499Ohm 1% 470PF/50V
267KOhm 1% 150PF/50V 5%
174KOhm 1%
10%
470UF/2V
2
10%
R8018
QC_@
1
For IFDIM
R8088 100Ohm 1% @
330PF/50V 10%
C8029 0.01UF/25V 10%
1
2
C8033 5%
1
2
47PF/50V
1
2
2.2Ohm 5% QC_@
G
4
3
2
S
1
G
S
QC_@
4
3
2
1
C8011
1500PF/50V
10%
2
@
@
1% R8015
1
1
R8013 7.5KOhm
3
2
ESR=6mOhm/Ir=3.5A
R8040
+5VS
R8027 @ 1%
1
2
100KOhm
VGFX_PWRGD
VGFX_PWRGD 92
ISEN3
1
2
10KOhm QC_@
R8016
1% @
1
2
R8014
ISEN1
2
1
2
VSUM+
1
2
1%
20KOhm 1% @
10Ohm 1%
SR8004
3.65KOhm QC_@
1
2
ISEN2
7 VSSGT_SENSE
R0603
VSUM-
1 R8017 2
ISNG VR_FBG
PWM2G LGATEG PHASEG UGATEG BOOTG
1
R8051 DC_@ 1%
1Ohm 1% QC_@
@=UMMOUNT Schematic for Quad core use
Place Near Q8012
+5VS
R8038
1
2 470KOHM
@ 5%
2
1
R8039 3.83KOhm 1% @
1
2
R8037 27.4KOhm 1% @
VSUMG-
AC_BAT_SYS_VGFX
6 VR_SVID_CLK
6 VR_SVID_ALERT# 6 VR_SVID_DATA
SR8018
1
2
AC_BAT_SYRS0402
SR8016
SR8017 1
2
1
2
R0402
R0402
T8095
4
VR_HOT#
1 1 1
T8094 T8096
SR8003
1
2 VR_HOT#_
1
2
100KOhm
C8065
1
2
0.22UF/25V
C8066
1
2
10% 0.22UF/25V QC_@
ISEN1G ISEN2G
ISPG
For IC Question D8001
ISEN3/FB2 ISEN2 ISEN1 ISUMP ISUMN RTN FB COMP PGOOD BOOT1
41 40 39 38 37 36 35 34 33 32 31
U8000A
GND1 ISUMNG
RTNG FBG
COMPG PGOODG
PWM2G LGATE1G PHASE1G UGATE1G BOOT1G
1 2 3 4 5 6 7 8 9 10
ISUMPG ISEN1G ISEN2G NTCG SCLK ALERT# SDA VR_HOT# VR_ON NTC
ISL95836HRTZ-T
BOOT2 UGATE2 PHASE2 LGATE2
VCCP VDD
PWM3 LGATE1 PHASE1 UGATE1
30 29 28 27 26 25 24 23 22 21
BOOT2 UGATE2 PHASE2 LGATE2
LGATE1 PHASE1 UGATE1
11 12 13 14 15 16 17 18 19 20
2
1
R8021
2
1
0Ohm DC_@
2
+5VS
SR8001 R0603
1
1
2
R8080
1Ohm 1%
C8038
1UF/6.3V
10%
2
C8014 1UF/6.3V
10%
1
UGATE2 PHASE2
C8015
R8022
G
4
5
3
5D
2
S
6
1
7
Q8003
8
RMW150N03FUB
2
1
2
C8005 1000PF/50V
1
C8003 10UF/25V 10%
2
1
C8004 10UF/25V 10%
2
1
AC_BAT_SYS_#
2
+ CE8000 100UF/25V
1
C8034 0.1UF/25V
2
1
C8035 0.1UF/25V
@
T8092 TPC28T L8002
0.36UH
1
2
1
Irat=60A DCR=1.3mohm
2
5
5
2
3
2
3
JP8001 SHORT_PIN
JP8000 SHORT_PIN
11
RMW200N03FUB
RMW200N03FUB
5
6
7
Q8011
8
2
1
C8027 1000PF/50V
2
1
C8018 10UF/25V 10%
2
1
C8019 10UF/25V 10%
2
1
C8036 0.1UF/25V
@
+1.05VS
VR HOT
1
R0402
1
2
C8056 1UF/6.3V
10% @
R8054 62Ohm 5% @
93 CPU_VRON_PWR
2
1VGFX_PWRGD
1.2V/0.1A @
BOOT1
COMP VR_FB
VRM_PWRGD 30,92
BOOT21
21
2
0.22UF/25V 10%
2.2Ohm 5%
5D
6
7
8
Q8005 @
5D
6
7
Q8004
8
R8001 2.2Ohm 5% @
S
S
2
2
1
1
+
CE8004
+
CE8007
470UF/2V
470UF/2V
ESR=6mOhm/Ir=3.5A
ESR=6mOhm/Ir=3.5A
2
RMW150N03FUB
5D
G
G
S
30 CPU_VRON
SR8002
1
2
C8054 0.047UF/16V
10% @
1
2
COMP
10PF/50V
C8044 5%
1
2
R8082
C8047
2
11
2
47PF/50V C8045 5%
1
2
4
3
2
1
4
3
2
1
2
C8010 1500PF/50V 10% @
R8005
1
1
R8003 7.5KOhm
G
1
2
3
4
UGATEG
T8090 TPC28T
L8004 0.36UH
+VGFX_CORE
R0402
DC_@
499Ohm 1% 470PF/50V 10% 1%
T8099 1
LGATE2
ISEN2
1
2
10KOhm 1%
1% @
1
2
ISEN1
ISEN3
PHASEG
C8021 C
BOOTG
1
21
2
5
Q8012
7
6
5D
0.22UF/25V 2.2Ohm 5%
10%
R8030
8
5
5D
6
7
8
Q8013 @
R8024 2.2Ohm @ 5%
2
2
1
Irat=60A
1
2
2
1
+
CE8012
R8056 27.4KOhm 1% @
2
1
2
Place Near Q8001 R8057 470KOHM 5% @
VSUM-
C8048
0.22UF/25V
1
2
QC_@
C8050 0.22UF/25V
1
2
10%
ISEN2
Rdroop 1%
2
1
R8085 3.74KOHM
R8077 10Ohm 1%
R8078
C8046 5%
267KOhm 150PF/50V
2
1
1
2
1% R8076 1
2KOhm
C8059
22
1
680PF/50V
+5VS R8049
1
2
1
TPC28T
R8048 5.6KOHM
Vboot=0V ICC MAX=94A
T8012
R8006
R8004
VSUM+
1
2
20KOhm
3.65KOhm 1%
1% @
1
2
ISEN3
R8007
C
VSUM-
1
2
1Ohm 1%
11
ISEN1
JP8007 SHORT_PIN
JP8006 SHORT_PIN
11
RMW200N03FUB
RMW200N03FUB
LGATEG
G
4
3
2
S
1
G
4
3
2
S
1
T8008 TPC28T
2
C8017 @ 1500PF/50V 10%
ISEN1G
R8025
1
2
10KOhm 1%
1
1
470UF/2V ESR=6mOhm/Ir=3.5A
2
3
Icc_TDC:
Icc_MAX:
2
R8055 3.83KOhm 1% @
C8049 0.22UF/25V
10%1
2
1
R8052 0Ohm
@
1
C8053 10%
2
1
330PF/50V @
C8051 10%
2
+VCORE
VCCSENSE 6
2
R8089 100Ohm 1% @
For IFDIM
100KOhm 1%
2
T8011 TPC28T
1 3 D Q8016 TPC28T
1
1
G 2N7002
2
S
For ATS Vboot=1.1 Short T80131 To Ground
T8098 1
TPC28T
5
5D
S
6
7
Q8000
8
2
1
1
C8000
C8008
10UF/25V
1000PF/50V 10%
2
2
1
2
2
C8001 10UF/25V 10%
1
AC_BAT_SYS_#
1
+ CE8002 100UF/25V
+ CE8001 100UF/25V
RMW150N03FUB
1
2
G
ISPG
VSUMG+
R8019
1
2
QC 38A
QC 46A
1
C8055
2
R8031 2.61KOhm
3.65KOhm 1%
SV-DC 21.5A SV-DC 33A
+5VS
1
2
0.01UF/25V
R8079 10Ohm
VSSSENSE 6
UGATE1
4
3
2
1
T8091
TPC28T L8001 0.36UH
2
1
1
1
0.068UF/10V
C8023
R8033
1%
1
2
T8017
PHASE1
1
2
2
JP8003 SHORT_PIN
JP8002 SHORT_PIN
11
RMW200N03FUB
RMW200N03FUB
ISNG
0.22UF/25V 10%
1
set OCP>51A
10%
R8034 RiG
1
2
2
2
C8022 0.1UF/25V DC_@
11KOhm 1%
1
1
21
R8032 10KOhm 3%
Place Near L8004(
B Value)
VSUMG-
R8026
1
2
S
C8040 0.22UF/25V 10%
1
1
C8061 0.1UF/25V 10% QC_@
2
1
2
1
TPC28T
VSUM+
2
R8072 11KOhm
R8073 2.61KOhm
1%
BOOT1
C8016
R8023
1
21
2
0.22UF/25V 10%
2.2Ohm 5%
5
5D
6
7
Q8001
8
5
5D
6
7
Q8002
8
2
R8000 @ 2.2Ohm 5%
2
Irat=60A
2
1
+
CE8008
470UF/2V
ESR=6mOhm/Ir=3.5A
S
21
1
G
G
C8041
C8009 @
2
3
1
1
2
2
422Ohm 1%
C8025 @
2
1
3300PF/25V 10%
R8035 @
1
2
620Ohm 1%
649 ohm
T8010 TPC28T
1
2
C8024 0.1UF/25V 10%
ISEN2G
1Ohm 1%
R8036 10KOhm
1
2
1% @
AC_BAT_SYS_VGFX
Ri
R8084
620Ohm
2
1
set OCP>103A
C8039 2200PF/50V 10% @
0.068UF/10V 10%
R8083 620Ohm 1% @
1
1
1%
T8009 TPC28T
2
1
1
R8075 10KOhm Place Near L8001 3%
VSUM-
C8042 0.1UF/25V
10%
LGATE1
4
3
2
1
4
3
2
1
1500PF/50V
R8010
10%
10KOhm 1%
2
@
ISEN1
1
2
VSUM+
R8011
1
2
3.65KOhm 1%
VSUM-
R8012
1
2
R8008
20KOhm
1% @
1
2
R8009
20KOhm 1% @
1
2
ISEN2 ISEN3
1
+5VS
SR8015 R0603
5
5D
6
7
Q8017
8
2
1
C8032 1000PF/50V QC_@
2
1
C8062 10UF/25V 10% QC_@
2
1
C8020 10UF/25V 10% QC_@
2
1
2
1
649 ohm
1Ohm 1%
T8000 T8001 T8002 T8003 T8004 T8005 T8006 T8007 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
RMW150N03FUB QC_@
2
S
G
2
PWM2G
1
C8064
1UF/25V
10%
B
QC_@
1
5 6
U8002 ISL6208CRZ
QC_@
VCC FCCM
4 3
LGATE GND1
PHASE UGATE
GND2
7 8 9
PWM BOOT
2 1
SR8014 R0603
2
C8063
1
2
0.22UF/25V 10% QC_@
R8047
1
2
2.2Ohm 5% QC_@
G
4
5
4
3
3
5D
2
1
RMW200N03FUB
RMW200N03FUB
6
7
Q8018
8
6
7
8
Q8019 @
5D
S
S
G
1
2
3
4
1
2
QC_@
5
2
11
2
R8028 2.2Ohm @ 5%
C8026 @ 1500PF/50V 10%
2
1
T8097 TPC28T
1
L8005 0.36UH QC_@ Irat=60A
2
JP8008 SHORT_PIN
1
ISEN2G VSUMG+ VSUMGISEN1G
R8050 QC_@
1
2
10KOhm 1%
R8020 QC_@
1
2
3.65KOhm 1%
R8029 QC_@
1
2
1Ohm
1%
1
2
R8046 10KOhm 1% @
1
2
JP8009 SHORT_PIN
3
2
1
+VGFX_CORE
+
CE8010
470UF/2V
ESR=6mOhm/Ir=3.5A
QC_@
For Common BOM, Remove @
For Quad Core(GT2):
1.Remove DC_@ (R8021,R8051,C8055,C8022,C8044)
For UMA SKU
For Dual Core: 1.Remove QC_@, Add (R8021,R8051,C8055,C8022,C8044)
Remove @ and
2.Change R8084 to 499ohm(10V220000076 ),(OCP>60A)
3.Change R8085 to 2.37Kohm,(10V220000044),Load line=1.86 4.Change R8034 to 499ohm,(10V220000076),OCP>37A 5.Change R8042 to 3Kohm(10V220000232),Load line=3.9
For DSC SKU Remove @
6.Change R8048 to 20Kohm(10V220000036),ICC MAX=53A
7.Change R8045 to 154Kohm(10V220000259),ICC MAX=33A,Switching Freq.=300KHz
8.Change C8023 to 0.1uf/25v(1AV300000007)
DSC_@
1
1
1
1
1
1
1
1
+VCORE
T8064 T8042 T8043 T8044 T8045 T8046 T8048 T8050
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
B
1
1
1
1
1
1
1
1
+VGFX_CORE
1
1
1
1
T8078 T8067 T8068 T8069 T8070 T8071 T8072 T8073 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8089 T8080 T8081 T8082 T8083 T8084 T8085 T8086 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
1
1
1
1
1
1
1
1
1
1
1
1
U8000B
42 43 44 45
GND2 GND3 GND4 GND5
GND9 GND8 GND7 GND6
49 48 47 46
ISL95836HRTZ-T 06V070000025
A
A
<Variant Name>
Title : POWER_VCORE
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.1
Date: Friday, February 03, 2012
Sheet
80 of 94
5
4
3
2
1
5
4
3
2
1
+5VO & +3VO POWER SUPPLY
U8102 @ AC_BAT_SYS
R8102
TLV70450DBVR
0Ohm @
D
4 5
NC1 NC2
OUT IN
GND
3 2 1
1
C8102
1
1
2
C8109
vx_r0603_h28_small
+5VA
D
1UF/25V
1UF/10V
T8125
vx_c0603_small
vx_c0603_small
R8103
TPC26T
2
2
10% @
MLCC/+/-10%
@
+5VA
0Ohm
1
2
LDO5
AC_BAT_SYS
Input current=1.8A
AC_BAT_SYS
11
AC_BAT_SYS
2
1
C8119 10UF/25V vx_c1206_h75 10%
1AV600000003
Input current=4.1A
1
C8107 @ 10UF/25V vx_c1206_h75 10%
1AV600000003
2
1
C8104 @ 0.1UF/25V vx_c0402_small 10%
2
(0.0294A) vx_r0603_h28_small
2
C8100 1UF/6.3V vx_c0402_small 10%
1AV200000038
2
1
C8106 1UF/25V vx_c0603_small 10%
2
1
C8108 10UF/25V vx_c1206_h75 10%
1AV600000003
2
1
C8103 @ 0.1UF/25V vx_c0402_small 10%
5
8 7 6 D5 5
5V_LG
3V_LG
8
7
6
5D
U8100A
15 14 13 12 11
C8105
TPS51225CRUKR
Q8100
0.1UF/25V
S
Q8102
DRVL1 VO1
VREG5 VIN
DRVL2
1 2 3S 4
G
G
FDMC8884
vx_c0603_small
FDMC8884
+5VO
+5VO= 6.3319A
1
1
C8121 @ 0.1UF/25V
+ CE8100
220UF/6.3V
L8100
3.3UH
Irat=6.6A
1
2
11
T8133 TPC26T
R8104 @ 2.2Ohm vx_r0603_h28_small
10%
2
5V_HG
SR8100
15V_BOOT1_11
2
5V_DX
Enable1
16 5V_BOO1T71
18 VCLK 19
20 21
DRVH1 VBST1 SW 1 VCLK EN1 GND
DRVH2 VBST2
SW 2 PGOOD
EN2
10 9 8 7 6
3V_BOOT21
2
SR8101
3V_HG 3V_BOOT2_22 1 3V_DX
C8110 0.1UF/25V vx_c0603_small
5
4
3
2
1
11
T8100 TPC26T
1
L8101 3.3UH Irat=6.6A
2
R8107 2.2Ohm
+3VO
+3VO=4.2775A
1
+ CE8101
1
C8113
CS1 VFB1 VREG3 VFB2 CS2
8 7 6 D5 5
1
1
1 3V_RC2
1 5V_RC2
2
vx_c0402_small 10%
2
5%
GND2 GND1
23 22
10%
5D
6
7
8
vx_r0603_h28_small 5%
2
2
220UF/6.3V
2
0.1UF/25V vx_c0402_small 10%
1 2 3S 4
G
C
JP8100
JP8104
Q8101
JP8106
C
1 2 3 4 5
SHORT_PIN
SHORT_PIN
FDMC8884 C8111 @
U8100B TPS51225CRUKR
SUS_PWRGD 30,92
G
S
Q8103 FDMC8884
SHORT_PIN
2
2
1500PF/50V
C8116
1
2
3
4
1 1
vx_c0603_small
Enable2
1500PF/50V
1
2
10%
R8100
R8101
vx_c0603_small
2
+5VO TDC Frequency
:6.3319A :300KHz
RDSON=30mOHM
127KOhm vx_r0402_small 1%
10V220000113
2 2
127KOhm vx_r0402_small 1%
10V220000113
RDSON=30mOHM
PWR Cap.
:100uF
5V_FB1_1
1
2 FB1
FB2
2
1
3V_FB2_2
Total Cap. ESR
:100uF :45mOHM
R8108
15KOhm
vx_r0402_small
1%
1
2
C8118
39PF/50V
1
2
vx_c0402_small
@ 10%
C8123
0.1UF/25V
vx_c0402_small
10% @
2
2
R8106 10KOhm vx_r0402_small 1%
10V220000003
1
1
R8105 10KOhm vx_r0402_small 1%
10V220000003
R8111
6.65KOHM
vx_r0402_small
1%
1
2
C8124 39PF/50V vx_c0402_small @ 10%
1
2
C8125 0.1UF/25V vx_c0402_small 10% @
+3VO TDC Frequency PWR Cap. Total Cap. ESR
:4.2775A :350KHz :100uF :100uF :45mOHM
(0.077A)+3VA
JP8101 1MM_OPEN_M1M2
2 21 1
1
T8123 TPC26T
+RTC_POW ER
1
C8101
1UF/6.3V
vx_c0402_small
2
B
10%
B
2
R8137
0Ohm
vx_r0603_h28_small
nonIOAC_@
1
2
Enable1
AC_BAT_SYS
R8130 86.6KOhm vx_r0402_small 1% IOAC_@
2
+3VO
Q8108 SSM3K315T IOAC_@
21
R8131 510KOhm vx_r0402_small 1% IOAC_@
1
R8135
100KOhm
IOAC_@
+5VA 1
2
2
1
6
Q8106A UM6K1N IOAC_@
3
FORCE_OFF#
A 30,63,91,93 VSUS_ON
R8136 560KOhm vx_r0402_small 5%
1
2
1
D8108 @ 1.2V/0.1A
R8126 1KOhm vx_r0402_small 5%
2
1
5
VSUS_ON_EN C8130 @ 0.1UF/25V vx_c0402_small 10%
4
Q8106B UM6K1N IOAC_@
3D 1
G 2S
21
+3VSUS (0.7845A)
47,92 FORCE_OFF# 30 USBCHG_EN VSUS_ON_EN
D8109
1.2V/0.1A
2
1
D8104
1.2V/0.1A
1
2
@
D8103
1.2V/0.1A
1
2
1
2
SR8102 @ nb_r0402_short_5mil_small
1
1
2
1
C8126 0.1UF/25V vx_c0402_small 10% IOAC_@
C8129 1000PF/50V vx_c0402_small 10% IOAC_@
C8122 @ 0.1UF/25V vx_c0402_small 10%
R8113 560KOhm vx_r0402_small 5%
2
2
30,55 IOAC_EN
FORCE_OFF#
D8107
1.2V/0.1A
2
1
D8106
1.2V/0.1A
1
2
D8105
1.2V/0.1A
VSUS_ON_EN 1
2
IOAC_@
1
1
2
Enable2
SR8103 @ nb_r0402_short_5mil_small
VCLK
1
+5VO_1_1 3
D8100 1V/0.2A
1
2
21
T8124 TPC26T
C8117 0.1UF/25V vx_c0402_small 10%
1
2
20mil
C8115 0.1UF/25V vx_c0402_small 10%
1 +5VO_2_2 3
2
D8101 1V/0.2A
@ R8114 1
2 0Ohm
VSUS_ON_EN
R8112 560KOhm vx_r0402_small 5%
2
5
4
3
1
T8132 TPC26T
+5VO
+5VO
T8122 T8135 T8137 TPC26T TPC26T TPC26T
T8105 T8106 T8107 TPC26T TPC26T TPC26T
T8113 T8114 T8115 TPC26T TPC26T TPC26T
+3VSUS
1
1
1
1
1
1
1
1
1
11
20mil T8101 TPC26T
+10VO
20mil
2
1
C8120 @ 0.1UF/25V vx_c0402_small 10%
1
+5VA
T8131 T8140 T8141 TPC26T TPC26T TPC26T
1
1
2
T8121 T8143 T8144 TPC26T TPC26T TPC26T
+3VA
1
1
1
C8114 0.1UF/25V vx_c0402_small 10%
11
T8104 TPC26T JP8103
1MM_OPEN_M1M2 +12VO 1 1 2 2
C8112 0.1UF/25V vx_c0402_small 10%
1
1
T8102 T8103 T8142 TPC26T TPC26T TPC26T
11.47V-14.37V
1
+12VSUS
2
1
1
1
1
T8117 T8118 T8119 TPC26T TPC26T TPC26T
T8130 T8127 T8128 TPC26T TPC26T TPC26T
1
1
1
1
+3VO
T8138 T8139 T8126 TPC26T TPC26T TPC26T
1
A
<Variant Name>
Title : POWER_SYSTEM
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
81 of
99
2
1
5 D
C 83,84,85,91,93 SUSB#_PWR
B
A 5
4
3
2
1
D
TRIP V (mV) = TRIP R (k) * TRIP I (mA)
TRIPI current, which is 10uA
VOCP = TRIP V / 8 / Rdson + I ripple / 2
Used for testing purpose in production line. Pull down to GND with a resistor of 470 k or less
D8204
1.2V/0.1A
2
1
R8223
1
2
10KOhm 1%
U8200B
TPS51211DSCR
12 13
GND1 GND2
GND4 GND3
15 14
+5VSUS
1
256
1
256
1
SR8203 R0402
D 3G
D 3G
92
+1.05VS_PW RGD
1
2
T8728 TPC28T
2
S
S
U8200A
C8235 10%
7
4
7
4
TPS51211DSCR
SR8207 0.1UF/25V
Q8207 @
Q8205
1
1.05V_EN
1 2 3 4 5
PGOOD TRIP EN VFB TST
GND VBST DRVH
SW V5IN DRVL
11 10 9 8 7 6
R0603 1.05V_BS1T 1.05V_DH 1.05V_LX
(0603) X7R 10%
2
1
1.05V_DL
IRFHS8342TRPBF
IRFHS8342TRPBF
1
1
2
R8236 180KOHM
F=290KHz R8237 470KOhm
5%
5%
1
10V240000046
1
C8233 1UF/6.3V 10%
2
256 D 3G
S
256 D 3G
S
18OKohm,OCP MIN.12.08
4
7
Q8209 IRFHS8342TRPBF Rdson=25mOhm
Q8206 IRFHS8342TRPBF
4
7
1
C8217
0.1UF/25V
FB=0.704V 0.7075~0.7005V
2
R8204
1
2
1.05V_FB
R8231
1
2
5.11KOhm 1%
10Ohm
@
1%
2
11
2
1
Input Current:1.126A AC_BAT_SYS
MAX:20.372A TDC:11.824A
2
C8234 1000PF/50V
10%
1
C8223 10UF/25V 10%
2
1
C8225 10UF/25V
10%
OCP:15.139A
+1.05VO
C
JP8211 2MM_OPEN_5MIL
(Max:5A)
1
2
T8234 TPC28T
1
L8202 1UH
2
DCR=10mohm Irat=22A
1 12 2
@ JP8208 2MM_OPEN_5MIL
1 12 2 @
+1.05VS (Max:6.824A)
R8226
2.2Ohm +
1
2
1
C8232 10UF/6.3V
20%
10UF/6.3V
C8219
CE8203 560UF/2.5V ESR=20mOhm/Ir=3370mA
2
2
1
C8231 1500PF/50V
JP8209 SHORT_PIN
2
JP8210 1 12 2
3mm_open_5mil_m1m2
1
JP8212 1 12 2
+VCCP
3mm_open_5mil_m1m2
(Max:8.548A)
B
C8236 0.1UF/25V 1AV200000045
1
1.05V_FB1
2
2
1
C8227 39PF/50V 5% @
R8220 10KOhm 1%
1
2
C8230 0.1UF/25V 10% @
R8230
1
2
0Ohm @
R8229 @
100Ohm
1
2
VCCP_SENSE 6 VSSP_SENSE 6
2
1
2
R8242 0Ohm
R8233
2
1
10Ohm @
1
T8201 T8202 T8203 T8204 TPC28TTPC28TTPC28TTPC28T
T8205 T8206 T8207 T8208 TPC28TTPC28TTPC28TTPC28T
T8224 T8223 T8218 T8217 TPC28TTPC28TTPC28TTPC28T
+1.05VS
+1.05VO
+VCCP
A
1
1
1
1
1
1
1
1
1
1
1
1
T8209 T8210 T8211 T8212 TPC28TTPC28TTPC28TTPC28T
T8213 T8214 T8215 T8216 TPC28TTPC28TTPC28TTPC28T
T8219 T8222 T8221 T8220 TPC28TTPC28TTPC28TTPC28T
1
1
1
1
1
1
1
1
1
1
1
1
<Variant Name>
GND
GND
GND
Title : POWER_VCCP
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.1
Date: Friday, February 03, 2012
Sheet
82 of
94
4
3
2
1
5
4
3
2
1
DDR & VTT POWER SUPPLY
D
+0.75VO
JP8301 @ 1MM_OPEN_M1M2
JP8303
1
2
SHORT_PIN
T8304 TPC28T
92 DDR_PWRGD
DDR_VTTSNS
+1.5V
1
DDR_MODE DDR_TRIP S3 S5
R8303
68KOhm 1%
1
2
R8304 187KOMH
186Kohm SR8300
1%
1
2
1
2
R0402
1
GND_TPS51216
2
C8309 1UF/6.3V vx_c0402_small 10%
+5VSUS
1
Q8300 IRFHS8342TRPBF Rdson=25mOhm 256
D
3G
Max:1A TDC:0.7A AC_BAT_SYS
1
1
1
1
C8316
C8311 @
1000PF/50V 0.1UF/25V
vx_c0402_small vx_c0402_small
2
2
10%
10%
Q8301 @
IRFHS8342TRPBF 256
2
C8312 10UF/25V vx_c1206_h75 10%
2
C8313 10UF/25V vx_c1206_h75 10%
1
D 3G
JP8305
D
Max:23.667A TDC:13A OCP:16.82A
+1.5VO (Max:13.667A)
21 20 19 18 17 16
GND2 PGOOD
MODE TRIP S3 S5
+0.75VS (Max:1.05A)
2 21 1
1
1
C8301
C8302 @
C8303 @
1
1
C8300 @ 10UF/6.3V vx_c0603_small
GND_TPS51216
C8310
S
SR8301
0.1UF/25V
R0603
vx_c0603_small
4
7
S
7
4
T8307
L8300 1UH
1 12 2 3mm_open_5mil_m1m2
2
VREF GND1 REFIN VDDQSNS PGND
C
2
10UF/6.3V vx_c0603_small
20%
2
10UF/6.3V vx_c0603_small 20%
2
0.1UF/25V vx_c0402_small 10%
18
M_VREF
1
20% C8304
1 2 3 4 5
VTTSNS VLDOIN VTT VTTGND VTTREF
VBST DRVH
SW V5IN DRVL
15 14 13 12 11
DDR_VBST DDR_DRVH DDR_SW DDR_V51N DDR_DRVL
1
21
2
1
Q8302 IRFHS8342TRPBF 256
1
Q8303 IRFHS8342TRPBF 256
11
TPC28T
Irat=18A
CYNTEC/PCMC104T-1R0MN
1
2
R8302
JP8300
1 12 2
+1.5V
3mm_open_5mil_m1m2
C
JP8304
(Max:10A)
SHORT_PIN
2
1
D8300 1.2V/0.1A vx_sod323_h37
GND_TPS51216
2
0.22UF/25V vx_c0603_small 10%
DDR_REF
Close Pin 6
6 7 8 9 10
U8300A TPS51216RUKR F=300KHz
D 3G
S
4
7
D 3G
S
4
7
12
2.2Ohm vx_r0603_h28_small 5%
C8307 1500PF/50V vx_c0603_small
1
2
1
+
CE8301 330UF/2.5V vx_c7343d_h79 1BV080000015
2
1
1 12 2
3mm_open_5mil_m1m2
C8308 1UF/6.3V vx_c0402_small 10%
JP8302
2
2
DDR_REFIN VDDQSNS
1
82,84,85,91,93 SUSB#_PWR
1
2
1
2
S3
C8305
10%
1
2
SR8302
R8305 39KOhm
R8300
0.1UF/25V vx_c0402_small
1
VDDQSNS
91,93 SUSC#_PWR
1
2
R8307 0Ohm vx_r0402_small @
vx_r0402_small 1%
2
C8314 0.1UF/25V vx_c0402_small 10%
10KOhm 1%
2
10% GND_TPS51216
SR8303
R0603
1
2
U8300B TPS51216RUKR 22 GND3
2
1
1
23 GND4
R8301
1
B
D8301
@
56.2KOHM
C8306
GND_TPS51216
B
1.2V/0.1A
1%
0.01UF/25V
vx_sod323_h37
1
2
S5
2
2
vx_c0402_small 10%
R8306 10KOhm vx_r0402_small 1%
2
1
C8315 0.1UF/25V vx_c0402_small 10%
GND_TPS51216
1
T8317 T8316 T8312 TPC28T TPC28T TPC28T
+1.5VO
1
1
T8308 T8310 T8305 TPC28T TPC28T TPC28T
1
1
1
A
EN/DEM
Function
T8314 T8313 T8309 TPC28T TPC28T TPC28T
1
1
1
VDD GND
Diode-emulation CCM
+1.5V
T8301 T8303 TPC28T TPC28T
T8315 T8311 T8306 TPC28T TPC28T TPC28T
1
1
1
1
1
+0.75VS
5
4
3
A <Variant Name>
Title : POWER_DDR & VTT
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
83 of
94
2
1
5
4
3
2
1
D
D
D8400
@ 1.2V/0.1A
2
1
1.8VS POWER SUPPLY
82,83,85,91,93 SUSB#_PWR
2
1
SR8400 R0402
2
C8400 @ 0.1UF/25V 10%
+5VSUS
(Input current:0.79A)
1 12 2
1
+1.8VO (Max:1.45A)
C
JP8402 1MM_OPEN_M1M2 @
U8400
C
+1.8VS
JP8400 1 12 2
1MM_OPEN_M1M2 @
(OCP=1.8A)
L8400
1UH
1
2
Irat=3.2A
1
2
+1.8VS_EN +1.8VS_LX
1 2 3
EN GND LX
FB PG IN
6 5 4
SY8065ABC
+1.8VS_FB +1.8VS_PWRGD
R8400 R1 1%
267KOhm
1
2
1
C8403 10UF/6.3V
+1.8VS_PWRGD 92
2
1
C8401 22UF/6.3V
20%
2
JP8401 SHORT_PIN
Frequency:1.5MHz
Vout=0.6(1+(R1/R2))
1
2
C8402 5% 39PF/50V
R2
1
20%
R8401 133KOhm
1%
2
B
B
T8400
T8401
T8402 T8403
1
1
1 1
+1.8VO
A
<Variant Name>
A
Title : POWER_1.8VS
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
84 of 94
5
4
3
2
1
5
4
3
VCCSA POWER SUPPLY
D 82,83,84,91,93 SUSB#_PWR
7 VCCSA_SEL0 7 VCCSA_SEL1 92 +VCCSA_PWRGD
2
1
D8500 @ 1.2V/0.1A
1
2
R8505 39KOhm
1%
R8504
470KOhm
@
1
2
2
1
VCCSA_EN
C8516 0.1UF/25V
10%
SP8504 2 SP8503 2
1 R0402 1 R0402
+5VSUS
SP8502
2
1
R0402
1
1
C8512 1UF/6.3V 10%
2
2
C8511 2.2UF/6.3V
10%
18 17 16 15 14 13
VCCSA_V5D VCCSA_V5F VCCSA_PWRGD +VCCSA_SEL1 +VCCSA_SEL0 VCCSA_EN
SR8501
R0603
1
2
C8510 0.1UF/25V
1
2
VCCSA_BST
V5DRV V5FILT PGOOD
VID1 VID0
EN
C
+3VSUS
1
JP8504 2MM_OPEN_5MIL
1 12 2
2
C8513 10UF/6.3V
2
C8514 10UF/6.3V
20%
2
C8515 @ 0.1UF/25V
10%
1
1
19 20 21 22 23 24 25
PGND1 PGND2 PGND3 VIN1 VIN2 VIN3 GND1
BST SW 5 SW 4 SW 3 SW 2 SW 1
12 11 10 9 8 7
VCCSA_SW
Iput current:1.64A)
GND VREF COMP SLEW VOUT MODE
1 2 VCCSA_COMP 3 VCCSA_SLEW 4 5 VCCSA_VOUT 6
U8500A TPS51461RGER
+VCCSA_SEL0 +VCCSA_SEL1
VCCSA
L
L
0.9V
L
H
0.8V
B
H
H
L
0.725V
H
0.675V
JP8502
SHORT_PIN
2
1
JP8503
SHORT_PIN
2
1
SGND_VCCSA
U8500B
29 28 27 26
GND4 GND3 GND2 GND1
TPS51461RGER 06V070000016
C8502 0.22UF/25V
10%
1
2 VCCSA_REF
C8501 3300PF/25V
10%
1
2
1
2
1
2
F=1MHz R8502
0Ohm @
VCCSA_MO1DE
2
SGND_VCCSA
C8503 0.01UF/25V 10%
SGND_VCCSA
R8501 5.1KOhm
1%
SGND_VCCSA
2
12
1
L8500 0.47UH Irat=17.5A
CYNTEC/PCMC063T-R47MN
1
2
R8503 @ 2.2Ohm
5%
2
C8505 22UF/6.3V 20%
1
C8504 @ 1500PF/50V
10%
T8509 T8508 T8504 TPC28T TPC28T TPC28T
1
1
1
+VCCSA
1
2
1
1
1 1
2
T8507 T8505 T8503 TPC28TTPC28TTPC28T
1
1
2
2
C8506 22UF/6.3V
@
C8507 22UF/6.3V
C8508 22UF/6.3V
20%
1
1
T8510 T8506 T8502 TPC28T TPC28T TPC28T
1
2
1 D
JP8501 1 12 2
3MM_OPEN_5MIL @ JP8500
1 12 2
3MM_OPEN_5MIL @
R8506 100Ohm
1%
R8500
2
1
1Ohm 1%
+VCCSA
C
(Max:6A)
VCCSA_SENSE 7 B
<Variant Name>
A
A
Title : POWER_VCCSA
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
85 of
94
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
<Variant Name>
Title : POWER_
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
86 of
94
5
4
3
2
1
5
4
3
2
1
VGA_CORE POWER SUPPLY
+3VS_VGA
VID Set 0.9V
R8790
VGA_DPRSLPVR
2
1
T8708
1
R8761 2
1 1KOhm
DSC_@ 5%VR_VID_6 R8767
2
1 1KOhm
@
1
T870195
R8793
1KOhm @
VGA_DPRSLPVR VGA_PSI# VO_action
R8774 2
1 1KOhm @
VR_VID_5 R8768
2
1
T8710
1 1KOhm
DSC_@
1KOhm DSC_@
L
L
1 Phase CCM
R8764 2
1 1KOhm @ 5% VR_VID_4 R8781
1
2 T8711
1 1KOhm
DSC_@
2
R8791
H
L
1 Phase DE
R8763 2
1 1KOhm
DSC_@ 5%VR_VID_3 R8770
2
1 1KOhm
@
1
T8712
+3VS_VGA
1KOhm DSC_@
L
H
2 Phase CCM
R8765 2
1 1KOhm
DSC_@ VR_VID_2 R8762
2
1 1KOhm
@
1
T8713
VGA_PSI#
1
2
H
H
1 Phase DE
1
R8786 2
1 1KOhm
DSC_@ VR_VID_1 R8771
2
1 1KOhm
@
1
74 VR_VID_0
D
74 VR_VID_1
1
T8714
R8792
R8766 2
1 1KOhm
DSC_@ VR_VID_0 R8769
2
1 1KOhm
@
1KOhm
D
74 VR_VID_2
@
2
74 VR_VID_3
74 VR_VID_4 74 VR_VID_5
AC_BAT_SYS
VID Set
47 VGA_HOT#
91,93
+1.05VS
DGPU_EN_PW R
2
SR8704
1
2 VGA_HOT#_
1
R8733 499Ohm @
D8701
1.2V/0.1A
DSC_@
2
1
1
2
R8738 330KOhm 1%
DSC_@
2
1
C8730 0.1UF/25V
10% DSC_@
R0402
25,91,92 DGPU_PWROK
74 VGA_DPRSLPVR
VGA_DPRSLPVR
2
1
C8734
0.01UF/16V
C
10% @
SGND_VGA
2
1
R8736 4.02KOhm @
2
1
R8734 470KOHM @
2
1
SR8701 1
2 R0402
SGND_VGA
1
R8703 8.06KOhm
C8723 1000PF/50V
2
1% DSC_@ 10% DSC_@
VGA_PSI#
SGND_VGA 1
+5VS 1
R8726
147KOhm
1
DSC_@
2
2 VGA_RBIAS
3
4
5
VGA_VW
6
VGA_COMP
7
VGA_FB
8
VGA_FB2
9
2VGA_ISEN2
10
R8755 0Ohm
@
1
C8706 0.22UF/25V
PGOOD PSI# RBIAS VR_TT# NTC VW COMP FB FB2 ISEN2
VGA_VRON
U8700A ISL62882CHRTZ-T
DSC_@
2
R8713
4.02KOhm
vx_r0402_small
1% @
2
1
C8717 22PF/50V
5% DSC_@
1
2
VGA_VSUM-
10% DSC_@
1
2 VGA_ISEN1
1
2
C8721
2
DSC_@ 1
0.22UF/25V 10% DSC_@
SGND_VGA
VGA_FB2 1
2
R8710
324KOHM
1% DSC_@
2
1
1
2
R8737 562Ohm
DSC_@ 0.01 1
C8725 390PF/50V
2 MLCC/+/-10%
11 VGA_VSEN 12
VGA_RTN 13 14 15
VGA_VDD 16 VGA_VIN 17
18 VGA_BOOT1 19
20
ISEN1 VSEN RTN ISUMISUM+ VDD VIN IMON BOOT1 UGATE1
GND CLK_EN# DPRSLPVR
VR_ON VID6 VID5 VID4 VID3 VID2 VID1 VID0
41 40 39 38 37 36 35 34 33 32 31
BOOT2 UGATE2 PHASE2
VSSP2 LGATE2
VCCP LGATE1b LGATE1a
VSSP1 PHASE1
30 29 28 27 26 25 24 23 22 21
C8708
R8701
0.22UF/25V
2.2Ohm 10% DSC_@
5% DSC_@
VGA_BOOT2 1
21
2
VGA_UGATE2
VGA_PHASE2
VGA_LGATE2 VGA_VCCP1
VGA_LGATE1a
2 R8720 0Ohm DSC_@
VGA_PHASE1
1
C8722 4.7UF/6.3V
2
10% DSC_@
VGA_UGATE1
R8702
C8712
2.2Ohm
0.22UF/25V
5% DSC_@ 10% DSC_@
1
2
1
2
G
C8719 22PF/50V
C8726 150PF/50V
R8704 2.87KOhm DSC_@
2 R8727 1 1KOhm
+5VS
1
5% DSC_@
5% DSC_@
70 NVDD_SENSE
R8772
+VGA_VCORE
10Ohm
2 1%
1
2
1
C8711 330PF/50V
10% DSC_@ C8715
1
2
R8728 1KOhm 5% @
5% DSC_@
330PF/50V
DSC_@ SGND_VGA
1
2
C8716 1000PF/50V
10% DSC_@
SGND_VGA 1
2
R8735
AC_BAT_SYS
70 NVDD_GND_SENSE
2
DSC_@ 10%
1
0Ohm
C8718
DSC_@
0.22UF/25V
R8731
vx_c0603_small
2
B
10Ohm
10% DSC_@
2 1%
1
VGA_VSUM+
2
R8703=(Period(us)-0.29)*2.65 Period(us)=1/300KHz
R8715 2.61KOhm
1% DSC_@
2
R8716 11KOhm
1
DSC_@
1
C8729 0.22UF/25V
C8701 0.047UF/10V
2
R8721 80.6Ohm
@ 1%
1
2
C8704 1UF/25V SGND_VGA
10% DSC_@
1
2
R8724 1Ohm DSC_@
+5VS
11
21
2
2
R8706 Setting OCP
VGA_VSUM-
1
R8729 10KOhm
1
1% DSC_@
3% DSC_@
10% DSC_@
10% @ 1
2
C8713 0.01UF/16V 10% @
2
1
C8705 0.1UF/25V
10% DSC_@
R8706 1.5KOhm 1% DSC_@
2
VR_VID_6 VR_VID_5 VR_VID_4 VR_VID_3 VR_VID_2 VR_VID_1 VR_VID_0
4
5
3
4
5
5D
G
2
4
5
3
S
6
G
5D
1
4
5
3
2
7
G
5D
S
6
3
2
1
8
5D
S
6
7
2
1
S
6
7
8
OCP:60A
5
1
1
1
1
1
Q8701 RMW 150N03FUB
DSC_@
5D
S
6
7
8
2
C8710 1000PF/50V
DSC_@
2
C8709 10UF/25V
10% DSC_@
2
C8727 10UF/25V DSC_@
10%
2
C8724 0.1UF/25V 10% @
2
C8732 10UF/25V DSC_@ 10%
EDP=50A
+VGA_VCORE_O +VGA_VCORE
G
8
1
2
3
4
Q8710 RMW 150N03FUB GT_@
L8702
0.36UH
1
2
T8704 T8705 T8706 T8707
TPC28T TPC28TTPC28TTPC28T
+VGA_VCORE_O
1 1
1
1
JP8708 3MM_OPEN_5MIL
1 12 2
Irat=60A
JP8709
2
DCR = 1.3m OHM
3MM_OPEN_5MIL
5
R8712 2.2Ohm
2
DSC_@
2
1
+ CE8702
1 12 2
5% @
JP8706
JP8702
470UF/2V
JP8710
8
7
6
5D
Q8709 RMW 200N03FUB
DSC_@
11
C8728
SHORT_PIN
SHORT_PIN
2
DSC_@
3MM_OPEN_5MIL 1 12 2
1
1
S
1500PF/50V
JP8711
G
10% @
R8711
3MM_OPEN_5MIL
2
1
2
3
4
Q8702
10KOhm
1 12 2
RMW200N03FUB VGA_ISEN2 2 1% DSC1_@ GT_@
R8708
JP8712 3MM_OPEN_5MIL
R8732 3.65KOhm
0Ohm vx_r0402_small
1 12 2
@
JP8713
VGA_VSUM+ 2 1% DSC1_@ R8717
2
1 VGA_ISEN1
3MM_OPEN_5MIL
1 12 2
C
1Ohm
+5VS
VGA_VSUM- 2 1% DSC1_@
AC_BAT_SYS
5
1
1
1
1
1
8
7
Q8703 RMW 150N03FUB DSC_@
G
5D
S
6
7
8
Q8708 RMW 150N03FUB GT_@
2
C8735 1000PF/50V
DSC_@
2
C8731 0.1UF/25V 10%
@
2
C8720 10UF/25V
10% DSC_@
2
C8703 10UF/25V
10% DSC_@
2
C8733 10UF/25V
10% DSC_@
1
2
3
4
1
L8701
0.36UH
1
2
T8700 T8701 T8702 T8703 TPC28T TPC28T TPC28TTPC28T
1 1
1
1
Q8704 RMW 200N03FUB DSC_@
G
4
5
3
5D
2
S
6
1
7
8
2
R8730 2.2Ohm 5% @
2
Irat=60A DCR = 1.3m OHM
DSC_@
JP8705 SHORT_PIN
1
Q8707 RMW 200N03FUB GT_@
2
1
R8719
10KOhm
1
C8714
1500PF/50V
1% DSC_@
VGA_ISEN1 2
1
10%
@
R8723
3.65KOhm
JP8701 SHORT_PIN
1
2
R8714
0Ohm
vx_r0402_small
@
2
1VGA_ISEN2
2
1
+ CE8701
470UF/2V
DSC_@
VGA_VSUM2+ 1% DSC1_@
B R8707 1Ohm
VGA_VSUM-
2 1% DSC1_@
SGND_VGA
A 5
U8700B 42 GND1GND4 45
43 GND2GND3 44
ISL62882CHRTZ-T DSC_@
JP8703
1
2
SHORT_PIN
SGND_VGA
4
3
A
<Variant Name>
Title : POWER_VGACORE
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.2
Date: Friday, February 03, 2012
Sheet
87 of
99
2
1
5
4
3
2
1
BATTERY CHARGER
D
63 A/D_DOCK_IN A/D_DOCK_IN
R8801 2.2Ohm
C8801 2.2UF/25V MLCC/+/-10%
C
BAT B
2
11
2
1
2
1
2
1
@
652 D G S
2
C8802 2200PF/50V
1
8 7 6 5 5D
1 2 S3 4
G Q8800
SIR472DP-T1-GE3
C8803 0.1UF/25V
12
3
Q8802 IRFHS8342TRPBF 07V040000087
7
4
1
2
1
2
R8808
1
2
10mOhm
SR8805 R0402
1
SR8804 R0402
12
AC_BAT_SYS
C8828 1500PF/50V @
12
Q8806
8 7 6 5 5D
1 2 S3 4
G
SIR472DP-T1-GE3
C8813 1500PF/50V @
1
2
BAT_GATE
C8816 0.01UF/25V
2
BAT
R8818 @ 4.02KOhm
D
JP8800 3MM_OPEN_5MIL 1 12 2
JP8801 3MM_OPEN_5MIL 1 12 2
BAT_CON
BAT_CON
1
2
REF
R8802 5% 4.7KOhm
1
R8806 5% 4.7KOhm
2
C8814 0.1UF/25V
1
2
C8806 12
0.1UF/25V
2
C8805 0.1UF/25V
1
AC_BAT_SYS
1
1
1
T8800 T8801 TPC28T T8803 TPC28T TPC28T T8802 TPC28T
BAT_CON
T8804 T8805 TPC28T T8807 TPC28T TPC28T T8806 TPC28T
1
R8803 432KOhm
2
AC_IN_OC
R8813 1% 10KOhm 30,74
ACDRV
1
Q8804 IRFHS8342TRPBF 256
C8822
1
D 3G
1000PF/50V
2
1
2
1
2
1
C8817 10UF/25V 10%
C8818 10UF/25V 10%
1
AC_BAT_SYS
C8823 0.1UF/25V
10% @
2
1
1
1
1
1
1
BAT
T8808 T8809 TPC28T T8811 TPC28T TPC28T T8810 TPC28T
1
1
C
U8800A
S
7
4
AD_IINP
30
2
5 4 3 2 1
BQ24725ARGRR
1
2
2
R8804 68KOhm
1
C8825 @ 100PF/50V
R8814 12.1KOhm 1%
1
D8801 1 2
R8817
10OHM
31
2
0.8V/0.2mA
VCC
+3VA
30,63 SMB0_DAT
2
R8815 560KOhm
30,63
SMB0_CLK
5%
1
C8820 100PF/50V
1
2
SR8803
R0402
1
2
SR8802 R0402
BATDRV SRN SRP GND1 LODRV
ACOK ACDRV CMSRC
ACP ACN
6 7 8 9 10
ACDET IOUT SDA SCL ILIM
GND2 VCC
PHASE HIDRV BTST REGN
21 20 19 18 17 16
C8824 1UF/25V
1
11 12 13 14 15
2
R8816 150KOhm 1% @
1
C8821 0.01UF/25V @
BAT_GATE
R8809
2
1
4.7KOhm
2
1
2
C8819 1UF/25V
1
2
SR8801 R0603
REF
1 3
2
VCC
2
1
C8810 10% 0.047UF/16V
D8800 0.8V/0.2mA
1
Q8805 2 5 6 IRFHS8342TRPBF R8805
D
2.2Ohm
@
3G
1
L8800
1
2
4.7UH Irat=5.5A
12
2
S
7
4
2
C8804 1500PF/50V 10%
C8808 0.1UF/25V
1
1
R8810
1
2
10mOhm
C8807
1
2
0.1UF/25V
R8811
R8812
10Ohm
10Ohm
2
2
1
1
2
BAT BAT
1
1
C8811 10% 10UF/25V
C8812 10% 10UF/25V
C8815 10UF/25V 10%
1
2
2
2
C8809 0.1UF/25V
2
1
U8800B
1
2
SR8800 R0603
22 23 24 25
GND3 GND4 GND5 GND6
B BQ24725ARGRR
A
A
<Variant Name>
Title : POWER_CHARGER
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
88 of
15
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
<Variant Name>
A
Title :POWER_N/A
A
Engineer:
Size Project Name
Rev
A
1.1
Date: Friday, February 03, 2012
Sheet
89 of 99
5
4
3
2
1
5
4
3
D
BATTERY IN DETECT
63
TS1#
2
1
JP9024 SHORT_PIN
BAT1_IN_OC# 30
C
B
A
5
4
3
2
1
P.90
D
C
B
A
<Variant Name>
Title : POWER_DETECT
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
90 of
99
2
1
5
4
3
2
1
SUSB#_PWR POWER
DSC#_PWR POWER(DGPU)
+5VO
Q9106 IRFHS8342TRPBF
7
1
4
256 D 3G S
D
Q9108 IRFHS8342TRPBF
+3VO
7
1
4
2
1
1
2
C9109 0.033UF/16V 10%
R9107 47KOhm 1%
2
11
1
T9101 T9127 TPC28T TPC28T
C9107 0.1UF/25V 10%
+5VS (Max:5.581A)
1
T9104 T9114 TPC28T TPC28T
+3VS
+1.05VO
Q9115
8 7 6 5 5D
1 2 S3 4
G
SIR166DP-T1-GE3 DSC_@
+3VO
Q9114 SSM3K315T
DSC_@
2
1
1
2
C9119 0.033UF/16V 10%
DSC_@
R9113 47KOhm 1% DSC_@
1
2
1
2
11
2
11
1
T9117 T9116 TPC28T TPC28T
C9101 @ 0.1UF/25V 10%
+1.05VS_VGA (Max:5A)
D
T9115 T9132 TPC28T TPC28T
C9115 @ 0.1UF/25V 10%
1
+3VS_VGA (Max:2A)
2
1
3D 1
1 G 2S
11
256 D 3G S
C9100 @ 0.1UF/25V
(Max:5.1505A)
C9116 0.033UF/16V
R9114 22KOhm
R9116 @ 0Ohm
10%
10%
1% DSC_@
2
2
DSC_@
T9118 T9133
1
2
Q9103
TPC28T TPC28T
1
+1.5VO
3D 1
G 2S
Q9109 SSM3K315T
2
C9104 0.1UF/25V 10%
R9108 47KOhm 1%
11
1
T9103 T9128 TPC28T TPC28T
C9108 @ 0.1UF/25V
+1.5VS (Max:0.667A)
+1.5VO
8 7 6 5 5D
1 2 S3 4
G
SIR166DP-T1-GE3 DSC_@
1
1
2
C9121 0.033UF/16V 10% DSC_@
R9117 22KOhm 1%DSC_@
2
11
C9120 @ 0.1UF/25V 10%
1
+1.5VS_VGA (Max:13A)
2
10%
T9107
2
TPC28T
1
2
1
C9111
R9105
+12VSUS
T9130
3
E
C
4
1
+12VS_VGA
1
0.1UF/25V
47KOhm
TPC28T
47K
R9115
(Max:0.01A)
BB
2
C
10%
1%
T9102 TPC28T
25,87,92 DGPU_PWROK
DGPU_PW ROK
2
100KOhm
1%
C
10K
2
E 47K
47K
DSC_@
+12VSUS
T9129
3
E
C
4
1
+12VS
6
C
1
1
TPC28T
47K
R9102
(Max:0.01A)
Q9113 68@-5mA/Vceo=+/-50V
BB
SUSB#_PWR
1
2
100KOhm 1%
DSC_@
10K
47K
2
+12VSUS
1
2
E 47K
1
C
6
+5VO
3D 1
G 2S
Q9105 68@-5mA/Vceo=+/-50V
SUSC#_PWR POWER
Q9101
SSM3K315T
11
1
T9124 T9113 TPC28T TPC28T
C9113 0.1UF/25V
10%
+5V (Max:3.04A)
DSC_@ R9100 100KOhm
3
+5VSUS
1%
DSC_@
1
2
5
R9101 100KOhm
4
Q9111B UM6K1N DSC_@
6
1% DGPU_EN_PWR 2
1
DSC_@
Q9111A UM6K1N
2
1
2
1
C9105 0.033UF/16V
R9110 22KOhm
USBCHG#_PWR POWER
10%
1%
T9126 T9100
JP9101
2
B
Q9112
TPC28T TPC28T
3MM_OPEN_5MIL
B
+3VO
1
+3V
1 12 2
11
3D 1
G 2S
11
256 D 3G S
SSM3K315T
1
2
2
C9106 @ 0.1UF/25V
10%
(Max:2.1A)
+5VO
7
1
4
1
T9139 T9141 T9140 TPC26T TPC26T TPC26T
1
+5VSUS
1
1
C9110 0.1UF/25V 10%
R9109 22KOhm 1%
T9112 TPC28T
2
C9128 @ 47PF/50V vx_c0402_small 5%
Q9116 @ IRFHS8342TRPBF
2
C9127 0.1UF/25V vx_c0402_small 10% @
(Max:4.1A)
2
47K
10K
+12VSUS
T9119 TPC28T
SUSC#_PWR
1
2
3
47K
E
BB
C
4
1
R9103 100KOhm 1%
1
+12V (Max:0.01A)
2
+5VSUS_SW _R
C9129 @ 0.1UF/25V vx_c0402_small 10%
2
1
R9120 1KOhm
+12VSUS
vx_r0402_small
1% @
1
2
R9119 100KOhm vx_r0402_small 1% @
3
E 47K
6
C
1
Q9107 68@-5mA/Vceo=+/-50V
+5VA 1
2
5
R9118 100KOhm vx_r0402_small 1% @
6
4
Q9117B UM6K1N @
A
SUSB#_PWR POWER Control
SUSB#_PWR POWER Control
22,24,30,63,92 SUSB_EC#
1
T9142 TPC28T
T9136 TPC28T
SR9118
1
2
R0603(1KOhm)
30,63 SUSC_EC#
1
T9123 TPC28T
T9134 TPC28T
SR9120
1
2
R0603(1KOhm)
1
82,83,84,85,93 SUSB#_PWR
1
83,93 SUSC#_PWR
5
4
30,63,81,93 VSUS_ON
DSC_VGA_PWR POWER Control
R1.0 0103
24 VGA_PWRON
1
T9135 TPC28T
T9149 TPC28T
SR9123
1
2
R0603(1KOhm)
1
87,93 DGPU_EN_PWR
3
2
1
2 Q9117A
UM6K1N
@
A
<Variant Name>
Size Project Name Custom Date: Friday, February 03, 2012
Title : POWER_LOAD SWITCH
Engineer: Steven Kuo
Rev
VA70
1.0
Sheet
91 of
94
1
5 D
2
1
4
+3VS
R9205 100KOhm
1%
3
2
POWER GOOD DETECTER
1 D
83 DDR_PWRGD 84 +1.8VS_PWRGD
R1.0 0105
85 +VCCSA_PWRGD
C
25,87,91 DGPU_PWROK
82 +1.05VS_PWRGD 30,81 SUS_PWRGD
B
1
1
1 1
1
1
1
T9202 TPC28T
T9204 TPC28T
T9209 TPC28T
1
2
SR9200
R0402
1
2
R9210
0Ohm
1
2
R9212 0Ohm
T9207 TPC28T
1
2
+3VS R9217
0Ohm
@
+3VSUS
T9210 TPC28T
T9206 TPC28T
2
R9209 100KOhm 1%
D9203
2
1.2V/0.1A 1
R9207 @
1
2
0Ohm
2
1
R9206 100KOhm 1%
2
1
D9201 1.2V/0.1A
+3VSUS
1A 2B
VCC 5
T9200 TPC28T
3 GND
4 Y
U9200 @
Vcc=2~5.5
1
2
SR9203 R0402
1
1
2
R9202 @ 0Ohm
ALL_SYSTEM_PWRGD 30 PM_PWROK 22,30
80 VGFX_PWRGD 30,80 VRM_PWRGD
A
1
2
SR9202 R0402
check
R9200/SR9207 switch
1
2
R9203 @ 0Ohm
T9208 TPC28T
1
+3VS
R9204 1.91KOhm
1%
22,24,30,63,91 SUSB_EC#
+3VSUS
2
1
1A
VCC 5
1
2 ALL_SYSTEM_PWRGD
2B
D9202 1.2V/0.1A
3 GND
4 Y
2
U9201 @
Vcc=2~5.5
1
6
1
2
2
SUSB_EC#
T9201 TPC28T
1
1
D9200 1.2V/0.1A
Q9200A UM6K1N
1
2
R9201 560KOhm 5%
3
5
C9200 4.7UF/6.3V 10%
4
Q9200B UM6K1N
5
4
3
C
B
DELAY_VR_AND_ALL_SYS 22 FORCE_OFF# 47,81
A
<Variant Name>
Title : POWER_PROTECT
Engineer: Steven Kuo
Size Project Name
Rev
Custom
VA70
1.0
Date: Friday, February 03, 2012
Sheet
92 of 94
2
1
5
4
3
2
1
AC_BAT_SYS
AC_BAT_SYS 37,55,80,81,82,83,87,88
FOR POWER TEST
BAT_CON
BAT_CON 63,88
D
+5VA
+5VA
30,42,61,66,81,91
+3VA
+3VA
20,27,30,48,63,65,81,88
+5VO +3VO +1.8VO
+5VO +3VO +1.8VO
61,81,91 55,81,91 84
+3VA
JP9300 @ SGL_JUMP 1 12 2
JP9301 @ SGL_JUMP 1 12 2
JP9302 @ SGL_JUMP 1 12 2
1
1
1
T9300 TPC28T
T9301 TPC28T
T9302 TPC28T
D
CPU_VRON_PWR 80 SUSB#_PWR 82,83,84,85,91 SUSC#_PWR 83,91
+1.5VO +1.05VO
+1.5VO 83,91 +1.05VO 82,91
JP9303 @ SGL_JUMP
1 12 2
1
T9303 TPC28T
VSUS_ON 30,63,81,91
+12VSUS
+12VSUS 22,28,60,81,91
+5VSUS
+5VSUS 22,27,30,60,61,63,65,66,82,83,84,85,91
C
+3VSUS
+3VSUS 4,22,24,27,28,30,33,65,81,85,92
JP9304 @
T9304 TPC28T
SGL_JUMP
1 12 2
1
DGPU_EN_PWR 87,91
C
+12V +5V +3V
+1.5V
+12V +5V +3V +1.5V
91 51,63,91 4,24,37,51,63,65,91 5,7,16,51,63,83
+12VS
+12VS 28,39,41,91
+5VS
+5VS
27,30,38,39,41,42,48,49,60,63,66,80,87,91
+3VS
+3VS
4,16,17,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92
+1.8VS
+1.8VS 7,25,26,63,84
+1.5VS
+1.5VS 26,53,55,63,91
B
B
+1.05VS
+1.05VS 26,27,63,80,82,87
+0.75VS
+0.75VS 16,17,63,83
+VCCSA
+VCCSA 7,85
+VCCP +12VS_VGA
+3VS_VGA +1.5VS_VGA +1.05VS_VGA
+VCCP 3,4,6,7,25,26,27,37,47,63,82 +12VS_VGA 91 +3VS_VGA 63,70,72,74,75,87,91 +1.5VS_VGA 63,71,75,76,77,91 +1.05VS_VGA 63,70,71,72,91
+VGA_VCORE
+VGA_VCORE 63,75,87
A
+VGFX_CORE
+VGFX_CORE 7,63,80
+VCORE
+VCORE 6,63,80
5
4
3
A
<Variant Name>
Title : POWER_SIGNAL
Engineer: Steven Kuo
Size Project Name Custom
Date: Friday, February 03, 2012
2
A35
Sheet
1
93 of
Rev 1.0 94
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