SH7239 CPU board R0K572390 User's Manual
R20UT0297EJ0100 SH7239EVUM
Nov.08.10
Renesas Electronics Corporation
REN r20ut0297ej0100 sh7239evum MAT 20101108 User's Manual
32 R0K572390 SH7239 CPU Board User's Manual
Renesas MCU SuperHTM RISC engine Family / SH7239 Series
Rev. 1.00
All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corporation without notice. Please review the latest information published by Renesas Electronics Corporation through various means, including the Renesas Electronics Corporation website (http://www.renesas.com).
www.renesas.com
Rev. 1.00 Nov. 2010
Notice
1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
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4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.
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"Standard":
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"Specific":
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(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries.
(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.
WEEE Directive
Renesas development tools and products are directly covered by the European Union's Waste Electrical and Electronic Equipment, (WEEE), Directive 2002/96/EC. As a result, this equipment, including all accessories, must not be disposed of as household waste but through your locally recognised recycling or disposal schemes. As part of our commitment to environmental responsibility Renesas also offers to take back the equipment and has implemented a Tools Product Recycling Program for customers in Europe. This allows you to return equipment to Renesas for disposal through our approved Producer Compliance Scheme. To register for the program, click here "http://www.renesas.com/weee".
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About This Manual
1. Purpose and Target Readers
This manual is designed to provide the user with an understanding of the functions and operating specifications of this CPU board. It is intended for users of this CPU board. A basic knowledge of electrical circuits, logical circuits, and microcomputers (MCUs) is necessary in order to use this manual.
This manual comprises an overview of the CPU board; its function, and operating specifications.
Carefully read all notes in the manual. These notes occur within the body of the text.
The Revision History summarizes primary modifications and additions to the previous versions. Refer to the text of the manual for details.
The following documents apply to the SH7239 CPU board R0K572390.
Document Type User's Manual
Installation Manual
Description
Document Title
Describes functions (devices, memory SH7239 CPU Board maps, electrical characteristics), and R0K572390 User's operating specifications (connectors, Manual and switches)
Describes how to set up hardware and software
SH7239 CPU Board R0K572390 Installation Manual
Document No. This publication
R20UT0298EJ
The following documents apply to the SH7239 Group. Make sure to refer to the latest versions of these documents. The newest versions of the documents listed may be obtained from the Renesas Electronics website.
Document Type User's manual: Hardware
Software manual Application note Renesas technical update
Description Hardware specifications (pin assignments, memory maps, peripheral function specifications, electrical characteristics, timing charts) and operation description Note: Refer to application notes for details on using peripheral functions Description of CPU instruction set
Applications, sample programs Product specifications, updates on documents, etc.
Document Title
SH7239 Group, SH7237 Group User's manual: Hardware
Document No. R01UH0086EJ
SH-2A, SH2A-FPU Software manual
REJ09B0051
Available from the Renesas Electronics website.
2. Frequently Used Abbreviations and Acronyms
ACIA bps CRC DMA DMAC GSM Hi-Z IEBus I/O IrDA LSB MSB NC PLL PWM SFR SIM UART VCO
Asynchronous Communication Interface Adapter bits per second Cyclic Redundancy Check Direct Memory Access Direct Memory Access Controller Global System for Mobile Communications High Impedance Inter Equipment bus Input/Output Infrared Data Association Least Significant Bit Most Significant Bit Non-Connection Phase Locked Loop Pulse Width Modulation Special Function Registers Subscriber Identity Module Universal Asynchronous Receiver/Transmitter Voltage Controlled Oscillator
All trademarks and registered trademarks are the property of their respective owners.
Table of Contents
1. Overview....................................................................................................................................................... 1-1
1.1 Introduction ..................................................................................................................................................... 1-1 1.2 Configuration................................................................................................................................................... 1-2 1.3 Board Specifications ........................................................................................................................................ 1-3 1.4 Exterior ............................................................................................................................................................ 1-4 1.5 Block Diagram................................................................................................................................................. 1-5 1.6 Component Layout .......................................................................................................................................... 1-6 1.7 Memory Maps.................................................................................................................................................. 1-8 1.8 Absolute Maximum Ratings .......................................................................................................................... 1-10 1.9 Operating Conditions..................................................................................................................................... 1-10
2. Functions ...................................................................................................................................................... 2-1
2.1 Overview of Functions..................................................................................................................................... 2-1
2.2 CPU ................................................................................................................................................................. 2-2
2.3 External Memory ............................................................................................................................................. 2-3
2.3.1
SRAM..................................................................................................................................................... 2-3
2.3.2
EEPROM ................................................................................................................................................ 2-5
2.4 Serial Port Interface ......................................................................................................................................... 2-6
2.5 I/O Ports........................................................................................................................................................... 2-7
2.6 RCAN Interface ............................................................................................................................................. 2-11
2.7 LCD Interface ................................................................................................................................................ 2-12
2.8 H-UDI Interface............................................................................................................................................. 2-13
2.9 Switches and Jumpers.................................................................................................................................... 2-14
2.10 LEDs and Potentiometer................................................................................................................................ 2-15
2.11 Power Module................................................................................................................................................ 2-16
2.12 Clock Module ................................................................................................................................................ 2-17
2.13 Reset Module ................................................................................................................................................. 2-18
3. Operating Specifications............................................................................................................................... 3-1
3.1 Connectors ....................................................................................................................................................... 3-1
3.1.1
Application Headers (JA1, JA2, JA3, JA5, JA6).................................................................................... 3-2
3.1.2
Common Ring Connectors (J1, J2, J3, J4).............................................................................................. 3-9
3.1.3
DC Power Jack (J5) .............................................................................................................................. 3-12
3.1.4
H-UDI Port Connectors (J6 and J7)...................................................................................................... 3-13
3.1.5
Serial Port Connector (J8)..................................................................................................................... 3-15
3.1.6
RCAN Port Connector (J9)................................................................................................................... 3-16
3.1.7
LCD Interface Connector (J10) ............................................................................................................ 3-17
3.1.8
External Power Supply Connectors (J11, J12, J13) .............................................................................. 3-18
3.2 Operating Components .................................................................................................................................. 3-19
3.2.1
Jumpers (JP1, JP2, JP3) ........................................................................................................................ 3-20
3.2.2
Switches................................................................................................................................................ 3-21
3.2.3
Potentiometer........................................................................................................................................ 3-22
3.2.4
LEDs..................................................................................................................................................... 3-22
3.3 Dimensions .................................................................................................................................................... 3-22
Appendix R0K572390 Schematics .......................................................................................................................1
SH7239 CPU Board R0K572390
1. Overview
1. Overview
1.1 Introduction
The R0K572390 is a CPU board designed for evaluating the features and performance of the SH7239 Group of Renesas Electronics single-chip RISC microcomputers (MCUs). It is also used for developing and evaluating application software for these MCUs. The R0K572390 CPU board lineup consists of following two models:
· R0K572390C000BR, which includes SH7239A MCU (3.3 V, working at 160 MHz) · R0K572390C020BR, which includes SH7239B MCU (5.0 V, working at 100 MHz)
The SH7239 MCU's internal peripheral pins are connected to common ring connectors and application headers on the R0K572390 to allow for timing evaluation with peripherals using measurements instruments, and the development of the expansion board according to its application. The Renesas Electronics E10A-USB on-chip emulator can be connected to the R0K572390.
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1.2 Configuration
Figure 1.1 shows an example of a system configuration using the R0K572390.
1. Overview
Application headers Serial port
AC adapter provided with the
CPU board
Character LCD
RCAN port
SH7239 CPU board R0K572390
SH7239
H-UDI port connector (14-pin or 38-pin)
Application headers
E10A-USB emulator (1)
High-performance Embedded Workshop (1)
SuperH RISC engine (1) C/C++ compiler package
USB Host computer (1)
Note: 1. These items are not included in this CPU board, and must be prepared by user.
Figure 1.1 Configuration Using the R0K572390
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1. Overview
1.3 Board Specifications
Table 1.1 lists the specifications of the R0K572390.
Table 1.1 R0K572390 Board Specifications
Item
Description
CPU
SH7239A (1) or SH7239B (2)
· Input (XIN) clock: 10 MHz (1) or 12.5 MHz (2) · CPU clock: Up to 160 MHz (1) or 100 MHz (2) · Peripheral clock: Up to 40 MHz (1) or 50 Hz (2)
· Internal memory
Flash memory: 512 KB
RAM: 64 KB
FLD (flash memory to store data): 32 KB
Memory
· EEPROM: 64 KB (SPI interface) · SRAM: 64 KB (8-bit bus × 2, optional) (3)
Connectors
· Common ring connectors (All CPU signals, optional)
· Application headers (Bus, I/O, VCC, GND, optional)
· Serial port connector (D-sub, 9-pin)
· RCAN port connector (3-pin, pin header)
· 14-pin LCD interface connector
· 14-pin H-UDI port connector
· 38-pin H-UDI port connector
LEDs, potentiometer
· Power LED: 1
· Boot mode LED: 1
· User LEDs: 4
· 10-k potentiometer: 1
Switches, jumpers
· Reset switch: 1
_____________
· User switches: 3 (NMI, IRQ3 or ADTRG, IRQ4)
· Mode setting DIP switches: 1 (2/package) · Power select jumper: 1 (Not populated) (4)
· RCAN signal connection jumper: 1 (Not populated)
_____________
· ADTRG signal connection jumper: 1 (Not populated)
Board specifications
· Dimensions: 100 mm × 120 mm
· Mounting form: 4-layer, double-sided
· Number of boards: 1
Notes
1. These parameters apply to the R0K572390C000BR. 2. These parameters apply to the R0K572390C020BR. 3. User is allowed to install SRAM on the R0K572390C000BR. 4. Power supply voltage is fixed to 3.3 V on the R0K572390C000BR, 5 V on the R0K572390C020BR.
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1.4 Exterior
Figure 1.2 shows the exterior of the R0K572390.
1. Overview
Figure 1.2 R0K572390 Exterior
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1.5 Block Diagram
Figure 1.3 shows the block diagram of the R0K572390.
1. Overview
RCAN port connector
38-pin H-UDI port connector
14-pin H-UDI port connector
Serial port connector
5 V to 3.3 V 3.3 V to 5 V
H-UDI AUD
RCAN
SCI ch2 SH7239 CPU board R0K572390
LCD interface connector
PORT
Crystal unit
10 MHz (1) or 12.5 MHz (2)
SH7239
160 MHz (1) or 100 MHz (2)
RSPI EEPROM 64 KB
Optional
SRAM 64 KB (1)
5 V
Power
3.3 V (1)
select jumper
or 5 V (2)
3.3 V
DC-DC
8- or 16-bit 8- or 16-bit
16-bit
External bus 40 MHz (max.) (1)
Common ring connectors (optional) and Application headers (optional)
Notes: 1. These are applicable to the R0K572390C000BR. 2. These are applicable to the R0K572390C020BR.
Figure 1.3 R0K572390 Block Diagram
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1.6 Component Layout
Figure 1.4 shows the layout of the major components on the R0K572390.
Character LCD (accessory)
Top view of the component side
X1 SH7239
1. Overview
Top view of the solder side
J4
SRAM (optional)
Figure 1.4 R0K572390 Component Layout
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SH7239 CPU Board R0K572390 Table 1.2 lists the major components on the R0K572390.
1. Overview
Table 1.2 Major Components on the R0K572390
Symbol
Name
Remarks
Recommended Optional Components
U1 U2, U3
CPU SRAM
SH7239A (1) (Renesas) SH7239B (2) (Renesas) Optional (3)
(Manufacturer Name and Part Number) M5M5256DVP-70G (Renesas)
U4
EEPROM
R1EX25512ATA00A (Renesas)
U13
RS-232C transceiver
MAX3222CPWR (TI)
U11
RCAN transceiver
HA13721RPJE (Renesas)
U14
3.3 V regulator
LM2738-YMY 550kHz (NS)
U6
Reset IC
X1
Crystal unit
M51957BFP (Renesas) CXZ49GFB10000H0PESZZ (1) CXZ49GFB12500H0PESZZ (2) (Kyocera Kinseki)
J1 to J4
Common ring connectors
Optional
18-pin double row pin header
JA1, JA2
Application headers
Optional
13-pin double row pin header
JA3
Application header
Optional
25-pin double row pin header
JA5, JA6
Application headers
Optional
12-pin double row pin header
J5
DC power jack
KLDX-SMT2-0202-A (Kycon)
J6
14-pin H-UDI port connector
HTST-107-01-T-DV (Samtec)
J7
38-pin H-UDI port connector
2-5767004-2 (Tyco electronics)
J8
Serial port connector
154188 (ERNI)
J9
RCAN port connector
J10
LCD interface connector
B3P-SHF-1AA(LF)(SN) (J.S.T.) SSM-107-LM-DV-P-TR (Samtec)
J11
External power supply connector
Optional
A2-2PA-2.54DSA (Hirose)
J12 J13 POWER
External power supply connector External power supply connector Power LED
Optional Optional Green
A2-2PA-2.54DSA (Hirose) A2-2PA-2.54DSA (Hirose)
BOOT LED0 to LED3 VR1 RESET SW1 SW2, SW3
Boot mode LED User LEDs Potentiometer Reset switch NMI switch IRQ3, IRQ4 switches
Orange Green, orange, red, red CT-6ETV10K (NIDEC Copal) B3S-1000 (OMRON) B3S-1000 (OMRON) B3S-1000 (OMRON)
SW4 JP1 JP2 JP3
Mode setting DIP switches (2/package) Power select jumper RCAN signal connection jumper
_____________
A D T R G signal connection jumper
A6HF-2102 (OMRON) Optional Optional Optional
2.54 mm pitch 3-way pin header 2.54 mm pitch 2-way pin header 2.54 mm pitch 2-way pin header
Notes: 1. These parameters apply to the R0K572390C000BR. 2. These parameters apply to the R0K572390C020BR. 3. User is allowed to install SRAM on the R0K572390C000BR only. 4. Power supply voltage is fixed to 3.3 V on the R0K572390C000BR, 5 V on the R0K572390C020BR.
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1.7 Memory Maps
Figure 1.5 and Figure 1.6 show memory map examples of the SH7239 and R0K572390.
1. Overview
H'0000 0000 H'0008 0000 H'0040 2000 H'0040 4000
SH7239 Logic Space in MCU Mode 3
(Single-chip Mode)
Internal ROM (512 KB) Reserved
FCU firmware area (8 KB)
R0K572390 Memory Map
H'0000 0000 H'0008 0000 H'0040 2000 H'0040 4000
Internal ROM (512 KB) Reserved
FCU firmware area (8 KB)
Reserved
Reserved
H'800F FFFF H'8010 0000 H'8010 8000
H'80FF 7FFF H'80FF 8000 H'80FF A000
Data flash (32 KB) Reserved
FCURAM (8 KB)
H'800F FFFF H'8010 0000 H'8010 8000
H'80FF 7FFF H'80FF 8000 H'80FF A000
Data flash (32 KB) Reserved
FCURAM (8 KB)
Reserved
Reserved
H'FFF7 FFFF H'FFF8 0000
H'FFF8 8000
H'FFF9 0000
H'FFF9 8000
Internal RAM (32 KB) Reserved
Internal RAM (32 KB)
Reserved
H'FFFD FFFF H'FFFE 0000 H'FFFF FFFF
Peripheral I/O
H'FFF7 FFFF H'FFF8 0000
H'FFF8 8000
H'FFF9 0000
H'FFF9 8000
Internal RAM (32 KB) Reserved
Internal RAM (32 KB)
Reserved
H'FFFD FFFF H'FFFE 0000 H'FFFF FFFF
Peripheral I/O
Figure 1.5 SH7239 Memory Map Example (MCU Mode 3)
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SH7239 Logic Space in
MCU Mode 2
(Internal ROM Enabled Mode)
H'0000 0000 Internal ROM (512 KB)
H'0008 0000
Reserved
H'0040 2000 H'0040 4000
FCU firmware area (8 KB) Reserved
H'0200 0000
CS0 space
H'0220 0000 H'0400 0000
Reserved CS1 space
H'0420 0000
Reserved
H'0BFF FFFF H'0C00 0000
H'0C20 0000 H'1000 0000
H'1020 0000 H'1400 0000
H'1420 0000 H'1800 0000
H'1820 0000
CS3 space Reserved CS4 space Reserved CS5 space Reserved CS6 space
1. Overview
R0K572390 Memory Map
H'0000 0000 H'0008 0000 H'0040 2000 H'0040 4000
H'0200 0000 H'0201 0000 H'0220 0000 H'0400 0000
H'0420 0000
Internal ROM (512 KB) Reserved
FCU firmware area (8 KB)
Reserved SRAM (64 KB) (1)
Not used Reserved
Not used
Reserved
H'0BFF FFFF H'0C00 0000
H'0C20 0000 H'1000 0000
H'1020 0000 H'1400 0000
H'1420 0000 H'1800 0000
H'1820 0000
Not used Reserved Not used Reserved Not used Reserved Not used
Reserved
Reserved
H'800F FFFF H'8010 0000 H'8010 8000
H'80FF 7FFF H'80FF 8000 H'80FF A000
Data Flash (32 KB) Reserved
FCURAM (8 KB)
H'800F FFFF H'8010 0000 H'8010 8000
H'80FF 7FFF H'80FF 8000 H'80FF A000
Data Flash (32 KB) Reserved
FCURAM (8 KB)
Reserved
Reserved
H'FFF7 FFFF H'FFF8 0000
H'FFF8 8000
H'FFF9 0000
H'FFF9 8000
Internal RAM (32 KB) Reserved
Internal RAM (32 KB)
H'FFF7 FFFF H'FFF8 0000
H'FFF8 8000
H'FFF9 0000
H'FFF9 8000
Internal RAM (32 KB) Reserved
Internal RAM (32 KB)
Reserved
Reserved
H'FFFD FFFF H'FFFE 0000
H'FFFF FFFF
Peripheral I/O
H'FFFD FFFF H'FFFE 0000
H'FFFF FFFF
Peripheral I/O
Note: 1. SRAM is optional. User is allowed to install it on the R0K572390C000BR only.
Figure 1.6 SH7239 Memory Map (MCU Mode 2, for R0K572390C000BR only)
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1. Overview
1.8 Absolute Maximum Ratings
Table 1.3 lists the absolute maximum ratings of the R0K572390.
Table 1.3 R0K572390 Absolute Maximum Ratings
Symbol
Item
Value
Remarks
5VCC 3VCC (1)
5 V system power supply voltage
-0.3 to 6.0 V
Reference voltage: VSS
3.3 V system power supply voltage -0.3 V to 4.0 V Reference voltage: VSS
AVCC
5 V system analog power supply voltage
-0.3 V to 6.0 V Reference voltage: AVSS
Topr
Operating ambient temperature (2) 0°C to 50°C
Do not expose to condensation or corrosive gas
Tstg
Storage ambient temperature (2)
-10°C to 60°C Do not expose to condensation or corrosive gas
Notes: 1. 3VCC is used to supply the 3.3 V system power supply voltage directly from the external power supply connector.
2. Ambient temperature refers to the air temperature in the vicinity of the board.
1.9 Operating Conditions
Table 1.4 lists the operating conditions for the R0K572390.
Table 1.4 R0K572390 Operating Conditions
Symbol
Item
Value
Remarks
5VCC 3VCC (1)
5 V system power supply voltage 4.75 V to 5.25 V Reference voltage: VSS 3.3 V system power supply voltage 3.15 V to 3.45 V Reference voltage: VSS
AVCC
5 V system analog power supply voltage
4.75 V to 5.25 V Reference voltage: AVSS
Topr
Maximum current consumption
1 A max.
Both 5 V system power supply (including
analog), and 3.3 V system power supply
Tstg
Operating ambient temperature (2) 0°C to 50°C
Do not expose to condensation or corrosive gas
Notes: 1. 3VCC is used to supply the 3.3 V system power supply voltage directly from the external power supply connector.
2. Ambient temperature refers to the air temperature in the vicinity of the board.
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2. Functions
2. Functions
2.1 Overview of Functions
The R0K572390 includes the function modules listed in the following table.
Table 2.1 R0K572390 Function Modules
Section
2.2
CPU
Function
2.3
External Memory
2.4
Serial Port Interface
2.5
I/O Ports
2.6
RCAN Interface
2.7
LCD Interface
2.8
H-UDI Interface
Description SH7239A (1) or SH7239B (2) · Input (XIN) clock: 10 MHz (1) or 12.5 MHz (2) · CPU clock: Up to 160 MHz (1) or 100 MHz (2) · Peripheral clock: Up to 40 MHz (1) or 50 Hz (2) · Internal memory
Flash memory: 512 KB RAM: 64 KB FLD (flash memory to store data): 32 KB · EEPROM: 64 KB (SPI interface) · SRAM: 64 KB (8-bit bus × 2, optional) (3) Connects the SH7239 SCI channel 2 to the serial port connector
Connects all the SH7239 signals to common ring connectors
Connects the SH7239 bus and I/O ports to application headers
Connects the SH7239 RCAN pins to the RCAN port connector via the RCAN transceiver
Character LCD interface
Connects the SH7239 H-UDI/AUD pins to the H-UDI port connectors (14-pin, 38-pin) to enable debugging the R0K572390 using the E10A-USB emulator
(4)
2.9
Switches and Jumpers
· Reset switch
_____________
· User switches: 3 (Connects NMI, IRQ3 or ADTRG, and IRQ4 pins)
· Mode setting DIP switches: 1 (2/package)
· Power select jumper: 1 (Not populated)
· RCAN signal connection jumper: 1 (Not populated)
_____________
· ADTRG signal connection jumper: 1 (Not populated)
2.10
LEDs and Potentiometer
· Power LED: 1
· Boot mode LED: 1
· User LEDs: 4
· 10-k potentiometer: 1
2.11
Power Module
2.12
Clock Module
Controls the R0K572390 system power supply Clock source: 10 MHz (1) or 12.5 MHz (2) crystal unit
2.13
Reset Module
Resets the devices installed on the R0K572390
Operating Specifications
Refer to chapter 3 for details on connectors, switches, LEDs, and the
potentiometer
Notes 1. These parameters apply to the R0K572390C000BR.
2. These parameters apply to the R0K572390C020BR.
3. User is allowed to install SRAM on the R0K572390C000BR. _____
4. H-UDI port connector cannot be used when using addresses A16 to A20, and AH by the application headers.
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SH7239 CPU Board R0K572390
2. Functions
2.2 CPU
The R0K572390 includes following two models according to the MCU product lineup.
· R0K572390C000BR: SH7239A MCU (3.3 V, CPU clock = 160 MHz max, peripheral clock = 40 MHz max) · R0K572390C020BR: SH7239B MCU (5.0 V, CPU clock = 100 MHz max, peripheral clock = 50 MHz max)
The SH7239A and SH7239B MCUs have 512 KB of flash memory, 32 KB of FLD, and 64 KB of RAM to support various applications such as data processing and equipment control.
Figure 2.1 shows the SH7239 block diagram on the R0K572390.
Clock System control
GPIO
Serial port connector
A/D
H-UDI port connector
Mode setting
DIP switches
SH7239
86
29
EXTAL
PC0/A0/POE0/IRQ4
84
30
XTAL
PC1/A1/ADRTG
26
31
PA18/CK
PC2/A2
32
PC3/A3
88
33
RES
PC4/A4
87
34
NMI
PC5/A5
1
35
WDTOVF
PC6/A6
36
PC7/A7
16
39
PE0/TIOC0A/TIOC4AS/DREQ0
PC8/A8/CRx0/RXD0/POE4
17
40
PE1/TIOC0B/TIOC4BS/TEND0
PC9/A9/CTx0/TXD0/SCK0
18
41
PE2/TIOC0C/TIOC4CS/DREQ1
PC10/A10/TIOC1A/CRx0/RXD0
19
42
PE3/TIOC0D/TIOC4DS/TEND1
PC11/A11/TIOC1B/CTx0/TXD0
9
43
PE9/TIOC3B/DACK2
PC12/A12/TCLKA
10
44
PE11/TIOC3D/DACK3
PC13/A13/IRQ0/TCLKB
20
45
PE4/TIOC1A/SCK3/POE8/IRQ4
PC14/A14/IRQ1/TCLKC
21
46
PE5/TIOC1B/TIOC3BS/TXD3
PC15/A15/IRQ2/TCLKD
22
PE6/TIOC2A/TIOC3DS/RXD3
3
56
PE8/TIOC3A/DREQ2/SCK2/SSL2
PD0/D0
11
67
PE12/TIOC4A
PD1/D1
12
68
PE13/TIOC4B/MRES
PD2/D2/TIC5U/RXD2
13
69
PE14/DACK0/TIOC4C
PD3/D3/TIC5V/TXD2
14
60
PE15/DACK1/TIOC4D/IRQOUT
PD4/D4/TIC5W/SCK2
2
61
PE7/TIOC2B/UBCTRG/RXD2/SSL1
PD5/D5/TIC5US
8
62
PE10/TIOC3C/DREQ3/TXD2/SSL3
PD6/D6/TIC5VS
63
PD7/D7/TIC5WS
98
68
PF0/AN0
PD8/D8/TIOC3AS/AUDATA0
99
69
PF1/AN1
PD9/D9/TIOC3CS/AUDATA1
100
70
PF2/AN2
PD10/D10/TIOC3BS/AUDATA2
101
71
PF3/AN3
PD11/D11/TIOC3DS/AUDATA3
106
72
PF4/AN4
PD12/D12/TIOC4AS/AUDSYNC
107
73
PF5/AN5
PD13/D13/TIOC4BS/AUDCK
108
74
PF6/AN6
PD14/D14/TIOC4CS
109
75
PF7/AN7
PD15/D15/TIOC4DS
112
PF8/AN8
113
23
PF9/AN9
PA17/RD
114
27
PF10/AN10
PA16/WRL
115
28
PF11/AN11
PA15/WRH
116
PF12/AN12
117
82
PF13/AN13
PA0/RXD0/CS0/CRx0/IRQ4
118
83
PF14/AN14
PA1/TXD0/CS1/CTx0/IRQ5
119
PF15/AN15
78
PA9/IRQ3/TCLKD/CS3/SSL0/SCK0
6
79
PB16/AUDSYNC
PA8/IRQ4/TCLKC/CS4/MISO/RXD1
7
80
PB17/AUDCK
PA7/IRQ5/TCLKB/CS5/MOSI/TXD1
91
81
PB18/AUDATA2
PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1
92
PB19/AUDATA3
66
PB20/AUDATA0
67
PB21/AUDATA1
47
PB0/A16/IRQ0/TIOC2A/TMS
48
PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST
51
PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI
52
PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO
53
PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK
95
ASEMD0
Switch Character LCD Address bus (1)
Data bus (1)
Bus control (1) RCAN port connector EEPROM (RSPI)
94 FWE/ASEBRKAK/ASEBRK
120 MD0
Note 1: External bus can be used on the SH7239A only.
Figure 2.1 SH7239 Block Diagram
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SH7239 CPU Board R0K572390
2.3 External Memory
2. Functions
2.3.1 SRAM
64-KB SRAM (32-Kword × 8-bit × 2) can be installed on the R0K572390 (SRAM is optional, and not installed by _______
default). The SH7239 Bus State Controller CS0 controls the SRAMs. The SRAM can be used only when setting the _______
SH7239A in MCU mode 2. As CS0 signal to control SRAM is also used as the RCAN CRx0, RCAN and SRAM cannot be used at the same time. When using SRAM, remove the resistor R41 and install the resistor R30 (not installed by default), and connect the signal to SRAM.
Figure 2.2 shows the SH7239 and SRAM configuration.
SH7239
46 to 39, 36 to 30 15 PC15/A15/IRQ2/TCLKD to PC1/A1/ADRTG
82 PA0/RXD0/CS0/CRx0/IRQ4
PA17/RD 23 PA16/WRL 27 PA15/WRH 28 PD15/D15/TIOC4DS to PD0/D0 75 to 68, 63 to 56 16
D7 to D0 8
VCC
SRAM (M5M5256DVP-70G, 32-Kword × 8-bit)
A14 to A0 S OE W
DQ8 to DQ1
SRAM (M5M5256DVP-70G, 32-Kword × 8-bit)
A14 to A0 S OE W
D15 to D8 8
DQ8 to DQ1
Following signals are connected to JA1: PC1/A1/ADTRG PC4/A4 to PC11/A11/TIOC1B/CTx0/TXD0
Application header (JA1)
1
8
8 15 to 22 ADTRG
IOPort_0 to IOPort_7
Following signals are connected to JA2 PC13/A13/IRQ0/TCLKB PC14/A14/IRQ1/TCLKC PC15/A15/IRQ2/TCLKD PC12/A12/TCLKA PC13/A13/IRQ0/TCLKB
Application header (JA2)
1
7
IRQ0
1
9
IRQ1
1
23
IRQ2
1
25
TCLKA
1
26
TCLKB
Following signals are connected to JA3 PC15/A15/IRQ2/TCLKD to PC1/A1/ADTRG PA0/RXD0/CS0/CRx0/IRQ4 PA17/RD PA16/WRL PA15/WRH PD15/D15/TIOC4DS to PD0/D0
Application header (JA3)
15 16 to 2
A15 to A1
45
CS0
25
RD
48
WRL
47
WRH
16
36 to 17
D15 to D0
Following signals are connected to JA5 PA0/RXD0/CS0/CRx0/IRQ4 PC8/A8/CRx0/RXD0/POE4 PC14/A14/IRQ1/TCLKC, PC15/A15/IRQ2/TCLKD PD15/D15/TIOC4DS to PD5/D5/TIC5US
Application header (JA5)
6 CRx0
1
16 M2_POE
2 17, 18 M2-related signal (CLK)
11
11 to 15, 19 to 24 M2-related signal
Following signals are connected to JA6
PD4/D4/TIC5W/SCK2
3
to PD2/D2/TIC5U/RXD2 Note: Zero-ohm resistors to select signals are not indicated.
Figure 2.2 SRAM Configuration
Application header (JA6) 14 to 16
M1-related signal
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Nov. 08, 2010
SH7239 CPU Board R0K572390 Figure 2.3 shows SRAM read/write timing chart. Table 2.2 lists the Bus State Controller settings.
25 ns CK A15 to A1 CS0 RD WRL, WRH
2. Functions
D15 to D0
Read data
Write data
This is an example when bus clock is at 40 MHz.
Figure 2.3 SRAM Read/Write Timing Chart
Table 2.2 Bus State Controller Settings
User Area CS0
Target Device M5M5256DVP-70G
Setting
CS0 space bus control register (CS0BCR):
Recommended value: H'0240 0400
Number of idles between Read-Write cycles:
IWRWD [2:0] = IWRWS [2:0] = B'001; 1 idle cycle inserted
Memory:
TYPE [2:0] = B'000; normal space
Data bus width: BSZ [1:0] = B'10; 16-bit bus
CS0 space wait control register (CS0WCR):
Recommended value: H'0000 0940
_______
_____ _________
Number of delay cycles from address, CS0 assertion to RD, WRxx
assertion:
SW [1:0] = B'01; 1.5 cycles
Number of access wait cycles:
WR [3:0] = B'0010; 2 cycles
External wait mask specification:
WM = B'1; Ignore external wait input
_____ _________
_______
Number of delay cycles from RD, WRxx, negation to address, CS0
negation:
HW [1:0] = B'00; 0.5 cycles
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SH7239 CPU Board R0K572390
2. Functions
2.3.2 EEPROM
The R0K572390 includes a 64-KB EEPROM (64-Kword × 8-bit). The SH7239 Renesas Serial Peripheral Interface
controls the EEPROM. Pins to control EEPROM are also connected to the user switch SW2, and application headers
_______
_______
(JA1, JA2, and JA3) to be multiplexed with SCI channel 1 pin, MTU2 pins, IRQ3, CS3, and CS6 signals. Note that
these signals cannot be used at the same time. Figure 2.4 shows the SH7239 and EEPROM configuration.
SH7239
78 PA9/IRQ3/TCLKD/CS3/SSL0/SCK0
79 PA8/IRQ4/TCLKC/CS4/MISO/RXD1
80 PA7/IRQ5/TCLKB/CS5/MOSI/TXD1
81 PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1
VCC
EEPROM (R1EX25512ATA00A,
64-Kword × 8-bit)
S Q D C
W HOLD
Not installed
VSS
Application header (JA1) 23
IRQ3
Application header (JA2) 8
SCIaRX 6
SCIaTX 10
SCIaCK 21
TCLKA 22
TCLKB
Switch module IRQ3
Application header (JA3) 27
CSa 28
CSb
Note: Zero-ohm resistors to select signals are not indicated.
Figure 2.4 EEPROM Configuration
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SH7239 CPU Board R0K572390
2. Functions
2.4 Serial Port Interface
On the R0K572390, SH7239 SCI channel 2 is connected to the serial port connector (J8) via the RS-232C transceiver. Also, the SH7239 SCI channel 2 is connected to pins 7 and 8 of the application header (JA6), pin 11 (used as the TIOC3C) of the application header (JA2). Install zero-ohm resistor in appropriate pin to connect pins 5 and 6 of the application header (JA6) to the serial port connector (J8) via the RS-232C transceiver. When using the SH7239 SCI channel 2 as the serial port, it cannot be used as the application header.
To use the serial port connector (J8) in boot mode, remove zero-ohm resistors R59 and R60 to connect signals PE10 and PE7 between the RS-232C transceiver and the SH7239. Then, install zero-ohm resistors R166 and R167 (not installed by default) to connect signals PB3 and PB2 between the RS-232C transceiver and the SH7239. Note that the H-UDI port connector cannot be used.
Figure 2.5 shows the serial port block diagram.
VCC
SH7239
8 PE10/TIOC3C/DREQ3/TXD2/SSL3
22 k
22 k
VCCQ
2 PE7/TIOC2B/UBCTRG/RXD2/SSL1
22 k × 2
52 PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO
51 PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI
VCC
H-UDI port connector block
TDO TDI
10 k × 2
R59 0
RS-232C transceiver
R166 Not installed
R60 0
Serial port connector (J8)
0×4
R54 0
R55 R58 R61
R49 0 R56 0
R63
R65
R167
Not installed
VSS
Application header (JA6)
5 RS232TX
6 RS232RX
8 SCIbTX
7 SCIbRX
Application header (JA2) 11 M1_UD
0 R66 0 VSS
Not installed when using a socket with the straight cable
Not installed when using a plug with the crossover cable (default)
Male plug with the crossover cable
Female socket with the straight cable
GND 5
9
1 6
4
2
8
7
3
3
7
8
2
4
6
9
1
5
GND
Note: Some zero-ohm resistors to select signals are not indicated.
· To use the Serial port connector (J8) in boot mode Remove zero-ohm resistors (R59 and R60) connecting signals PE10 and PE7 between the RS-232C transceiver and the SH7239. Then, install zero-ohm resistors (R166 and R167, not installed by default) to connect signals PB3 and PB2. Note that the H-UDI port connector cannot be used.
Figure 2.5 Serial Port Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.5 I/O Ports
All SH7239 signals are connected to common ring connectors on the R0K572390. Most of the I/O ports are connected to application headers. Table 2.3 to Table 2.6 list I/O port functions. Some I/O ports are also connected to devices, I/O connectors, switches and LEDs. For details, refer to chapter 3 Operating Specifications.
Table 2.3 I/O Port Functions (1/4)
SH7239
Common ring connector
Application header
No.
Pin Name
J1 J2 J3 J4 JA1 JA2 JA3 JA5 JA6
Function
_____________
1
WDTOVF
1
_____________
[5]
WDTOVF
_____________
2
PE7/TIOC2B/UBCTRG/RXD2/SSL1 2
(7)
RXD2
3
PE8/TIOC3A/SCK2/DREQ2/SSL2
3
(10), SCK2, TIOC3A
[13]
4
VCC
4
5
VSS
5
______________
6
PB16/AUDSYNC
6
7
PB17/AUDCK
7
8
PE10/TIOC3C/TXD2/DREQ3/SSL3 8
[11]
(8)
TIOC3C, TXD2
9
PE9/TIOC3B/DACK2
9
13
TIOC3B
10 PE11/TIOC3D/DACK3
10
14
TIOC3D
11 PE12/TIOC4A
11
_________
12 PE13/TIOC4B/MRES
12
15
TIOC4A
17
TIOC4B
13 PE14/DACK0/TIOC4C
13
_____________
14 PE15/DACK1/TIOC4D/IRQOUT
14
[16]
(2)
TIOC4C,
DACK0
18
TIOC4D
15 VSS
15
16 PE0/TIOC0A/TIOC4AS/DREQ0
16
(23) (7)
(1)
TIOC0A,
DREQ0
17 PE1/TIOC0B/TIOC4BS/TEND0
17
(9)
(9)
(3)
TIOC0B,
TEND0
18 PE2/TIOC0C/TIOC4CS/DREQ1
18
(23)
(10)
TIOC0C
19 PE3/TIOC0D/TIOC4DS/TEND1
19
_________
20 PE4/TIOC1A/SCK3/POE8/IRQ4
20
(14) [16] TIOC0D
(23)
[9], (11), TIOC1A, IRQ4,
(12) (14) SCK3
21 PE5/TIOC1B/TIOC3BS/TXD3
21
[19]
(9)
TIOC1B, TXD3
22 PE6/TIOC2A/TIOC3DS/RXD3
22
[20]
(13) (12) TIOC2A, RXD3
_____
23 PA17/RD
23
(15)
_____
25
RD
24 VCL
25 VSS
25
26 PA18/CK
26
_______
27 PA16/WRL
27
_______
28 PA15/WRH
28
[44] 48 47
CK
_______
WRL
_______
WRH
Notes: 1. Brackets [ ] indicate the signals connected to the CPU pin via a device, and zero-ohm resistor (installed).
2. Parentheses ( ) indicate the signals connected to the CPU pin via zero-ohm resistor (NOT installed). Remove or install zero-ohm resistors according to connectors and pins to use. No signal conflicts are allowed.
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SH7239 CPU Board R0K572390
2. Functions
Table 2.4 I/O Port Functions (2/4)
SH7239
Common ring connector
Application header
No.
Pin Name
_________
29 PC0/A0/POE0/IRQ4
___________
30 PC1/A1/ADTRG
J1 J2 J3 J4 JA1 JA2 JA3 JA5 JA6 Function
_________
29
24
1
POE0,
A0
___________
30
8
2
ADTRG,
A1
31 PC2/A2
1
3
A2
32 PC3/A3
2
4
A3
33 PC4/A4
3
(15)
5
PC4, A4
34 PC5/A5
4
(16)
6
PC5, A5
35 PC6/A6
5
(17)
7
PC6, A6
36 PC7/A7
6
(18)
8
PC7, A7
37 VSS
7
38 VCC
_________
39 PC8/A8/CRx0/RXD0/POE4
8
9
(19)
9
16
PC8, A8,
_________
POE4
40 PC9/A9/CTx0/TXD0/SCK0
10
(20)
10
PC9, A9
41 PC10/A10/TIOC1A/CRx0/RXD0
11
(21)
11
PC10, A10
42 PC11/A11/TIOC1B/CTx0/TXD0
12
(22)
12
PC11, A11
43 PC12/A12/TCLKA
13
25
13
TCLKA,
A12
44 PC13/A13/IRQ0/TCLKB
14
[7], 14
IRQ0,
26
TCLKB,
A13,
45 PC14/A14/IRQ1/TCLKC
15
[9]
15
(17)
IRQ1,
A14,
TCLKC
46 PC15/A15/IRQ2/TCLKD
16
[23] 16
(18)
IRQ2,
A15,
TCLKD
47 PB0/A16/IRQ0/TIOC2A/TMS
17
___________ __________
48 PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/
18
________
TRST
(37)
A16
(38)
A17
49 VCC
19
50 VSS
20
_________
51 PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI
21
_________ _____
52 PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH
22
/TDO
________ ________ _____
53 PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/B S
23
/TCK
(39) (40), (46) (45)
A18
_____
A19, AH
A20
54 VCL
Notes: 1. Brackets [ ] indicate the signals connected to the CPU pin via a device, and zero-ohm resistor (installed).
2. Parentheses ( ) indicate the signals connected to the CPU pin via zero-ohm resistor (NOT installed). Remove or install zero-ohm resistors according to connectors and pins to use. No signal conflicts are allowed.
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SH7239 CPU Board R0K572390
2. Functions
Table 2.5 I/O Port Functions (3/4)
SH7239
Common ring connector
Application header
No.
Pin Name
J1 J2 J3 J4 JA1
JA2
JA3
JA5
JA6
Function
55 VSS
25
56 PD0/D0
26
17
D0
57 PD1/D1
27
18
D1
58 PD2/D2/TIC5U/RXD2
28
19
[14]
D2, TIC5U
59 PD3/D3/TIC5V/TXD2
29
20
[15]
D3, TIC5V
60 PD4/D4/TIC5W/SCK2
30
21
[16]
D4, TIC5W
61 PD5/D5/TIC5US
1
22
[12]
D5, TIC5US
62 PD6/D6/TIC5VS
2
23
[13]
D6, TIC5VS
63 PD7/D7/TIC5WS
3
24
[14]
D7, TIC5WS
64 VCC
4
65 VSS
5
66 PB20/AUDATA0
6
67 PB21/AUDATA1
7
68 PD8/D8/TIOC3AS/
8
AUDATA0
29
[15]
D8, TIOC3AS
69 PD9/D9/TIOC3CS/
9
AUDATA1
30
(11)
D9, TIOC3CS
70 PD10/D10/TIOC3BS/
10
AUDATA2
31
19
D10, TIOC3BS
71 PD11/D11/TIOC3DS/
11
AUDATA3
32
20
D11, TIOC3DS
72 PD12/D12/TIOC4AS/
12
______________
AUDSYNC
33
21
D12, TIOC4AS
73 PD13/D13/TIOC4BS/
13
AUDCK
34
23
D13, TIOC4BS
74 PD14/D14/TIOC4CS
14
35
22
D14, TIOC4CS
75 PD15/D15/TIOC4DS
15
36
24
D15, TIOC4DS
76 VSS
16
77 VCC
______
78 PA9/IRQ3/TCLKD/CS3
/SSL0/SCK0
______
79 PA8/IRQ4/TCLKC/CS4
/MISO/RXD1
______
80 PA7/IRQ5/TCLKB/CS5
/MOSI/TXD1
______
81 PA6/IRQ6/TCLKA/CS6
/RSPCK/SCK1
______
82 PA0/RXD0/CS0/CRx0/
IRQ4
______
83 PA1/TXD0/CS1/CTx0/
IRQ5
17
18
[23]
(27)
19
8
20
(6),
[22]
21
(10),
(28)
[21]
22
(45)
(6)
23
(5),
[10]
______
IRQ3, CS3
RXD1
TXD1, TCLKB
_S_C___L_K1,TCLKA, CS6
______
CS0, CRx0
CTx0, IRQ5
Notes: 1. Brackets [ ] indicate the signals connected to the CPU pin via a device, and zero-ohm resistor (installed).
2. Parentheses ( ) indicate the signals connected to the CPU pin via zero-ohm resistor (NOT installed). Remove or install zero-ohm resistors according to connectors and pins to use. No signal conflicts are allowed.
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SH7239 CPU Board R0K572390
2. Functions
Table 2.6 I/O Port Functions (4/4)
SH7239
Common ring connector
Application header
No.
Pin Name
J1 J2 J3
J4 JA1
JA2 JA3 JA5 JA6
Function
84 XTAL
(24)
85 VSS
25
86 EXTAL
(26)
(2)
EXTAL
87 NMI
______
88 RES
27
3
28
[1]
NMI
______
RES
89 PLLVSS
90 PLLVCC
91 PB18/AUDATA2
1
92 PB19/AUDATA3
2
93 VSS
3
________________ ____________
94 FWE/ASEBRKAK/ASEBRK
4
____________
95 ASEMD0
5
96 AVREFVSS
6
97 AVSS
7
6
AVSS
98 PF0/AN0
8
9
AN0
99 PF1/AN1
9
10
AN1
100 PF2/AN2
10 11
AN2
101 PF3/AN3
11 12
AN3
102 AVCC
12 5
AVCC
103 AVREF
13 7
AVREF
104 AVREF
14
105 AVCC
15
106 PF4/AN4
16
1
AN4
107 PF5/AN5
17
2
AN5
108 PF6/AN6
18
3
AN6
109 PF7/AN7
19
4
AN7
110 AVSS
20
111 AVREFVSS
21
112 PF8/AN8
22 [15]
PF8
113 PF9/AN9
23 [16]
PF9
114 PF10/AN10
24 [17]
PF10
115 PF11/AN11
25 [18]
PF11
116 PF12/AN12
26 [19]
PF12
117 PF13/AN13
27 [20]
PF13
118 PF14/AN14
28 [21]
PF14
119 PF15/AN15
29 [22]
PF15
120 MD0
30
Notes: 1. Brackets [ ] indicate the signals connected to the CPU pin via a device, and zero-ohm resistor (installed).
2. Parentheses ( ) indicate the signals connected to the CPU pin via zero-ohm resistor (NOT installed). Remove or install zero-ohm resistors according to connectors and pins to use. No signal conflicts are allowed.
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SH7239 CPU Board R0K572390
2. Functions
2.6 RCAN Interface
The R0K572390 includes a 3-pin RCAN port connector (J9). The SH7239 CTx0 signal (CAN signal) is connected to J9 connector via a zero-ohm resistor and the RCAN transceiver IC, and the CRx0 signal is connected to J9 connector via a zero-ohm resistor, the level shifter, and the RCAN transceiver IC. CTx0 and CRx0 signals are also connected to the application header (JA5), which can be specified instead of using RCAN. When using the application header (JA5), remove zero-ohm resistors between the SH7239 and the RCAN transceiver IC, and install zero-ohm resistors between the SH7239 and the application header (JA5). Do not use CAN signals both at the RCAN port connector and the application header.
_______
_______
SH7239 PA0/RXD0/CS0/CRx0/IRQ4 pin is multiplexed with CS0 pin. Remove or install zero-ohm resistors to specify
the pin function. When specifying the CRx0 pin function to use the RCAN port connector, use the pin as default. To
_______
specify the CS0 pin function, make sure to remove the zero-ohm resistor R41. RCAN port connector (J9) cannot be
_______
_______
used with the CS0 pin function. Make sure not to specify PA0/RXD0/CS0/CRx0/IRQ4 pin as output when the zero-
ohm resistor R41 is installed.
Figure 2.6 shows the RCAN interface block diagram.
SH7239 82
PA0/RXD0/CS0/CRx0/IRQ4
VCC
Not installed JP2
R41, 0
R44, 0 Not installed VSS
VCC VCCA
5VCC VCCB
5VCC
RCAN
22 k transceiver IC HA13721RPJE
A
B
RXD
DIR
GND
CANH
TXD
VSS
CANL
RCAN port connector
(J9)
1 2 3
22 k
VSS
83 PA1/TXD0/CS1/CTx0/IRQ5
R39, 0
R40, 0 Not installed
Application header (JA5)
6 CAN1RX
5 CAN1TX
· Specifying pin functions of the RCAN-related pins When using the RCAN port connector: Leave the pin as default When connecting the application header (JA5): Remove zero-ohm resistors (R39, R41), and install resistors (R40, R44) When using the pin as CS0: Remove a zero-ohm resistor (R41). Install the resistor (R30) to use SRAM on the board.
Figure 2.6 RCAN Interface Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.7 LCD Interface
The R0K572390 includes a 14-pin character LCD interface connector (J10). The SH7239 PC2 to PC7 pins control the character LCD module. These pins are also used as address to SRAM (optional) on the R0K572390. Pins PC2 to PC7 are also connected to application headers (JA1, JA3). No signal conflicts are allowed.
Figure 2.7 shows the character LCD interface block diagram.
SH7239 33
PC4/A4 34
PC5/A5 35
PC6/A6 36
PC7/A7
31 PC2/A2
32 PC3/A3
100 k VSS
LCD interface connector (J10)
LCDD7 14
LCDD5 12
10
5VCC
8
LCDE
6
LCDRS 4
2
13 LCDD6
11 LCDD4
9
7
5 R/W (Fixed to write)
3
1
1 k
VSS
Not installed 0×4
Application header (JA1)
15 IOPort_0
16 IOPort_1
17 IOPort_2
18 IOPort_3
Application header (JA3)
3 A2
4 A3
5 A4
6 A5
7 A6 8 A7
Figure 2.7 LCD Interface Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.8 H-UDI Interface
The R0K572390 includes two H-UDI port connectors (J6, J7) to connect to the E10A-USB emulator.
____________________ _______________
The SH7239 FWE/ASEBRKAK/ASEBRK pin is connected to the reset module. The reset module produces FWE signal
____________________
logic using the reset switch and user switch SW1 (NMI), and switches signals between FWE and ASEBRKAK/
_______________
_______________
ASEBRK using the ASEMD0 signal.
___________
JTAG-related signals (TCK, TRST, TMS, TDO, and TDI) of the H-UDI-related signals cannot be used as other
functions. However, TXD3 and RXD3 signals can be used only in boot mode.
Figure 2.8 shows the H-UDI port connector block diagram.
SH7239
7 PB17/AUDCK
6 PB16/AUDSYNC
66 PB20/AUDATA0
67 PB21/AUDATA1
91 PB18/AUDATA2
92 PB19/AUDATA3
10 k × 11
VCC
H-UDI port connector
(J7, 38-pin) (2)
14 UVCC
12 UVCC_AUD
6 AUDCK
32 AUDSYNC
30 AUDATA0
28 AUDATA1
26 AUDATA2
24 AUDATA3
53 PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK
48 PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST
52 PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO
47 PB0/A16/IRQ0/TIOC2A/TMS
51 PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI
15 TCK
21 TRST
11 TDO
17 TMS
19 TDI
88 RES
94 FWE/ASEBRKAK/ASEBRK
120 MD0
95 ASEMD0
0 optional
9 RES
8 ASEBRKAK/ASEBRK
2 NC
3 ASEMD0
5 GND
VSS
H-UDI port connector
VCC
(J6, 14-pin)
Reset module
14-pin connector pin assignment (1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
8 UVCC
1 TCK
3 TRST
5 TDO
9 TMS
11 TDI
13 RES
7 ASEBRKAK/ASEBRK
10 NC
4 ASEMD0
2,12,14 GND
VSS
Other pins of the H-UDI port connector are not connected (open). Notes: 1: These pin assignments differ from those of the E10A-USB emulator, however, the physical layouts are the same. 2: To use 38-pin H-UDI port connector, 38-pin Mictor connector "HS0005ECK01H" (E10A-USB optional cable) is required.
Figure 2.8 H-UDI Port Connector Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.9 Switches and Jumpers
____________
The R0K572390 includes push switches to reset, NMI and IRQ interrupt input, ADTRG input, and DIP switches to set
the operating mode. Reset switch and user switch SW1 (NMI) sets the SH7239 programming mode. Refer to 2.13 Reset
Module for details on the reset switch circuit and mode setting DIP switches.
____________
User switch SW2 (IRQ3) is connected to PC1/A1/ADTRG pin via a zero-ohm resistor R82 (not installed) and a jumper
____________
____________
JP3 (not populated) to multiplex the pin with ADTRG input. When specifying the ADTRG input, install the resistor
____________
R82. Make sure not to specify the PC1/A1/ADTRG as output when R82 is installed.
The R0K572390 provides jumpers to select the power supply source, and connects the RCAN signal. For details on jumpers, refer to Chapter 3 Operating Specifications.
Figure 2.9 shows the block diagram of interrupt switches.
User switch SW3 (IRQ4)
VCC
10 k 220
VSS
VCC
10 k 220
User switch SW2 (IRQ3)
VSS
VCC
10 k 220
User switch SW1 (NMI)
VSS
VCC
4.7 k 0
Open drain
VCC
Not installed
JP3
4.7 k
Open drain
R82 R81 0 × 2
Open drain
VCC
4.7 k 0
SH7239
29 PC0/A0/POE0/IRQ4
30 PC1/A1/ADTRG
78 PA9/IRQ3/TCLKD/CS3/SSL0/SCK0
87 NMI
Application header (JA1) 8
ADTRG 0 23
IRQ3/M2_HSIN0
Application header (JA2) 24
M1_POE 3
NMI
1 2 27
0 Not installed
Application header (JA3)
A0 A1 CS3n
Reset module
Figure 2.9 Switch Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.10 LEDs and Potentiometer
The R0K572390 includes a power LED (POWER), a boot mode LED (BOOT), and four user LEDs (LED0 to LED3). The POWER indicates the CPU board is ON. The BOOT indicates that the MCU is in boot mode (FWE = "H"). The SH7239 PE12 to PE15 pins control user LEDs. Also, the R0K572390 includes a potentiometer, which is connected to AN8 pin of the SH7239 A/D Converter.
Figure 2.10 shows LED and potentiometer block diagram.
VCC
LED0 Green
LED1 Orange
LED2 Red
LED3 Red
POWER Green
VSS
BOOT Orange
AVCC
SH7239
11 PE12/TIOC4A
12 PE13/TIOC4B/MRES
13 PE14/DACK0/TIOC4C
14 PE15/DACK1/TIOC4D/IRQOUT
VR1 10 k
100 k
112 PF8/AN8
AVSS
0
Application header(JA1)
15 PORT
Application header(JA2)
15
M1_VP
17
M1_WP
16
M1_VN
18
0
M1_WN
Not installed
Not installed 0
Application header (JA6) 2
DACK
BOOT_MODE
Reset module
VSS
Figure 2.10 LED and Potentiometer Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.11 Power Module
A 5 V power supply is input to the R0K572390, and the regulator on the R0K572390 generates 3.3 V. As it is a step down DC-DC switching regulator, the desired voltage can be generated by changing the resistance value.
As the power select jumper JP1 is not populated by default, VCC is fixed to 3.3 V on the R0K572390C000BR with the SH7239A MCU. On the R0K572390C020BR with the SH7239B, VCC is fixed to 5 V.
The R0K572390 can use a 5 V DC output regulated power supply via the external power supply connector (J11). The SH7239 system power supply (VCC) and analog power supply (AVCC) can be supplied from external source. Apply the power to the system power supply via the external power supply connector (J13), and to the analog power supply via the external power supply (J12). To supply the power to the analog power supply individually, remove the zero-ohm resistor R71 which connects the 5 V power supply and analog power supply. External power supply connectors (J11 to J13) are not installed by default. Figure 2.11 shows the R0K572390 power supply circuit block diagram.
Note: When operating the R0K572390, make sure to apply power from the DC power jack (J5) or external power supply connectors (J11 to J13).
PS: Power supply
AVREF
5VCC
R71, 0
J5 DC power
jack 5 VDC input
5VCC
5VCC VSS External
PS
J11
Not installed
VSS
0
VSS
AVSS
AVREFVSS
5 V to 3.3 V
AVCC
AVCC 0
AVCC External
PS
J12
Not installed
PLLVCC
JP1 AVSS
1 2
3
VCC
VCC
R70, 0
(1)
VCC
External
J13 PS
Not installed
VSS
SH7239
AVREF AVCC
PLLVCC VCC SRAM EEPROM RCAN/Level shifter
LCD
Note 1: Selecting the system power supply R0K572390C000BR: Install R70, remove JP1, and fix to 3.3 V R0K572390C020BR: Remove R70, connect pins 1 and 2 of JP1, and fix to 5 V
· Connect common ring connectors to following pins of the VCC, AVCC, and AVREF (Not connected to the PLLVCC) VCC: J1-4, J2-8, J2-19, J3-4, J3-17, AVCC: J4-12, J4-15, AVREF: J4-13, J4-14
· Connect application headers to following pins of the 5VCC, 3VCC, AVCC, and AVREF 5VCC: JA1-1, VCC: JA1-3, AVCC: JA1-5, AVREF: JA1-7
Figure 2.11 Power Supply Circuit Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.12 Clock Module
The R0K572390 connects a 10 MHz or 12.5 MHz crystal unit to SH7239 XTAL and EXTAL pins, according to the type of MCU.
· R0K572390C000BR connects 10 MHz crystal unit · R0K572390C020BR connects 12.5 MHz crystal unit
Alternatively, an input clock signal can be provided to EXTAL pin via the Application header (JA2). Remove the crystal unit (X1) and install a zero-ohm resistor (R2, not installed by default) to input clock via JA2. Also, install a pull-up resistor (R1) if needed.
Figure 2.12 shows the R0K572390 clock module block diagram.
SH7239
VCC Not installed
Application header (JA2) 2
CON_EXTAL
R1, 22 k
R2, 0
EXTAL 86
0
Application header (JA3)
26 22 44
PA18/CK
SDCLK
XTAL 84
0 1 M
12 pF VSS
X1 (1)
Note 1: Install either of the following crystal unit to X1 R0K572390C000BR: 10 MHz R0K572390C020BR: 12.5 MHz
12 pF
VSS
Figure 2.12 Clock Module Block Diagram
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SH7239 CPU Board R0K572390
2. Functions
2.13 Reset Module
_______
The R0K572390 reset module generates RES signal using the power-on reset, and reset switch. Also, the reset module
controls the SH7239 boot mode (FWE signal) using the mode setting DIP switches (SW4), reset switch, user switch SW1
____________________ _______________
______________
(NMI) and flip-flop, and controls FWE/ASEBRKAK/ASEBRK signal using the ASEMD0 signal.
____________________ _______________
For details on how to control SH7239 boot mode and FWE/ASEBRKAK/ASEBRK signal, refer to 3.2.2 in Chapter 3
Operating Specifications. Figure 2.13 shows the R0K572390 reset module block diagram.
VCC 100 nF 100 k
VCC 10 k
BOOT_MODE
LED module
NMI Switch module
VCC 15 k
10 k
Install R11 only on the R0K572390C020BR
M51957BFP
R11, 12 k
IN
OUT
100 Cd
0.1 uF
VCC 4.7 k 0
VSS Reset switch
VSS
PR
D
Q
CK
Q
CLR
VCC
VCC
22 k × 2
4
2
3
1
VSS SW4
VCC 10 k
H-UDI module (SH7239 pins)
FWE/ASEBRKAK/ASEBRK
RES
ASEMD0
TRST
MD0
Reset IC output delay time: td = 0.34 × Cd (pF) = 34 ms
SW4 setting
*(Min: 16 ms, Max: 70 ms)
SW4-1: Set MD0 pin
Reset IC output detect voltage · R0K572390C000BR (VCC = 3.3 V): Ra = 15 k, Rb = 10 k Vs = 1.25× Ra + Rb = 3.125 V Rb · R0K572390C000BR (VCC = 5 V): Ra = 15 k, Rb = 5.45 k
When SW4-1 is ON: MD0 = low When SW4-1 is OFF: MD0 = high SW4-2: Set FWE pin When SW4-2 is ON: FWE = high When SW4-2 is OFF: FWE setting depends on the reset switch
Vs = 1.25×Ra + Rb = 4.6875V Rb
and NMI switch (SW1)
Figure 2.13 Reset Module Block Diagram
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SH7239 CPU Board R0K572390
3. Operating Specifications
3. Operating Specifications
3.1 Connectors
Figure 3.1 shows the connector assignments for the R0K572390.
Top view of the component side
JA5, JA1 Application headers
J8 Serial port connector
J10 LCD interface connector
JA5
LCD
JP2
(J10)
Serial
(J8) JA1
RESET
SW4
BOOT
PWR J5 (J5) DC power jack
J9 RCAN port connector
RCAN (J9)
J3 X1
J1, J2, J3, J4 J4 SH7239 Common ring
JA3
connectors
J2
POWER
LED0
H-UDI (J6)
JP1 LED1
LED2
LED3 J11 H-UDI (J7)
J6 14-pin H-UDI port connector
J11, J12, J13 External power supply connectors
J12
J7
38-pin H-UDI port
J1
J13
connector
JP3
JA6
JA2
SW3 SW2 SW1
Top view of the solder side
JA6, JA2 Application headers
JA3 Application header
JA1
JA5
JP2
JP1
J3 U4
EEPROM
JA3 J2
J11 J12 J13
JP3
U2 U3
SRAM SRAM Optional
J1
JA2
J9 J4
JA6
Note: J1 to J4, J11 to J13, JA1, JA2, JA3, JA5, and JA6 are not installed by default.
Figure 3.1 Connector Assignments
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.1 Application Headers (JA1, JA2, JA3, JA5, JA6)
The R0K572390 includes through-holes for mounting application headers (JA1, JA2, JA3, JA5, and JA6). MIL-STD connectors can be connected to through-holes to connect an expansion board.
Figure 3.2 shows the pin assignments for the application headers (top view of the component side).
Top view of the component side
1 25
1
23 24
JA5
2 26
JA1
2
50
49
JA3
JA6
1 25
JA2
23 24
2 26
2
1
1 2
Figure 3.2 Application Header Pin Assignments (Top View of the Component Side)
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SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.1 lists the pin descriptions for JA1.
Table 3.1 JA1 Pin Descriptions
Pin No. 1
5VCC (1)
Signal Name
5VCC
Pin Function Used
2
GND
3
3VCC (1)
GND 3VCC
4
GND
5
AVCC (1)
GND AVCC
6
AGND
7
AVREF (1)
___________
8
PC1/A1/ADTRG
AGND
AVREF
___________
ADTRG
9
PF0/AN0
AN0
10
PF1/AN1
AN1
11
PF2/AN2
AN2
12
PF3/AN3
AN3
13
NC
14
NC
15
PF8/AN8, (1)
PC4/A4 (2)
16
PF9/AN9, (1)
PC5/A5 (2)
17
PF10/AN10, (1)
PC6/A6 (2)
18
PF11/AN11, (1)
PC7/A7 (2)
19
PF12/AN12, (1)
________
PC8/A8/CRx0/RXD0/POE4 (2)
20
PF13/AN13, (1)
PC9/A9/CTx0/TXD0/SCK0 (2)
21
PF14/AN14, (1)
PC10/A10/TIOC1A/CRx0/RXD0 (2)
22
PF15/AN15, (1)
PC11/A11/TIOC1B/CTx0/TXD0 (2)
_______
23
PA9/IRQ3/TCLKD/CS3/SSL0/SCK0, (1)
PE0/TIOC0A/TIOC4AS/DREQ0 (2)
PF8, PC4 PF9, PC5 PF10, PC6 PF11, PC7 PF12, PC8 PF13, PC9 PF14, PC10 PF15, PC11 IRQ3, TIOC0A
24
NC
25
NC
26
NC
Notes: 1. These pins are connected to through-holes via zero-ohm resistors (installed by default). 2. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default).
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SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.2 lists the pin descriptions for JA2.
Table 3.2 JA2 Pin Descriptions
Pin No.
Signal Name
Pin Function Used
1
RESET
2
EXTAL (2)
EXTAL
3
NMI
NMI
4
GND
______________
5
WDTOVF (1)
_______
6
PA7/IRQ5/TCLKB/CS5/MOSI/TXD1 (2)
7
PC13/A13/IRQ0/TCLKB, (1)
PE0/TIOC0A/TIOC4AS/DREQ0 (2)
_______
8
PA8/IRQ4/TCLKC/CS4/MISO/RXD1
9
PC14/A14/IRQ1/TCLKC, (1)
PE1/TIOC0B/TIOC4BS/TEND0 (2)
_______
10
PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1 (2)
11
PE10/TIOC3C/TXD2/DREQ3/SSL3 (1)
GND
______________
WDTOVF TXD1 IRQ0, TIOC0A RXD1 IRQ1, TIOC0B SCK1 TIOC3C
12
NC
13
PE9/TIOC3B/DACK2
TIOC3B
14
PE11/TIOC3D/DACK3
TIOC3D
15
PE12/TIOC4A
16
PE14/DACK0/TIOC4C (1)
__________
17
PE13/TIOC4B/MRES
______________
18
PE15/DACK1/TIOC4D/IRQOUT
19
PE5/TIOC1B/TIOC3BS/TXD3 (1)
20
PE6/TIOC2A/TIOC3DS/RXD3 (1)
_______
21
PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1 (1)
_______
22
PA7/IRQ5/TCLKB/CS5/MOSI/TXD1 (1)
23
PC15/A15/IRQ2/TCLKD, (1)
__________
PE4/TIOC1A/SCK3/POE8/IRQ4, (2)
PE2/TIOC0C/TIOC4CS/DREQ1 (2)
__________
24
PC0/A0/POE0/IRQ4
TIOC4A TIOC4C TIOC4B TIOC4D TIOC1B TIOC2A TCLKA TCLKB IRQ2, TIOC1A, TIOC0C
__________
POE0
25
PC12/A12/TCLKA
TCLKA
26
PC13/A13/IRQ0/TCLKB
TCLKB
Notes: 1. These pins are connected to through-holes via zero-ohm resistors (installed by default). 2. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default).
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SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.3 and Table 3.4 list the pin descriptions for JA3.
Table 3.3 JA3 Pin Descriptions (1/2)
Pin No. 1 2
__________
PC0/A0/POE0/IRQ4
____________
PC1/A1/ADTRG
Signal Name
Pin Function Used A0 A1
3
PC2/A2
A2
4
PC3/A3
A3
5
PC4/A4
A4
6
PC5/A5
A5
7
PC6/A6
A6
8
PC7/A7
A7
__________
9
PC8/A8/CRx0/RXD0/POE4
A8
10
PC9/A9/CTx0/TXD0/SCK0
A9
11
PC10/A10/TIOC1A/CRx0/RXD0
A10
12
PC11/A11/TIOC1B/CTx0/TXD0
A11
13
PC12/A12/TCLKA
A12
14
PC13/A13/IRQ0/TCLKB
A13
15
PC14/A14/IRQ1/TCLKC
A14
16
PC15/A15/IRQ2/TCLKD
A15
17
PD0/D0
D0
18
PD1/D1
D1
19
PD2/D2/TIC5U/RXD2
D2
20
PD3/D3/TIC5V/TXD2
D3
21
PD4/D4/TIC5W/SCK2
D4
22
PD5/D5/TIC5US
D5
23
PD6/D6/TIC5VS
D6
24
PD7/D7/TIC5WS
D7
_____
_____
25
PA17/RD
RD
26
NC
_______
27
PA9/IRQ3/TCLKD/CS3/SSL0/SCK0 (1)
_______
28
PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1 (1)
_______
CS3
_______
CS6
29
PD8/D8/TIOC3AS/AUDATA0
D8
30
PD9/D9/TIOC3CS/AUDATA1
D9
31
PD10/D10/TIOC3BS/AUDATA2
D10
32
PD11/D11/TIOC3DS/AUDATA3
______________
33
PD12/D12/TIOC4AS/AUDSYNC
D11 D12
34
PD13/D13/TIOC4BS/AUDCK
D13
35
PD14/D14/TIOC4CS
D14
36
PD15/D15/TIOC4DS
D15
Note: 1. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default).
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Nov. 08, 2010
SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.4 JA3 Pin Descriptions (2/2)
Pin No. 37 38 39 40 41
Signal Name
PB0/A16/IRQ0/TIOC2A/TMS (3)
____________ ___________
_________
PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST (3)
_________
PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI (3)
_________ _____
PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO (3)
________ _________ _____
PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK (3)
Pin Function Used A16 A17 A18 A19 A20
42
NC
43
NC
44
PA18/CK
CK
_______
45
PA0/RXD0/CS0/CRx0/IRQ4, (2)
_______
CS0,
_________ _________ _____
PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK (3)
_________
WAIT
_________ _____
_____
46
PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO (3)
AH
________
________
47
PA15/WRH
WRH
________
________
48
PA16/WRL
WRL
49
NC
50
NC
Notes: 1. These pins are connected to through-holes via zero-ohm resistors (installed by default) 2. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default). 3. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default). As these pins are multiplexed with H-UDI JTAG signals, these pins cannot be used when using the emulator.
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Nov. 08, 2010
SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.5 lists the pin descriptions for JA5.
Table 3.5 JA5 Pin Descriptions
Pin No.
Signal Name
Pin Function Used
1
PF4/AN4
AN4
2
PF5/AN5
AN5
3
PF6/AN6
AN6
4
PF7/AN7
_______
5
PA1/TXD0/CS1/CTx0/IRQ5 (2)
_______
6
PA0/RXD0/CS0/CRx0/IRQ4 (2)
AN7 CTx0 CRx0
7
NC
8
NC
_________
9
PE4/TIOC1A/SCK3/POE8/IRQ4, (1)
PE1/TIOC0B/TIOC4BS/TEND0 (2)
_______
10
PA1/TXD0/CS1/CTx0/IRQ5, (1)
PE2/TIOC0C/TIOC4CS/DREQ1 (2)
11
PD9/D9/TIOC3CS/AUDATA1 (2)
12
PD5/D5/TIC5US, (1)
__________
PE4/TIOC1A/SCK3/POE8/IRQ4, (2)
13
PD6/D6/TIC5VS, (1)
PE6/TIOC2A/TIOC3DS/RXD3 (2)
14
PD7/D7/TIC5WS, (1)
PE3/TIOC0D/TIOC4DS/TEND1 (2)
15
PD8/D8/TIOC3AS/AUDATA0 (1)
_________
16
PC8/A8/CRx0/RXD0/POE4
17
PC14/A14/IRQ1/TCLKC (2)
18
PC15/A15/IRQ2/TCLKD (2)
IRQ4, TIOC1A TIOC0B IRQ5, TIOC0O TIOC3CS TIC5US, TIOC1A TIC5VS, TIOC2A TIC5WS, TIOC0D TIOC3AS
_________
POE4 TCLKC TCLKD
19
PD10/D10/TIOC3BS/AUDATA2
TIOC3BS
20
PD11/D11/TIOC3DS/AUDATA3
________________
21
PD12/D12/TIOC4AS/AUDSYNC
TIOC3DS TIOC4AS
22
PD14/D14/TIOC4CS
TIOC4CS
23
PD13/D13/TIOC4BS/AUDCK
TIOC4BS
24
PD15/D15/TIOC4DS
TIOC4DS
Notes: 1. These pins are connected to through-holes via zero-ohm resistors (installed by default). 2. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default).
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Nov. 08, 2010
SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.6 lists the pin descriptions for JA6.
Table 3.6 JA6 Pin Descriptions
Pin No. 1 2 3
Signal Name PE0/TIOC0A/TIOC4AS/DREQ0 (2) PE14/DACK0/TIOC4C (2) PE1/TIOC0B/TIOC4BS/TEND0 (2)
Pin Function Used DREQ0 DACK0 TEND0
4
NC
5
RS232TX
6
______________
7
PE7/TIOC2B/UBCTRG/RXD2/SSL1 (2)
8
PE10/TIOC3C/TXD2/DREQ3/SSL3 (2)
9
PE5/TIOC1B/TIOC3BS/TXD3 (2)
10
PE8/TIOC3A/SCK2/DREQ2/SSL2 (2)
_________
11
PE4/TIOC1A/SCK3/POE8/IRQ4 (2)
12
PE6/TIOC2A/TIOC3DS/RXD3 (2)
13
PE8/TIOC3A/SCK2/DREQ2/SSL2 (1)
14
PD2/D2/TIC5U/RXD2, (1)
_________
PE4/TIOC1A/SCK3/POE8/IRQ4 (2)
15
PD3/D3/TIC5V/TXD2, (1)
PE6/TIOC2A/TIOC3DS/RXD3 (2)
16
PD4/D4/TIC5W/SCK2, (1)
PE3/TIOC0D/TIOC4DS/TEND1 (2)
RS232RX RXD2 TXD2 TXD3 SCK2 SCK3 RXD3 TIOC3A TIC5U, TIOC1A TIC5V, TIOC2A TIC5W, TIOC0D
17
NC
18
NC
19
NC
20
NC
21
NC
22
NC
23
NC
24
VSS
Notes: 1. These pins are connected to through-holes via zero-ohm resistors (installed by default). 2. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default)
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Nov. 08, 2010
SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.2 Common Ring Connectors (J1, J2, J3, J4)
The R0K572390 includes through-holes for installing common ring connectors (J1, J2, J3, and J4). These through-holes are connected to all the SH7239 signals, and MIL-STD connectors can be connected to through-holes to monitor SH7239 signals.
Figure 3.3 shows the pin assignment for the common ring connectors. Table 3.7 to Table 3.10 lists pin descriptions for common ring connectors.
Top view of the component side
35 36
1
2
J3
J4
1 2
36
35
J2
35
36
J1
2 1
2
1
36 35
Figure 3.3 Common Ring Connector Pin Assignments (Top View of the Component Side)
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SH7239 CPU Board R0K572390
Table 3.7 J1 Pin Descriptions
Pin No. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
______________
WDTOVF
Signal Name
PE8/TIOC3A/SCK2/DREQ2/SSL2
VSS
PB17/AUDCK
PE9/TIOC3B/DACK2
PE12/TIOC4A
PE14/DACK0/TIOC4C
VSS
PE1/TIOC0B/TIOC4BS/TEND0
PE3/TIOC0D/TIOC4DS/TEND1
PE5/TIOC1B/TIOC3BS/TXD3
_____
PA17/RD
VSS
________
PA16/WRL
_________
PC0/A0/POE0/IRQ4
NC
NC
NC
3. Operating Specifications
Pin No. 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
Signal Name
______________
PE7/TIOC2B/UBCTRG/RXD2/SSL1
VCC
________________
PB16/AUDSYNC
PE10/TIOC3C/TXD2/DREQ3/SSL3
PE11/TIOC3D/DACK3
_________
PE13/TIOC4B/MRES
_____________
PE15/DACK1/TIOC4D/IRQOUT
PE0/TIOC0A/TIOC4AS/DREQ0
PE2/TIOC0C/TIOC4CS/DREQ1
_________
PE4/TIOC1A/SCK3/POE8/IRQ4
PE6/TIOC2A/TIOC3DS/RXD3
NC
PA18/CK
________
PA15/WRH
____________
PC1/A1/ADTRG
NC
NC
NC
Table 3.8 J2 Pin Descriptions
Pin No. 1 3 5 7 9 11 13 15 17 19 21 23
25 27 29 31 33 35
Signal Name
PC2/A2
PC4/A4
PC6/A6
VSS
_________
PC8/A8/CRx0/RXD0/POE4
PC10/A10/TIOC1A/CRx0/RXD0
PC12/A12/TCLKA
PC14/A14/IRQ1/TCLKC
PB0/A16/IRQ0/TIOC2A/TMS
VCC
__________
PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI
_________ _ __ ___ __
P___B__4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/ BS/TCK
VSS
PD1/D1
PD3/D3/TIC5V/TXD2
NC
NC
NC
Pin No. 2 4 6 8 10 12 14 16 18 20 22 24
Signal Name
PC3/A3
PC5/A5
PC7/A7
VCC
PC9/A9/CTx0/TXD0/SCK0
PC11/A11/TIOC1B/CTx0/TXD0
PC13/A13/IRQ0/TCLKB
PC15/A15/IRQ2/TCLKD
____________ ___________
_________
PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST
VSS
_________ _____
PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO
NC
26
PD0/D0
28
PD2/D2/TIC5U/RXD2
30
PD4/D4/TIC5W/SCK2
32
NC
34
NC
36
NC
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SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.9 J3 Pin Descriptions
Pin No.
Signal Name
Pin No.
Signal Name
1
PD5/D5/TIC5US
2
PD6/D6/TIC5VS
3
PD7/D7/TIC5WS
4
VCC
5
VSS
6
PB20/AUDATA0
7
PB21/AUDATA1
8
PD8/D8/TIOC3AS/AUDATA0
9
PD9/D9/TIOC3CS/AUDATA1
11
PD11/D11/TIOC3DS/AUDATA3
10
PD10/D10/TIOC3BS/AUDATA2
________________
12
PD12/D12/TIOC4AS/AUDSYNC
13
PD13/D13/TIOC4BS/AUDCK
14
PD14/D14/TIOC4CS
15
PD15/D15/TIOC4DS
16
VSS
_______
17
VCC
18
PA9/IRQ3/TCLKD/CS3/SSL0/SCK0
_______
_______
19
PA8/IRQ4/TCLKC/CS4/MISO/RXD1
20
PA7/IRQ5/TCLKB/CS5/MOSI/TXD1
_______
_______
21
PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1
22
PA0/RXD0/CS0/CRx0/IRQ4
_______
23
PA1/TXD0/CS1/CTx0/IRQ5
24
XTAL (1)
25
VSS
27
NMI
26
EXTAL (1)
_______
28
RES
29
NC
30
NC
31
NC
32
NC
33
NC
34
NC
35
NC
36
NC
Note: 1. These pins are connected to through-holes via zero-ohm resistors (NOT installed by default).
Table 3.10 J4 Pin Descriptions
Pin No. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
Signal Name PB18/AUDATA2 VSS
_____________
ASEMD0 AVSS PF1/AN1 PF3/AN3 AVREF AVCC PF5/AN5 PF7/AN7 AVREFVSS PF9/AN9 PF11/AN11 PF13/AN13 PF15/AN15 NC NC NC
Pin No. 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
Signal Name PB19/AUDATA3
_________________ _____________
FWE/ASEBRKAK/ASEBRK AVREFVSS PF0/AN0 PF2/AN2 AVCC AVREF PF4/AN4 PF6/AN6 AVSS PF8/AN8 PF10/AN10 PF12/AN12 PF14/AN14 MD0 NC NC NC
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.3 DC Power Jack (J5) The R0K572390 includes a DC power jack (J5). Figure 3.4 shows the pin assignments for J5. Table 3.11 lists pin descriptions for J5.
Top view of the component side
G
2
J5
3
V
Board edge
G
1
4
V
Table 3.11 J5 Pin Descriptions
Pin No. 1 2 3 4
GND GND +5 V +5 V
Figure 3.4 J5 Pin Assignments
Signal Name
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.4 H-UDI Port Connectors (J6 and J7) The R0K572390 includes 14-pin (J6) and 38-pin (J7) H-UDI port connectors to connect E10A-USB emulator. Figure 3.5 shows the pin assignments for J6 and J7. Table 3.12 and Table 3.13 list the pin descriptions for J6 and J7.
Top view of the component side
Board edge
J6
1
2
13
14
J7
38
37
2
1
Figure 3.5 J6 and J7 Pin Assignments
Table 3.12 J6 Pin Descriptions
Pin No.
Signal Name
Pin No.
Signal Name
1
TCK
_________
3
TRST
2
GND
_____________
4
ASEMD0
5
TDO
_________________ _____________
7
ASEBRKAK/ASEBRK
6
NC
8
UVCC
9
TMS
10
NC
11
TDI
_______
13
RES
12
GND
14
GND
Note: Pin assignments for 14-pin H-UDI port connector (J6) differ from those of the E10A-USB emulator, however, the physical layouts are the same.
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SH7239 CPU Board R0K572390
3. Operating Specifications
Table 3.13 J7 Pin Descriptions
Pin No.
Signal Name
Pin No.
Signal Name
1
NC
_____________
3
ASEMD0
2
NC
4
NC
5
GND
7
NC
_______
9
RES
6
AUDCK
_________________ _____________
8
ASEBRKAK/ASEBRK
10
NC
11
TDO
12
UVCC_AUD
13
NC
14
UVCC
15
TCK
16
NC
17
TMS
18
NC
19
TDI
_________
21
TRST
20
NC
22
NC
23
NC
24
AUDATA3
25
NC
26
AUDATA2
27
NC
28
AUDATA1
29
NC
31
NC
30
AUDATA0
________________
32
AUDSYNC
33
NC
34
NC
35
NC
36
NC
37
NC
38
NC
Note: To use 38-pin H-UDI port connector, a user interface cable for 38-pin Mictor connector "HS0005ECK01H" (E10AUSB optional cable) is required.
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.5 Serial Port Connector (J8)
The R0K572390 includes a serial port connector (J8). J8 connector has two options for wiring on the R0K572390, using a male jack with the crossover cable, or a female socket with the straight cable by removing and installing zero-ohm resistors R49, R54, R55, R56, R58, R61, R63, R65, and R66 as appropriate. The R0K572390 installs resistors R54, R56, R58, R61, and R66 to include a male jack with crossover cable by default.
Figure 3.6 shows the pin assignments for J8. Table 3.14 lists the pin descriptions for J8. These are pin assignments and descriptions for using a male jack with crossover cable by default.
1
Top view of the component side
6
Side view
J8
1 6
5 9
Board edge
5 9
Board edge
Figure 3.6 J8 Pin Assignments
Table 3.14 J8 Pin Descriptions
Pin No.
Signal Name
Pin No.
1
NC
6
2
RXD
7
3
TXD
8
4
DTR
9
5
GND
Note: Pins 4 to 6, and 7 to 8 are loopback-connected, respectively.
DSR RTS CTS NC
Signal Name
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.6 RCAN Port Connector (J9) The R0K572390 includes an RCAN port connector (J9) to support RCAN transmission and reception. Figure 3.7 shows the pin assignments for J9. Table 3.15 lists the pin descriptions for J8.
Top view of the component side
J9
1
3
Board edge
Figure 3.7 J9 Pin Assignments
Table 3.15 J9 Pin Descriptions
Pin No.
Signal Name
1
CANH (U11)
2
GND
3 Note:
CANL (U11)
_______
_______
The SH7239 PA0/RXD0/CS0/CRx0/IRQ4 pin is also used as CS0 pin. Install the zero-ohm resistor R41 to switch
the pin function. To use PA0 pin as CRx0 by the RCAN port conn_e__c__t_o_r (J9) to communicate, R41 should be installed. Remove R41 to use the pin as other functions such as CS0, and RCAN port connector cannot be used.
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.7 LCD Interface Connector (J10) The R0K572390 includes an LCD interface connector (J10). Figure 3.8 shows the pin assignments for J10. Table 3.16 lists the pin descriptions for J10.
Top view of the component side
J10
14
13
2
1
Board edge
Figure 3.8 J10 Pin Assignments
Table 3.16 J10 Pin Descriptions
Pin No. 1 3 5 7 9 11 13
Signal Name GND NC R/W (Pulled down by a 1 k resistor) NC NC PC4/A4 PC6/A6
Pin No. 2 4 6 8 10 12 14
5VCC PC3/A3 PC2/A2 NC NC PC5/A5 PC7/A7
Signal Name
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.1.8 External Power Supply Connectors (J11, J12, J13)
The R0K572390 includes three external power supply connectors to apply 5 V digital, 3.3 V digital and 5 V analog power from external source, not via the DC power jack (J5). J11 to J13 connectors are not installed by default. The R0K572390 is applied 5 V power from J11 connector, instead of DC power jack by default. Alternatively, remove a zero-ohm resistor R71 to supply 5 V analog power from J11 connector to the board, or remove a zero-ohm resistor R70 to supply 3.3 V digital from J13 connector to the board.
Figure 3.9 shows the pin assignments for external power supply connectors. Table 3.17 to Table 3.19 list the pin descriptions for external power supply connectors.
Top view of the component side
1 2
J11
1 2
J12
1
J13
2
Board edge
Figure 3.9 External Power Supply Connectors Pin Assignments
Table 3.17 J11 Pin Descriptions
Pin No.
Signal Name
Pin No.
Signal Name
1
5VCC
2
GND
Note: When supplying 5VCC from J11, do not use DC power jack (J5) to supply the power to the board. The R0K572390 may be destroyed when the power is supplied both from J5 and J11.
Table 3.18 J12 Pin Descriptions
Pin No.
Signal Name
Pin No.
Signal Name
1
AVCC
2
AVSS
Note: When supplying AVCC from J12, make sure to remove the zero-ohm resistor R71. The R0K572390 may be destroyed when AVCC is supplied from J12 with R71 installed.
Table 3.19 J13 Pin Descriptions
Pin No.
Signal Name
Pin No.
Signal Name
1
VCC
2
GND
Note: When supplying VCC from J13 on the R0K572390C000BR, make sure to remove the zero-ohm resistor R70. The R0K572390 may be destroyed when VCC is supplied from J13 with R70 installed.
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.2 Operating Components
The R0K572390 includes switches, jumpers, LEDs, and a potentiometer as operating components. Figure 3.10 shows the assignments of the R0K572390 operating components.
Top view of the component side
SW4 Mode setting DIP switches
Reset switch
JP2 RCAN signal connection jumper
JP1 Power select jumper
JA5
LCD (J10)
JP2
Serial (J8)
JA1
RESET
SW4
BOOT
PWR (J5)
J3
J9
X1
J4 SH7239
JA3 J2
POWER
LED0 J6 JP1 LED1
LED2
LED3
J11
J7
J12
JP3 ADTRG signal connection jumper
J1
JA6
JA2
J13
JP3 SW3 SW2 SW1
Boot mode LED Power LED
LED0 to LED3 User LEDs
VR1 Potentiometer
SW1: NMI switch SW2: IRQ3 switch SW3: IRQ4 switch
Figure 3.10 R0K572390 Operating Component Assignments
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.2.1 Jumpers (JP1, JP2, JP3)
The R0K572390 provides three jumpers (JP1, JP2, and JP3). These jumpers are not populated by default.
· JP1: Power select jumper
JP1 is a jumper to specify whether to supply 5VCC or 3.3VCC power to the SH7239 and other devices on the board. Short-circuit pins 1 and 2 of JP1 to supply 5VCC, and short-circuit pins 2 and 3 of JP1 to supply 3.3VCC.
JP1 is not populated by default. VCC power supply voltage is fixed to 3.3 V by the zero-ohm resistor R70 on the R0K572390C000BR. On the R0K572390C020BR, short-circuit pins 1 and 2 of JP1 to fix the VCC to 5 V.
· JP2: RCAN signal connection jumper
_______
JP2 is a jumper to specify whether to connect the SH7239 RCAN-related signal PA0/RXD0/CS0/CRx0/IRQ4 to the
RCAN port connector (J9). Short-circuit JP2 to connect to J9 connector.
_______
_______
_______
SH7239 PA0/RXD0/CS0/CRx0/IRQ4 pin is also used as CS0 to control SRAM. To use the pin as CS0 signal,
leave JP2 as opened. Note that the RCAN port connector (J9) cannot be used.
_______
JP2 is not populated by default, and PA0/RXD0/CS0/CRx0/IRQ4 signal is connected to the RCAN port connector
(J9) by the zero-ohm resistor R41.
____________
· JP3: ADTRG signal connection jumper
____________
JP3 is a jumper to specify whether to connect user switch SW2 (IRQ3) output to PC1/A1/ADTRG pin. To use the
____________
____________
pin as the ADTRG input, short-circuit JP3. Leave JP3 as opened to use PC1/A1/ADTRG pin as output pin (i.e. A1).
JP3 is not populated by default. Install a zero-ohm resistor R82 (not installed by default) to connect user switch SW2 ____________
(IRQ3) output to PC1/A1/ADTRG pin.
Table 3.20 lists the power select jumper (JP1) settings. Table 3.21 lists the RCAN signal connection jumper (JP2) ____________
settings. Table 3.22 lists the ADTRG signal connection jumper (JP3).
Table 3.20 Power Select Jumper (JP1) Settings
Number JP1
Setting 12 23
Supplies 5 V power to the VCCQ Supplies 3.3 V power to the VCCQ
Description
Table 3.21 RCAN Signal Connection Jumper (JP2) Settings
Number JP2
Setting Short-circuit Open
Description
_______
Connects PA0/RXD0/CS0/CRx0/IRQ4 signal to the RCAN port connector (J9)
_______
Leaves PA0/RXD0/CS0/CRx0/IRQ4 signal disconnected from the RCAN port connector (J9)
____________
Table 3.22 ADTRG Signal Connection Jumper (JP3) Settings
Number JP3
Setting Short-circuit Open
Description
____________
Connects user switch SW2 (IRQ3) output to PC1/A1/ADTRG pin
____________
Leaves user switch SW2 (IRQ3) output disconnected from PC1/A1/ADTRG pin
Note: Do not change the jumper settings while the board is ON. Make sure to turn the power OFF before changing the settings.
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SH7239 CPU Board R0K572390
3. Operating Specifications
3.2.2 Switches The R0K572390 includes four push switches and mode setting DIP switches. Table 3.23 lists switches, and Table 3.24 lists the mode setting DIP switches settings.
Table 3.23 R0K572390 Switches
Number RESET SW1 SW2 SW3 SW4
Description
Reset switch
User switch (NMI input)
___________
User switch (IRQ3 input and ADTRG input)
User switch (IRQ4 input)
Mode setting DIP switches (2/package)
Remarks Refer to 2.13 for details on connecting signals Refer to 2.9 for details on connecting signals
Table 3.24 Mode Setting DIP Switches (SW4) Settings
Number
Setting
Description
SW4-1
ON
Sets the SH7239 MD0 pin to low (MCU extension mode)
OFF
Sets the SH7239 MD0 pin to high (Single-chip mode, default setting)
SW4-2
ON
Sets the SH7239 FWE signal to high (On-board programming mode)
Note:
OFF
SH7239 FWE signal depends on the reset switch and user switch SW1 (NMI), (default
setting)
____________________ _______________
As the_F__W____E___s_i_g__nal is multiplexed with the ASEBRKAK/ASEBRK signal, the above SW4-2 setting is enabled only
when ASEMD0 is high.
· Setting the FWE signal state by the push switch
Combination of the reset switch (RESET) and user switch SW1 (NMI) enables setting the boot mode (FWE signal state). The R0K572390 enters user mode (FWE is high) when turning ON the power or press the reset switch
(RESET). To enter boot mode, press and hold down the user switch SW1 (NMI) while pressing the reset switch
____________________ _______________
____________________ _______________
(RESET). As the FWE signal is multiplexed with the ASEBRKAK/ASEBRK signal, the ASEBRKAK/ASEBRK
______________
signal is enabled when an emulator is connected to the R0K572390 and ASEMD0 signal is low.
____________
· To use the ADTRG input
____________
User switch SW2 (IRQ3) can also be used as the ADTRG input. Install a zero-ohm resistor R82 (not installed by
____________
default) to use SW2 as the ADTRG input.
R20UT0297EJ0100 Rev. 1.00 Nov. 08, 2010
3-21
SH7239 CPU Board R0K572390
3. Operating Specifications
3.2.3 Potentiometer
The R0K572390 includes a potentiometer to evaluate AN8 input.
Table 3.25 lists the information of the potentiometer installed on the R0K572390. For its accuracy, refer to the datasheet provided by the manufacturer.
Table 3.25 Potentiometer
Symbol VR1
CT-6ETV10K
Part Number
Manufacturer Name NIDEC Copal Electronics Corporation
3.2.4 LEDs
The R0K572390 includes six LEDs. Table 3.26 lists LEDs on the R0K572390.
Table 3.26 LEDs
Number POWER BOOT LED0 LED1 LED2 LED3
Color Green Orange Green Orange Red Red
Description/Remarks Power LED (POWER is illuminated when the power supply voltage is supplied) Boot mode LED (BOOT is illuminated when FWE is high in on-board programming mode) User LED0 (LED0 is illuminated when PE12 outputs low level signal) User LED1 (LED1 is illuminated when PE13 outputs low level signal) User LED2 (LED2 is illuminated when PE14 outputs low level signal) User LED3 (LED3 is illuminated when PE15 outputs low level signal)
R20UT0297EJ0100 Rev. 1.00 Nov. 08, 2010
3-22
SH7239 CPU Board R0K572390
3.3 Dimensions
Figure 3.11 shows the R0K572390 dimensions.
3. Operating Specifications
14 mm
JA5 LCD
RCAN
J4
JA1 J3
J2
45 mm
5 mm
RESET
JA3
3.8 mm
Serial
24.13 mm 31.75 mm
PWR
H-UDI (14-pin)
74.93 mm 80.01 mm 82.55 mm 85 mm
100 mm
J1
H-UDI
(38-pin)
JA6
JA2
VR1 SW3 SW2 SW1
27 mm 35.56 mm
48.26 mm 50.80 mm 55.88 mm 86.36 mm 99.06 mm 106.66 mm 115 mm 120 mm
Figure 3.11 R0K572390 Dimensions
R20UT0297EJ0100 Rev. 1.00 Nov. 08, 2010
3-23
SH7239 CPU Board R0K572390 This page intentionally left blank
3. Operating Specifications
R20UT0297EJ0100 Rev. 1.00 Nov. 08, 2010
3-24
SH7239 CPU Board R0K572390
Appendix R0K572390 Schematics
Appendix
R20UT0297EJ0100 Rev. 1.00
A-1
Nov. 08, 2010
5
4
3
2
1
SH7239 CPU Board R0K572390 SCHEMATICS
TITLE
D
INDEX
PAGE D 1
CPU SH7239,Reset,Boot,LED
2
SRAM,RCAN,SERIAL,AUD,H-UDI,EEPROM,A/D
3
Power,Push SW,Ring connectors
4
Application headers,LCD Connector
5
Note:
5VCC
= Digital 5V
R = Fixed Resistors
3VCC
= 3.3V
RA = Resister Array
C
C
AVCC
= CPU Analog 5V
VR = Potentiometers
AVREF
= CPU Analog 5V Reference
C = Ceramic Caps
VCC
= CPU/etc. 3.3V/5V
CE = Electrolytic Caps
PLLVCC
= CPU PLL 3.3V/5V
CP = Decoupling Caps
(Put one cap per each source pin)
L = Inductors
D = Diodes
H = Test terminals
B
R(_) :not mounted
Serial port D-Sub 9-pin
B
R(*) :for R0K572390C000BR(3.3V model) only R(M) :for Male connector only
R(#) :for R0K572390C020BR(5V model) only R(F) :for Female connector only
A
Ver. 1.00
It corresponds for R0K572390C000BR(3.3V model) and R0K572390C020BR(5V model)
CHANGE
5
4
SCALE
A
RENESAS SOLUTIONS CORPORATION R0K572390
DRAWN CHECKED DESIGNED APPROVED
INDEX
(1 /5 )
DATE 10-10-27
DK30840-B
3
2
1
5
4
3
2
1
VCC
D[15:0] [3,4,5]
CP3 0.1µF CP1 0.1µF
VCC
A[15:1] [3,4,5]
VCL 54 VCL 24
[5]
EXTAL
R1
22K(_)
R2
0(_)
Clock Module
AVREF
U1 AVCC
4 38 49 64 77
SH7239
RENESAS
RA1
D0
4
D1
3
D2
2
D3
1
VCC
5 6 7 8
VCC VCC VCC VCC VCC
D
R3
R4
AVCC
0
0
R0K572390C020BR At VCC=5V, 100MHz CXZ49GFB12500H0PESZZ
R5
1M
X1
1
3
0.1µF CP2
0.1µF CP6
R0K572390C000BR At VCC=3.3V, 160MHz CXZ49GFB10000H0PESZZ
C1 12pF
C2 12pF
KYOCERA
VCC
CP7 0.1µF
2 IN
GND VCC
NC NC NC
7 8
U6 OUT 6
Cd 5
Reset Module
R6 4.7K
R8
0
R9
100
0.1µF CP4
0.1µF CP5
[3,4,5] [3,4,5] [3,4,5] [3,4,5] [3,4,5] [3,4,5] [3,4,5] [3,4,5] [3,4,5]
PF0/AN0 PF1/AN1 PF2/AN2 PF3/AN3 PF4/AN4 PF5/AN5 PF6/AN6 PF7/AN7 PF8/AN8
102 105 103 104
96 111
97 110
AVCC AVCC AVREF AVREF AVREFVSS AVREFVSS AVSS AVSS
98 99 100 101 106 107 108 109 112
PF0/AN0 PF1/AN1 PF2/AN2 PF3/AN3 PF4/AN4 PF5/AN5 PF6/AN6 PF7/AN7 PF8/AN8
PD0/D0 PD1/D1 PD2/D2/TIC5U/RXD2 PD3/D3/TIC5V/TXD2 PD4/D4/TIC5W/SCK2 PD5/D5/TIC5US PD6/D6/TIC5VS PD7/D7/TIC5WS PD8/D8/TIOC3AS/AUDATA0 PD9/D9/TIOC3CS/AUDATA1 PD10/D10/TIOC3BS/AUDATA2
56 57 58 59 60 61 62 63 68 69 70
PD11/D11/TIOC3DS/AUDATA3 PD12/D12/TIOC4AS/AUDSYNC
PD13/D13/TIOC4BS/AUDCK PD14/D14/TIOC4CS PD15/D15/TIOC4DS
71 72 73 74 75
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
PA17/RD PA16/WRL PA15/WRH
23 27 28
PA17/RD# [3,4,5] PA16/WRL# [3,4,5] PA15/WRH# [3,4,5]
RA4
D4
4
D5
3
D6
2
D7
1
RA2
D8
8
D9
7
D10
6
D11
5
RA3
D12
8
D13
7
D14
6
D15
5
A22K 5 6 7 8
A22K 1 2 3 4
A22K 1 2 3 4
A22K
D
R10 10K R7 15K R11 12K(#)
1
2
HD74LV2G14A RENESAS
RESET
3
[3,4,5] PF9/AN9 [3,4,5] PF10/AN10
113 114
PF9/AN9 PF10/AN10
PC0/A0/POE0/IRQ4 29
PC0/A0/POE0/IRQ4 [4,5]
4 1 3
U5C
C
M51957BFP RENESAS
CP8 0.1µF
RE1 B3S-1000
5
3
4
HD74LV2G14A VCC RENESAS
U5D CP9
0.1µF
4
8
HD74LV1GW07A VCC RENESAS
CP10
5
U7C
[4] J3_EXTAL
[4]
J3_XTAL
0.1µF
2
[3,5] RESET#
U7B
3
4
RENESAS
[3,4,5] [3,4,5] [3,4,5] [3,4,5] [3,4,5]
PF11/AN11 PF12/AN12 PF13/AN13 PF14/AN14 PF15/AN15
115 116 117 118 119
PF11/AN11 PF12/AN12 PF13/AN13 PF14/AN14 PF15/AN15
HD74LV2G14A
1
7
U5A RENESAS
R14 560
R12 0(_) R13 0(_)
HD74LV2G14A
6
2
C3 U5B RENESAS
0.01µF
86 EXTAL 84 XTAL
88 RES
PC1/A1/ADTRG 30
SH7239
PC2/A2 PC3/A3 PC4/A4 PC5/A5 PC6/A6 PC7/A7
31 32 33 34 35 36
PC8/A8/CRx0/RXD0/POE4 PC9/A9/CTx0/TXD0/SCK0 PC10/A10/TIOC1A/CRx0/RXD0 PC11/A11/TIOC1B/CTx0/TXD0
PC12/A12/TCLKA PC13/A13/IRQ0/TCLKB PC14/A14/IRQ1/TCLKC PC15/A15/IRQ2/TCLKD
39 40 41 42 43 44 45 46
A1
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
C
HD74LV1GW07A
PB0/A16/IRQ0/TIOC2A/TMS 47
PB0/A16/IRQ0/TIOC2A/TMS [3,4,5]
[4]
J3_RES
PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST 48
PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST [3,4,5]
H-UDI
VCC
PLLVCC CP11
CP12
CP13
90 PLLVCC
PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI 51 PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO 52
PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI [3,4,5] PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO [3,4,5]
CP14 CP15
0.001µF 0.01µF
0.1µF
89 PLLVSS
PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK 53
PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK [3,4,5]
R15 100K
RCAN EEPROM AUD (RSPI)
0.1µF 0.1µF
CP16
R16 22K
FWE setting
0.1µF
Boot Module
that uses SW1 and RESET
U8
5
U9
U10
VCC
R0K572390C000BR(3.3V model) SH7239A R0K572390C020BR (5V model) SH7239B
PB16/AUDSYNC PB17/AUDCK
PB18/AUDATA2 PB19/AUDATA3 PB20/AUDATA0 PB21/AUDATA1
6 7 91 92 66 67
PB16/AUDSYNC# [3,4] PB17/AUDCK [3,4] PB18/AUDATA2 [3,4] PB19/AUDATA3 [3,4] PB20/AUDATA0 [3,4] PB21/AUDATA1 [3,4]
4 GND VCC 8
PR 7
2D
Q5
1
1 OE1
VCC 8
CP17 0.1µF
R18 22K
1 CLK
Q3
6 CL
VCC
HD74LV2G74AUSE
3
4 2
HD74LV1GT00ACME RENESAS
2 A1
5 7
A2 OE2
Y1 Y2
6 3
GND 4
HD74LV2G126AUSE RENESAS
VCC
PA9/IRQ3/TCLKD/CS3/SSL0/SCK0 PA8/IRQ4/TCLKC/CS4/MISO/RXD1 PA7/IRQ5/TCLKB/CS5/MOSI/TXD1 PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1
78 79 80 81
PA0/RXD0/CS0/CRx0/IRQ4 PA1/TXD0/CS1/CTx0/IRQ5
82 83
PA9/IRQ3/TCLKD/CS3/SSL0/SCK0 [3,4,5] PA8/IRQ4/TCLKC/CS4/MISO/RXD1 [3,4,5] PA7/IRQ5/TCLKB/CS5/MOSI/TXD1 [3,4,5] PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1 [3,4,5]
PA0/RXD0/CS0/CRx0/IRQ4 [3,4,5] PA1/TXD0/CS1/CTx0/IRQ5 [3,4,5]
B
[4,5]
NMI
[3,4]
MD0
[3,4] ASEMD0#
[3,4] FWE/ASEBRKAK#/ASEBRK#
RENESAS
Mode Selection
SW4
1
ON 4
2
3
A6HF-2102 OMRON 1-1571983-5 Tyco Electronics
87 120
95 94
NMI MD0 ASEMD0 FWE/ASEBRKAK/ASEBRK
PE0/TIOC0A/TIOC4AS/DREQ0 PE1/TIOC0B/TIOC4BS/TEND0 PE2/TIOC0C/TIOC4CS/DREQ1 PE3/TIOC0D/TIOC4DS/TEND1 PE4/TIOC1A/SCK3/POE8/IRQ4
PE5/TIOC1B/TIOC3BS/TXD3 PE6/TIOC2A/TIOC3DS/RXD3 PE7/TIOC2B/UBCTRG/RXD2/SSL1 PE8/TIOC3A/SCK2/DREQ2/SSL2
PE9/TIOC3B/DACK2 PE10/TIOC3C/TXD2/DREQ3/SSL3
PE11/TIOC3D/DACK3 PE12/TIOC4A
PE13/TIOC4B/MRES PE14/DACK0/TIOC4C PE15/DACK1/TIOC4D/IRQOUT
16 17 18 19 20 21 22 2 3 9 8 10 11 12 13 14
PE0/TIOC0A/TIOC4AS/DREQ0 [4,5] PE1/TIOC0B/TIOC4BS/TEND0 [4,5] PE2/TIOC0C/TIOC4CS/DREQ1 [4,5] PE3/TIOC0D/TIOC4DS/TEND1 [4,5] PE4/TIOC1A/SCK3/POE8/IRQ4 [4,5] PE5/TIOC1B/TIOC3BS/TXD3 [4,5] PE6/TIOC2A/TIOC3DS/RXD3 [4,5] PE7/TIOC2B/UBCTRG/RXD2/SSL1 [3,4,5] PE8/TIOC3A/SCK2/DREQ2/SSL2 [4,5] PE9/TIOC3B/DACK2 [4,5] PE10/TIOC3C/TXD2/DREQ3/SSL3 [3,4,5] PE11/TIOC3D/DACK3 [4,5] PE12/TIOC4A [4,5] PE13/TIOC4B/MRES [4,5] PE14/DACK0/TIOC4C [4,5] PE15/DACK1/TIOC4D/IRQOUT [4,5]
POWER GREEN VCC
PW1
K
A
1K R19 SML-310MT ROHM
LED0 GREEN
K
A
220 R20 SML-310MT ROHM
LED1 ORANGE
K
A
220 R21
B
PA18/CK 26
SML-310DT
SW4 1-4 ON MD0 = 'L'
OFF MD0 = 'H' 2-3 ON FWE = 'H'
OFF FWE = Level controled with SW1 and RESET
5 15 25 37 50 55 65 76 85 93
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
WDTOVF 1
VCC CP18 CP19 CP20 CP21 CP22 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF
Decoupling Caps
R24 22
VCC R25 22K
U7A
1
6
RENESAS
HD74LV1GW07A
J1_CK [4] PA18/CK [5]
WDTOVF# [5] J1_WDTOVF [4]
LED2 RED
K
A
220 R22 SML-310LT ROHM
LED3 RED
K
A
220 R23 SML-310LT ROHM
BOOT ORANGE
BT1
K
A
510 R26 SML-310DT ROHM
:not mounted
:for R0K572390C020BR(5V model) only
A
Ver. 1.00
It corresponds for R0K572390C000BR(3.3V model) and R0K572390C020BR(5V model)
CHANGE
5
4
A
RENESAS SOLUTIONS CORPORATION R0K572390
CPU SH7239,Reset,Boot,LED
DRAWN CHECKED DESIGNED
APPROVED
(2 /5 )
SCALE
DATE 10-10-27
DK30840-B
3
2
1
1
2
3
4
5
SRAM
H-UDI Interface
VCC
[2,4,5] D[15:0]
5
6
7
8
RA5
R27
R28
8
7
6
5
RA6
R29
[2,4,5] A[15:1]
M5M5256DVP-70G(_) U2 RENESAS
A10K 10K 10K
A10K 10K VCC J7
H-UDI+AUD
A
[2,4,5] PA17/RD# [2,4,5] PA16/WRL# [2,4,5] PA15/WRH#
R30 0(_)
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
10 9 8 7 6
A0 A1 A2 A3 A4
5 4 3 25 24 21 23 2 26 1
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14
DQ1 DQ2 DQ3 DQ4 DQ5
11 12 13 15 16
DQ6 DQ7 DQ8
17 18 19
Vcc 28
D0 D1 D2 D3 D4 D5 D6 D7
20 22 27
S OE W
CP23 0.1µF(_) GND 14
VCC
[2,4] PB17/AUDCK [2,4] PB20/AUDATA0 [2,4] PB21/AUDATA1 [2,4] PB18/AUDATA2 [2,4] PB19/AUDATA3
[2,4] PB16/AUDSYNC#
[2,4,5] PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK [2,4,5] PB0/A16/IRQ0/TIOC2A/TMS
[2,4,5] PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST [2,4,5] PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI
[2,4,5] PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO [2,4] FWE/ASEBRKAK#/ASEBRK# [2,5] RESET#
[2,4] MD0
R31 0(_)
1
2
3
4
1
2
3
4
14 12
UVCC UVCC_AUD
6 30 28 26 24
AUDCK AUDATA0 AUDATA1 AUDATA2 AUDATA3
32 _AUDSYNC
15 17 21 19 11
8 9
TCK TMS _TRST TDI TDO _ASEBRAK _RES
2 MD0
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
1 4 7 10 13 16 18 20 22 23 25 27 29 31 33 34 35 36
NC NC
37 38
VCC
R32 10K
A
R33 1K(_)
M5M5256DVP-70G(_) U3 RENESAS
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
10 9 8 7 6 5 4 3
25 24 21 23
2 26
1
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
11 12 13 15 16 17 18 19
Vcc 28
D8 D9 D10 D11 D12 D13 D14 D15
CP24
20 22 27
S OE W
0.1µF(_) GND 14
B
39 40
FRAME FRAME
ASEMD0 GND
3 5
AMP 2-5767004-2 H-UDI (38PIN)
ASEMD0# [2,4]
VCC
J6
8 UVCC
NC 6
10 MD0
H-UDI
1
2
1 3 5 7
TCK
ASEMD0
_TRST
TDO
GND
_ASEBRAK GND
4
2 12
9 11 13
TMS TDI _RES
GND 14
Samtec HTST-107-01-T-DV H-UDI (14PIN)
13
14
J6
B
VCC
VCC
VCC
10K
10K
10K
22K R34 22K R35 0.1µF CP27
[2,4,5] PA1/TXD0/CS1/CTx0/IRQ5
[5]
CAN1TX
[2,4,5] PA0/RXD0/CS0/CRx0/IRQ4
[5]
CAN1RX
R40 0(_) R44 0(_)
Voltage Level Shifter 3.3V<->5V
R39 0
3.3V Input OK
VCC
5VCC
R41 0
JP2
1
2
XG8S-0231(_) OMRON
3.3V<-5V
U12
1 2 3
VCCA VCCB
GND
DIR
A
B
6 5 4
SN74LVC1T45DCK Texas Instruments
0.1µF CP28
22K
R42
RCAN Transceiver
U11 1 TxD VCC 3
5VCC
4
RxD GND
MODE
2 8
5 NC CANH 7
CP25 0.1µF
CANL 6
HA13721RPJE RENESAS
RCAN
1
2
J9
3
B3P-SHF-1AA(LF)(SN) JST
120 R43
[2,4,5] PA9/IRQ3/TCLKD/CS3/SSL0/SCK0 [2,4,5] PA8/IRQ4/TCLKC/CS4/MISO/RXD1 [2,4,5] PA7/IRQ5/TCLKB/CS5/MOSI/TXD1 [2,4,5] PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1
R36
R45 0(_) R46 0(_)
R37
R38
EEPROM 512k-bit access
U4
1 2 5 6 3 7
S Vcc Q D C W Vss HOLD
8 4
R1EX25512ATA00A RENESAS
VCC
CP26 0.1µF
C VCC
[2,4,5] PE10/TIOC3C/TXD2/DREQ3/SSL3 [5] RS232TX
[2,4,5] PE7/TIOC2B/UBCTRG/RXD2/SSL1 [5] RS232RX
R59 0 R57 0(_) R60 0 R62 0(_)
CHANGE
:not mounted
D
Ver. 1.00
It corresponds for R0K572390C000BR(3.3V model) and R0K572390C020BR(5V model)
1
22K R50 22K R51 22K R52 22K R53 0(_) R166 0(_) R167
(PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO) (PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI)
VCC
[2,4,5] PF0/AN0
CP29 0.1µF
[2,4,5] PF1/AN1
[2,4,5] PF2/AN2 [2,4,5] PF3/AN3
A/D
C
VCC 19
U13 1
EN_
R47 22K
SHDN_ 20
R48 0(_)
Serial Port Connector(COM)
[2,4,5] [2,4,5] [2,4,5] [2,4,5]
PF4/AN4 PF5/AN5 PF6/AN6 PF7/AN7
V+ 3
C4 0.47µF
[2,4,5] PF8/AN8 [2,4,5] PF9/AN9
C6 0.1µF
C7 0.47µF
2 C1+
4 5
C1C2+
6 C2-
15 13 12 10
R1OUT T1IN T2IN R2OUT
R64 0
18 GND
V- 7
NC NC
14 11
R1IN 16
T1OUT 17
T2OUT 8
R2IN 9 MAX3222CPW Texas Instruments
C5 0.47µF
R54
0(M)
R55
0(F)
R58
0(M)
R61
0(M)
R63
0(F)
R65
0(F)
SERIAL
R49 0(F)
10
(1) 5 (2) 4 (3) 3 (4) 2 (5) 1
J8 9 (6) 8 (7) R56 0 7 (8) 6 (9)
11
R66
0(M)
ERNI 154188 MALE JPN
Mounted resistors
MALE FEMALE
R54, R65,
R56, R63,
R58, R56,
R61, R55,
R66
R49
Removed resistors
MALE FEMALE
R49, R66,
R55, R61,
R63, R58,
R65
R54
[2,4,5] [2,4,5] [2,4,5] [2,4,5] [2,4,5] [2,4,5]
PF10/AN10 PF11/AN11 PF12/AN12 PF13/AN13 PF14/AN14 PF15/AN15
8
1
7
2
6
3
5
4
8
1
7
2
6
3
5
4
8
1
7
2
6
3
5
4
8
1
7
2
6
3
5
4
RA8
RA7
A100K A100K
RA9 A100K
AVCC
RA10 A100K
2
3 VR1
N6L50T0S-103 or CT-6ETV10K
Piher 1
COPAL
154236 FEMALE RSK (n)
Serial connector mount tab = GND
:for Male connector only
:for Female connector only
D
SCALE
RENESAS SOLUTIONS CORPORATION R0K572390
SRAM,RCAN,SERIAL,AUD,H-UDI,
DRAWN CHECKED DESIGNED
APPROVED
EEPROM,A/D
(3 /5 )
DATE 10-10-27
DK30840-B
2
3
4
5
5
4
3
2
1
5V To 3.3V Switching Regulator
Power
5VCC
Connector
BAT54-7-F
D1
DIODES
[2,3,5] A[15:1]
PWR
U14 LM2738-YMY NATIONAL SEMICONDUCTORS
[2,3,5] D[15:0]
J5
4
3
2
1
3 VIN C 2 VIN D
BOOST 1 SW 8
CP30 0.01µF
3VCC L1
CDRH6D28NP-120NC
7 GND 5 GND
D
KLDX-SMT2-0202-A Kycon
R69 4 EN
100K
FB 6
D2 SUMIDA
CRS08 TOSHIBA
R67 31.6K
+ CE1
+ CE2
10µF
R68 10K
47µF
5VCC 3VCC
POWER TEST PIN
R70
0(*)
5VCC
3VCC
H2
H3
_5V
_3V
JP1
3 2
1
XG8S-0331(_) OMRON
VCC
H1 _VCC
5VCC EXTERNAL
+ CE3 10µF
J11
1 2 HIROSE A2-2PA-2.54DSA(_)
5VCC
PLLVCC
H4
L2
_PLLVCC
If R0K572390C020BR(5V model), Connect hole pin1 and 2 of JP1 with wire.
BLM21PG300SN1
MURATA
+ CE4
AVCC EXTERNAL
10µF
AVCC J12
R71
L3
AVCC
H5 _AVCC
1 2 HIROSE A2-2PA-2.54DSA(_)
C
0 BLM21PG300SN1 MURATA
+ CE5 10µF
VCC EXTERNAL
0 R72
GND - AGND
L4
BLM21PG300SN1 MURATA
- AVREFVSS
R73 0
AVREF
H6 _AVREF
+CE6 10µF
J13
1 2 HIROSE A2-2PA-2.54DSA(_)
VCC
VCC
VCC NMI SWITCH CIRCUIT
R75
R74
NMI
R76
10K
RENESAS RENESAS
U15A
U16A
4.7K
220 1
61
6
R77
0
(NMI)
4
3
SW1
B3S-1000 OMRON
1
2
NMI
HD74LV1GW17A
+ CE7
HD74LV1GW07A
SWITCH 2.2µF
VCC
CP31
5
VCC U15C
CP32
5
VCC U16C
10K
VCC IRQ3 SWITCH CIRCUIT
0.1µF
2
0.1µF RENESAS HD74LV1GW17A
2
RENESAS HD74LV1GW07A
B
R78
10K RENESAS RENESAS
R79
IRQ3
R80
220
U15B
U16B
R81
0
3
43
4
(PA9/IRQ3/TCLKD/CS3/SSL0/SCK0)
4
3
SW2
B3S-1000 OMRON
IRQ3
HD74LV1GW17A
+ CE8
HD74LV1GW07A
SWITCH 2.2µF
R82
0(_)
JP3
1
2
XG8S-0231(_) OMRON
(ADTRG) SW2 usage for ADTRG
SH7239 Ring Connector
VCC J1
VCC J3
[2] J1_WDTOVF
1
[2,3,5] PE7/TIOC2B/UBCTRG/RXD2/SSL1
2
[2,5] PE8/TIOC3A/SCK2/DREQ2/SSL2
3
4
5
[2,3] PB16/AUDSYNC#
6
[2,3] PB17/AUDCK
7
[2,3,5] PE10/TIOC3C/TXD2/DREQ3/SSL3
8
[2,5] PE9/TIOC3B/DACK2
9
[2,5] PE11/TIOC3D/DACK3
10
[2,5] PE12/TIOC4A
11
[2,5] PE13/TIOC4B/MRES
12
[2,5] PE14/DACK0/TIOC4C
13
[2,5] PE15/DACK1/TIOC4D/IRQOUT
14
15
[2,5] PE0/TIOC0A/TIOC4AS/DREQ0
16
[2,5] PE1/TIOC0B/TIOC4BS/TEND0
17
[2,5] PE2/TIOC0C/TIOC4CS/DREQ1
18
[2,5] PE3/TIOC0D/TIOC4DS/TEND1
19
[2,5] PE4/TIOC1A/SCK3/POE8/IRQ4
20
[2,5] PE5/TIOC1B/TIOC3BS/TXD3
21
[2,5] PE6/TIOC2A/TIOC3DS/RXD3
22
[2,3,5] PA17/RD#
23
24
25
[2]
J1_CK
26
[2,3,5] PA16/WRL#
27
[2,3,5] PA15/WRH#
28
[2,5] PC0/A0/POE0/IRQ4
A1
29 30
31
32
33
34
35
36
D5
1
D6
2
D7
3
4
5
[2,3] PB20/AUDATA0
6
[2,3] PB21/AUDATA1
D8
7 8
D9
9
D10
10
D11
11
D12
12
D13
13
D14
14
D15
15
16
17
[2,3,5] PA9/IRQ3/TCLKD/CS3/SSL0/SCK0
18
[2,3,5] PA8/IRQ4/TCLKC/CS4/MISO/RXD1
19
[2,3,5] PA7/IRQ5/TCLKB/CS5/MOSI/TXD1
20
[2,3,5] PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1
21
[2,3,5] PA0/RXD0/CS0/CRx0/IRQ4
22
[2,3,5] PA1/TXD0/CS1/CTx0/IRQ5
23
[2] J3_XTAL
24
25
[2] J3_EXTAL
26
[2,5]
NMI
27
[2] J3_RES
28
29
30
31
32
33
34
35
36
D
FFC-36BMEP1B(_) Honda
FFC-36BMEP1B(_) Honda
A2 A3 A4 A5 A6 A7
A8 A9 A10 A11 A12 A13 A14 A15
[2,3,5] PB0/A16/IRQ0/TIOC2A/TMS [2,3,5] PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST
[2,3,5] PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI [2,3,5] PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO [2,3,5] PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK
D0 D1 D2 D3 D4
J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
FFC-36BMEP1B(_) Honda
C
AVCC AVREF
J4
[2,3] PB18/AUDATA2
1
[2,3] PB19/AUDATA3
2
3
[2,3] FWE/ASEBRKAK#/ASEBRK#
4
[2,3] ASEMD0#
5
6
7
[2,3,5] PF0/AN0
8
[2,3,5] PF1/AN1
9
[2,3,5] PF2/AN2
10
[2,3,5] PF3/AN3
11
12
13
14
15
[2,3,5] PF4/AN4
16
[2,3,5] PF5/AN5
17
[2,3,5] PF6/AN6
18
[2,3,5] PF7/AN7
19
20
21
[2,3,5] PF8/AN8
22
[2,3,5] PF9/AN9
23
[2,3,5] PF10/AN10
24
[2,3,5] PF11/AN11
25
[2,3,5] PF12/AN12
26
[2,3,5] PF13/AN13
27
[2,3,5] PF14/AN14
28
[2,3,5] PF15/AN15
29
[2,3] MD0
30
31
32
33
34
35
B
36
FFC-36BMEP1B(_) Honda
2
1
1
2
VCC IRQ4 SWITCH CIRCUIT
R83
10K
RENESAS RENESAS
IRQ4
R85
220
U17A
U18A
1
61
6 R86
4
3
SW3
B3S-1000 OMRON
IRQ4
HD74LV1GW17A
+ CE9
HD74LV1GW07A
SWITCH 2.2µF
VCC
R84
4.7K 0
PC0/A0/POE0/IRQ4 [2,5]
VCC
VCC
CP33 0.1µF
2
5
U17C
CP34
0.1µF RENESAS HD74LV1GW17A
2
5
U18C
RENESAS HD74LV1GW07A
U17B
3
4
HD74LV1GW17A RENESAS
U18B
3
4
HD74LV1GW07A RENESAS
:not mounted
:for R0K572390C000BR(3.3V model) only
A
Ver. 1.00
It corresponds for R0K572390C000BR(3.3V model) and R0K572390C020BR(5V model)
CHANGE
5
4
:for R0K572390C020BR(5V model) only
A
RENESAS SOLUTIONS CORPORATION R0K572390 Power,Push SW,Ring connectors
SCALE
DRAWN CHECKED DESIGNED
APPROVED
(4 /5 )
DATE 10-10-27
DK30840-B
3
2
1
5
4
3
2
1
R0K572390 Application headers
[2,4] PC0/A0/POE0/IRQ4
[2,3,4] A[15:1]
JA3
5VCC LCD
[2,3,4] D[15:0]
(A0)
1
A1
2
J10
A2
3
1
AVREF AVCC 3VCC 5VCC
JA1
A3
4
2
A4
5
3
D
R87
0
1
2
R90
0
3
4
A5 A6 A7 A8
6 7 8 9
A3 A2
(PC3)
4
R88
1K
5
(PC2)
6
R91
100K
7
LCDRS RW LCDE
D
R92
0
5
A9
10
8
6
A10
11
9
R89
0
7
A11
12
10
[2,3,4] PF0/AN0 [2,3,4] PF1/AN1 [2,3,4] PF2/AN2 [2,3,4] PF3/AN3
[2,3,4] PF8/AN8 [2,3,4] PF9/AN9 [2,3,4] PF10/AN10 [2,3,4] PF11/AN11 [2,3,4] PF12/AN12 [2,3,4] PF13/AN13 [2,3,4] PF14/AN14 [2,3,4] PF15/AN15
A1
A4 (PC4/A4) A5 (PC5/A5) A6 (PC6/A6) A7 (PC7/A7) A8 (PC8/A8/CRx0/RXD0/POE4) A9 (PC9/A9/CTx0/TXD0/SCK0) A10 (PC10/A10/TIOC1A/CRx0/RXD0) A11 (PC11/A11/TIOC1B/CTx0/TXD0)
R93 R94 R95 R96 R97 R98 R99 R100
R103 R104 R105 R106 R107 R108 R109 R110
0 0 0 0 0 0 0 0
0(_) 0(_) 0(_) 0(_) 0(_) 0(_) 0(_) 0(_)
(ADTRG)
8
(AN0)
9
(AN1)
10
(AN2)
11
(AN3)
12
13
14
(PF8,PC4)
15
(PF9,PC5)
16
(PF10,PC6)
17
(PF11,PC7)
18
(PF12,PC8)
19
(PF13,PC9)
20
(PF14,PC10)
21
(PF15,PC11)
22
(IRQ3,TIOC3AS)
23
24
25
26
FFC-26BMEP1B(_) AGND Honda
[2,3,4] PA17/RD#
A12 A13 A14 A15 D0 D1 D2 D3 D4 D5 D6 D7
D8 D9 D10 D11 D12 D13 D14 D15
13
14
15
16
17
18
19
20
21
22
23
24
(RD#)
25
26
R101
0(_)
(CS3)
27
R102
0(_)
(CS6)
28
29
30
31
32
33
34
35
36
A4
(PC4)
A5
(PC5)
A6
(PC6)
A7
(PC7)
11
LCDD4
12
LCDD5
13
LCDD6
14
LCDD7
SSM-107-LM-DV-P-TR Samtec
[2,3,4] PA9/IRQ3/TCLKD/CS3/SSL0/SCK0
R112 R115
0 0(_)
(PA9/IRQ3/TCLKD/CS3/SSL0/SCK0) (PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1)
[2,3,4] PB0/A16/IRQ0/TIOC2A/TMS [2,3,4] PB1/A17/IRQOUT/ADTRG/TIOC0A/IRQ1/TRST
[2,3,4] PB2/A18/IRQ2/RXD3/TIOC0B/BACK/TDI [2,3,4] PB3/A19/IRQ3/TXD3/TIOC0C/BREQ/AH/TDO
R111
0(_)
(A16)
37
R113
0(_)
(A17)
38
R114
0(_)
(A18)
39
R116
0(_)
(A19)
40
R117
0(_)
(A20)
41
42
[2,4] PE1/TIOC0B/TIOC4BS/TEND0 A14
C [2,4] PE0/TIOC0A/TIOC4AS/DREQ0
[2,3] RESET#
[2]
EXTAL
[2,4]
NMI
R119
0(_)
R120
0
R123
0(_)
R124
0
A13
(RESET in/out) (EXTAL)
(NMI in/out)
JA2
1 2 3 4
[2,3,4] PB4/A20/IRQ4/SCK3/TIOC0D/WAIT/BACK/BS/TCK [2] PA18/CK
[2,3,4] PA0/RXD0/CS0/CRx0/IRQ4
[2,3,4] PA15/WRH# [2,3,4] PA16/WRL# [2,3,4] PA1/TXD0/CS1/CTx0/IRQ5
R118
0(_)
43
(CK)
44
R121
0(_)
(CS0,WAIT) (AH)
45 46
R122
0(_)
(WRH) (WRL)
47 48
49
R125
0
50
R126
0(_)
C
[2] WDTOVF# [2,3,4] PA7/IRQ5/TCLKB/CS5/MOSI/TXD1
[2,3,4] PA8/IRQ4/TCLKC/CS4/MISO/RXD1
[2,3,4] PA6/IRQ6/TCLKA/CS6/RSPCK/SCK1 [2,3,4] PE10/TIOC3C/TXD2/DREQ3/SSL3
[2,4] PE9/TIOC3B/DACK2 [2,4] PE11/TIOC3D/DACK3
[2,4] PE12/TIOC4A [2,4] PE14/DACK0/TIOC4C
[2,4] PE13/TIOC4B/MRES [2,4] PE15/DACK1/TIOC4D/IRQOUT
[2,4] PE5/TIOC1B/TIOC3BS/TXD3 [2,4] PE6/TIOC2A/TIOC3DS/RXD3
A15
A12 A13
R127 0(_)
R130 R131
0(_) 0
R132 0
R136 0 R137 0 R138 0 R139 0 R141 0
(WDTOVF)
5
(TxD1)
6
(IRQ0,TIOC0A)
7
(RxD1)
8
(IRQ1,TIOC0B)
9
(SCK1)
10
(TIOC3C)
11
12
(TIOC3B)
13
(TIOC3D)
14
(TIOC4A)
15
(TIOC4C)
16
(TIOC4B)
17
(TIOC4D)
18
(TIOC1B)
19
(TIOC2A)
20
(TCLKA)
21
(TCLKB)
22
(IRQ2,TIOC1A,TIOC0C) 23
(POE0)
24
(TCLKA)
25
(TCLKB)
26
[2,3,4] PF4/AN4 [2,3,4] PF5/AN5 [2,3,4] PF6/AN6 [2,3,4] PF7/AN7 [3] CAN1TX [3] CAN1RX
D5
D9 D8
A8 A14 A15
R128 R129
0 0(_)
R133 R134
R135
0(_) 0
0(_)
R140
R142 R143
0
0(_) 0(_)
FFC-50BMEP1B(_) Honda
(AN4) (AN5) (AN6) (AN7) (CTX0)
(CRX0)
(IRQ4,TIOC3AS) (IRQ5,TIOC3CS) (TIOC3CS) (TIC5US/TIOC1A) (TIC5VS/TIOC2A) (TIC5WS/TIOC0D) (TIOC3AS) (POE4) (TCLKC) (TCLKD)
JA5
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
[2,4] PE4/TIOC1A/SCK3/POE8/IRQ4
R144
0(_)
FFC-26BMEP1B(_)
D10
(TIOC3BS)
19
D11
(TIOC3DS)
20
[2,4] PE2/TIOC0C/TIOC4CS/DREQ1
R145
0(_)
Honda
D12
(TIOC4AS)
21
D14
(TIOC4CS)
22
D13
(TIOC4BS)
23
D15
(TIOC4DS)
24
D6
R146
0
B
(PE2/TIOC0C/TIOC4CS/DREQ1)
R147
0(_)
FFC-24BMEP1B(_)
B
D7
R148
0
Honda
(PE6/TIOC2A/TIOC3DS/RXD3) (PE4/TIOC1A/SCK3/POE8/IRQ4) (PE0/TIOC0A/TIOC4AS/DREQ0) (PE14/DACK0/TIOC4C) (PE1/TIOC0B/TIOC4BS/TEND0)
(TxD2) (PE5/TIOC1B/TIOC3BS/TXD3)
[2,4] PE3/TIOC0D/TIOC4DS/TEND1
[3] RS232TX [3] RS232RX [2,3,4] PE7/TIOC2B/UBCTRG/RXD2/SSL1 [2,4] PE8/TIOC3A/SCK2/DREQ2/SSL2
D4 D2 D3
R149
0(_)
R150 R151 R152
0(_) 0(_) 0(_)
R153 R154 R155 R156 R157 R158 R159
R160
R161
R162
R163
R164
R165
0(_) 0(_) 0(_) 0(_) 0(_) 0(_) 0
0
0(_)
0
0(_)
0
0(_)
(DREQ0) (DACK0) (TEND0)
(RxD2) (TxD2) (TxD3) (SCK2) (SCK3/TIOC1A) (RxD3) (TIOC3A) (TIC5U/TIOC1A) (TIC5V/TIOC2A) (TIC5W/TIOC0D)
JA6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
:not mounted
A
FFC-24BMEP1B(_) Honda
A
CHANGE
Ver. 1.00
It corresponds for R0K572390C000BR(3.3V model) and R0K572390C020BR(5V model)
5
4
RENESAS SOLUTIONS CORPORATION R0K572390
DRAWN CHECKED DESIGNED
APPROVED
Application headers, LCD Connector ( 5 / 5 )
SCALE
DATE 10-10-27
DK30840-B
3
2
1
REVISION HISTORY SH7239 CPU Board R0K572390 User's Manual
Rev.
Date
1.00 Nov. 08, 2010
Page
First edition issued
Description Summary
SH7239 CPU Board R0K572390 User's Manual
Publication Date: Rev. 1.00 Nov. 08, 2010 Published by: Renesas Electronics Corporation
SALES OFFICES
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc. 2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130
Renesas Electronics Canada Limited 1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220
Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-585-100, Fax: +44-1628-585-900
Renesas Electronics Europe GmbH Arcadiastrasse 10, 40472 Düsseldorf, Germany Tel: +49-211-65030, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd. 7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd. Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898
Renesas Electronics Hong Kong Limited Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2886-9318, Fax: +852 2886-9022/9044
Renesas Electronics Taiwan Co., Ltd. 7F, No. 363 Fu Shing North Road Taipei, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd. 1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632 Tel: +65-6213-0200, Fax: +65-6278-8001
Renesas Electronics Malaysia Sdn.Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics Korea Co., Ltd. 11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea Tel: +82-2-558-3737, Fax: +82-2-558-5141
http://www.renesas.com
© 2010 Renesas Electronics Corporation. All rights reserved. Colophon 1.0
16
SH7239 CPU Board R0K572390
R20UT0297EJ0100
Acrobat Distiller 7.0.5 (Windows)