MVSilicon BP1064L2 Bluetooth Module

General Specifications

The BP1064L2 Bluetooth Module operates in the 2.4GHz (2402MHz~2480MHz) ISM band, featuring 79 channels for Bluetooth V5.0 (BR/EDR) without BLE mode. It supports modulation types GFSK, π/4-DQPSK, and 8DPSK, with data rates of 1/2/3Mbps for Bluetooth V5.0 (BR/EDR).

Pin Definitions

J13 Connector

J28 Connector

J27 Connector

J1 AUDIO IN Connector

J2 Connector

PCB Function

The PCBA includes the following functions:

• Analog signal input preamplification for INPUT1/INPUT2/INPUT3/INPUT4/MUSIC1.
• Bluetooth audio signal decoding and amplification circuit.
• Mixed audio signal amplifier circuit.
• Sine wave/clipping signal LED indicating control circuit.
• TONE/HPF/MASTER VOLUME CONTROL.
• USB MP3 Audio decoder control circuit.

Overview of Features

Core and Memory

• High performance 32-bit RISC core with up to 288MHz clock speed, supporting DSP instructions and a floating-point unit (FPU).
• FFT/IFFT accelerator for operations up to 1024 complex numbers or 2048 real numbers.
• 320KB on-chip SRAM, 32KB I-Cache, and 32KB D-Cache.
• Internal 16M bits FLASH for code and data storage.
• EFUSE configuration register.
• 2-wire SDP (Serial Debug Port) for break-point and code tracking debug.
• 40 interrupt vectors with 4-level interrupt priority.

Audio

• Four audio ADCs with SNR > 94dB, supporting 9 sampling rates (8KHz to 48KHz).
• Support for up to 4 digital microphones or 2 analog microphones with AGC.
• ADC line-in supports single-end or differential input.
• Three audio DACs with SNR > 105dB, supporting 9 sampling rates (8KHz to 48KHz).
• Directly drives earphones (16Ω or 32Ω) with 40mW power.
• Two duplex I2S (or IIS) interfaces, sampling rate up to 192KHz, max 32bits.
• One half-duplex S/PDIF supporting HDMI audio and ARC.

Bluetooth

• Dual mode Bluetooth v5.0, compatible with Bluetooth V4.2 and V2.1+EDR.
• Supports Piconet and Scatternet networking protocols.
• Maximum transmit power of 10dBm, supporting Class 1, Class 2, and Class 3.
• Receiving sensitivity (Typical): DH1: -88dBm, 2DH5: -88dBm, 3DH5: -82dBm.
• Supports A2DP/AVRCP/HFP/HSP/OPP/HID/SPP/PBAP/GATT/SM profiles.
• Supports PLC (Package Loss Concealment).

Power, Clock and Reset

• 3.3V-5V power supply input via LDOIN.
• Internal LDOs: 5V to 3.3V and 3.3V to 1.2V.
• RC 12MHz and two PLL clocks.
• Support for 24MHz crystal.
• Internal POR (Power-on Reset), LVD (Low-Voltage-Detection), and Watchdog.
• Multiple low-power options: CPU clock frequency reduction, system clock frequency reduction, sleep, deep sleep.
• Low power RTC mode, supporting IO wake-up and alarm signal output.

Timer, PWM and PWC

• 2 basic timers (TIM1, TIM2).
• 4 general timers (TIM3, TIM4, TIM5, TIM6) with PWM and PWC functions.

Peripherals

• Maximum 38 GPIOs.
• All GPIOs support external interrupt and wake-up.
• Configurable GPIOs: pull-up, pull-down, Hi-impedance, pull-down current source.
• USB 2.0 Full-speed OTG controller and PHY with 6 endpoints.
• One SPI master (SPIM) @ max. 60M.
• One SPI slave (SPIS) @ max. 60M.
• One SDIO @ max. 30M.
• Two duplex UART @ max. 3Mbps, UART0 with flow control.
• One I2C master/slave controller @ max. 400K.
• 12-bit SAR-ADC @ max. 450K sampling rate, from 15 external IOs or 2 internal voltages.
• One IR interface, supports NEC or SONY mode.
• True random number generator.

DMA

• 8-channel DMA with all memory direct addressing, assignable to any peripherals except OTG, IR, and I2C.
• Unique automatic transmit-and-capture mechanism for memory and IO matching, or DMA-GPIO for timing simulation.

SDK Firmware Stack and IDE

• Audio algorithm list: Decode MP2, MP3, WMA, APE, FLAC, AAC, MP4, M4A, WAV (IMA-ADPCM & PCM), AIF, AIFC.
• Encode: MP2/MP3, IMA-ADPCM.
• Sound effects: Echo, Reverb, 3D, Virtual bass, Auto-tune/pitch shifter/Voice changer, EQ, DRC, AEC, Noise suppression, Frequency-shifting, Screaming detection and suppression.
• SDK includes examples and middleware.
• Free Eclipse-based IDE and GCC compiler.
• Supports FreeRTOS.
• All C programming, easy for porting.

Firmware Programming and Protection

• Multiple flash programming methods supported (debugger, specific burner/programmer, Flash Burner Lite).
• Firmware upgradable with Dual-bank.
• 32-bit customized key for firmware encryption.
• On-chip 64-bit unique ID.

ESD

• HBM 2KV ESD capability.

Package and Operational Temperature

• Package: LQFP64-7x7mm.
• Working temperature: -40°C ~ 85°C.

Application Fields

• Bluetooth audio speaker.
• Bluetooth Karaoke equipment.
• Bluetooth Headphone.
• Bluetooth Car audio.
• Multiple microphone system for intelligent voice applications with Bluetooth.

Diagrams Description

Functional Block Diagram (Figure 1)

The functional block diagram illustrates the architecture of the BP1064L2 module. Key components include: RF Section (BTRF), Baseband & Modem (BT Modem, BT Baseband, DPLL/APLL, TRNG), Core Processing (RISC Core with FPU, DSP, FFT, SRAM, EFUSE, FSHC, GPIO), Peripherals & Interfaces (SAR-ADC, S/PDIF, I2S/IIS, Audio ADC, Audio DAC, SPIM, SPIS, SDIO, UART/UART1, I2C, OTG), Power Management (PMU, POR/LVD, WatchDog), and Clock & Timing (RC12M, RTC, Backup Register, Timers).

Audio DSP Signal Flow Diagram (Figure 2)

The Audio DSP signal flow diagram depicts the audio processing path from various inputs (Analog, BT-IN, USB IN, USB SD IN) through stages like Preamplification, Noise Reduction, Vocal Cut, Bass Enhancement (MyBass), Dynamic Range Compression (DRC), Equalization (EQ), and Mixing, to the final DAC outputs (DAC-L, DAC-R). It also shows a monitoring path for processed audio.

Regulatory Information

For USA (FCC Statement)

This device complies with Part 15 of the FCC Rules. Operation is subject to two conditions: no harmful interference and acceptance of received interference. Any unauthorized changes or modifications may void the user's authority to operate the equipment. The equipment has been tested and found to comply with Class B digital device limits, designed to provide reasonable protection against harmful interference in residential installations. If interference occurs, users are advised to reorient/relocate the antenna, increase separation, or connect to a different circuit. The modular approval requires host manufacturers to ensure final product compliance. Modifications by the host manufacturer require C2PC or new certification. The module must be installed and operated with a minimum distance of 20 cm from the user's body. The host device must display the FCC ID if it's not visible on the module.

For Canada (IC Statement)

This device contains licence-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canada's licence-exempt RSS(s). Operation is subject to two conditions: no interference and acceptance of any interference. The modular can be installed in mobile or fix devices, not portable ones. It complies with IC RF radiation exposure limits for uncontrolled environments and must not be co-located with other transmitters. Installation requires a minimum distance of 20 cm between the radiator and the user's body. The host device must display the IC number if it's not visible on the module.

Antenna Specification

This device is designed to operate with an antenna having a peak gain of 2.81dBi @ 2.4GHz. Antennas of different types or higher gain are strictly prohibited. The required antenna impedance is 50 ohms. Model: BP10xx_F.