Digital Step Attenuator DAT-3175A Series

state control values will change device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Simplified Schematic Fig. 3: Parallel Interface Timing Diagram The DAT-3175A-PP parallel interface consists of 5 control bits that select the desired attenuation state, as

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DAT-3175A-PP
Surface Mount
Digital Step Attenuator DAT-3175A Series
75 0 to 31 dB, 1.0 dB Step 1MHz to 2.5 GHz

The Big Deal
· Wideband, operates up to 2.5 GHz · Glitchless attenuation transitions · High IP3, 52 dBm

CASE STYLE: DG983-2

Product Overview
The DAT-3175A+ series of 75 digital step attenuators provides adjustable attenuation from 0 to 31 dB in 1 dB steps. The control is a 5-bit serial/parallel interface, and the attenuators operate with either single positive or dual (positive and negative) supply voltage. DAT-3175A+ series models are produced by a unique CMOS process on silicon, offering the performance of GaAs with the advantages of conventional CMOS devices.

Key Features
Feature Wideband operation, specified from 1MHz to 2.5 GHz
Serial or parallel interface

Advantages Can be used in multiple applications such as various versions of DOCSIS, satellite and defense, reducing part count.
Models available with serial or parallel interface mode to suit customer demand.

Good VSWR, 1.3:1 typ.

Eases interfacing with adjacent components and results in low amplitude ripple.

Single positive supply models: (Model suffixes: -SP+ and ­PP+) +2.3 to +3.6V+
Dual supply models: (Model suffixes: -SN+ and ­PN+) +2.7 to +3.6V (Positive) and -3.6 to -3.2V (Negative)
Useable over a wide range of supply voltages, +2.3/2.7 to 5.2V

Use of single positive supply simplifies power supply design. An internal negative voltage generator supplies the desired negative voltage. Single positive supply results in excellent spurious performance, -140 dBm typical.
Dual supply provides spurious-free operation. It also allows fast switching up to 1 MHz (vs. 25 kHz for single supply).
Wide range fo positive operating voltages allows the DAT-3175A+ Series of models to be used in a wide range of applications. See Application Note AN-70-032 for operation above +3.6V

Footprint compatible to DAT-3175-XX+ Series (XX=SN/SP/PN/PP)

Can fit into existing footprint and provide wideband performance, to 2.5 GHz instead of 2.0 GHz.

Glitchless Attenuation Transitions, 0.26 typical

Compared to previous generation of digital attenuatiors which is a vast improvement.

Mini-Circuits®
www.minicircuits.com P.O. Box 350166, Brooklyn, NY 11235-0003 (718) 934-4500 sales@minicircuits.com

Page 1 of 8

Digital Step Attenuator 75W 1-2500 MHz

31 dB, 1.0 dB Step 5 Bit, Parallel Control Interface, Single Supply Voltage

Product Features · Single positive supply voltage · Immune to latch up · Glitchless attenuation transitions · Excellent accuracy, 0.1 dB Typ · Low Insertion Loss · High IP3, +55-59 dBm Typ · Very low DC power consumption · Excellent return loss, 18 dB Typ · Small size 4.0 x 4.0 mm
Typical Applications · DOCSIS® 3.1 · Portable Wireless · CATV & DBS · MMDS & Wireless LAN · Wireless Local Loop · UNII & Hiper LAN · Power amplifier distortion canceling loops

Generic photo used for illustration purposes only
DAT-3175A-PP+
CASE STYLE: DG983-2
+RoHS Compliant
The +Suffix identifies RoHS Compliance. See our web site for RoHS Compliance methodologies and qualifications

General Description The DAT-3175A-PP+ is a 75W RF digital step attenuator that offers an attenuation range up to 31 dB in 1.0dB steps. The control is a 5-bit parallel interface, operating on single (positive) supply voltage. The DAT3175A-PP+ is produced using a unique CMOS process on silicon, offering the performance of GaAs, with the advantages of conventional CMOS devices.

Simplified Schematic

RF Input

16dB

Parallel Control Latch Enable

RF Out

8dB

4dB

2dB

1dB

Control Logic Interface

Mini-Circuits®
www.minicircuits.com P.O. Box 350166, Brooklyn, NY 11235-0003 (718) 934-4500 sales@minicircuits.com

REV. A M158000 DAT-3175A-PP+ RS/CP/AM 200513 Page 2 of 8

Digital Step Attenuator

DAT-3175A-PP+

RF Electrical Specifications, 1-2500 MHz, TAMB=25°C, VDD=+3V, 75

Parameter

Freq. Range (GHz)

Min.

Typ.

0.001-1.2

--

0.03

Accuracy @ 1 dB Attenuation Setting

1.2-2.0

--

0.1

2.0-2.5

--

0.1

0.001-1.2

--

0.07

Accuracy @ 2 dB Attenuation Setting

1.2-2.0

--

0.15

2.0-2.5

--

0.15

0.001-1.2

--

0.05

Accuracy @ 4 dB Attenuation Setting

1.2-2.0

--

0.15

2.0-2.5

--

0.2

0.001-1.2

--

0.1

Accuracy @ 8 dB Attenuation Setting

1.2-2.0

--

0.24

2.0-2.5

--

0.35

0.001-1.2

--

0.23

Accuracy @ 16 dB Attenuation Setting

1.2-2.5

--

0.8

2.0-2.5

--

0.8

Insertion Loss1 @ all attenuator set to 0dB

0.001-1.2

--

1.2

1.2-2.5

--

1.6

VSWR

0.001-1.2

--

1.3

1.2-2.5

--

1.4

Input IP3 (at Min. and Max. Attenuation)

.005-2.5

--

55-69

Input IP2

.005-2.5

See Fig. 1

Input Power @ 0.1dB Compression (at Min. and Max. Attenuation)
Input Operating Power

0.030-2.5

--

+30

1 MHz to 30 MHz

--

--

>30 MHz

--

--

Thermal Resistance (Junction to case)

--

--

25

Max.
0.18 0.20 0.23 0.21 0.26 0.31 0.27 0.36 0.47 0.39 0.60 0.79 0.63 1.0 1.43 1.8 1.9 -- -- --
--
See Fig. 2 +24 --

Units dB
dB
dB
dB
dB dB :1 dBm dBm dBm dBm °C/W

DC Electrical Specifications

Parameter

Min.

Typ.

Max.

Vdd Supply Voltage

2.3

3

3.62

Idd Supply Current

--

--

200

Control Input Low

-0.3

--

0.63

Control Input High

1.17

--

3.6

Control Current

--

--

20

1. I. Loss values are de-embedded from test board Loss (test board's Insertion Loss: 0.10dB @100MHz, 0.40dB @1200MHz, 0.55dB @2000MHz, 0.75dB @4000MHz).
2. For operation above +3.6V see application note, AN-70-032 3. 0 Volt during power up.

Units V µA V V µA

Absolute Maximum Ratings4

Parameter

Ratings

Operating Temperature

-40°C to 105°C

Storage Temperature

-65°C to 150°C

Vdd

-0.3V Min., 5.5V Max.

Voltage on any input

-0.3V Min., 3.6V Max.

Input Power

1-30 MHz 30-2500 MHz

Figure 1 +30dBm

4. Permanent damage may occur if any of these limits are exceeded. 5. Operation between max operating and absolute max input power will result in reduced reliability.

IIP2 (dBm)

Switching Specifications

Parameter

Min. Typ. Max. Units

Switching Speed, 50% Control to 90% or 10% of RF

--

0.4

0.7

µSec

Switching Control Frequency

--

--

25

kHz

120

100

80

0 dB

60

31.5 dB

40

20

0

5

50

500

5000

Frequency (MHz)

Fig 1. IP2 vs. Frequency and Attenuation

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Page 3 of 8

LE

GND

VDD 6 N/C 7 N/C 8 VDD 9 GND 10

Digital Step Attenuator

Pin Description

Function

Pin Number

Description

C16

1

Control for Attenuation bit, 16dB (Note 3, 7)

RF in

2

RF in port (Note 1)

N/C

3

Not connected (Note 4)

GND

4

Ground connection

LE

5

Latch Enable Input (Note 2)

VDD PUP1

6

Positive Supply Voltage

7

Power-up selection (Note 7)

PUP2

8

Power-up selection

VDD GND

9

Positive Supply Voltage

10

Ground connection

GND

11

Ground connection

GND

12

Ground connection (Note 6)

GND

13

Ground connection

RF out

14

RF out port (Note 1)

C8

15

Control for attenuation bit, 8 dB

C4

16

Control for attenuation bit, 4 dB

C2

17

Control for attenuation bit, 2 dB

GND

18

Ground Connection

C1

19

Control for attenuation bit, 1 dB

N/C

20

Not connected (Note 7)

GND

Paddle Paddle ground (Note 5)

Notes: 1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor. 2. Latch Enable (LE) has an internal 2MW to internal positive supply voltage. 3. Place a 10KW resistor in series to be compatible with previous generation of models.
and 10KW maybe omitted in new designs. 4. Place a shunt 10KW resistor to GND 5. The exposed solder pad on the bottom of the package (See Pin configuration) must be
grounded for proper device operation. 6. Ground must be less than 80 mil (0.08") from Pin 12 for proper device operation. 7. This pin has an internal 1M resistor to ground.

DAT-3175A-PP+
Parallel
Pin Configuration (Top View)

20 N/C 19 C1 18 GND 17 C2 16 C4

C16 1 RFin 2 N/C 3 GND 4
LE 5

2x2mm Paddle ground

15 C8 14 RFout 13 GND 12 GND 11 GND

VDD 6 PUP1 7 PUP2 8 VDD 9 GND 10

Device Marking

Pin 1 Index

MCL

DS75

Input Power (dBm)

32

30

28

26

24

22

20

18

Absolute Max Power

16

14

Max Operating-Pulsed (>= 30 MHz)

12

Max Operating -CW & Pulsed (< 30 MHz)

10

Max Operating-CW ( 30 MHz)

8

6

4 1.0

10.0

100.0

1000.0

Fig 2. Max Input PoweFrevqsue.nFcrye(MquHez)ncy.

Pulsed Power: 5% duty cycle, 4620 µS period

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Page 4 of 8

Digital Step Attenuator
Simplified Schematic

DAT-3175A-PP+

RF Input

16dB

Parallel Control Latch Enable

RF Out

8dB

4dB

2dB

1dB

Control Logic Interface

The DAT-3175A-PP+ parallel interface consists of 5 control bits that select the desired attenuation state, as shown in Table 1: Truth Table

Table 1. Truth Table

Attenuation State

C16

C8

C4

C2

C1

Reference

0

0

0

0

0

1 (dB)

0

0

0

0

1

2 (dB)

0

0

0

1

0

4 (dB)

0

0

1

0

0

8 (dB)

0

1

0

0

0

16 (dB)

1

0

0

0

0

31 (dB)

1

1

1

1

1

Note: Not all 32 possible combinations of C1 - C16 are shown in table

The parallel interface timing requirements are defined by Fig. 3 (Parallel Interface Timing Diagram) and Table 2 (Parallel Interface AC Characteristics), and switching speed.
For latched parallel programming the Latch Enable (LE) should be held LOW while changing attenuation state control values, then pulse LE HIGH to LOW (per Figure 1) to latch new attenuation state into device.
For direct parallel programming, the Latch Enable (LE) line should be pulled HIGH. Changing attenuation state control values will change device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers).

Fig. 3: Parallel Interface Timing Diagram
LE
Parallel Data C16:C1

Table 2. Parallel Interface AC Characteristics

Symbol

Parameter

Min. Max. Units

tLEPW

LE minimum pulse width

10

ns

tPDSUP

Data set-up time before clock rising edge of LE

10

ns

tPDHLD

Data hold time after clock falling edge of LE

10

ns

tPDSUP

tLEPW

tPDHLD

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Page 5 of 8

Digital Step Attenuator

DAT-3175A-PP+

Power-up Control Settings
The DAT-3175A-PP+ always assumes a specifiable attenuation setting on power-up, allowing a known attenuation state to be established before an initial parallel control word is provided.
When the attenuator powers up with LE=0, the control bits are automatically set to one of four possible values .These four values are selected by the two power-up control bits,PUP1 and PUP2 ,as shown in Table3: (Power-Up Truth Table, Parallel Mode).

Table 3. Power-Up Truth Table, Parallel Mode

Attenuation State

PUP1

PUP2

LE

Reference

0

0

0

8 (dB)

0

1

0

16 (dB)

1

0

0

31 (dB)

1

1

0

Defined by C1-C16 (See Table 1-Truth Table)

X (Note 1) X (Note 1)

1

Note 1: PUP1 and PUP2 Connection may be 0, 1, GROUND, or not connect, without effect on attenuation state.

Power-Up with LE=1 provides normal parallel operation with C1-C16, and PUP1 and PUP2 are not active.

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Page 6 of 8

Digital Step Attenuator

DAT-3175A-PP+

Mini-Circuits®
www.minicircuits.com P.O. Box 350166, Brooklyn, NY 11235-0003 (718) 934-4500 sales@minicircuits.com

Page 7 of 8

Digital Step Attenuator

DAT-3175A-PP+

Additional Detailed Technical Information
additional information is available on our dash board. To access this information click here

Performance Data

Data Table Swept Graphs

Case Style

S-Parameter (S2P Files) Data Set (.zip file) DG983-2 Plastic package, exposed paddle, lead finish: NiPdAu

Tape & Reel Standard quantities available on reel
Suggested Layout for PCB Design Evaluation Board Environmental Ratings

F87 7" reels with 20, 50, 100, 200, 500 Or 1000 devices 13" reels with 3K devices PL-193
TB-337
ENV33T1

ESD Rating
Human Body Model (HBM): Class 1C (1000 to <2000V) in accordance with MIL-STD-883 method 3015 Charge Device Model class C2 (500 to <1000V) per JESD22-C101
MSL Rating
Moisture Sensitivity: MSL1 in accordance with IPC/JEDEC J-STD-020D

MSL Test Flow Chart

Start

Visual Inspection

Reflow 3 cycles, 260°C

Visual Inspection

Electrical Test
Soak 85°C/85RH 168 hours
Electrical Test

SAM Analysis
Bake at 125°C, 24 hours
SAM Analysis

Finish

Additional Notes A. Performance and quality attributes and conditions not expressly stated in this specification document are intended
to be excluded and do not form a part of this specification document.
B. Electrical specifications and performance data contained in this specification document are based on Mini-Circuit's applicable established test performance criteria and measurement instructions.
C. The parts covered by this specification document are subject to Mini-Circuits standard limited warranty and terms and conditions (collectively, "Standard Terms"); Purchasers of this part are entitled to the rights and benefits contained therein. For a full statement of the Standard Terms and the exclusive rights and remedies thereunder, please visit Mini-Circuits' website at www.minicircuits.com/MCLStore/terms.jsp

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Page 8 of 8


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