Owner's Manual for VISHAY models including: IRF840, Siliconix Power MOSFET, IRF840 Siliconix Power MOSFET, Power MOSFET, TO-220AB
Created Date: 8/31/2021 10:56:26 PM
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DocumentDocumentwww.vishay.com IRF840 Vishay Siliconix Power MOSFET D TO-220AB S D G G S N-Channel MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () Qg max. (nC) Qgs (nC) Qgd (nC) Configuration 500 VGS = 10 V 63 9.3 32 Single 0.85 ORDERING INFORMATION Package Lead (Pb)-free Lead (Pb)-free and halogen-free FEATURES · Dynamic dV/dt rating · Repetitive avalanche rated Available · Fast switching · Ease of paralleling Available · Simple drive requirements · Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details DESCRIPTION Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry. TO-220AB IRF840PbF IRF840PbF-BE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-source voltage Gate-source voltage Continuous drain current Pulsed drain current a Linear derating factor VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C ID IDM Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dV/dt c TC = 25 °C EAS IAR EAR PD dV/dt Operating junction and storage temperature range Soldering recommendations (peak temperature) d For 10 s TJ, Tstg Mounting torque 6-32 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, Rg = 25 , IAS = 8.0 A (see fig. 12) c. ISD 8.0 A, dI/dt 100 A/s, VDD VDS, TJ 150 °C d. 1.6 mm from case LIMIT 500 ± 20 8.0 5.1 32 1.0 510 8.0 13 125 3.5 -55 to +150 300 10 1.1 UNIT V V A W/°C mJ A mJ W V/ns °C lbf · in N · m S21-0883-Rev. E, 30-Aug-2021 1 Document Number: 91070 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com IRF840 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL Maximum junction-to-ambient Case-to-sink, flat, greased surface Maximum junction-to-case (drain) RthJA RthCS RthJC TYP. - 0.50 - MAX. 62 1.0 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage Gate-source leakage Zero gate voltage drain current Drain-source on-state resistance Forward transconductance Dynamic Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off delay time Fall time VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VGS = 0 V, ID = 250 A Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 A VGS = ± 20 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 4.8 A b VDS = 50 V, ID = 4.8 A b 500 - - V - 0.78 - V/°C 2.0 - 4.0 V - - ± 100 nA - - 25 A - - 250 - - 0.85 4.9 - - S VGS = 0 V, - VDS = 25 V, - f = 1.0 MHz, see fig. 5 - - VGS = 10 V ID = 8 A, VDS = 400 V, see fig. 6 and 13 b - - - VDD = 250 V, ID = 8 A - Rg = 9.1 , RD = 31 , see fig. 10 b - - 1300 - 310 - pF 120 - - 63 - 9.3 nC - 32 14 - 23 - ns 49 - 20 - Internal drain inductance Internal source inductance LD Between lead, 6 mm (0.25") from D package and center of G LS die contact S - 4.5 - nH - 7.5 - Gate input resistance Rg Drain-Source Body Diode Characteristics f = 1 MHz, open drain 0.6 - 2.8 Continuous source-drain diode current IS MOSFET symbol showing the D - - 8.0 Pulsed diode forward current a integral reverse G ISM p - n junction diode A - - 32 S Body diode voltage VSD TJ = 25 °C, IS = 8 A, VGS = 0 V b - - 2.0 V Body diode reverse recovery time Body diode reverse recovery charge trr Qrr - 460 970 ns TJ = 25 °C, IF = 8 A, dI/dt = 100 A/s b - 4.2 8.9 C Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width 300 s; duty cycle 2 % S21-0883-Rev. E, 30-Aug-2021 2 Document Number: 91070 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) IRF840 Vishay Siliconix ID, Drain Current (A) VGS Top 15 V 10 V 8.0 V 101 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 100 100 91070_01 4.5 V 20 µs Pulse Width TC = 25 °C 101 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics, TC = 25 °C VGS Top 15 V 101 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 4.5 V ID, Drain Current (A) 100 100 91070_02 20 µs Pulse Width TC = 150 °C 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 150 °C ID, Drain Current (A) 150 °C 101 25 °C 100 91070_03 20 µs Pulse Width VDS = 50 V 4 5 6 7 8 9 10 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) 3.0 ID = 8.0 A 2.5 VGS = 10 V 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 91070_04 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 2500 2000 1500 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Ciss Capacitance (pF) 1000 500 Coss Crss 0 100 91070_05 101 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage VGS, Gate-to-Source Voltage (V) 20 ID = 8.0 A 16 VDS = 400 V VDS = 250 V 12 VDS = 100 V 8 4 0 0 91070_06 For test circuit see figure 13 15 30 45 60 75 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage S21-0883-Rev. E, 30-Aug-2021 3 Document Number: 91070 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com IRF840 Vishay Siliconix ID, Drain Current (A) ISD, Reverse Drain Current (A) 8.0 150 °C 6.0 101 25 °C 4.0 100 0.4 91070_07 VGS = 0 V 0.6 0.8 1.0 1.2 1.4 VSD, Source-to-Drain Voltage (V) Fig. 7 - Typical Source-Drain Diode Forward Voltage 102 Operation in this area limited 5 by RDS(on) 2 10 µs 10 100 µs 5 ID, Drain Current (A) 2 1 5 2 0.1 0.1 2 91070_08 1 ms 10 ms 5 2 1 TC = 25 °C TJ = 150 °C Single Pulse 5 10 2 5 102 2 5 103 2 VDS, Drain-to-Source Voltage (V) 5 104 Fig. 8 - Maximum Safe Operating Area 10 2.0 0.0 25 91070_09 50 75 100 125 150 TC, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature VDS VGS RG RD D.U.T. 10 V Pulse width 1 µs Duty factor 0.1 % +- VDD Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 1 0 - 0.5 0.2 0.1 0.1 0.05 0.02 0.01 10-2 10-3 10-5 91070_11 Single Pulse (Thermal Response) 10-4 10-3 10-2 0.1 t1, Rectangular Pulse Duration (S) PDM t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 1 10 102 Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case S21-0883-Rev. E, 30-Aug-2021 4 Document Number: 91070 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com IRF840 Vishay Siliconix VDS Vary tp to obtain required IAS RG 10 V tp L D.U.T. IAS 0.01 + - VDD Fig. 12a - Unclamped Inductive Test Circuit VDS VDS tp VDD IAS Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 1200 1000 800 Top Bottom ID 3.6 A 5.1 A 8.0 A 600 400 200 VDD = 50 V 0 25 50 75 100 125 150 91070_12c Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current 10 V QGS VG QG QGD Charge Fig. 13a - Basic Gate Charge Waveform Current regulator Same type as D.U.T. 12 V 50 k 0.2 µF 0.3 µF + D.U.T. - VDS VGS 3 mA IG ID Current sampling resistors Fig. 13b - Gate Charge Test Circuit S21-0883-Rev. E, 30-Aug-2021 5 Document Number: 91070 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com D.U.T. + 2 - 1 Rg Peak Diode Recovery dv/dt Test Circuit + Circuit layout considerations · Low stray inductance 3 · Ground plane · Low leakage inductance current transformer - - 4+ IRF840 Vishay Siliconix · dv/dt controlled by Rg · Driver same type as D.U.T. · ISD controlled by duty factor "D" · D.U.T. - device under test + - VDD 1 Driver gate drive P.W. Period D = P.W. Period VGS = 10 V a 2 D.U.T. ISD waveform Reverse recovery Body diode forward current current di/dt 3 D.U.T. VDS waveform Diode recovery dv/dt V DD Re-applied voltage 4 Inductor current Body diode forward drop Ripple 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91070. S21-0883-Rev. E, 30-Aug-2021 6 Document Number: 91070 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D H(1) Q www.vishay.com E Ø P 123 M* b(1) C b e e(1) TO-220-1 Package Information Vishay Siliconix A F DIM. MILLIMETERS MIN. MAX. INCHES MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 J(1) 2.41 2.92 0.095 0.115 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 Ø P 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note · M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM J(1) Package Picture ASE Xi'an L L(1) Revison: 14-Dec-15 1 Document Number: 66542 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com Disclaimer Legal Disclaimer Notice Vishay ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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