NXP AN14179 Based Micro Controllers
- Core Platform: Arm Cortex-M33 up to 150 MHz with TrustZone, MPU, FPU, SIMD, DSP SmartDMA
- System Control: Power control, Clock generation unit, PMC, Secure DMA0, Secure DMA1, Secure AHB bus
- Analog: 4x 16 b ADC, Temp sensor, 2x ACMP, Glitch detect, VREF
- Interfaces: 8x LP flexcomm supporting UART, SPI, I2C, 4ch SAI, 2x CAN-FD, USB HS, 2x I3C
- Memory: Flash up to 512 kB, RAM up to 320 kB, ECC RAM 32 kB
- HMI: FlexIO, DMIC
- Security: PKC, ECC-256, SHA-512, RNG AES-256, Multi-Rate Timer, Windowed WDT, Debug auth., PRINCE, RTC with anti-tamper pins
- General Purpose Timers: 5x 32 b Timers
- Other Features: Micro-Tick Timer, DICE + UUID, PFR, SRAM PUF, 2x FlexPWM with 2 QDC module, OS Event Timer, 2x Code WDG, OTP, Tamper detect
Product Usage Instructions
- Step 1: Understanding the Migration Guide
Read through the migration guide provided from MCXNx4x to MCXN23x to understand the differences and changes in the platforms. - Step 2: Assessing Application Compatibility
Check if your current applications on MCXNx4x are compatible with the MCXN23x platform. Identify any specific features or peripherals that may need modification. - Step 3: Porting Applications
Follow the guidelines in the migration guide to port your applications from MCXNx4x to MCXN23x. Make necessary code changes based on the platform variations. - Step 4: Testing and Validation
After porting the applications, thoroughly test them on the MCXN23x platform to ensure proper functionality and performance.
Frequently Asked Questions (FAQ)
- Q: What are the key differences between MCXNx4x and MCXN23x?
A: MCXN23x is a cropped version of MCXNx4x with some co-processors and peripherals removed. The MCX series MCU is divided into subseries N, A, L, and W. - Q: How can I migrate my applications from MCXNx4x to MCXN23x?
A: Refer to the migration guide provided by NXP that outlines the steps to migrate applications between the two platforms. Ensure compatibility and make necessary adjustments in the code.
AN14179
Migration Guide from MCXNx4x to MCXN23x
Rev. 1 — 6 May 2024
Application note
Document information
| Information | Content |
| Keywords | AN14179, MCXNx4x, MCXN23x, migration guide |
| Abstract | This application note describes the differences between MCXNx4x and MCXN23x and guides customers on how to quickly migrate applications from the MCXNx4x platform to the MCXN23x platform. |
Introduction
The MCXNx4x is a new-generation MCU launched by NXP after Kinetis and LPC. It integrates excellent IP from both Kinetis and LPC platforms, such as CMC, FlexCAN, FlexIO, and SPC from the Kinetis platform and PowerQuad, SmartDMA, PINT, RTC, and MRT from the LPC platform. The MCX series MCU is divided into four subseries: N, A, L, and W.
- MCX N (Neural):
- 150 MHz, 512KB-2MB
- On-chip accelerators, enhanced peripherals, and advanced security
- MCX A (All-purpose):
- Up to 96 MHz, 32KB-1MB
- Intelligent peripherals and various device options for a wide range of applications
- • MCX W (Wireless):
- Up to 96 MHz
- Low-power Bluetooth LE, Thread, and Zigbee radio optimized for IIoT and Matter applications and advanced security
- MCX L (Low-power):
- Below 50 MHz, up to 1 MB
- Optimized for always on battery operated applications with the lowest active power and leakage
The MCXNx4x series microcontrollers combine the Arm Cortex-M33 TrustZone core with a CoolFlux BSP32, a PowerQuad DSP Co-processor, and multiple high-speed connectivity options running at 150 MHz. To support a wide variety of applications, the MCX N series includes advanced serial peripherals, timers, high-precision analog, and state-of-the-art security features like secure user code, data, and communications. All MCXNx4x products include dual-bank flash, which supports read-while-write operation from internal flash. The MCXNx4x series also supports large external serial memory configurations.
The MCXNx4x MCU families are as follows:
- N54x: Mainstream MCU with a second M33 core, advanced timers, analog and high-speed connectivity, including high-speed USB, 10/100 Ethernet, and FlexIO, which can be programmed as an LCD controller.
- N94x: Integration of CPU and DSP serial connectivity, advanced timers, high precision analog, and high-speed connectivity, including high-speed USB, CAN 2.0, 10/100 Ethernet, and FlexIO, which can be programmed as an LCD controller.
- MCXN23x is the second product in the MCX N series. It can be regarded as a cropped version of MCXNx4x. Almost all IPs are reused from MCXNx4x, and some co-processors and peripherals are removed. These removed modules are as follows:
- Co-processor: Secondary Cortex-M33 Core, PowerQuad, NPU, CoolFlux BSP32, and so on.
- Peripherals: FlexSPI, uSDHC, EMVSIM, Ethernet, 12-bit DAC, 14-bit DAC, and so on.
This document describes how to migrate applications from the MCXNx4x platform to the MCXN23x platform. The system block diagram of MCXN23x is shown in Figure 1.
Migration Guide from MCXNx4x to MCXN23x
Figure 1. MCXN23x system block diagram
Table 1 lists the comparison of system resources between the MCXNx4x and MCXN23x.
Table 1. Comparison of MCXNx4x and MCXN23x
| MCU series | MCXNx4x | MCXN23x | ||||
| Part | MCXN947 | MCXN946 | MCXN547 | MCXN546 | MCXN236 | MCXN235 |
| Package | VFBGA184 HLQFP100 | VFBGA184 HLQFP100 | VFBGA184 HLQFP100 | VFBGA184 HLQFP100 | VFBGA184 HLQFP100 | VFBGA184 HLQFP100 |
| Temp range (junction) | -40 ºC to 125 ºC | -40 ºC to 125 ºC | -40 ºC to 125 ºC | -40 ºC to 125 ºC | -40 ºC to 125 ºC | -40 ºC to 125 ºC |
| MCU series | MCXNx4x | MCXN23x | ||||
| Part | MCXN947 | MCXN946 | MCXN547 | MCXN546 | MCXN236 | MCXN235 |
| Core #1 Cortex- M33 | 150 MHz TZM
+FPU+ETM |
150 MHz TZM
+FPU+ETM |
150 MHz TZM
+FPU+ETM |
150 MHz TZM
+FPU+ETM |
150 MHz TZM
+FPU+ETM |
150 MHz TZM
+FPU+ETM |
| Core #1 Cache | 16 K | 16 K | 16 K | 16 K | 16 K | 16 K |
| Core #2 Cortex- M33 | 150 MHz | 150 MHz | 150 MHz | 150 MHz | – | – |
| PowerQuad (DSP and Cordic) | Y | Y | Y | Y | – | – |
| NPU | Y | Y | Y | Y | – | – |
| SmartDMA | Y | Y | Y | Y | Y | Y |
| CoolFlux BSP32 | Y | Y | – | – | – | – |
| Total flash | 2 MB | 1 MB | 2 MB | 1 MB | 1 MB | 512 kB |
| Dual bank flash | Y | Y | Y | Y | Y | Y |
| Flash ECC and CRC | Y | Y | Y | Y | Y | Y |
| Flash encrypt (Prince) | Y | Y | Y | Y | Y | Y |
| SRAM (ECC user configurable) | 480 K | 320 K | 480 K | 320 K | 320 K | 160 K |
| SRAM with ECC (in addition to main SRAM) | 32 K | 32 K | 32 K | 32 K | 32 K | 32 K |
| FlexSPI with 16 k cache | 1x, 2 ch | 1x, 2 ch | 1x, 2 ch | 1x, 2 ch | – | – |
| uSDHC | Y[1] | – | Y | Y | – | – |
| EMVSIM | Y[1] | – | Y | Y | – | – |
| Secure key management | PUF/UDF | PUF/UDF | PUF/UDF | PUF/UDF | PUF/UDF | PUF/UDF |
| Secure subsystem | Y | Y | Y | Y | Y | Y |
| Anti-tamper pin[2] | 8 | 8 | 8 | 8 | 6 | 6 |
| Display controller (FlexIO) | 1 | 1 | 1 | 1 | 1 | 1 |
| TSI | 1[1] | N | 1 | 1 | – | – |
| DMIC | 4 ch[1] | – | 4 ch | 4 ch | 4 ch | 4 ch |
| SAI | 4 ch | 4 ch | 4 ch | 4 ch | 4 ch | 4 ch |
| LP_FLEXCOMM | 10 | 10 | 10 | 10 | 8 | 8 |
| I3C | 2 | 2 | 2 | 2 | 2 | 2 |
| USB HS | 1 | – | 1 | 1 | 1 | 1 |
| USB FS | 1 | 1 | 1 | 1 | – | – |
| MCU series | MCXNx4x | MCXN23x | ||||
| Part | MCXN947 | MCXN946 | MCXN547 | MCXN546 | MCXN236 | MCXN235 |
| 10/100 Ethernet MAC | MII/RMII | MII/RMII | MII/RMII | MII/RMII | – | – |
| FlexCAN (FD) | 2 | 2 | 1 | 1 | 2 | 2 |
| DAC 12b, 1 Msps | 2 | 2 | 1 | 1 | – | – |
| DAC 14b, 5 Msps | 1 | 1 | – | – | – | – |
| Comparator | 3 | 3 | 2 | 2 | 2 | 2 |
| Opamp | 3 | 3 | – | – | – | – |
| ADC | 2 | 2 | 2 | 2 | 2 | 2 |
| VREF | Y | Y | Y | Y | Y | Y |
| FlexPWM | 2 | 2 | 1 | 1 | 2 | 2 |
| Quadrature Decoder | 2 | 2 | 1 | 1 | 2 | 2 |
| SINC filter | Y | Y | – | – | – | – |
| RTC | 1 | 1 | 1 | 1 | 1 | 1 |
| 32b timer | 5 | 5 | 5 | 5 | 5 | 5 |
| SCTimer | 1 | 1 | 1 | 1 | – | – |
| MRT 24b | 1 | 1 | 1 | 1 | 1 | 1 |
| uTick timer | 1 | 1 | 1 | 1 | 1 | 1 |
| WWDT | 1 | 1 | 1 | 1 | 1 | 1 |
| OS timer | 1 | 1 | 1 | 1 | 1 | 1 |
- This feature is only supported on the MCXN947 VFBGA184 package.
- The 100HLQFP supports two Anti-tamper pins.
The following section compares the MCXNx4x and MCXN23x in terms of memory, clock, pinout, and peripherals.
Memory
This section provides details about flash memory and SRAM memory.
Flash memory
The MCXNx4x has a flash size of up to 2 MB, while the MCXN23x has a flash size of up to 1 MB, both support dual bank flash and dual image boot. The configuration of flash size for each part is listed in Table 2 and Table 3.
Table 2. MCXNx4x part list
| Part Number | Embedded memory | Features | Package | ||||
| Flash (MB) | SRAM (kB) | Tamper pins (max) | GPIOs
(max) |
SRAM PUF | Pin count | Type | |
| (P)MCXN547VNLT | 2 | 512 | 2 | 74 | Y | 100 | HLQFP |
| Part Number | Embedded memory | Features | Package | ||||
| Flash (MB) | SRAM (kB) | Tamper pins (max) | GPIOs
(max) |
SRAM PUF | Pin count | Type | |
| (P)MCXN546VNLT | 1 | 352 | 2 | 74 | Y | 100 | HLQFP |
| (P)MCXN547VDFT | 2 | 512 | 8 | 124 | Y | 184 | VFBGA |
| (P)MCXN546VDFT | 1 | 352 | 8 | 124 | Y | 184 | VFBGA |
| (P)MCXN947VDFT | 2 | 512 | 8 | 124 | Y | 184 | VFBGA |
| (P)MCXN947VNLT | 2 | 512 | 2 | 78 | Y | 100 | HLQFP |
| (P)MCXN946VNLT | 1 | 352 | 2 | 78 | Y | 100 | HLQFP |
| (P)MCXN946VDFT | 1 | 352 | 8 | 124 | Y | 184 | VFBGA |
Table 3. MCXN23x part list
| Part Number | Embedded Memory | Features | Package | ||||
| Flash (MB) | SRAM (kB) | Tamper pins (max) | GPIOs (max) | SRAM PUF | Pin count | Type | |
| (P)MCXN236VNLT | 1 | 352 | 6 | 74 | Y | 100 | HLQFP |
| (P)MCXN236VDFT | 1 | 352 | 6 | 108 | Y | 184 | VFBGA |
| (P)MCXN235VNLT | 0.512 | 192 | 6 | 74 | Y | 100 | HLQFP |
| (P)MCXN235VDFT | 0.512 | 192 | 6 | 108 | Y | 184 | VFBGA |
SRAM memory
The RAM size of the MCXNx4x is up to 512 kB, and the RAM size of the MCXN23x is up to 352 kB. The size of flash and RAM for each part of the MCXNx4x and MCXN23x is listed in Table 4.
Table 4. Flash and RAM size of different parts
| Parts | MCXNx47 | MCXNx46 | MCXN236 | MCXN235 | |
| Flash | 2M | 1M | 1M | 512 kB | |
| SRAM (kB) | Total size | 512 | 352 | 352 | 192 |
| SRAMX | 96 (0x04000000- 0x04017FFF) | 96 (0x04000000- 0x04017FFF) | 96 (0x04000000- 0x04017FFF) | 32 (0x04000000- 0x04007FFF) | |
| SRAMA | 32 (0x20000000- 0x20007FFF) | 32 (0x20000000- 0x20007FFF) | 32 (0x20000000- 0x20007FFF) | 32 (0x20000000- 0x20007FFF) | |
| SRAMB | 32 (0x20008000- 0x2000FFFF) | 32 (0x20008000- 0x2000FFFF) | 32 (0x20008000- 0x2000FFFF) | 32 (0x20008000- 0x2000FFFF) | |
| SRAMC | 64 (0x20010000- 0x2001FFFF) | 64 (0x20010000- 0x2001FFFF) | 64 (0x20010000- 0x2001FFFF) | 64 (0x20010000- 0x2001FFFF) | |
| SRAMD | 64 (0x20020000- 0x2002FFFFF) | 64 (0x20020000- 0x2002FFFFF) | 64 (0x20020000- 0x2002FFFFF) | 64 (0x20020000- 0x2002FFFFF) | |
| SRAME | 64 (0x20030000- 0x2003FFFFF) | 64 (0x20030000- 0x2003FFFFF) | 64 (0x20030000- 0x2003FFFFF) | 64 (0x20030000- 0x2003FFFFF) | |
| Parts | MCXNx47 | MCXNx46 | MCXN236 | MCXN235 | |
| SRAMF | 64 (0x20040000- 0x2004FFFFF) | – | – | – | |
| SRAMG | 64 (0x20050000- 0x2005FFFFF) | – | – | – | |
| SRAMH | 32 (0x20060000- 0x20067FFF) | – | – | – | |
Clock system
The MCXN23x and MCXNx4x use almost the same clock system, with a few differences.
FRG
A Fractional Rate Generator (FRG) is added to the MCXN23x to generate a more accurate clock for the CLKOUT divider. The FRG output is used as the input of the CLKOUT divider, see Figure 2. It can be used to obtain more precise baud rates when the function clock is not a multiple of standard baud rates. This can be primarily used to create a base baud rate clock for USART functions, and can be used for other purposes, such as metering applications.
Figure 2. MCXN23x CLKOUT diagram
For the CLKOUT diagram of the MCXNx4x, see Figure 3. 
Figure 3. MCXNx4x CLKOUT diagram
The CLKOUT_FRGCTRL register has been added to the SYSCON module of MCXN23x and used to configure numerator and denominator values.
UTICK
The clock sources of UTICK (Micro-Tick) on the MCNX23x have been expanded from 1 to 3, and xtal32k[2] and clk_in have been added as clock sources of UTICK. The clock source of UTICK on the MCXN23x is shown in Figure 4. 
In the metering application, UTICK is used to measure power line frequency. To support metering applications, clk_in and xtal32k[2] are added to the MCXN23x for high-accuracy clock source.
I3C
The clock diagram of I3C on the MCXN23x is shown in Figure 5.
Add clk_1m as the clock source to the I3C_FCLK divider, and keep CLK_SLOW and CLK_SLOW_TC synchronized with FCLK.
The I3C clock diagram of MCXNx4x is shown in Figure 6.
Migration Guide from MCXNx4x to MCXN23x 
Pinout
This section compares the pinout differences between MCXNx4x and MCXN23x, including 184VFBGA and 100HLQFP packages.
184VFBGA
For the 184VFBGA package, the MCXN23x is pin-to-pin compatible with the MCXNx4x. However, there are some differences between the two. In MCXN23x, 28 pins are removed, including 18 GPIO pins, eight analog pins, and two USB pins. The pinout of the MCXN23x 184VFBGA package is illustrated in Figure 7.
In Figure 7, the removed pins are labeled “NC” and are highlighted in yellow. The removed pins on the MCXN23x 184VFBGA are as follows:
GPIO pins:
- P0_8
- P0_9
- P0_10
- P0_11
- P0_12
- P0_13
- P0_30
- P0_31
- P1_20
- P1_21
- P1_22
- P1_23
- P3_3
- P3_4
- P3_5
- P3_19
- P5_8
- P5_9
Analog pins:
- ANA_0
- ANA_1
- ANA_4
- ANA_5
- ANA_6
- ANA_14
- ANA_18
- ANA_22
USB pins:
- USB0_DM
- USB0_DP
The pinout of the MCXNx4x 184VFBGA package is shown in Figure 8.
100HLQFP
For the 100HLQFP package, MCXN23x is almost pin-to-pin compatible with MCXN54x. The only difference is the USB pin. The MCXN54x supports full-speed USB (USB0) and high-speed USB (USB1), but the MCXN23x only supports USB1, so the MCXN23x does not have USB0_DM and USB0_DP pins. The pinout of the MCXN23x 100HLQFP package is as shown in Figure 9.
Migration Guide from MCXNx4x to MCXN23x 
The pinout of the MCXN54x and MCXN94x 100HLQFP package is shown in Figure 10. 
MCXN94x has six pins P4_19, P4_20, P4_21, P4_23, USB0_DM, and USB0_DP. However, MCXN23x does not have these six pins but instead has four different pins USB1_DP, USB1_DM, USB1_VBUS, and VSS_USB.
For more detailed information about the pinouts, refer to the pinout table in the attachments of MCX Nx4x Reference Manual (document MCXNX4XRM) and MCXN23x Reference Manual (document MCXN23XRM).
Peripherals
In Table 1, we have compared the differences between MCNX23x and MCXNx4x. The MCXN23x does not have various modules such as FlexSPI, PowerQuad, NPU, CoolFlux BSP32, uSDHC, EMVSIM, TSI, USB FS, Ethernet, 12-bit DAC, 14-bit DAC, Opamp, SINC Filter, and SCTimer. The following section describes the differences between the common peripherals between the MCXN23x and MCXNx4x.
GPIO
As described in Section 4.1, the MCXNx4x supports up to 124 GPIOs, and the MCXN23x supports up to 106 GPIOs. However, in the case of MCXN23x, 18 GPIO pins are not supported. Apart from being used as GPIOs, these 16 pins also support the functions listed in Table 5.
Table 5. Removed GPIOs on the MCXN23x 184VFBGA package
| 184BGA ALL | 184BGA
ALL Pin Name |
Analog | ALT0 | ALT1 | ALT2 | ALT3 | ALT4 | ALT5 | ALT6 | ALT7 | ALT10 | ALT11 |
| K5 | P1_20 | ADC1_A20/ CMP1_IN3 | P1_20 | TRIG_IN2 | FC5_P4 | FC4_P0 | CT3_MAT2 | SCT0_ OUT8 | FLEXIO0_ D28 | SmartDMA_ PIO16 | – | CAN1_TXD |
| L5 | P1_21 | ADC1_A21/ CMP2_IN3 | P1_21 | TRIG_OUT2 | FC5_P5 | FC4_P1 | CT3_MAT3 | SCT0_ OUT9 | FLEXIO0_ D29 | SmartDMA_ PIO17 | SAI1_ MCLK | CAN1_RXD |
| L4 | P1_22 | ADC1_A22 | P1_22 | TRIG_IN3 | FC5_P6 | FC4_P2 | CT_INP14 | SCT0_ OUT4 | FLEXIO0_ D30 | SmartDMA_ PIO18 | – | – |
| M4 | P1_23 | ADC1_A23 | P1_23 | – | – | FC4_P3 | CT_INP15 | SCT0_ OUT5 | FLEXIO0_ D31 | SmartDMA_ PIO19 | – | – |
| L14 | P5_8 | ADC1_B16 | P5_8 | TRIG_OUT7 | – | TAMPER6 | – | – | – | – | – | – |
| M14 | P5_9 | ADC1_B17 | P5_9 | – | TAMPER7 | – | – | – | – | – | – | |
| K17 | P3_19 | – | P3_19 | – | FC7_P6 | – | CT2_MAT1 | PWM1_X1 | FLEXIO0_ D27 | SmartDMA_ PIO19 | SAI1_RX_ FS | – |
| G14 | P3_5 | – | P3_5 | – | FC7_P3 | – | CT_INP19 | PWM0_X3 | FLEXIO0_ D13 | SmartDMA_ PIO5 | – | – |
| F14 | P3_4 | – | P3_4 | – | FC7_P2 | – | CT_INP18 | PWM0_X2 | FLEXIO0_ D12 | SmartDMA_ PIO4 | – | – |
| D16 | P3_3 | – | P3_3 | – | FC7_P1 | – | CT4_MAT1 | PWM0_X1 | FLEXIO0_ D11 | SmartDMA_ PIO3 | – | – |
| C12 | P0_8 | ADC0_B8 | P0_8 | – | FC0_P4 | – | CT_INP0 | – | FLEXIO0_ D0 | – | – | – |
| A12 | P0_9 | ADC0_B9 | P0_9 | – | FC0_P5 | – | CT_INP1 | – | FLEXIO0_ D1 | – | – | – |
| B12 | P0_10 | ADC0_B10 | P0_10 | – | FC0_P6 | – | CT0_MAT0 | – | FLEXIO0_ D2 | – | – | – |
| B11 | P0_11 | ADC0_B11 | P0_11 | – | – | – | CT0_MAT1 | – | FLEXIO0_ D3 | – | – | – |
| D11 | P0_12 | ADC0_B12 | P0_12 | – | FC1_P4 | FC0_P0 | CT0_MAT2 | – | FLEXIO0_ D4 | – | – | – |
| F12 | P0_13 | ADC0_B13 | P0_13 | – | FC1_P5 | FC0_P1 | CT0_MAT3 | – | FLEXIO0_ D5 | – | – | – |
| E7 | P0_30 | ADC0_B22 | P0_30 | – | FC1_P6 | FC0_P6 | CT_INP2 | – | – | – | – | – |
| D7 | P0_31 | ADC0_B23 | P0_31 | – | – | – | CT_INP3 | – | – | – | – | – |
Table 5 lists the specific pins, including LP_FLEXCOMM0/1/4/5/7, TRIG, CTimer, FlexPWM, FlexIO, SmartDMA, and SAI1 are involved. However, the other pins on the MCX23x can also implement the same functions as these pins. Before migrating from the MCXNx4x to MCXN23x, it is important to check if your design on the MCXNx4x uses these pins. If it does, you must reassign the pins to meet your requirements.
- USB
All the MCXN54x parts and the MCXN94x 184VFBGA packages support FS USB (USB0) and HS USB (USB1). Whereas the MCXN94x 100HLQFP package only supports HS USB. All the MCXN23x parts only support HS USB. - DMIC
All parts of the MCXN23x and MCXN54x have a DMIC module and support up to four digital microphone channels. However, for the MCXN94x series, the MCXN946 does not support the DMIC module, and the MCXN947 only supports the DMIC module on the 184VFBGA package. - LP_FLEXCOMM
The MCXNx4x series supports 10 LP_FLEXCOMM modules. Each LP_FLEXCOMM can be configured as UART, I2C, and SPI. Among them, the IO of LP_FLEXCOMM6/7/8/9 is high-speed IO, and the highest clock that can be configured is 150 MHz. The MCXN23x only supports eight LP_FLEXCOMM modules and does not support LP_FLEXCOMM8 and LP_FLEXCOMM9, only LP_FLEXCOMM6 and LP_FLEXCOMM7 can use high-speed IOs. - Comparator
The MCXN94x series supports three Comparator (CMP) modules, while the MCXN54x and MCXN23x series only support two CMP modules. - ADC
The MCXNx4x and MCXN23x series have two 16-bit ADC modules but differ in the number of ADC channels they support. The MCXNx4x can support up to 75 ADC channels, while the MCXN23x can support up to 63 ADC channels. For the 184VFBGA package, the MCXN23x cannot support the 12 ADC channels listed in Table 6 because the 16 pins mentioned in Table 6 are removed.
Table 6. Removed ADC channels on MCXN23x
| 184BGA ALL Pin Name | Analog |
| P1_20 | ADC1_A20/CMP1_IN3 |
| P1_21 | ADC1_A21/CMP2_IN3 |
| P1_22 | ADC1_A22 |
| P1_23 | ADC1_A23 |
| P5_8 | ADC1_B16 |
| P5_9 | ADC1_B17 |
| P3_19 | – |
| P3_5 | – |
| P3_4 | – |
| P3_3 | – |
| P0_8 | ADC0_B8 |
| P0_9 | ADC0_B9 |
| P0_10 | ADC0_B10 |
| P0_11 | ADC0_B11 |
| 184BGA ALL Pin Name | Analog |
| P0_12 | ADC0_B12 |
| P0_13 | ADC0_B13 |
| P0_30 | ADC0_B22 |
| P0_31 | ADC0_B23 |
Note: The term ADC channels refer to the external ADC input channels.
FlexPWM and Quadrature Decoder (QDC)
The MCXN94x and MCXN23x are compatible with dual-motor applications as they support two FlexPWM modules and two QDC modules. But, the MCXN54x supports only one FlexPWM module and one QDC module, making it suitable for single-motor solutions only.
DMA
The MCXNx4X has two eDMA modules, eDMA0 and eDMA1. Each module supports 16 DMA channels. The MCXN23x also has 2 eDMA modules, but eDMA1 only supports eight channels.
Anti-tamper pin
The tamper pins for MCXNx4x are listed in Table 7 and Table 8. The MCXNx4x has eight tamper pins, and the MCXN23x has six tamper pins. Pin P5_8 and P5_9 are removed on MCXN23x.
Note: The 100HLQFP packaged parts of MCXN4x and MCXN23x only support two tamper pins.
Table 7. Tamper pins on MCXNx4x
| 184BGA all | 184VFBGA
pin name |
100HLQFP N94x | 100HLQFP
N94x pin name |
100HLQFP N54x | 100HLQFP
N54x pin name |
ALT0 | ALT3 |
| M10 | P5_2 | 50 | P5_2 | 50 | P5_2 | P5_2 | TAMPER0 |
| N11 | P5_3 | 51 | P5_3 | 51 | P5_3 | P5_3 | TAMPER1 |
| M12 | P5_4 | – | – | – | – | P5_4 | TAMPER2 |
| K12 | P5_5 | – | – | – | – | P5_5 | TAMPER3 |
| K13 | P5_6 | – | – | – | – | P5_6 | TAMPER4 |
| L13 | P5_7 | – | – | – | – | P5_7 | TAMPER5 |
| L14 | P5_8 | – | – | – | – | P5_8 | TAMPER6 |
| M14 | P5_9 | – | – | – | – | P5_9 | TAMPER7 |
Table 8. Tamper pins on MCXN23x
| 184BGA ball | 184VFBGA pin
name |
100HLQFP | 100HLQFP pin
name |
ALT0 | ALT3 |
| M10 | P5_2 | 50 | P5_2 | P5_2 | TAMPER0 |
| N11 | P5_3 | 51 | P5_3 | P5_3 | TAMPER1 |
| M12 | P5_4 | – | – | P5_4 | TAMPER2 |
| 184BGA ball | 184VFBGA pin
name |
100HLQFP | 100HLQFP pin
name |
ALT0 | ALT3 |
| K12 | P5_5 | – | – | P5_5 | TAMPER3 |
| K13 | P5_6 | – | – | P5_6 | TAMPER4 |
| L13 | P5_7 | – | – | P5_7 | TAMPER5 |
Miscellaneous
This section provides details about the boot source and debugging.
- Boot source
The MCXN23x does not have the FlexSPI module and does not support external flash boot, but the MCXNx4x
supports external flash boot, which can be configured with the BOOT_CFG field in the Customer Manufacturing/Factory Configuration Area (CMPA) to implement this function. - Debug
The MCXNx4x debug module supports ITM, DWT, ETM, ETB W/2KB RAM, and TPIU function, but the ETM and ETB W/2KB functions are removed on the MCXN23x. - Power management
Power management The power management of MCXN23x and MCXNx4x is identical, so they can use the same power supply circuit.
Software
This chapter describes some software considerations when porting the code from the MCXNx4x platform to
the MCXN23x platform. In this section, take the hello_world project from the FRDM-MCXN236 SDK as an example, and the IDE is IAR 9.40.1.
- Chip-specified header files
Each SDK project has a device directory containing chip-specific header files. These header files must be replaced when porting code between platforms, see Figure 11.
- SDK driver
Ensure that the SDK driver directory does not include unsupported modules such as FlexSPI and uSDHC for MCXN23x. - Start_up file
Replace the start_up file of MCXNx4x with MCXN23x start_up file, as some modules are removed, and the interrupt vector table is different. - Linker file
The MCXN23x and MCXNx4x can have different Flash and RAM sizes, so the customer must replace the linker file to ensure the Flash and RAM range used in the linker file is suitable. - IDE-related configuration update
When porting code from the MCXNx4x to MCXN23x, update IDE-related configurations such as path and macro definition, see Figure 12.
.Note: If the customer does not use the removed pins and peripherals on the MCXN23x, then the customer can directly solder the MCXN23x chip to the MCXNx4x board and can directly use the MCXNx4x software, but the linker file must be updated to match the flash and RAM size of MCXN23x. Currently, this method has only been verified on IAR IDE.
Conclusion
This document compares system resources and software differences between the MCXNx4x and MCXN23x, making project migration quick and easy.
Related documentation/resources
Table 9 lists additional documents and resources that can be referred to for more information. Some of the documents listed below may be available only under a non-disclosure agreement (NDA). To request access to these documents, contact local field applications engineer (FAE) or sales representative.
Table 9. Related documentation/resources
| Document | Link/how to access |
| MCX Nx4x Reference Manual (document MCXNX4XRM) | MCXNX4XRM |
| MCXN23x Reference Manual (document MCXN23XRM) (document MCXN23XRM) | MCXN23XRM |
Acronyms and abbreviations
Table 10 defines the acronyms and abbreviations used in this document.
Table 10. Acronyms and abbreviations
| Acronym | Definition |
| ADC | Analog-to-Digital Converter |
| CAN | Controller Area Network |
| CMP | Comparator |
| CMPA | Customer Manufacturing/Factory Configuration Area |
| CPU | Central Processing Unit |
| CRC | Cyclic Redundancy Check |
| DAC | Digital-to-Analog Converter |
| DMA | Direct Memory Access |
| DSP | Digital Signal Processor |
| DWT | Drop-Weight Tear |
| ECC | Error Correcting Code |
| eDMA | Enhanced Direct Memory Access |
| ETM | Embedded Trace Macrocell |
| ETB | Embedded Trace Buffer |
| FlexCAN | Flexible Controller Area Network Interface |
| FlexIO | Flexible Input/Output |
| GPIO | General-Purpose Input/Output |
| HS USB | High-Speed USB |
| I2C | Inter-Integrated Circuit |
| ITM | Instrumentation Trace Macrocell |
| IP | Internet Protocol |
| LDO | Liquid Crystal Display |
| LPC | Low Pin Count |
| MAC | Media Access Control |
| MCU | Microcontroller Unit |
| MII | Media-Independent Interface |
| NDA | Non-Disclosure Agreement |
| OS | Operating System |
| QDC | Quadrature Decoder |
| RTC | Real-Time Clock |
| TPIU | Trace Port Interface Unit |
| TSI | Touch System Interface |
| SAI | Serial Audio Interface |
| SDK | Software Development Kit |
| SPI | Serial Peripheral Interface |
| SRAM | Static Random-Access Memory |
| Acronym | Definition |
| RAM | Random-Access Memory |
| RMII | Reduced Media Independent Interface |
| TPIU | Trace Port Interface Unit |
| UART | Universal Asynchronous Receiver Transmitter |
| USB | Universal Serial Bus |
| VREF | Voltage Reference |
Note about the source code in the document
Example code shown in this document has the following copyright and BSD-3-Clause license:
Copyright 2024 NXP Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Revision history
Table 11 summarizes the revisions to this document.
Table 11. Revision history
| Document ID | Release date | Description |
| AN14179 v.1.0 | 06 May 2024 | Initial public version |
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Documents / Resources
 |
NXP AN14179 Based Micro Controllers [pdf] User Guide MCXNx4x, MCXN23x, AN14179 Based Micro Controllers, AN14179, Based Micro Controllers, Micro Controllers, Controllers |
