ANALOG logoDC2383A-B Evaluation Board
User Guide

Quad 17V, 1.25A Synchronous Step-DownRegulator with Ultralow Quiescent Current

DESCRIPTION

Demonstration circuit 2383A-B features the LT ® 3644-2: the wide input and output voltage range, high efficiency and power density, quad 1.25A outputs DC/DC synchronous step-down monolithic regulator. The input voltage range of DC2383A-A is 2.7V to 17V. The default demo board setting of VOUT1, VOUT2, VOUT3, and VOUT4 is 1.2V, 3.3V, 2.5V, and 1.8V at 1.25A maximum DC output current per channel. There are two assembly versions. The DC2383A-B features LTC3644-2 which operates at an internally fixed frequency of 2.25MHz (Typ), while the DC2383A-A features LTC3644 which operates at an internally fixed frequency of 1MHz (Typ). Peak current limit is internally fixed at 2.2A typical per channel. Each channel comes with independent run pin control and power good indicators. Phase shift selection of either 0 degrees or 180 degrees between switch rising edge of channels 1, 2 and channels 3, 4 is also available.
DC2383A-B provides optional onboard 0Ω jumpers to configure the LTC3644-2 as 4-phase dual 2.5A/2.5A outputs or 4-phase triple 2.5A/1.25A/1.25A outputs. Optional 0Ω jumpers connecting VIN1 to VIN2, VIN3, and
VIN4 are available for users to operate selected channels of LTC3644-2 at different input voltages than VIN1.
A user-selectable MODE/SYNC input is provided to allow users to trade off ripple noise for light load efficiency: pulse-skipping mode (PS) or Burst Mode ® operation delivers higher efficiency at light load while forced continuous conduction mode (FCM) is preferred for noise sensitive applications. The MODE/SYNC pin can also be used to synchronize the switching frequency to an external clock or set the phase shift between channels 1, 2, and channels 3, 4. Constant frequency, peak current mode control architecture and integrated internal control loop compensation network, allows very fast transient response to line and load changes while maintaining loop stability.
The LTC3644-2 is available in a thermally enhanced, low-profile 36-lead 5mm x 5mm BGA package. It is recommended to read the LTC3644-2 datasheet and demo board manual prior to using or making any changes to DC2383A-B.

PERFORMANCE SUMMARY

Specifications are at TA = 25°

PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Voltage Range VIN 2.7 17 V
Demo Board Default Output Voltages VOUT1, VOUT2, VOUT3, VOUT4 FSW = 2.25
MHzBurst Mode
VIN = 2.7V to 17V (VOUT < VIN)
ILOAD = 0A to 1.25A per Channel
1.176 3.234 2.45 1.764 1.2 3.3
2.5 1.8
1.224  .366
2.55
1.836
V
Default Switching Frequency Internally Fixed Switching Frequency 1.8 2.25 2.6 MHz
Maximum Continuous Output Current IOUT per Channel IOUT1, IOUT2, IOUT3, IOUT4 FSW = 2.25MHz VIN = 2.7V to 17V (VOUT < VIN) VOUT = 1.2V, 1.8V, 2.5V, 3.3V 1.25 A
Efficiency at DC VIN = 5V FSW = 2.25MHz 125 %
VOUT1 = 1.2V at IOUT1 = 1A 80.6
VOUT2 = 3.3V at IOUT2 = 1A 88.1
VOUT3 = 2.5V at IOUT3 = 1A 86.2
VOUT4 = 1.8V at IOUT4 = 1A 84.7

QUICK START PROCEDURE
The MODE/SYNC pin can be used to synchronize the internal oscillator clock frequency to the external clock signal. Place JP3 (MODE/PLLIN) at the CLKIN position, apply an external clock signal at the CLKIN test point (E10) to vary the switching frequency within ±50% of the internal programmed frequency.
The MODE/SYNC pin can also be used to set the phase shift between channels 1, 2 and channels 3, 4 while keeping the PHASE pin tied to INTVCC. The phase shift can be set by modulating the duty cycle of an external clock on the MODE/SYNC pin. In this case, the phase shift will be determined by the applied external clock rising and falling edges. The switch rising edge of channels 1, 2 is synced to the rising edge of the external clock and the switch rising edge of channels 3, 4 is synced to the falling edge of the external clock. Crosstalk between channels can be avoided by adjusting the phase shift between channels such that the SW edges do not coincide.
(Option) 4-Phase Dual 2.5A/2.5A Output Current Configuration:
DC2383A-B can be configured as dual 2.5A/2.5A outputs.
Channel 1 and channel 4 are master channels, and channel 2 and channel 3 are slaves.
The following simple modification is required:

  1. Tie VIN1, VIN2, VIN3, and VIN4 together or tie VIN1 and VIN2, VIN3 and VIN4 together if operating channels 1 and channel 2 at different input voltage than that of channel 3 and channel 4. Make sure SVIN is tied to the highest input supply voltage.
  2. Tie SW1 and SW2, SW3 and SW4 together. Since SW1 and SW2, SW3 and SW4 are tied together, there is only one inductor needed for each output voltage rail. Calculate and insert the inductors needed for L1 and L4, and remove L2 and L3.
  3. Tie FB2 and FB3 to INTVCC.
  4. Float (do not use) PGOOD2 and PGOOD3. Only PGOOD1 and PGOOD4 are active.
  5. Tie RUN1 and RUN2, RUN3 and RUN4 together. Note: Make sure to float all the unused onboard RUN pin jumpers to avoid accidentally shorting VIN to GND.
  6. Tie PHASE pin to INTVCC. Refer to the demo board DC2383A-B schematic for more details.

(Option) 4-Phase Triple 2.5A/1.25A/1.25A Output Circuit Configuration:
DC2383A-B can be configured as triple 2.5A/1.25A/1.25A outputs.
Channel 1 is a master channel, channel 2 is a slave. Channel 3 and channel 4 are independent channels.
The following simple modification is required:

  1. Tie VIN1, VIN2, VIN3, and VIN4 together, or tie VIN1 and VIN2 together, and VIN3 and VIN4 can be at different input voltages than VIN1 and VIN2. Make sure SVIN is tied to the highest input supply voltage.
  2. Tie SW1 and SW2 together. There is only one inductor needed for this output voltage rail. Calculate and insert the inductor needed for L1 and remove L2.
  3. Tie FB2 to INTVCC.
  4. Float (do not use) PGOOD2. Only PGOOD1, PGOOD3, and PGOOD4 are active.
  5. Tie RUN1 and RUN2 together. Note: Make sure to float all unused onboard RUN pin jumpers to avoid accidentally shorting VING to GND.
  6. Tie PHASE pin to INTVCC.
  7. Channel 3 and Channel 4 are left unchanged since these two channels operate as independent channels.
    Refer to the demo board DC2383A-B schematic for more details.

QUICK START PROCEDURE

ANALOG DEVICES DC2383A-B Evaluation Board - Fig ANALOG DEVICES DC2383A-B Evaluation Board - Fig 1

QUICK START PROCEDURE

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 2

Figure 3. Measured Efficiency at VIN = 5V, FSW = 2.25MHz, Burst Mode

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 3

VOUT1 = 1.2V, VOUT2 = 3.3V, VOUT3 = 2.5V, VOUT4 = 1.8V
ILOAD = 1.25A per Channel
TA = 25°C, No Heat Sink, No Forced Airflow
Figure 4. Thermal Performance at VIN = 5V, fSW = 2.25MHz

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 4
(a) Load Transient Response: VIN = 8V, VOUT = 1.2V (b) Load Transient Response: VIN = 12V, VOUT = 1.8V
ANALOG DEVICES DC2383A-B Evaluation Board - Fig 5
(c) Load Transient Response: VIN = 12V, VOUT = 2.5V (d) Load Transient Response: VIN = 12V, VOUT = 3.3V

Figure 5. Load Transient Responses
Load Transient Response Test Conditions:

FSW = 2.25MHz Typical
VOUT1 = 1.2V, VOUT2 = 3.3V, VOUT3 = 2.5V, VOUT4 = 1.8V
L1 = L4 = 1µH
L2 = L3 = 2.2µH
Load Step = 0.625A to 1.25A at di/dt = 1A/µs
COUT_ceramic = 1×47µF/1206 + 1x10uF/1206 (per Channel)
Feedforward Capacitor: CFF = 68pF (per Channel)

PARTS LIST

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 4 CFF1, CFF2, CFF3, CFF4 CAP, 0402 68pF 5% 50V C0G MURATA, GRM1555C1H680JA01D
2 1 C1 CAP. 2917 22uF 20% 35V TANT AVX, TPSE226M035R0125
3 7 C2, C4, C5, C7, C9, C10, C14 CAP, 0805 10uF 10% 25V X5R MURATA, GRM21BR61E106KA73L
4 5 C3, C6, C11, C12, C15 CAP, 0603 4.7uF 20% 25V X5R MURATA, GRM188R61E475ME11D
5 1 C16 CAP, 0603 1uF 10% 25V X7R MURATA, GRM188R71E105KA12D
6 4 C19, C21, C23, C25 CAP, 1206 47uF 10% 16V X5R MURATA, GRM31CR61C476ME44L
7 4 C20, C22, C24, C26 CAP, 1206 10uF 10% 25V X7R KEMET, C1206C106K3RACTU
8 2 L1, L4 IND, 1uH MURATA, DFE252012F-1R0M
9 2 L2, L3 IND, 2.2uH MURATA, DFE252012F-2R2M
10 5 RSET1, RSET2, RSET3, RSET4, R25 RES, 0402 100K OHM 1% 1/16W PANASONIC, ERJ2RKF1003X
11 9 R1, R2, R9, R13, R14, R17, R18, R23, R24 RES, 0402 0 OHM JUMPER VISHAY, CRCW04020000Z0ED
12 4 R3, R4, R5, R6 RES, 0402 100k OHMS 1% 1/16W VISHAY, CRCW0402100KFKED
13 1 R7 RES, 0402 2.2 OHMS 1% 1/16W VISHAY, CRCW04022R20FNED
14 6 R8, R10, R11, R12, R15, R16 RES, 0402 10M OHMS 1% 1/16W VISHAY, CRCW040210M0FKED
15 1 R19 RES, 0402 22.1K OHMS 1% 1/16W VISHAY, CRCW040222K1FKED
16 1 R22 RES, 0402 31.6K OHM 1% 1/16W VISHAY, CRCW040231K6FKED
17 1 R28 RES, 0402 49.9K OHMS 1% 1/16W VISHAY, CRCW040249K9FKED
18 3 R29, R30, R31 RES, 0805 0 OHM JUMPER VISHAY, CRCW08050000Z0EA
19 1 U1 IC, QUAD 17V, 1.25A SYNCHRONOUS STEP-DOWN REGULATOR ANALOG DEVICES, LTC3644EY-2

Additional Demo Board Circuit Components

1 0 C8, C13, C17, C18 CAP, 0402 OPTION OPTION
2 0 C27, C28, C29, C30 CAP, 1206 OPTION OPTION
3 0 R20, R21, R26, R27 RES, 0402 OPTION OPTION
4 0 R32 RES, 1206 OPTION OPTION
5 0 R33, R34, R37, R38, R39 RES, 0603 OPTION OPTION
6 0 R35, R36 RES, 0805 OPTION OPTION

Hardware: For Demo Board Only

1 16 E1, E2, E3, E4, E5, E6, E7, E12, E14, E15, E16, E17, E18, E19, E20, E21 TURRET MILL-MAX, 2501-2-00-80-00-00-07-0
2 10 E8, E9, E10, E11, E13, E22, E23, E24, E25, E26 TURRET MILL-MAX, 2308-2-00-80-00-00-07-0
3 5 JP1, JP2, JP4, JP5, JP6 HEADER, 3PIN, 2mm WURTH, ELEKTRONIK, 62000311121
4 1 JP3 HEADER, 2X4PINS 2mm WURTH, ELEKTRONIK, 62000821121
5 4 JP7, JP8, JP9, JP10 HEADER, 2PIN, DBL ROW 2mm WURTH, ELEKTRONIK, 62000421121
6 4 MH1, MH2, MH3, MH4 STANDOFF, SNAP ON 12.7mm WURTH, ELEKTRONIK, 702935000
7 10 XJP1, XJP2, XJP3, XJP4, XJP5, XJP6, XJP7, XJP8, XJP9, XJP10 SHUNT, 2mm WURTH, ELEKTRONIK, 60800213421

SCHEMATIC DIAGRAM

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 8

SCHEMATIC DIAGRAM
OPTIONAL JUMPERS FOR PARALLELING PHASES FOR DESIRED NUMBER OF OUTPUT VOLTAGE RAILS (SHARING THE SAME VIN1)

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 10

NUMBER OF OUTPUT VOLTAGE RAILS Paralleling Channel Master Channel 0 OHM (Required) OPT (Do not stuff) PHASE (JP13)
QUAD 1.25A                               4 1/2/3/4 R33, R34, R35, R36, R37, R38, R39 INTVCC
TRIPLE 2.5A/1.25A/1.25A          3 1+2/3/4 1 R33, R35, R37 R4, R9, R10, R17, RSET2, CFF2, R19, R34, R36, R38, R39, L2, JP2 INTVCC
DUAL  2.5A/2.5A                        2 1+2/3+4 1, 4 R33, R34, R35, R36, R37, R38 R4, R5, R9, R10, R13, R15, R17, R18, RSET2, RSET3, CFF2, CFF3, R19, R22, R39 L2, L3, JP2, JP5 INTVCC

NOTE:
Please refer to the datasheet and demo board manual for more details and examples of paralleling phases to obtain the desired number of output voltage rails.
CUSTOMER NOTICE
ANALOG DEVISES INC. HAS MADE THE BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER’S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL  APPLICATION. COMPONENT  SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT  NALOG DEVICES INC. APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO ANALOG DEVICES INC. AND SUPPLIED FOR USE WITH ANALOG DEVICES INC. PARTS.

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 16

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements f patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any  atent or patent rights of Analog Devices.

ANALOG DEVICES DC2383A-B Evaluation Board - Fig 11 ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high-energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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Documents / Resources

ANALOG DEVICES DC2383A-B Evaluation Board [pdf] User Guide
DC2383A-B, Evaluation Board, DC2383A-B Evaluation Board, Board, Motherboard

References

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