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MuRata TY1SCDM Band Certification For Cellular

MuRata-TY1SCDM-Band-Certification-For-Cellular-PRODUCT

Specifications

  • Product Name: Murata Type1SC-DM LTE CatM1/NB1 module
  • Version: 1.5
  • Release Date: 7/16/2024
  • Manufacturer: Murata

The Murata Type1SC-DM LTE CatM1/NB1 module is designed to provide a reliable and efficient solution for integrating LTE connectivity into various products. This module offers advanced features and capabilities to support seamless communication.

Product Usage Instructions

  • Scope and Audience:
    • The guidelines provided in this document are tailored for system architects and hardware engineers who intend to develop products utilizing the Murata Type1SC-DM module.
  • Contact Information and Support:
    • For technical support, questions, and reporting documentation errors, please contact Murata Technical Support at ciotsupport@murata.com. Your feedback is valuable for continuous improvement.
  • Text Conventions:
    • Caution/Warning: Pay attention to alerts that highlight important points for product usage. Failure to follow these guidelines may lead to product or equipment malfunction.

FAQs

  • Q: What is the purpose of the Murata Type1SC-DM module?
    • A: The Murata Type1SC-DM module is designed to provide LTE CatM1/NB1 connectivity for integrating wireless communication capabilities into products.
  • Q: Who should refer to the hardware design guidelines provided in the manual?
    • A: The hardware design guidelines are intended for Murata customers, specifically system architects and hardware engineers involved in product development using the Murata Type1SC-DM module.

Type1SC-DM Hardware Design Guidelines

Version 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1.0 1.1 1.2 1.3 1.4 1.5

Release Date 01/10/2018 08/11/2018 03/27/2019 01/07/2019 07/08/2019 12/12/2019 1/17/2020 1/30/2020 3/24/2020 4/20/2020 7/09/2020 7/22/2020 7/16/2024

Comments Initial draft Revisions following first review Revised VBAT_FEM Max Current Added FCC Notice Updated graphic in Section 2.5.7. Updated FCC ID for NB1 Updated regulatory info Updated EIRP for antennas for FCC/IC Update document to show 1SC-DM vs 1SC Updated minimum voltage for VBAT_FEM Updated recommended resistor values, added Korea certification Fix some page layouts issues Include NTN bands

Copyright © Murata Manufacturing Co., Ltd. All rights reserved. September 2018 Application Note: LBAD0XX1SC-DM, v1.1 7/16/24 Page 1 of 34

www.murata.com

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Introduction

1.1 Scope
This document introduces the Murata Type1SC-DM LTE CatM1/NB1 module and presents some possible and recommended guidelines for developing new products based on this module. The information given should be used as a guide and a starting point for properly developing products with the Murata module. 1.2 Audience This document is intended for Murata customers, especially system architects and HW engineers, to design products based on the Murata Type1SC-DM module.
1.3 Contact Information and Support For general contact, technical support services, technical questions and report documentation errors contact Murata Technical Support at ciotsupport@murata.com.
Please keep us informed of your comments and suggestions for improvements. Murata will take into consideration any and all feedback from the users of this information.
1.4 Text Conventions
Danger This information MUST be followed or catastrophic equipment failure or bodily injury may occur.
Caution/Warning Alerts the user to important points about using the product; if these points are not followed, the product and end user equipment may fail or malfunction.
Tip/Information Provides advice and suggestions that may be useful when using the product.

1.5

Acronyms

Acronym 3GPP API CPU eDRX eMTC EVB FW GPIO FEM HF MIPI IoT LiPo LTE LPWA PC PSM PTW RF RFFE SoC SW UART USB

Meaning 3rd Generation Partnership Project Application Programming Interface Central Processing Unit Extended Discontinuous Reception enhanced Machine-Type Communication Evaluation Board Firmware General Purpose Input/Output Front End Module Hyper Frame (10.24s) Mobile Industry Processor Interface Internet of Things Lithium-ion Polymer Long Term Evolution Low Power Wide Area Personal Computer Power Saving Mode Paging Time Window Radio Frequency RF Front End System on Chip Software Universal Asynchronous Receiver/Transmitter Universal Serial Bus

7

1.6 Related Documents [1] Type1SC-DM Reference Schematics
8

Introduction Type1SC-DM is Murata’s new LTE series for IoT applications. The module can be used as a wireless communication front-end for wearable products, offering mobile communication features to an external host CPU through its interfaces. Note: NB1 will be supported in a future firmware release.
1.7 High Level Block Diagram The following block diagram illustrates the module which contains the ALT1250 LTE Cat M1/NB1 SoC, RF FEM, 128 MBits flash and clocks.MuRata-TY1SCDM-Band-Certification-For-Cellular-FIG- (1)

Figure 1 Module block diagram

1.8 Supported bands The module supports the following bands:

Product LBAD0XX1SC-DM

LTE Bands LB: B5/B8/B12/B13/B17/B18/B19/B20/B26/B28/B71 MB: B1/B2/B3/B4/B25/B66 NTN Only: B23/B255/B256

Regions Americas, EU and ASEAN

Table 1 Supported bands

1.9 Tx Output Power The LTE bands in the 1SC-DM module meet the 3GPP spec for a Power Class 3 device (23 dBm).

1.10 Rx Sensitivity The receive sensitivity of the module complies with the 3GPP spec and has a minimum value of -103
dBm.

1.11 Power Modes The 1SC-DM module has the following power modes

· LS: Provides very fast entry and recovery time and is mainly used for very short sleeps. It is used for CDRX mode during the networking process.
· DS: Provides fast recovery and entry time and is mainly used during the IDRX networking mode.
· DH2: Provides medium entry and recovery time and is mainly used during the EDRX and IDRX networking modes.
· DH1: Same as DH2, however IO logic is not retained. · DH05: Provides long entry and recovery times and is mainly used for very long inactivity intervals
like PSM. The IO output values ​​are retained in this mode. · DH0: Same as DH05, however IO output values ​​are not retained.

The device chooses the described power modes according to the networking state and the maximum

9

allowed chip power mode configuration.
An application note will be provided to show how to configure the module and the R&S CMW500 to test the different power modes.
LS Power Mode Only one of the following pins can be used to wake up the device
· RTC Expiration · PMU_POWER_BUTTON · PMU_WAKEUP · PMU_SHUTDOWN · AntiTamper
Other digital interface pins can also be configured to wake up the system (up to 10 GPIO’s can be used). Serial interface pins are not active in this mode
DS Power Mode This mode is the same as LS, but requires lower power consumption due to the unused reference clock.
The average current draw in this mode of operation is 2.5mA.
DH0 Power Mode The following occurs in the DH0 power mode:
· All digital logic is powered down · Memories are not retained · IO’s are not stored · The RTC is on · One of the following dedicated pins is used to wake from this mode:
o RTC Expiration o PMU_POWER_BUTTON o PMU_WAKEUP o PMU_SHUTDOWN o AntiTamper
The average current draw in this mode of operation is 1.4uA.
DH1 Power Mode This mode is similar to DH0, however it enables memory retention to store the system sate. A Wakeup event will only initiate a boot flow in a case of state full configuration
The average current draw in this mode of operation is 45uA.
DH2 Power Mode This mode is similar to DH1, however it also enables output IOs to latch and wakeup from digital inputs (up to 10 GPIO’s can be used)
The current draw is similar to DH1, but will depend on the extra current draw of the GPIOs.
PSM Current Draw Most of the power consumption during PSM is from the non-hibernation period. The data for this period of time will be expressed in mA*sec. Non-hibernation energy is around 308mA*s with a hibernation current of around 1.4uA. If the device would sleep for one hour (3600 seconds), the average current consumption would be 360mA*sec/3600 sec = 100uA, You would need added in the hibernation current (1.4uA), for a total of 101.4uA.MuRata-TY1SCDM-Band-Certification-For-Cellular-FIG- (2)
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eDRX Current Draw The SIM card will have a major impact on this feature. Network Carriers will support different modes of operation. The R&S test SIM for the CMW500 does not support SIM deactivation during eDRX cycles. This caused the number to be significantly greater than a setup with a deactivation mode. The feature below shows result using the CMW500 test SIM. Under good conditions using a SIM that can be deactivated, the current draw could be as low as 45uA instead of 194uA for this setup. This setup was using an eDRX cycle of 81.92 s (8 HF).MuRata-TY1SCDM-Band-Certification-For-Cellular-FIG- (3)
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1.12 Certification and Regulatory The module is certified to GCF 3.70.2 and PTCRB 5.36. The module is fully compliant to CAT M1 3GPP
release 13.

The module is FCC/IC certified (HSW-TY1SCDM and 4492A-TY1SCDM) and RED ETSI EN 301908-13, EN301908-1, EN301489-1, EN301489-19, EN301489-52 compliant.

1.13 Power Supply Range

Parameter

Range

Absolute maximum rating

VBAT

-0.3 V ­ 4.35 V

VBAT_FEM

-0.5 V ­ 5.2 V

Operating voltage range

VBAT

2.2 V ­ 4.35 V

VBAT_FEM

2.85 V ­ 4.5 V

I/O (1.8V typ) 1.7 V ­ 1.9 V

V
IO

VDDIO

1.7 V ­ 1.9 V

V
RETENTION

VDD

1.0 V ­ 1.1 V

Table 2 Power supply range

1.14 Temperature Range

Range

Note

Storage temperature range

-40 ºC ­ 85 ºC Storage and non-operational

Operating temperature range

-40 ºC ­ 85 ºC Module is fully functional

-20 ºC ­ 55 ºC

Module is fully functional and fully meets 3GPP specification

() Functional: the module is able to connect to PDN and transfer data. Table 3 Temperature range

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1.15 Mechanical Specifications

· Dimensions: · Weight:

11.1 × 11.4 × 1.4 mm3 (typ) 443 mg

MuRata-TY1SCDM-Band-Certification-For-Cellular-FIG- (4)

Figure 2 Land pattern: top view, in millimeters 13

1.16 Pin Layout and Descriptions

MuRata-TY1SCDM-Band-Certification-For-Cellular-FIG- (5)

1SC- Module Pin Name

DM

Pin

No

1

DEBUG_RSTN

2

DEBUG_SEL

3

EJ_TDO

4

EJ_TRST

5

PMU_AT_IN

6

PMU_WAKEUP

7

VDD_RF

8

VSIM

9

VDD_AUX

10 VDD_XO 11 SIMIO

12 I2C1_SDA

ALT12 50 IC Pin No

Figure 3 Pin layout: top view

ALT1250 IC Symbol Pin Type Input/

Name

Output

Reset Value

IO Domain/ Supply

Description

P4

DEBUG_RSTN

Digital I/O

PU

VDDIO

Reserved (No Connection)

M4

DEBUG_SEL/

GPIO31

N5

EJ_TDO/

GPIO22

J5

EJ_TRST/

GPIO20

R3

PMU_AT_IN

P2

PMU_WAKEUP

L1

PMU_VO_RF

Digital I/O Digital I/O Digital I/O Analog I Analog I Power O

PD

VDDIO

Reserved (No Connection)

PU

VDDIO

Reserved (No Connection)

PD

VDDIO

Reserved (No Connection)

VRTC VRTC

Anti-tamper input; short to GND if not used
Device Wakeup active high; Device Wake-Up
MIPI RFFE VIO (antenna tuning)

R1

PMU_VO_SIM

Power O

SIM LDO output

T2

PMU_VO_AUX_LDO

Power O

SC2 LDO output

N1

PMU_VO_XO

Power O

M10

SC_IO/

GPIO14

Digital I/O

H2

I2C1_SDA/

Digital I/O

SPIS_MRDY/

PWM 3/

MCU_I2C1_SDA/

MCU_FLA SH1_SCK/

UART0_RI/

MCU_S PIM1_CLK_A/

MCU_PWM3/

GPIO44

Reserved (No Connection)

PD

VDDIO

SIM Data 1.8V

PU

VDDIO

Reserved (No Connection)

14

1SC- Module Pin Name DM Pin No 13 I2C1_SCL
14 I2C0_SCL
15 I2C0_SDA
16 VBAT_FEM 17 VBAT_FEM 18 VBAT_FEM 19 GND 20 UART2_RX
21 UART2_CTS
22 UART2_TX
23 GND 24 RF_GNSS_COMM
ON_ANT 25 RF_GNSS_ANT 26 GND

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Reset Output Value

H4

I2C1_SCL/

Digital I/O

PU

SPIS_CLK/

LED3/

M CU_I2C1_SCL/

MCU_FLASH1_ CS_N/

UART0_DTR/

MCU_SPI M1_EN0_A/

MCU_LED3/

GPIO45

L7

I2C0_SCL/

Digital I/O

PU

SPIS_MISO/

KEYPA D9/

FEM19/

MCU_I2C0_SCL/

UART0_DSR/

GPIO43

J7

I2C0_SDA/

Digital I/O

PU

SPIS_MOSI/

CLKO UT/

KEYPAD7/

MCU_I2C0_SD A/

UART0_DCD/

MCU_CLKOU T/

GPIO42

Power I

Power I

Power I

H14

UART2_RX/

Digital I/O

PU

SPIS_MOSI_A/

P WM2/

EJ1_TDI_B/

UART1_RX/

MCU_UART1_RX/

MCU_SPIM1_MISO_A/

MCU_SPIM0_MISO_A/

UART3_RX_B/

MCU_PWM2/

GPIO27

G15

UART2_CTS/

Digital I/O

PD

SPIS_MRDY_A/

E J1_TRST_B/

UART1_CTS/

MCU_UART1_CTS/

MCU_SPIM1_CLK_A/

MCU_SPIM0_CLK_A/

U ART3_CTS_B/

GPIO29

G13

UART2_TX/

Digital I/O

PU

SPIS_MISO_A/

FE M22/

EJ1_TMS_B/

UART1_TX/

MCU_UART1_TX/

MCU_SPIM1_MOSI_A/

MCU_SPIM0_MOSI_A/

UART3_TX_B/

GPIO28

RF

O

RF

I

IO Domain/ Supply VDDIO
VDDIO VDDIO
VDDIO
VDDIO
VDDIO

Description
Reserved (No Connection)
Reserved (No Connection)
Reserved (No Connection)
Input from battery to FEM Input from battery to FEM Input from battery to FEM
· Default is UART1 Receive Data
· Dedicated for debug interface
· Default is UART1 Clear to Send
· Dedicated for debug interface
· Default is UART1 Transmit Data
· Dedicated for debug interface
GNSS receiver output GNSS receiver input

15

1SC- Module Pin Name DM Pin No 27 RF_AUX_OUT1 28 GND 29 RF_RXTX 30 GND 31 PWM3
32 PWM0
33 AUX_ADC4
34 AUX_ADC3
35 AUX_ADC2
36 AUX_ADC0
37 AUX_ADC1
38 GND 39 SF_SO/IO1

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

RF

Input/ Output

Reset Value

IO Domain/ Supply

Description

Reserved (No Connection)

RF

LTE RF in/out signal

N13

PWM3/

Digital I/O

I2C1_SDA/

SC_SWP/

F EM29/

MCU_CC_OUT3/

MCU_CC_IN3/

MCU_LED3/

MCU_P WM3/

GPIO53

P10

PWM0/

Digital I/O

CLKOUT/

MCU_CC_O UT0/

MCU_CC_IN0/

MCU_CLK OUT/

FEM28/

MCU_PWM0/

GPIO50

H12

AUX_ADC4/

Digital I/O

FEM7/

PCM_OUT/

MCU_LED0/

MCU_CC_OUT1/

GPIO5

J13

AUX_ADC3/

Digital I/O

FEM6/

PCM_IN/

K EYPAD4/

MCU_SPIM1_CLK_B/

MCU_I2C1_SCL/

SWDAT/

MCU_CC_IN3/

GPIO4

K14

AUX_ADC2/

Digital I/O

FEM5/

PCM_FS/

K EYPAD7/

MCU_SPIM1_EN0_B/

MCU_I2C1_SDA/

SWCLK/

MCU_CC_IN2/

GPIO3

L13

AUX_ADC0/

Digital I/O

I2C1_SCL/

MCU_ CC_IN0/

KEYPAD9/

MCU_LED 4/

PWM2/

MCU_PWM2/

GPIO1

M14

AUX_ADC1/

Digital I/O

FEM4/

PCM_CLK/

KEYPAD6/

CLKOUT/

MCU_LED 1/

MCU_CLKOUT/

MCU_CC_I N1/

GPIO2

PU

VDDIO

TX Indicator

PD

VDDIO

Device reset status (HI)

PD

VDDIO

External DCDC control

(DCDC_EN)

PU

VDDIO

Reserved (No Connection)

PU

VDDIO

Reserved (No Connection)

PU

VDDIO

Reserved (No Connection)

PD

VDDIO

GNSS coexistence indicator

Y14

FLASH0_IO1/

GPIO71

Digital I/O

PD

V_FLASH Reserved (No Connection)

16

1SC- Module Pin Name DM Pin No 40 SF_SI/IO0 41 SF_nHOLD/IO3 42 SF_nWP/IO2 43 SPIM0_EN0
44 SPIM0_EN1
45 SPIM0_MISO
46 SPIM0_MOSI
47 NC 48 VFLASH 49 VDDIO 50 VDD_RET 51 FLASH0_CS_N1 52 FLASH1_CS_N
53 FLASH1_IO1

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Output

Reset Value

IO Domain/ Supply

Description

AA15

FLASH0_IO0/ GPIO70

Digital I/O

PU

V_FLASH Reserved (No Connection)

Y12

FLASH0_IO3/

GPIO73

Digital I/O

PU

V_FLASH Reserved (No Connection)

AA13

FLASH0_IO2/ GPIO72

Digital I/O

PD

V_FLASH Reserved (No Connection)

P12

SPIM0_EN0/

Digital I/O

UART1_RTS/

MC U_PCM_OUT_A/

UART0_DSR/

MCU_SPIS_CLK_B/

SWDAT/

MCU_SPIM0_EN0_A/

GPIO35

R13

SPIM0_EN1/

Digital I/O

SPIS_SRDY_ABC/

KEYPAD4/

FEM18/

MCU_SPIS_SRDY_AB/

MCU_CC_IN2/

MCU_FLASH1_CS_N1/

MCU_CC_ OUT2/

GPIO36

T12

SPIM0_MISO/

Digital I/O

UART1_RX/

MC U_PCM_FS_A/

UART0_DTR/

MCU_SPIS_MOSI_B/

MCU_U ART1_RX/

MCU_SPIM0_MISO

_AB/

GPIO34

U13

SPIM0_MOSI/

Digital I/O

UART1_TX/

MC U_PCM_IN_A/

UART0_DCD/

MCU_SPIS_MISO_B/

SWCLK/

MCU_SPIM0_MOSI_AB

/GPIO33

AA5

PMU_VO_FLASH

Power O

Y6

PMU_VO_IO

Power O

V8

PMU_VO_RET

Power O

V14

FLASH0_CS_N1/

Digital I/O

FEM24/

GPIO66

M6

MCU_FLASH1_CS_N/ Digital I/O

PWM0/

KEYPAD5/

LED0/

MCU_LED0/

FLASH1_CS_N1/

MCU_PWM0/

GPIO54

R7

MCU_FLASH1_IO1/

Digital I/O

I2C0_SCL/

UART0_TX/

KEYPAD1/

MCU_ I2C0_SCL/

MCU_CC_OUT1/

M CU_UART1_TX/

GPIO57

PU

VDDIO

Port C: UART RTS

PU

VDDIO

External LNA GNSS

PU

VDDIO

Port C: UART RX

PU

VDDIO

Port C: UART TX

Reserved (No Connection)

Reserved (No Connection)

IO reference

Debug monitoring only

PU

V_FLASH GNSS SFN indication

PU

VDDIO

Reserved (No Connection)

PU

VDDIO

Reserved (No Connection)

17

1SC- Module Pin Name DM Pin No 54 FLASH0_CS_N2
55 FLASH1_SCK
56 PMU_VBACKUP 57 PMU_VRTC 58 VBAT

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Output

Reset Value

IO Domain/ Supply

Description

W11 U7
W7 W5

FLASH0_CS_N2/ FEM27/ LED5/ MCU_LED5/ GPIO78 MCU_FLASH1_SCK/ PWM1/ K EYPAD8/ LED1/ MCU_LED1/ M CU_PWM1/ GPIO55 PMU_VBACKUP
PMU_VRTC

Digital I/O Digital I/O
Power I Power O

U3

PMU_VBAT_LDO

Power I

PU

V_FLASH Reserved (No Connection)

PD

VDDIO

Reserved (No Connection)

Input from backup battery or NC if not used
Use for PMU_SHUTDOWN and PMU_POWER_BUTTON pull source
Voltage from Battery

59

V2

PMU_VBAT_DCDC_V2 Power I

60

W1

PMU_VBAT_DCDC_W1 Power I

61 EJ_TDI 62 EJ_TMS 63 PMU_AT_OUT

L5

EJ_TDI/

GPIO21

K4

EJ_TMS/

SWDAT/

GPIO19

N3

PMU_AT_OUT

Digital I/O Digital I/O Analog O

PD

VDDIO

Reserved (No Connection)

PD

VDDIO

Reserved (No Connection)

VRTC

Anti-tamper output; connect to PMU_AT_IN or NC if not used

64 PMU_SHUTDOWN M2

PMU_SHUTDOWN

Analog I

PU

VRTC

Shutdown active low

65 PMU_EXT_ALARM L3
66 PMU_POWER_BUT K2 TON

PMU_EXT_ALARM/ ALARM/ 3 2KHZ_CLK_OUT/ GPO0 PMU_POWER_BUTTO N

Analog O Analog I

VDDIO

Debug monitoring only

PU

VRTC

Power button active low

67 PMU_ATB

J3

PMU_ATB

Test I/O

VBAT

Reserved (No Connection)

68 SIMRST 69 SIMCLK 70 SIM_DETECT
71 SC_SWP

M8

SC_RST/

GPIO13

L9

SC_CLK/

GPIO15

J11

SC_DET/

PWM0/

FEM12/

MCU_PWM0/

GPIO16

J9

SC_SWP/

CLKOUT/

FEM13/

P WM3/

MCU_PWM3/

EJ1_TDO_AB/

CLK32KHZ_EXT/

MCU_CLKOUT/

MCU_CC_OUT3/

GPIO17

Digital I/O Digital I/O Digital I/O

PD

VDDIO

SIM Reset 1.8V

PD

VDDIO

SIM Clock 1.8V

PD

VDDIO

SIM Detection 1.8V

Digital I/O

PD

VDDIO

Host Wake-Up Active HI

18

1SC- Module Pin Name DM Pin No 72 UART0_RTS
73 UART0_TX
74 UART2_RTS
75 UART0_RX
76 UART0_CTS
77 RFFE_SCLK 78 RFFE_SDATA 79 GND 80 GND 81 GND 82 PWM1

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Output

Reset Value

IO Domain/ Supply

Description

K8

UART0_RTS/

Digital I/O

SPIM0_EN0_A/

I2C0_SDA/

UART2_RTS/

MCU_ UART0_RTS/

EJ1_TCK_A/

MC U_I2C0_SDA/

MCU_SPIM0_EN0_B/

UART3_RTS_A/

GPIO26

K10

UART0_TX/

Digital I/O

SPIM0_MOSI_A/

FEM15/

UART2_TX/

MCU_UAR T0_TX/

EJ1_TMS_A/

UART3_T X_A/

GPIO24

K6

UART2_RTS/

Digital I/O

SPIS_CLK_A/

FE M23/

EJ1_TCK_B/

UART1_RTS/

MCU_UART1_RTS/

MCU_SPI M1_EN_A/

MCU_SPIM0_EN0_A/

UART3_RTS_B/

GPIO30

G11

UART0_RX/

Digital I/O

SPIM0_MISO_A/

FEM14/

UART2_RX/

MCU_UA RT0_RX/

EJ1_TDI_A/

UART3_ RX_A/

GPIO23

G9

UART0_CTS/

Digital I/O

SPIM0_CLK_A/

I2 C0_SCL/

UART2_CTS/

MCU_U ART0_CTS/

EJ1_TRST_A/

MCU_I2C0_SCL/

MCU_SPIM0_CLK_B/

UART3_CTS_A/

GPIO25

H6

RFFE_SCLK/

Digital I/O

FEM10/

GPIO11

H8

RFFE_SDATA/

Digital I/O

FEM11/

GPIO12

PU

VDDIO

· Default is UART0 Request

to Send

· Data host interface; UART RTS (HI)

PU

VDDIO

· Default is UART0 Transmit

Data

· Data host interface; UART TX (HI)

PU

VDDIO

· Default is UART1 Request

to Send

· Dedicated for debug interface

PU

VDDIO

· Default is UART0 Receive

Data

· Data host interface; UART RX (HI)

PU

VDDIO

· Default is UART0 Clear to

Send

· Data host interface; UART CTS (HI)

PD

VDDIO

MIPI RFFE Clock (antenna

tuning)

PD

VDDIO

MIPI RFFE data (antenna

tuning)

Ground

Ground

Ground

L11

PWM1/

I2C0_SDA/

MCU_SPI

M1_MISO_AB/

KEYPAD5/

MC U_CC_OUT1/

MCU_CC_IN1/

MCU_PWM1/

GPIO51

Digital I/O

PU

VDDIO

Reserved (No Connection)

19

1SC- Module Pin Name DM Pin No 83 PWM2
84 SPIM1_MISO
85 SPIM1_EN
86 SPIM1_MOSI
87 SPIM1_CLK
88 SF_CLK 89 GND 90 USB_DN 91 USB_DP 92 GND 93 USB3V3 94 SPIM0_CLK
95 PCM_FS

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Output

Reset Value

IO Domain/ Supply

Description

M12 N9 P8 T8 R9 W15

PWM2/

Digital I/O

I2C0_SCL/

MCU_SPIM1_MOSI_AB

/

FEM16/

MCU_C C_OUT2/

MCU_CC_IN2/

MCU_PWM2/

GPIO52

MCU_SPIM1_MISO/

Digital I/O

SPIS_M OSI_A/

KEYPAD6/

PWM1/

MCU_SPIS_MOSI_A/

SC_IO/

MCU_PCM_FS_B/

MCU_PWM1/

GPIO39

MCU_SPIM1_EN/

Digital I/O

SPIS_CLK_A/

KEYPAD8/

PWM3/

MCU_SPIS_CLK_A/

SC_DET/

MCU_PCM_ IN_B/

MCU_PWM3/

GPIO40

MCU_SPIM1_MOSI/

Digital I/O

SPIS_MI SO_A/

PWM2/

MCU_PWM2/

MCU_SPIS_MISO_A/

SC_CLK/

MCU_PCM_OUT_B/

GPIO38

MCU_SPIM1_CLK/

Digital I/O

SPIS_MRD Y_A/

PWM0/

MCU_CC_OUT0/

MCU_SPIS_MRDY_A/

SC_RST/

MCU_PCM_CLK_B/

GPIO41

FLASH0_SCK/

Digital I/O

GPIO67

PU

VDDIO

Reserved (No Connection)

PD

VDDIO

SC2_IO

PU

VDDIO

SC2_DET

PD

VDDIO

SC2_CLK

PD

VDDIO

SC2_RST

PD

V_FLASH Reserved (No Connection)

J15

USB_DN/

GPI64_3V3

L15

USB_DP/

GPI63_3V3

Digital I Digital I/O

USB_V3P 3 USB_V3P 3

Reserved (No Connection) Reserved (No Connection)

N15

USB_V3P3

Digital I

V12

SPIM0_CLK/

Digital I/O

UART1_CTS/

MC U_PCM_CLK_A/

UART0_RI/

MCU_SPIS_MRDY_B/

MCU_UA RT1_TX/

MCU_SPIM0_CLK_A/

GPIO37

R11

PCM_FS/

Digital I/O

UART1_RTS/

KEYPA D1/

FEM21/

MCU_FLASH1_IO 1/

MCU_LED5/

MCU_UART1_ RTS/

MCU_PCM_FS/

GPIO47

VDDIO

Reserved (No Connection)

PU

VDDIO

Port C: UART CTS

PU

VDDIO

Reserved (No Connection)

20

1SC- Module Pin Name DM Pin No 96 PCM_IN
97 PCM_OUT
98 PCM_CLK
99 GND 100 CLKOUT
101 GND 102 PMU_VCAP 103 FLASH1_IO3
104 FLASH1_IO2
105 FLASH1_IO0

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Output

Reset Value

IO Domain/ Supply

Description

N11

PCM_IN/

UART1_RX/

KEYPAD 2/

LED4/

MCU_FLASH1_IO2/

MCU_LED4/

MCU_UART1_RX/

MCU_PCM_IN/

GPIO48

T10

PCM_OUT/

UART1_TX/

KEYPA D3/

PWM2/

MCU_FLASH1_IO 3/

MCU_PWM2/

MCU_UART1_TX/

MCU_PCM_OUT/

GPIO49

V10

PCM_CLK/

UART1_CTS/

KEYP AD0/

FEM20/

MCU_FLASH1_I O0/

MCU_LED2/

MCU_UART1_CTS/

MCU_PCM_CLK/

GPIO46

Digital I/O Digital I/O Digital I/O

PU

VDDIO

Reserved (No Connection)

PU

VDDIO

Reserved (No Connection)

PD

VDDIO

Reserved (No Connection)

U9

CLKOUT/

32KHZ_CLK_OUT/

PWM0/

FLASH1_CS_N1/

LED2/

MCU_CLKOUT/

MCU_CC_OU

T1/

MCU_PWM0/

GPIO60

Digital O

PD

VDDIO

Reserved (No Connection)

V6

PMU_VCAP

Analog O

N7

MCU_FLASH1_IO3/

Digital I/O

I2C1_SCL/

UART0_RTS/

KEYPAD3/

MCU_I2C1_SCL/

MCU_CC_OUT3/

MCU_UART1_RTS/

GPIO59

P6

MCU_FLASH1_IO2/

Digital I/O

I2C1_SDA/

UART0_CTS/

KEYPAD2/

MCU_I2C1_SDA/

MCU_CC_OUT2/

MCU_UART1_CTS/

GPIO58

T6

MCU_FLASH1_IO0/

Digital I/O

I2C0_SDA/

UART0_RX/

KEYPAD0/

MCU_ I2C0_SDA/

MCU_CC_OUT0/

MCU_UART1_RX/

GPIO56

VBAT

Connecting external capacitor as backup for VBAT or NC if not used

PU

VDDIO

Reserved (No Connection)

PD

VDDIO

Reserved (No Connection)

PU

VDDIO

Reserved (No Connection)

21

1SC- Module Pin Name DM Pin No 106 EJ_TCK
107- GND_PAD 115

ALT12 50 IC Pin No

ALT1250 IC Symbol Pin Name

Type

Input/ Output

Reset Value

IO Domain/ Supply

Description

R5

EJ_TCK/

SWCLK/

GPIO18

Digital I/O

PD

VDDIO

Reserved (No Connection)

Table 4 Pin description

If not used, all pins except the following should be left disconnected.

1SC-DM Pin Module Pin Name

No

4

EJ_TRST

PD (K) 10

PU (K)

PU Source

Description Reserved (No Connection)

5

PMU_AT_IN

Short to GND

Anti-tamper input; short to GND if not used

64

PMU_SHUTDOWN

620

VRTC

Shutdown active low; PU to PMU_VRTC

66

PMU_POWER_BUTTON

620

VRTC

Power button active low; PU to PMU_VRTC

Table 5 I/Os with PU/PD

The PMU_VRTC pin must not be used by any external component other than pull-ups for the PMU_SHUTDOWN and PMU_POWER_BUTTON pins. It is prohibited to use the PMU_VRTC pin for any other purpose.
The UARTs Port A (20, 21, 22, 74) and Port C (43, 45, 46, 94) signals should be brought out for control and logging during certification/testing with PC tools.

22

1SC-DM Pin No 20 21
22 74

Module Pin Name
UART2_RX UART2_CTS UART2_TX UART2_RTS

43

SPIM0_EN0

45

SPIM0_MISO

46

SPIM0_MOSI

94

SPIM0_CLK

Port
A A A A
C C C C

Signal
UART RX UART CTS UART TX UART RTS
UART RTS UART RX UART TX UART CTS

Table 6 Special UART signals for certification/testing
1.17 Reference Circuit A reference circuit for the Type1SC-DM is provided in [1].

Power

Type1SC-DM requires two power supplies, one for the LTE modem (VBAT) and the other for the RF FEM (VBAT_FEM).

The power supply must be capable of peak current output of at least 400mA and 800mA, respectively, for VBAT and VBAT_FEM.

2.1 Power Up Sequence The power up sequence is shown below. Type1SC-DM will power up automatically once VBAT is
connected to the power supply.

Figure 4 Power up sequence

2.2 Power Down Sequence The supply to VBAT and VBAT_FEM should be turned off at the same time.

2.3 Power Supply Scenarios (by Battery Type)
A typical Type1SC-DM based design uses a battery supply. supply scenarios:
· LiPo Battery (3.2 ~ 4.35 V) · CR17450 Battery (2.2 ~ 3.0 V) · AA Lithium Battery (1.0 ~ 1.5 V)

The following are some possible battery

23

LiPo Battery (3.2 ~ 4.35 V) The battery can supply the entire system (ALT1250 + FEM), without additional external power conditioning circuits.
CR17450 Battery (2.2 ~ 3.0 V) The ALT1250 can be fully functional without additional external power conditioning circuits. However, the FEM requires a higher voltage supply, so an external boost circuit is required to supply VBAT_FEM.
Boost converter such as TPS61021A may be turned on/off by the DCDC enable signal, AUX_ADC4 (pin 33, active high).
AA Lithium Battery (1.0 ~ 1.5 V) For battery range of 1.0 ­ 1.5 V, both ALT1250 and FEM require an additional boost circuit.
VBAT: ultra low IQ synchronous boost converter such as TPS61098x may be used VBAT_FEM: boost converter such as TPS61021A may be turned on/off by the DCDC enable signal, AUX_ADC4 (pin 33, active high).

2.4 PMU ALT1250 includes integrated PMU which supplies current for all ALT1250 blocks, IOs, Flash, TCXO and
UICC.

Signal

Functionality

Input/ Output

Polarity

PMU_SHUTDOWN PMU_POWER_BUTTON PMU_WAKEUP

HW Reset Reserved Wakeup

Input Input Input

Active Low Active High Active High

Table 7 PMU system signals

24

PMU_SHUTDOWN This pin has the highest priority compared to other chip functionalities, therefore asserting it will always force a hard reset
2.4.1.1 External circuitry on PMU_SHUTDOWN There are three use cases for PMU_SHUTDOWN pin connection:
1. Controlled by external host. 2. Controlled by mechanical switch. 3. Not used.
2.4.1.2 PMU_SHUTDOWN connected to external host In this use case it is the responsibility of the host to drive this pin with proper voltage at all times (1.8V/0V). In case of internal pull at the host IO, it is recommended to disable it when driving this pin to GND. LTE CAT-M1/NB1 ALT1250 Based Chipset Power Altair Semiconductor Proprietary and Confidential 45
2.4.1.3 PMU_SHUTDOWN connected to mechanical switch In this case, when button is not pushed, the pin can be pulled up either by external 1.8V source or by PMU_VRTC. If current during the time when button is pushed is a concern then some pullup disconnection circuitry should be externally triggered when PMU_SHUTDOWN pin is being directed to GND
2.4.1.4 PMU_SHUTDOWN is not used In this case PMU_SHUTDOWN pin should be tied directly to PMU_VRTC
This pin requires an external PU resistor, please see Table 5 more information. The host connected to this pin should always keep the state of this pin (high/low) at a known state (not floating) according to the required functionality.
PMU_POWER_BUTTON
This pin requires an external PU resistor, please see Table 5 more information. The host connected to this pin should always keep the state of this pin (high/low) at a known state (not floating) according to the required functionality.
PMU_WAKEUP This pin wakes-up the system from low power state.

SIM Interface

Since all digital IOs in Type1SC-DM are in 1.8V domain, the module will support 1.8V SIM cards (ClassC).
For 3.0V SIM card support, an external voltage translator will be required.
4 Host Interface
Type1SC-DM uses the following signals for the host interface. The UART interface is necessary for communication between the host and Type1SC-DM.
The device reset status signal can be used by the host to detect that the modem has completed a reset so that the host can properly reset its internal state.
25

1SC Pin No Module Pin Name Direction Description

Note

6

PMU_WAKEUP

HD

Device Wake-Up

Only needed if low power

mode is required

32

PWM0

DH

Device reset status

64

PMU_SHUTDOWN

HD

Modem reset (active low) Optional

71

SC_SWP

DH

Host Wake-Up

72

UART0_RTS

DH

UART RTS

Only needed if low power mode is required

73

UART0_TX

DH

UART TX

75

UART0_RX

HD

UART RX

76

UART0_CTS

HD

UART CTS

Table 8 Host interface signals

Antenna Requirements

The module has been FCC/IC/ETSI certified.

5.1 Main Antenna

The antenna connection and board layout design are the most important aspect in the full product design

as they strongly affect the product overall performances, hence read carefully and follow the requirements

and the guidelines for a proper design. The antenna and antenna transmission line on PCB for a Type

1SC device shall fulfill the following requirements:

Item

Value

Frequency range

Depending by frequency band(s) provided by

the network operator, the customer shall use

the most suitable antenna for that/those

band(s)

Bandwidth

LTE Band
B1 B2 B3 B4 B5 B8 B12 B13 B17 B18 B19 B20 B25 B26 B28

Tx Band (MHz)
Min Max 1920 1980 1850 1910 1710 1785 1710 1755 824 849 880 915 699 716 777 787 704 716 815 830 830 845 832 862 1850 1915 814 849 703 748

Rx Band (MHz)
Min Max 2110 2170 1930 1990 1805 1880 2110 2155 869 894 925 960 729 746 746 756 734 746 860 875 875 890 791 821 1930 1995 859 894 758 803

Impedance
Input power VSWR absolute max

50 ohm
> 23dBm Average power 10:1 (limit to avoid permanent damage)

26

VSWR recommended

2:1 (limit to fulfill all regulatory requirements)

Maximum permitted antenna gain including cable loss should be determined from Tables 8.1 and 8.2. Failure to follow these guidelines wil result in radiated RF levels that exceed FCC MPE limits.

5.2 Antenna Design The LBAD0XX1SC-DM is configured for monostatic operation, which requires only a single RF I/O pin for full duplex communication. The output must be routed to the antenna via 50 ohm microstrip or stripline on
the OEM PCB. No coupling capacitor is required given that the RF pin is AC-coupled internal to the
LBAD0XX1SC-DM.

27

Length: 7.0mm Width: 0.6mm Thickness: 1.3mm Type of trace: 1/2oz Dielectric constant: 4.34 (FR-4) Antenna connector: SMA
28

The trace from Pin No. 29 to antenna connector on the OEM PCB must be maintained identical as the above specification with SMA connector. Only trace designs approved with an original grant or through permissive change can be used by an OEM, any changes are deemed as antenna type change and should be reviewed to ensure compliance with the FCC and ISED requirements. Verification must be conducted and the results shall not exceed below ranges to ensure identical antenna design is applied to subsequent integration and end product production. Impedance 50 ohm Input power > 23dBm Average power VSWR absolute max 10:1 (limit to avoid permanent damage) VSWR recommended 2:1 (limit to fulfill all regulatory requirements) 5.3 Test procedures of verification 1. Set Transmission in the supported modulation mode from the device in engineering mode. 2. Verify RF power through conducted measurement at balanced impedance of 50ohms, the KDB 971168 D01
Power Meas License Digital System shall be used as the supplemental test methodology to adjust the proper setting obtaining the measurement results. 3. Verify the Tx power in datasheet, and compliance test reports.
5.4 MIPI RFFE for Antenna Tuning MIPI RFFE, is a dedicated control interface for the RF front-end subsystem. This interface allows antenna designer to optimize antenna performance for different LTE bands. They can tune the antenna for different bands by using a compliant MIPI RFFE switch. Currently the module only supports the Sony Switch (CXA4472GC-E). The following signals are used for the MIPI interface.
RFFE_SCLK, RFFE_SDATA, RFFE_VDDIO_OUT
5.5 GPS Coexistence Two pins are provided for GPS coexistence. AUX_ADC1 is used for GNSS coexistence indicator and FLASH0_CS_N1 is used for GNSS SFN indication.
Other advanced GPS coexistence features will be available in a future firmware release.

APPLICATION PCB DESIGN

The Type 1SC-DM modules have been designed to be compliant with a standard lead-free SMT process.
6.1 Antenna Installation Guidelines
· Install the antenna in a place covered by the LTE signal. · If the device antenna is located farther than 20cm from the human body and there are no co-located
transmitter then the Murata FCC/IC approvals can be re-used by the end product. · If the device antenna is located closer than 20cm from the human body or there are co-located transmitter
then the additional FCC/IC testing may be required for the end product (Murata FCC/IC approvals cannot be reused). · Antenna shall not be installed inside metal cases. · Antenna shall be installed also according to antenna manufacturer instructions.
6.2 PCB Design Guidelines
When using the Type 1SC-DM, since there’s no antenna connector on the module, the antenna must be connected to the Type 1SC-DM antenna pad by means of a transmission line implemented on the PCB. In the case the antenna is not directly connected at the antenna pad of the Type 1SC-DM, then a PCB line is needed in order to connect with it or with its connector.
29

This transmission line shall fulfil the following requirements:

Value

Item

Characteristic Impedance

50 ohm

Max Attenuation

0.3 dB

Coupling

Coupling with other signals shall be

avoided

Ground Plane

Cold End (Ground Plane) of antenna

shall be equipotential to the Type 1SC-

DM ground pins

The transmission line should be designed according to the following guidelines:

· Ensure that the antenna line impedance is 50 ohm;

· Keep the antenna line on the PCB as short as possible, since the antenna line loss shall be less than 0.3

dB;

· Antenna line must have uniform characteristics, constant cross section; avoid meanders and abrupt

curves;

· Keep, if possible, one layer of the PCB used only for the Ground plane;

· Surround (on the sides, over and under) the antenna line on PCB with Ground, avoid having other signal

tracks facing directly the antenna line track;

· The ground around the antenna line on PCB has to be strictly connected to the Ground Plane by placing

vias every 2mm at least;

· Place EM noisy devices as far as possible from Type 1SC-DM antenna line;

· Keep the antenna line far away from the Type 1SC-DM power supply lines;

· If you have EM noisy devices around the PCB hosting the Type 1SC-DM, such as fast switching ICs, take

care of the shielding of the antenna line by burying it inside the layers of PCB and surround it with

Ground planes, or shield it with a metal frame cover.

· If you don’t have EM noisy devices around the PCB of Type 1SC-DM, by using a micro strip on the

superficial copper layer for the antenna line, the line attenuation will be lower than a buried one;

6.3 Transmission line design
The placement of components has been chosen properly, to keep the line length as short as possible, thus leading to lowest power losses possible.

30

7 FCC Notice
This device has Single Modular Approval. This device is approved for mobile and fixed use with respect to RF exposure compliance, and may only be marketed to OEM installers. The antenna(s) used for this transmitter, as described in this filing, must be installed to provide a separation distance of at least 20 cm from all persons. Installers and end-users must be provided with operating conditions for satisfying RF exposure compliance. Maximum permitted antenna gain including cable loss should be determined from tables 8.1 and 8.2. Failure to follow these guidelines will result in radiated RF levels that exceed FCC MPE limits
7.1 FCC Test Data

FCC CAT M1

Operation Mode
Band 2 Band 4 Band 5 Band 12 Band 13 Band 14 Band 17 Band 25 Band 26

Freq. (MHz)
1850.7 1710.7 824.7 699.7 779.5 788.1 704.1 1850.7 814.7

Conducted

Operation Average

Distance output

(cm) power

(dBm)

20

22.80

20

22.97

20

22.46

20

20.85

20

20.71

20

21.51

20

22.94

20

21.11

20

20.85

Max. output Power include
tolerance (dBm)
23.00 23.00 23.00 23.00 23.00 23.00 23.00 23.00 23.00

Antenna Gain (dBi)
10.20 7.03 11.41 10.70 11.17 11.22 10.73 11.89 11.36

EIRP (ERP) Limit (dBm)
33.00 30.00 38.45 34.77 34.77 34.77 34.77 33.00 38.45

Max. output Power (mW)
2089.30 1006.93 2762.20 2343.53 2610.81 2639.61 2358.27 3083.19 2728.70

Power Density
(PD) (mW/cm2)

PD Limit (mW/cm2)

Allowable Gain

Allowable Gain

Max Allowable

according to according to Gain (dBi)

EIRP (dBi) PD (dBi)

0.416 0.200 0.550 0.466 0.520 0.525 0.469 0.614 0.543

1.000 1.000 0.550 0.466 0.520 0.525 0.469 1.000 0.543

10.20 7.03 15.99 13.92 14.06 13.26 11.83 11.89 17.60

14.01 14.01 11.41 10.70 11.17 11.22 10.73 14.01 11.36

10.20 7.03 11.41 10.70 11.17 11.22 10.73 11.89 11.36

FCC NB IoT

Operation Mode
Band 2 Band 4 Band 5 Band 12 Band 13 Band 17 Band 25 Band 26

Freq. (MHz)
1850.2 1710.2 824.2 699.2 777.2 704.2 1850.2 814.1

Conducted

Operation Average

Distance output

(cm) power

(dBm)

20

22.75

20

22.92

20

22.46

20

23.49

20

23.43

20

23.55

20

20.85

20

23.40

Max. output Power include
tolerance (dBm)
23.00 23.00 23.00 24.00 24.00 24.00 22.00 24.00

Antenna Gain (dBi)
10.25 7.08 11.41 9.70 10.15 9.73 12.15 10.36

EIRP (ERP) Limit (dBm)
33.00 30.00 38.45 34.77 34.77 34.77 33.00 38.45

Max. output Power (mW)
2113.49 1018.59 2760.52 2341.85 2603.10 2358.60 2600.16 2726.69

Power Density
(PD) (mW/cm2)

PD Limit (mW/cm2)

Allowable Gain
according to

Allowable Gain
according to

Max Allowable Gain (dBi)

EIRP (dBi) PD (dBi)

0.421 0.203 0.549 0.466 0.518 0.469 0.518 0.543

1.000 1.000 0.549 0.466 0.518 0.469 1.000 0.543

10.25 7.08 15.99 11.28 11.34 11.22 12.15 15.05

14.01 14.01 11.41 9.70 10.15 9.73 15.01 10.36

10.25 7.08 11.41 9.70 10.15 9.73 12.15 10.36

31

7.2 ISED Test Data

ISED CAT M1

Operation Mode
Band 2 Band 4 Band 5 Band 12 Band 13 Band 17 Band 25 Band 26

Freq. (MHz)
1850.7 1710.7 824.7 699.7 779.5 704.1 1850.7 814.7

Operation Distance
(cm)
20 20 20 20 20 20 20 20

Conducted Average output power (dBm) 22.80 22.97 22.46 20.85 20.71 22.94 21.11 20.85

Max. output Power include
tolerance (dBm)
23.00 23.00 23.00 23.00 23.00 23.00 23.00 23.00

Antenna Gain (dBi)

EIRP (ERP) Limit (dBm)

10.20 7.03 8.12 7.63 7.95 7.65 10.52 8.09

33.00 30.00 38.45 34.77 34.77 34.77 33.00 38.45

Max. output Power (mW)
2089.30 1006.93 1294.74 1157.17 1245.81 1162.14 2249.48 1283.99

Power Density
(PD) (W/m2)
4.159 2.004 2.577 2.303 2.480 2.313 4.477 2.556

Limit (W/m2)

Allowable Gain

Allowable Gain

Max Allowable

according to according to Gain (dBi)

EIRP (dBi) PD (dBi)

4.477 4.243 2.577 2.303 2.480 2.313 4.477 2.556

10.20 7.03 15.99 13.92 14.06 11.83 11.89 17.60

10.52 10.29 8.12 7.63 7.95 7.65 10.52 8.09

10.20 7.03 8.12 7.63 7.95 7.65 10.52 8.09

ISED NB IoT

Operation Mode
Band 2 Band 4 Band 5 Band 12 Band 13 Band 17 Band 25 Band 26

Freq. (MHz)
1850.2 1710.2 824.2 699.2 777.2 704.2 1850.2 814.1

Operation Distance
(cm)
20 20 20 20 20 20 20 20

Conducted Average output power (dBm) 22.75 22.92 22.46 23.49 23.43 23.55 20.85 23.40

Max. output Power include
tolerance (dBm)
23.00 23.00 23.00 24.00 24.00 24.00 22.00 24.00

Antenna Gain (dBi)

EIRP (ERP) Limit (dBm)

10.25 7.08 8.12 6.63 6.95 6.65 11.52 7.08

33.00 30.00 38.45 34.77 34.77 34.77 33.00 38.45

Max. output Power (mW)
2113.49 1018.59 1294.20 1156.61 1243.30 1162.25 2249.07 1283.34

Power Density
(PD) (W/m2)
4.207 2.027 2.576 2.302 2.475 2.313 4.477 2.554

7.3 List of Applicable FCC Rules This module complies with below part 22, 24, 27 and 90 of the FCC Rules. Part 22 Subpart H
Part 24 Subpart 24E
Part 27 Subpart B, C & L
Part 90 R & S

Limit (W/m2)

Allowable Allowable

Max

Gain

Gain Allowable

according to EIRP (dBi)

according to PD (dBi)

Gain (dBi)

4.477 4.242 2.576 2.302 2.475 2.313 4.477 2.554

10.25 7.08 15.99 11.28 11.34 11.22 12.15 15.05

10.52 10.29 8.12 6.63 6.95 6.65 11.52 7.08

10.25 7.08 8.12 6.63 6.95 6.65 11.52 7.08

32

7.4 Labeling Requirements
Any device incorporating this module must include an external, visible
, permanent marking or label which states: “Contains FCC ID: HSW-TY1SCDM” and “Contains IC: 4492A-TY1SCDM
” Requirements
The modular transmitter is only FCC authorized for the specific rule parts (ie, FCC transmitter rules) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification.
The final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed.
7.6 Test Modes
Murata Manufacturing Co., Ltd. uses various test mode programs for test set up which operate separate from production firmware. Host integrators should contact Murata Manufacturing Co., Ltd. for assistance with test modes needed for module/host compliance test requirements.
Federal Communications Commission (FCC) Statement 15.21 You are warranted that changes or modifications not expressly approved by the part responsible for compliance could void the user’s authority to operate the equipment.
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: 1) this device may not cause harmful interference and 2) this device must accept any interference received, including interference that may cause undesired operation of the device.
ISED Canadian Notice This device contains license-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canada’s license-exempt RSS(s). Operation is subject to the following two conditions:
1. This device may not cause interference. 2. This device must accept any interference, including interference that may cause undesired operation of
the device.
Canadian Notice The license-exempt transmitter/receiver contained in this device complies with Innovation, Science and Economic Development Canada’s license-exempt RSS standard(s). Operation is subject to the following two conditions:
1. This device may not cause interference; 2. This device must accept any interference received, including interference that may cause undesired
operation.
33

8 Korea (MSIP)
RC-VPY-Type1SC
34

Documents / Resources

MuRata TY1SCDM Band Certification For Cellular [pdf] User Manual
HSW-TY1SCDM, HSWTY1SCDM, ty1scdm, TY1SCDM Band Certification For Cellular, TY1SCDM, Band Certification For Cellular, Certification For Cellular, For Cellular

References

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